TWI854715B - Pixel circuit, OLED display device, and information processing device - Google Patents
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Abstract
本發明主要揭示一種畫素電路,用以和一OLED元件組成一個OLED畫素單元,其包括:一數據驅動單元、一第一開關單元、一第二開關單元、一第三開關單元、一第四開關單元、以及一儲存電容。特別地,本發明以三個TFT元件組成所述數據驅動單元,以二個TFT元件組成所述第一開關單元,以一個TFT元件作為所述第二開關單元,以一個TFT元件作為所述第三開關單元,且以一個TFT元件作為所述第四開關單元。依此設計,本發明之畫素電路具有Vth補償功能,從而可以改善因TFT元件之間的Vth不一致所導致畫面顯示不均之現象。同時,本發明之畫素電路還可以有效避免因ELVDD下降(drop)所引起的畫面亮度不均的現象。The present invention mainly discloses a pixel circuit, which is used to form an OLED pixel unit with an OLED element, and includes: a data drive unit, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, and a storage capacitor. In particular, the present invention uses three TFT elements to form the data drive unit, two TFT elements to form the first switch unit, one TFT element as the second switch unit, one TFT element as the third switch unit, and one TFT element as the fourth switch unit. According to this design, the pixel circuit of the present invention has a Vth compensation function, thereby improving the phenomenon of uneven screen display caused by inconsistent Vth between TFT elements. At the same time, the pixel circuit of the present invention can also effectively avoid the phenomenon of uneven screen brightness caused by ELVDD drop.
Description
本發明為OLED顯示裝置的相關技術領域,尤指用以和一OLED元件組成一OLED畫素單元的一種畫素電路。The present invention relates to the technical field of OLED display devices, and more particularly to a pixel circuit used to form an OLED pixel unit with an OLED element.
已知,平面顯示器包含非自發光型平面顯示器以及自發光型平面顯示器,其中液晶顯示器為使用已久的一種非自發光型平面顯示器,而有機發光二極體(Organic light-emitting diode, OLED)顯示器以及發光二極體(Light-emitting diode, LED)顯示器則為目前具有主流應用的自發光型平面顯示器。It is known that flat panel displays include non-self-luminous flat panel displays and self-luminous flat panel displays, wherein liquid crystal displays are a type of non-self-luminous flat panel displays that have been used for a long time, while organic light-emitting diode (OLED) displays and light-emitting diode (LED) displays are self-luminous flat panel displays that are currently in mainstream applications.
圖1為習知的一種OLED顯示裝置的方塊圖。如圖1所示,習知的OLED顯示裝置1a係主要包括:一OLED顯示面板11a以及至少一顯示驅動晶片12a,其中該OLED顯示面板11a包括M×N個畫素電路111a、M×N個OLED元件112a、M條閘極線11Ga、以及N條源極線11Sa。更詳細地說明,一個畫素電路111a和一個OLED元件112a組成一個OLED畫素單元,使得該OLED顯示面板11a包含M×N個OLED畫素單元。正常工作時,所述顯示驅動晶片12a接收傳送自一上位機2a(如:智慧型手機的應用處理器)的一顯示數據,並依據該顯示數據控制各所述畫素電路111a作動以使各所述OLED元件112a發光或不發光,從而驅動該OLED顯示面板11a進行圖像顯示。FIG1 is a block diagram of a known OLED display device. As shown in FIG1 , the known OLED display device 1a mainly includes: an
傳統上,畫素電路111a係採2T1C架構,即,包含二個薄膜電晶體(Thin-Film Transistor, TFT)和一個電容。近年來,為了改善因電晶體閥值電壓(Vth)差異所引致的OLED元件發光亮度不均以及OLED元件老化所引發的跨壓上升等問題,採4T1C或5T1C架構的畫素電路111a接連被提出且在OLED顯示面板11a的製作上獲得實質應用。可惜的是,現有的畫素電路111a仍舊存在因閥值電壓差異所引發的OLED元件112a發光亮度不均的問題,終致OLED顯示面板11a的部分區塊出現所謂的Mura現象。Traditionally, the
由上述說明可知,本領域亟需一種新式的畫素電路。From the above description, it can be seen that a new pixel circuit is urgently needed in this field.
本發明之主要目的在於提供一種畫素電路,用以和一OLED元件組成一OLED畫素單元,且M×N個所述OLED畫素單元組成一OLED面板。本發明之畫素電路採8T1C架構,可以對TFT元件之間的閥值電壓差異進行補償,使各個OLED元件發光亮度均勻,確保OLED顯示面板在顯示圖像的過程中不會出現所謂的Mura現象。同時,本發明之畫素電路還可以有效避免因ELVDD下降(drop)所引起的)畫面亮度不均的現象。The main purpose of the present invention is to provide a pixel circuit, which is used to form an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention adopts an 8T1C structure, which can compensate for the difference in threshold voltage between TFT elements, so that each OLED element emits light with uniform brightness, ensuring that the OLED display panel will not have the so-called Mura phenomenon during the image display process. At the same time, the pixel circuit of the present invention can also effectively avoid the phenomenon of uneven screen brightness caused by ELVDD drop.
為達成上述目的,本發明提出所述畫素電路的一實施例,其包括: 一數據驅動單元,具有一第一端、一第二端、一第三端、一第四端、一第五端、一第六端、一第七端、與一第八端,其中,該第一端耦接至一第一驅動電壓,該第四端耦接至一驅動端,該第五端耦接至一第一發光調控信號,且該第八端耦接至一第二發光調控信號; 一第一開關單元,具有一第一端、一第二端、一第三端、一第四端、與一第五端,其中該第一端耦接至該第二發光調控信號,該第二端耦接至該數據驅動單元的該第七端,該第三端耦接至一數據電壓,該第四端耦接至一第一控制信號,且該第五端耦接至一第二控制信號; 一第二開關單元,具有一第一端、一第二端與一第三端,其中該第一端耦接至該第二控制信號,該第二端耦接至該驅動端,該驅動端耦接至一OLED元件,且該第三端耦接至一公共電壓; 一第三開關單元,具有一第一端、一第二端與一第三端,其中該第一端耦接至一第三控制信號,該第二端耦接至該數據驅動單元的該第六端,該第三端耦接至該公共電壓; 一第四開關單元,具有一第一端、一第二端與一第三端,其中該第二端耦接至一第三發光調控信號,且該第三端耦接至該數據驅動單元的該第三端;以及 一儲存電容,其一端耦接至該數據驅動單元的該第一端,且其另一端同時耦接該第四開關單元的該第一端以及該數據驅動單元的該第二端。 To achieve the above-mentioned purpose, the present invention proposes an embodiment of the pixel circuit, which includes: A data driving unit, having a first end, a second end, a third end, a fourth end, a fifth end, a sixth end, a seventh end, and an eighth end, wherein the first end is coupled to a first driving voltage, the fourth end is coupled to a driving end, the fifth end is coupled to a first light-emitting control signal, and the eighth end is coupled to a second light-emitting control signal; A first switch unit, having a first end, a second end, a third end, a fourth end, and a fifth end, wherein the first end is coupled to the second light-emitting control signal, the second end is coupled to the seventh end of the data driving unit, the third end is coupled to a data voltage, the fourth end is coupled to a first control signal, and the fifth end is coupled to a second control signal; A second switch unit having a first end, a second end and a third end, wherein the first end is coupled to the second control signal, the second end is coupled to the drive end, the drive end is coupled to an OLED element, and the third end is coupled to a common voltage; A third switch unit having a first end, a second end and a third end, wherein the first end is coupled to a third control signal, the second end is coupled to the sixth end of the data drive unit, and the third end is coupled to the common voltage; A fourth switch unit having a first end, a second end and a third end, wherein the second end is coupled to a third light-emitting control signal, and the third end is coupled to the third end of the data drive unit; and A storage capacitor, one end of which is coupled to the first end of the data driving unit, and the other end of which is simultaneously coupled to the first end of the fourth switch unit and the second end of the data driving unit.
在一實施例中,該數據驅動單元包括: 一第一TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第一電性端分別作為該數據驅動單元的該第八端與該第一端; 一第二TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端作為該數據驅動單元的該第二端,且該第一電性端耦接該第一TFT元件的該第二電性端;以及 一第三TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第二電性端分別作為該數據驅動單元的該第五端與該第四端,且該第一電性端耦接該第二TFT元件的該第二電性端。 In one embodiment, the data drive unit includes: a first TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the first electrical terminal serve as the eighth terminal and the first terminal of the data drive unit respectively; a second TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second terminal of the data drive unit, and the first electrical terminal is coupled to the second electrical terminal of the first TFT element; and a third TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the second electrical terminal serve as the fifth terminal and the fourth terminal of the data drive unit respectively, and the first electrical terminal is coupled to the second electrical terminal of the second TFT element.
在一實施例中,該第一開關單元包括: 一第四TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該第一電性端和該閘極端與分別作為該第一開關單元的該第一端和該第五端;以及 一第五TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該第二電性端和該閘極端與分別作為該第一開關單元的該第三端和該第四端,且該第一電性端耦接至該第四TFT元件的該第二電性端以形成一第一共接端,該第一共接端作為該第一開關單元的該第二端。 In one embodiment, the first switch unit includes: a fourth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the first electrical terminal and the gate terminal serve as the first terminal and the fifth terminal of the first switch unit respectively; and a fifth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the second electrical terminal and the gate terminal serve as the third terminal and the fourth terminal of the first switch unit respectively, and the first electrical terminal is coupled to the second electrical terminal of the fourth TFT element to form a first common terminal, and the first common terminal serves as the second terminal of the first switch unit.
在一實施例中,該第二開關單元包括: 一第六TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第二開關單元的該第一端、該第二端與該第三端。 In one embodiment, the second switch unit includes: A sixth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the first terminal, the second terminal and the third terminal of the second switch unit respectively.
在一實施例中,該第三開關單元包括: 一第七TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第三開關單元的該第一端、該第二端與該第三端。 In one embodiment, the third switch unit includes: A seventh TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the first terminal, the second terminal and the third terminal of the third switch unit respectively.
在一實施例中,該第四開關單元包括: 一第八TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第四開關單元的該第二端、該第三端與該第一端。 In one embodiment, the fourth switch unit includes: An eighth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the second terminal, the third terminal and the first terminal of the fourth switch unit respectively.
在可行的實施例中,該第八TFT元件為N型低溫多晶氧化物(Low Temperature Polycrystalline Oxide, LTPO)TFT元件,且該第一TFT元件、該第二TFT元件、該第三TFT元件、該第四TFT元件、該第五TFT元件、該第六TFT元件、以及該第七TFT元件皆為P型低溫多晶矽(Low Temperature Poly-silicon, LTPS)TFT元件。In a feasible embodiment, the eighth TFT element is an N-type low temperature polycrystalline oxide (LTPO) TFT element, and the first TFT element, the second TFT element, the third TFT element, the fourth TFT element, the fifth TFT element, the sixth TFT element, and the seventh TFT element are all P-type low temperature polycrystalline silicon (LTPS) TFT elements.
並且,本發明同時提供一種OLED顯示裝置的一實施例,其包括一OLED顯示面板與至少一個顯示驅動晶片,其中該OLED顯示面板包括M×N個畫素單元,且各所述畫素單元由一個畫素電路和一個OLED元件所組成;其特徵在於,所述畫素電路包括: 一數據驅動單元,具有一第一端、一第二端、一第三端、一第四端、一第五端、一第六端、一第七端、與一第八端,其中,該第一端耦接至一第一驅動電壓,該第四端耦接至一驅動端,該第五端耦接至一第一發光調控信號,且該第八端耦接至一第二發光調控信號; 一第一開關單元,具有一第一端、一第二端、一第三端、一第四端、與一第五端,其中該第一端耦接至該第二發光調控信號,該第二端耦接至該數據驅動單元的該第七端,該第三端耦接至一數據電壓,該第四端耦接至一第一控制信號,且該第五端耦接至一第二控制信號; 一第二開關單元,具有一第一端、一第二端與一第三端,其中該第一端耦接至該第二控制信號,該第二端耦接至該驅動端,該驅動端耦接至一OLED元件,且該第三端耦接至一公共電壓; 一第三開關單元,具有一第一端、一第二端與一第三端,其中該第一端耦接至一第三控制信號,該第二端耦接至該數據驅動單元的該第六端,該第三端耦接至該公共電壓; 一第四開關單元,具有一第一端、一第二端與一第三端,其中該第二端耦接至一第三發光調控信號,且該第三端耦接至該數據驅動單元的該第三端;以及 一儲存電容,其一端耦接至該數據驅動單元的該第一端,且其另一端同時耦接該第四開關單元的該第一端以及該數據驅動單元的該第二端。 Furthermore, the present invention also provides an embodiment of an OLED display device, which includes an OLED display panel and at least one display driver chip, wherein the OLED display panel includes M×N pixel units, and each pixel unit is composed of a pixel circuit and an OLED element; the pixel circuit includes: A data driver unit having a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, a sixth terminal, a seventh terminal, and an eighth terminal, wherein the first terminal is coupled to a first driving voltage, the fourth terminal is coupled to a driving terminal, the fifth terminal is coupled to a first light-emitting control signal, and the eighth terminal is coupled to a second light-emitting control signal; A first switch unit, having a first end, a second end, a third end, a fourth end, and a fifth end, wherein the first end is coupled to the second light-emitting control signal, the second end is coupled to the seventh end of the data driving unit, the third end is coupled to a data voltage, the fourth end is coupled to a first control signal, and the fifth end is coupled to a second control signal; A second switch unit, having a first end, a second end, and a third end, wherein the first end is coupled to the second control signal, the second end is coupled to the driving end, the driving end is coupled to an OLED element, and the third end is coupled to a common voltage; A third switch unit, having a first end, a second end and a third end, wherein the first end is coupled to a third control signal, the second end is coupled to the sixth end of the data drive unit, and the third end is coupled to the common voltage; A fourth switch unit, having a first end, a second end and a third end, wherein the second end is coupled to a third light-emitting control signal, and the third end is coupled to the third end of the data drive unit; and A storage capacitor, one end of which is coupled to the first end of the data drive unit, and the other end of which is simultaneously coupled to the first end of the fourth switch unit and the second end of the data drive unit.
在一實施例中,該數據驅動單元包括: 一第一TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第一電性端分別作為該數據驅動單元的該第八端與該第一端; 一第二TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端作為該數據驅動單元的該第二端,且該第一電性端耦接該第一TFT元件的該第二電性端;以及 一第三TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第二電性端分別作為該數據驅動單元的該第五端與該第四端,且該第一電性端耦接該第二TFT元件的該第二電性端。 In one embodiment, the data drive unit includes: a first TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the first electrical terminal serve as the eighth terminal and the first terminal of the data drive unit respectively; a second TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second terminal of the data drive unit, and the first electrical terminal is coupled to the second electrical terminal of the first TFT element; and a third TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the second electrical terminal serve as the fifth terminal and the fourth terminal of the data drive unit respectively, and the first electrical terminal is coupled to the second electrical terminal of the second TFT element.
在一實施例中,該第一開關單元包括: 一第四TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該第一電性端和該閘極端與分別作為該第一開關單元的該第一端和該第五端;以及 一第五TFT元件,具有一閘極端、一第一電性端與一第二電性端,其中該第二電性端和該閘極端與分別作為該第一開關單元的該第三端和該第四端,且該第一電性端耦接至該第四TFT元件的該第二電性端以形成一第一共接端,該第一共接端作為該第一開關單元的該第二端。 In one embodiment, the first switch unit includes: a fourth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the first electrical terminal and the gate terminal serve as the first terminal and the fifth terminal of the first switch unit respectively; and a fifth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the second electrical terminal and the gate terminal serve as the third terminal and the fourth terminal of the first switch unit respectively, and the first electrical terminal is coupled to the second electrical terminal of the fourth TFT element to form a first common terminal, and the first common terminal serves as the second terminal of the first switch unit.
在一實施例中,該第二開關單元包括: 一第六TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第二開關單元的該第一端、該第二端與該第三端。 In one embodiment, the second switch unit includes: A sixth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the first terminal, the second terminal and the third terminal of the second switch unit respectively.
在一實施例中,該第三開關單元包括: 一第七TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第三開關單元的該第一端、該第二端與該第三端。 In one embodiment, the third switch unit includes: A seventh TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the first terminal, the second terminal and the third terminal of the third switch unit respectively.
在一實施例中,該第四開關單元包括: 一第八TFT元件,具有一閘極端、一第一電性端與一第二電性端分別作為該第四開關單元的該第二端、該第三端與該第一端。 In one embodiment, the fourth switch unit includes: An eighth TFT element having a gate terminal, a first electrical terminal and a second electrical terminal serving as the second terminal, the third terminal and the first terminal of the fourth switch unit respectively.
在可行的實施例中,該第八TFT元件為N型低溫多晶氧化物(Low Temperature Polycrystalline Oxide, LTPO)TFT元件,且該第一TFT元件、該第二TFT元件、該第三TFT元件、該第四TFT元件、該第五TFT元件、該第六TFT元件、以及該第七TFT元件皆為P型低溫多晶矽(Low Temperature Poly-silicon, LTPS)TFT元件。In a feasible embodiment, the eighth TFT element is an N-type low temperature polycrystalline oxide (LTPO) TFT element, and the first TFT element, the second TFT element, the third TFT element, the fourth TFT element, the fifth TFT element, the sixth TFT element, and the seventh TFT element are all P-type low temperature polycrystalline silicon (LTPS) TFT elements.
進一步地,本發明還提供一種資訊處理裝置,其特徵在於,具有至少一個如前所述本發明之OLED顯示裝置。在一實施例中,該資訊處理裝置是選自於由頭戴式顯示裝置、智慧型電視、智慧型手機、智慧型手錶、平板電腦、一體式電腦、筆記型電腦、車載娛樂裝置、數位相機、和視訊式門口機所組成群組之中的一種電子裝置。Furthermore, the present invention also provides an information processing device, characterized in that it has at least one OLED display device of the present invention as described above. In one embodiment, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a notebook computer, a car entertainment device, a digital camera, and a video door phone.
為使 貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.
圖2為包含本發明之一種畫素電路的一OLED顯示裝置的方塊圖。如圖2所示,該OLED顯示裝置1主要包括:一OLED顯示面板11以及至少一顯示驅動晶片12,其中該OLED顯示面板11包括M×N個畫素電路1P、M×N個OLED元件112、M條閘極線11G、以及N條源極線11S。正常工作時,所述顯示驅動晶片12接收傳送自一上位機2(如:智慧型手機的應用處理器)的一顯示數據,並依據顯示數據控制各所述畫素電路1P作動以使各所述發光元件112發光或不發光,藉此方式使該OLED顯示面板11顯示圖像。
FIG2 is a block diagram of an OLED display device including a pixel circuit of the present invention. As shown in FIG2, the OLED display device 1 mainly includes: an
圖3為圖2所示之畫素電路1P的電路拓樸圖。如圖3所示,本發明之畫素電路1P包括:一數據驅動單元1P0、一第一開關單元1P1、一第二開關單元1P2、一第三開關單元1P3、一第四開關單元1P4、以及一儲存電容1PC,其中該數據驅動單元1P0具有一第一端1P01、一第二端1P02、一第三端1P03、一第四端1P04、一第五端1P05、一第六端1P06、一第七端1P07、與一第八端1P08。並且,該第一端1P01耦接至一第一驅動電壓ELVDD,該第四端1P04耦接至一驅動端,該第五端1P05耦接至一第一發光調控信號EM1,且該第八端1P08耦接至一第二發光調控信號EM2。具體地,如圖3所示,本發明以一第一TFT元件M1、一第二TFT元件M2以及一第三TFT元件M3組成所述數據驅動單元1P0。
FIG3 is a circuit topology diagram of the
熟悉LCD及/或OLED之畫素電路之設計與製作的電子工程師必然之後,TFT元件為一種對稱型元件,其閘極端為元件控制端,其兩端則為二電性端,依據電流的流向來決定二電性端為源極端與汲極端。簡單地說,在一電性端作為源極端的情況下,另一端即為汲極端,反之亦然。以此觀念為基礎,如圖3所示,該第一TFT元件M1具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第一電性端分別作為該數據驅動單元1P0的該第八端1P08與該第一端1P01。另一方面,該第二TFT元件M2具有一閘極端、一第一電性端與一第二電性端,其中該閘極端作為該數據驅動單元1P0的該第二端1P02,且該第一電性端耦接該第一TFT元件M1的該第二電性端。此外,該第三TFT元件M3具有一閘極端、一第一電性端與一第二電性端,其中該閘極端與該第二電性端分別作為該數據驅動單元1P0的該第五端1P05與該第四端1P04,且該第一電性端耦接該第二TFT元件M2的該第二電性端。Electronic engineers familiar with the design and manufacture of LCD and/or OLED pixel circuits will inevitably know that a TFT element is a symmetrical element, whose gate terminal is the element control terminal, and its two ends are two electrical terminals, which are determined as the source terminal and the drain terminal according to the flow direction of the current. Simply put, when one electrical terminal is used as the source terminal, the other terminal is the drain terminal, and vice versa. Based on this concept, as shown in FIG3 , the first TFT element M1 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the first electrical terminal serve as the eighth terminal 1P08 and the first terminal 1P01 of the data drive unit 1P0, respectively. On the other hand, the second TFT element M2 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second terminal 1P02 of the data driving unit 1P0, and the first electrical terminal is coupled to the second electrical terminal of the first TFT element M1. In addition, the third TFT element M3 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal and the second electrical terminal serve as the fifth terminal 1P05 and the fourth terminal 1P04 of the data driving unit 1P0, respectively, and the first electrical terminal is coupled to the second electrical terminal of the second TFT element M2.
如圖3所示,該第一開關單元1P1具有一第一端1P11、一第二端1P12、一第三端1P13、一第四端1P14、與一第五端1P15,其中該第一端1P11耦接至該第二發光調控信號EM2,該第二端1P12耦接至該數據驅動單元1P0的該第七端1P07,該第三端1P13耦接至一數據電壓Vdata,該第四端1P14耦接至一第一控制信號S1,且該第五端1P15耦接至一第二控制信號S2。具體地,本發明以一第四TFT元件M4和一第五TFT元件M5組成所述第一開關單元1P1。如圖3所示,該第四TFT元件M4具有一閘極端、一第一電性端與一第二電性端,其中該第一電性端和該閘極端與分別作為該第一開關單元1P1的該第一端1P11和該第五端1P15。另一方面,該第五TFT元件M5具有一閘極端、一第一電性端與一第二電性端,其中該第二電性端和該閘極端與分別作為該第一開關單元1P1的該第三端1P13和該第四端1P14,且該第一電性端耦接至該第四TFT元件M4的該第二電性端以形成一第一共接端,該第一共接端作為該第一開關單元1P1的該第二端1P12。As shown in FIG3 , the first switch unit 1P1 has a first terminal 1P11, a second terminal 1P12, a third terminal 1P13, a fourth terminal 1P14, and a fifth terminal 1P15, wherein the first terminal 1P11 is coupled to the second light-emitting control signal EM2, the second terminal 1P12 is coupled to the seventh terminal 1P07 of the data driving unit 1P0, the third terminal 1P13 is coupled to a data voltage Vdata, the fourth terminal 1P14 is coupled to a first control signal S1, and the fifth terminal 1P15 is coupled to a second control signal S2. Specifically, the present invention uses a fourth TFT element M4 and a fifth TFT element M5 to form the first switch unit 1P1. As shown in FIG3 , the fourth TFT element M4 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the first electrical terminal and the gate terminal are used as the first terminal 1P11 and the fifth terminal 1P15 of the first switch unit 1P1, respectively. On the other hand, the fifth TFT element M5 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the second electrical terminal and the gate terminal are used as the third terminal 1P13 and the fourth terminal 1P14 of the first switch unit 1P1, respectively, and the first electrical terminal is coupled to the second electrical terminal of the fourth TFT element M4 to form a first common terminal, and the first common terminal is used as the second terminal 1P12 of the first switch unit 1P1.
進一步地,該第二開關單元1P2具有一第一端1P21、一第二端1P22與一第三端1P23,其中該第一端1P21耦接至該第二控制信號S2,該第二端1P22耦接至該驅動端,該驅動端耦接至一OLED元件,且該第三端1P23耦接至一公共電壓Vcom。具體地,如圖3所示,本發明以一第六TFT元件M6作為所述第二開關單元1P2,且該第六TFT元件M6具有一閘極端、一第一電性端與一第二電性端分別作為該第二開關單元1P2的該第一端1P21、該第二端1P22與該第三端1P23。Further, the second switch unit 1P2 has a first terminal 1P21, a second terminal 1P22 and a third terminal 1P23, wherein the first terminal 1P21 is coupled to the second control signal S2, the second terminal 1P22 is coupled to the driving terminal, the driving terminal is coupled to an OLED element, and the third terminal 1P23 is coupled to a common voltage Vcom. Specifically, as shown in FIG. 3 , the present invention uses a sixth TFT element M6 as the second switch unit 1P2, and the sixth TFT element M6 has a gate terminal, a first electrical terminal and a second electrical terminal as the first terminal 1P21, the second terminal 1P22 and the third terminal 1P23 of the second switch unit 1P2, respectively.
另一方面,該第三開關單元1P3具有一第一端1P31、一第二端1P32與一第三端1P33,其中該第一端1P31耦接至一第三控制信號S3,該第二端1P32耦接至該數據驅動單元1P0的該第六端1P06,該第三端1P33耦接至該公共電壓Vcom。依據本發明之設計,如圖3所示,該第三開關單元包括一第七TFT元件M7,其具有一閘極端、一第一電性端與一第二電性端分別作為該第三開關單元1P3的該第一端1P31、該第二端1P32與該第三端1P33。On the other hand, the third switch unit 1P3 has a first terminal 1P31, a second terminal 1P32 and a third terminal 1P33, wherein the first terminal 1P31 is coupled to a third control signal S3, the second terminal 1P32 is coupled to the sixth terminal 1P06 of the data driving unit 1P0, and the third terminal 1P33 is coupled to the common voltage Vcom. According to the design of the present invention, as shown in FIG3, the third switch unit includes a seventh TFT element M7, which has a gate terminal, a first electrical terminal and a second electrical terminal as the first terminal 1P31, the second terminal 1P32 and the third terminal 1P33 of the third switch unit 1P3 respectively.
再者,該第四開關單元1P4具有一第一端1P41、一第二端1P42與一第三端1P43,其中該第二端1P42耦接至一第三發光調控信號EM3,且該第三端1P43耦接至該數據驅動單元1P0的該第三端1P03。具體地,本發明以一第八TFT元件M8作為所述第四開關單元,且該第八TFT元件M8具有一閘極端、一第一電性端與一第二電性端分別作為該第四開關單元1P4的該第二端1P42、該第三端1P43與該第一端1P41。另一方面,該儲存電容1PC的一端耦接至該數據驅動單元1P0的該第一端1P01,且其另一端同時耦接該第四開關單元1P4的該第一端1P41以及該數據驅動單元1P0的該第二端1P02。 Furthermore, the fourth switch unit 1P4 has a first terminal 1P41, a second terminal 1P42 and a third terminal 1P43, wherein the second terminal 1P42 is coupled to a third light-emitting control signal EM3, and the third terminal 1P43 is coupled to the third terminal 1P03 of the data driving unit 1P0. Specifically, the present invention uses an eighth TFT element M8 as the fourth switch unit, and the eighth TFT element M8 has a gate terminal, a first electrical terminal and a second electrical terminal as the second terminal 1P42, the third terminal 1P43 and the first terminal 1P41 of the fourth switch unit 1P4 respectively. On the other hand, one end of the storage capacitor 1PC is coupled to the first end 1P01 of the data driving unit 1P0, and the other end thereof is simultaneously coupled to the first end 1P41 of the fourth switch unit 1P4 and the second end 1P02 of the data driving unit 1P0.
特別地,在本發明之畫素電路1P之中,該第八TFT元件M8為N型低溫多晶氧化物(Low Temperature Polycrystalline Oxide,LTPO)TFT元件,且該第一TFT元件M1、該第二TFT元件M2、該第三TFT元件M3、該第四TFT元件M4、該第五TFT元件M5、該第六TFT元件M6、以及該第七TFT元件M7皆為P型低溫多晶矽(Low Temperature Poly-silicon,LTPS)TFT元件。
In particular, in the
圖4為用以控制本發明之畫素電路的多個信號的工作時序圖。如圖3與圖4所示,在時間區間T1,由於第二控制信號S2和第一發光調控信號EM1皆為低電平且第三發光調控信號EM3為高電平,因此該第三TFT元件M3、第四TFT元件M4、該第六TFT元件M6、以及該第八TFT元件M8皆導通,使得該公共電壓Vcom通過該第六TFT元件M6對該OLED元件112的陽極端進行端電壓的重置。並且,該公共電壓Vcom還通過該第三TFT元件M3、該第六TFT元件M6和該第八TFT元件M8對該第二TFT元件M2的閘極端進行端電壓的重置,從而連帶著重置該儲存電容1PC的電容電壓。更詳細地說明,在時間區間T1內,該第一發光調控信號EM1的高電壓(VGH)通過該第四TFT元件M4傳送至第一節點N1,使得該第二TFT元件M2的VGS=Vcom-VGH。如此,便可以保證在寫入當前幀數據電壓Vdata前,所有畫素電路1P的第二TFT元件M2都處於相同的VGS偏壓,從而改善由於磁滯效應引起的OLED顯示面板11的短期殘像不良現象。FIG4 is a working timing diagram of multiple signals for controlling the pixel circuit of the present invention. As shown in FIG3 and FIG4, in the time interval T1, since the second control signal S2 and the first light emission control signal EM1 are both at a low level and the third light emission control signal EM3 is at a high level, the third TFT element M3, the fourth TFT element M4, the sixth TFT element M6, and the eighth TFT element M8 are all turned on, so that the common voltage Vcom resets the terminal voltage of the anode terminal of the
在時間區間T2,由於第一控制信號S1和第三控制信號S3皆為低電平且第三發光調控信號EM3為高電平,因此該第八TFT元件M8、該第五TFT元件M5以及該第七TFT元件M7皆導通,使得當前幀的數據電壓Vdata可以被傳送至第二節點N2,從而對該儲存電容1PC進行充電。更詳細地說明,於時間區間T2內,若第二節點N2的節點電壓V N2=Vdata+Vth(M2),該第二TFT元件M2便會關閉,從而使該儲存電容1PC不再受到Vdata的充電。應可理解,由於第二節點N2的節點電壓被充電至Vdata+Vth(M2),因此起到了對於該第二TFT元件M2的臨界電壓(即,Vth(M2))的補償作用。簡單地說,T2為第二TFT元件M2的臨界電壓的補償階段以及數據電壓的寫入階段。 In the time interval T2, since the first control signal S1 and the third control signal S3 are both at a low level and the third light-emitting control signal EM3 is at a high level, the eighth TFT element M8, the fifth TFT element M5 and the seventh TFT element M7 are all turned on, so that the data voltage Vdata of the current frame can be transmitted to the second node N2, thereby charging the storage capacitor 1PC. To explain in more detail, in the time interval T2, if the node voltage V N2 of the second node N2 =Vdata+Vth(M2), the second TFT element M2 will be turned off, so that the storage capacitor 1PC is no longer charged by Vdata. It should be understood that since the node voltage of the second node N2 is charged to Vdata+Vth(M2), it plays a role in compensating the critical voltage of the second TFT element M2 (i.e., Vth(M2)). In short, T2 is the compensation stage of the critical voltage of the second TFT element M2 and the writing stage of the data voltage.
進一步地,在時間區間T3,由於第二發光調控信號EM2和第一發光調控信號EM1皆為低電平,因此該第一TFT元件M1、該第二TFT元件M2以及該第三TFT元件M3皆導通,使得該OLED元件112受電壓驅動而發光。進一步地,根據電晶體飽和區電流公式可以進行如下數學運算:
從如上數學運算之結果可以看出,Vth被抵消掉,OLED元件112的驅動電流和Vth沒有關係。因此,本發明之畫素電路1P可以改善由於TFT元件的Vth電壓不一致所導致的畫面顯示不均的現象。
From the above mathematical calculation results, it can be seen that Vth is offset and the driving current of the
如此,上述已完整且清楚地說明本發明之畫素電路;並且,經由上述可得知本發明具有下列優點: Thus, the above has completely and clearly explained the pixel circuit of the present invention; and, from the above, it can be known that the present invention has the following advantages:
(1)本發明揭示一種畫素電路,用以和一OLED元件組成一OLED畫素單元,且M×N個所述OLED畫素單元組成一OLED面板。本發明之畫素電路採8T1C架構,可以對TFT元件之間的閥值電壓差異進行補償,使各個OLED元件發光亮度均勻,確保OLED顯示面板在顯示圖像的過程中不會出現所謂的Mura現象。同時,本發明之畫素電路還可以有效避免因ELVDD下降(drop)所引起的)畫面亮度不均的現象。 (1) The present invention discloses a pixel circuit, which is used to form an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention adopts an 8T1C structure, which can compensate for the difference in threshold voltage between TFT elements, so that each OLED element emits light with uniform brightness, ensuring that the OLED display panel will not have the so-called Mura phenomenon during the image display process. At the same time, the pixel circuit of the present invention can also effectively avoid the phenomenon of uneven screen brightness caused by ELVDD drop.
(2)本發明同時提供一種OLED顯示裝置,其包括一OLED顯示面板與至少一個顯示驅動晶片,其中該OLED顯示面板包括M×N個OLED畫素單元,且其特徵在於各所述OLED畫素單元由一個OLED元件以及一個前述本發明之畫素電路所組成。 (2) The present invention also provides an OLED display device, which includes an OLED display panel and at least one display driver chip, wherein the OLED display panel includes M×N OLED pixel units, and is characterized in that each of the OLED pixel units is composed of an OLED element and a pixel circuit of the present invention.
(3)本發明同時提供一種資訊處理裝置,其具有如前所述本發明之OLED顯示裝置。並且,該資訊處理裝置是選自於由頭戴式顯示裝置、智慧型電視、智慧型手機、智慧型手錶、平板電腦、一體式電腦、筆記型電腦、車載娛樂裝置、數位相機、和視訊式門口機所組成群組之中的一種電子裝置。(3) The present invention also provides an information processing device having the OLED display device of the present invention as described above. Furthermore, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a notebook computer, an in-vehicle entertainment device, a digital camera, and a video door phone.
必須加以強調的是,前述本案所揭示者乃為較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。It must be emphasized that what is disclosed in the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, this case shows that its purpose, means and effects are all different from the known technology, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.
1a:OLED顯示裝置1a: OLED display device
11a:OLED顯示面板11a:OLED display panel
111a:畫素電路111a: Pixel circuit
112a:OLED元件112a: OLED element
11Ga:閘極線11Ga: Gate line
11Sa:源極線11Sa: Source line
12a:顯示驅動晶片12a: Display driver chip
2a:上位機2a: Host computer
1:OLED顯示裝置1:OLED display device
11:OLED顯示面板11:OLED display panel
112:OLED元件112: OLED components
11G:閘極線11G: Gate line
11S:源極線11S: Source line
12:顯示驅動晶片12: Display driver chip
2:上位機2: Host computer
1P:畫素電路1P: Pixel circuit
1P0:數據驅動單元1P0: Data drive unit
1P01:第一端1P01: First end
1P02:第二端1P02: Second end
1P03:第三端1P03: Third terminal
1P04:第四端1P04: The fourth end
1P05:第五端1P05: The fifth end
1P06:第六端1P06: The Sixth Terminal
1P07:第七端1P07: The Seventh End
1P08:第八端1P08: The Eighth Terminal
1P1:第一開關單元1P1: First switch unit
1P11:第一端1P11: First End
1P12:第二端1P12: Second end
1P13:第三端1P13: Third terminal
1P14:第四端1P14: The fourth end
1P15:第五端1P15: Fifth terminal
1P2:第二開關單元1P2: Second switch unit
1P21:第一端1P21: First End
1P22:第二端1P22: Second end
1P23:第三端1P23: Third terminal
1P3:第三開關單元1P3: The third switch unit
1P31:第一端1P31: First end
1P32:第二端1P32: Second end
1P33:第三端1P33: The third end
1P4:第四開關單元1P4: The fourth switch unit
1P41:第一端1P41: First End
1P42:第二端1P42: Second end
1P43:第三端1P43: The third end
1PC:儲存電容1PC: Storage capacitor
圖1為習知的一種OLED顯示裝置的方塊圖; 圖2為包含本發明之一種畫素電路的一OLED顯示裝置的方塊圖; 圖3為圖2所示之畫素電路的電路拓樸圖;以及 圖4為用以控制本發明之畫素電路的多個信號的工作時序圖。 FIG. 1 is a block diagram of a known OLED display device; FIG. 2 is a block diagram of an OLED display device including a pixel circuit of the present invention; FIG. 3 is a circuit topology diagram of the pixel circuit shown in FIG. 2; and FIG. 4 is a working timing diagram of multiple signals used to control the pixel circuit of the present invention.
1P:畫素電路 1P: Pixel circuit
1P0:數據驅動單元 1P0: Data drive unit
1P01:第一端 1P01: First end
1P02:第二端 1P02: Second end
1P03:第三端 1P03: The third end
1P04:第四端 1P04: The fourth end
1P05:第五端 1P05: The fifth end
1P06:第六端 1P06: The sixth end
1P07:第七端 1P07: The seventh end
1P08:第八端 1P08: The eighth end
1P1:第一開關單元 1P1: First switch unit
1P11:第一端 1P11: First end
1P12:第二端 1P12: Second end
1P13:第三端 1P13: The third end
1P14:第四端 1P14: The fourth end
1P15:第五端 1P15: Fifth terminal
1P2:第二開關單元 1P2: Second switch unit
1P21:第一端 1P21: First end
1P22:第二端 1P22: Second end
1P23:第三端 1P23: Third terminal
1P3:第三開關單元 1P3: The third switch unit
1P31:第一端 1P31: First end
1P32:第二端 1P32: Second end
1P33:第三端 1P33: The third end
1P4:第四開關單元 1P4: The fourth switch unit
1P41:第一端 1P41: First end
1P42:第二端 1P42: Second end
1P43:第三端 1P43: The third end
1PC:儲存電容 1PC: Storage capacitor
Claims (13)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112123254A TWI854715B (en) | 2023-06-20 | 2023-06-20 | Pixel circuit, OLED display device, and information processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112123254A TWI854715B (en) | 2023-06-20 | 2023-06-20 | Pixel circuit, OLED display device, and information processing device |
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| Publication Number | Publication Date |
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| TWI854715B true TWI854715B (en) | 2024-09-01 |
| TW202501448A TW202501448A (en) | 2025-01-01 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201939472A (en) * | 2018-03-15 | 2019-10-01 | 大陸商業成科技(成都)有限公司 | Active-matrix organic light-emitting diode pixel circuit of integrated external processor and driving method for the same |
| TW202109492A (en) * | 2019-08-27 | 2021-03-01 | 友達光電股份有限公司 | Pixel circuit |
| US20210375201A1 (en) * | 2020-06-02 | 2021-12-02 | Samsung Display Co., Ltd. | Pixel of an organic light emitting diode display device, and organic light emitting diode display device |
| US20230103495A1 (en) * | 2021-10-06 | 2023-04-06 | Samsung Display Co., Ltd. | Pixel and display device including pixel |
-
2023
- 2023-06-20 TW TW112123254A patent/TWI854715B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201939472A (en) * | 2018-03-15 | 2019-10-01 | 大陸商業成科技(成都)有限公司 | Active-matrix organic light-emitting diode pixel circuit of integrated external processor and driving method for the same |
| TW202109492A (en) * | 2019-08-27 | 2021-03-01 | 友達光電股份有限公司 | Pixel circuit |
| US20210375201A1 (en) * | 2020-06-02 | 2021-12-02 | Samsung Display Co., Ltd. | Pixel of an organic light emitting diode display device, and organic light emitting diode display device |
| US20230103495A1 (en) * | 2021-10-06 | 2023-04-06 | Samsung Display Co., Ltd. | Pixel and display device including pixel |
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| Publication number | Publication date |
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| TW202501448A (en) | 2025-01-01 |
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