TWI844441B - Printed circuit board design data conversion device and method - Google Patents
Printed circuit board design data conversion device and method Download PDFInfo
- Publication number
- TWI844441B TWI844441B TW112129554A TW112129554A TWI844441B TW I844441 B TWI844441 B TW I844441B TW 112129554 A TW112129554 A TW 112129554A TW 112129554 A TW112129554 A TW 112129554A TW I844441 B TWI844441 B TW I844441B
- Authority
- TW
- Taiwan
- Prior art keywords
- printed circuit
- circuit board
- design data
- board design
- information
- Prior art date
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 title claims description 27
- 229910000679 solder Inorganic materials 0.000 claims description 10
- 239000010410 layer Substances 0.000 description 68
- 238000010586 diagram Methods 0.000 description 7
- 238000007405 data analysis Methods 0.000 description 6
- 238000005553 drilling Methods 0.000 description 5
- 101150071172 PCS2 gene Proteins 0.000 description 4
- 101150003196 PCS1 gene Proteins 0.000 description 3
- 101100493726 Phalaenopsis sp. BIBSY212 gene Proteins 0.000 description 3
- 101100030895 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) RPT4 gene Proteins 0.000 description 3
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
本發明係關於印刷電路板設計資料轉換裝置與方法,特別是關於一種將原始印刷電路板設計資料進行轉換後而能夠適用於印刷電路板之陰陽排版拼接的印刷電路板設計資料轉換裝置與方法。 The present invention relates to a printed circuit board design data conversion device and method, and in particular to a printed circuit board design data conversion device and method that converts the original printed circuit board design data so that it can be used for the positive and negative layout splicing of the printed circuit board.
請參照圖1,圖1是現有印刷電路板設計軟體呈現未進行之陰陽排版拼接之印刷電路板的印刷電路板設計資料的示意圖。於圖1中,兩塊拼接的印刷電路板PCS1與PCS2未有進行倒置,也就是一般的拼接。印刷電路板PCS1與PCS2的印刷電路板設計資料包括由上往下排序的層名的信息S1、M1、L1、L2、L3、L4、M2、S2與孔結構的信息DRL1-4與LS3-4。信息S1、M1、L1、L2、L3、L4、M2、S2分別代表上標示層、上焊層、第一電路層、第二電路層、第三電路層、第四電路層、下焊層及下標示層,以及信息DRL1-4與LS3-4分別代表通過鑽孔機形成第一電路層~第四電路層的導通孔與透過鐳射形成第三電路層及第四電路層的導通孔。 Please refer to FIG. 1, which is a schematic diagram of the PCB design data of the PCB without yin-yang layout splicing presented by the existing PCB design software. In FIG. 1, the two spliced PCBs PCS1 and PCS2 are not inverted, that is, they are spliced in a normal way. The PCB design data of the PCBs PCS1 and PCS2 include the layer name information S1, M1, L1, L2, L3, L4, M2, S2 and the hole structure information DRL1-4 and LS3-4 in descending order. Information S1, M1, L1, L2, L3, L4, M2, S2 respectively represent the upper marking layer, upper soldering layer, first circuit layer, second circuit layer, third circuit layer, fourth circuit layer, lower soldering layer and lower marking layer, and information DRL1-4 and LS3-4 respectively represent the via holes formed by drilling machine in the first to fourth circuit layers and the via holes formed by laser in the third and fourth circuit layers.
然而,現有印刷電路板設計軟體在進行陰陽排版拼接的印刷電路板設計時,僅能夠將正反圖層資料倒置,但若遇到鐳射鑽孔或背部鑽 孔時,則此設計軟體無法自動處理和排列資料。因此,有需要提供一種技術方案可以將原始印刷電路板設計資料進行轉換後而能夠適用於印刷電路板之正反面陰陽排版拼接。 However, the existing PCB design software can only invert the front and back layer data when designing a PCB for yin-yang layout splicing. However, if laser drilling or back drilling is encountered, this design software cannot automatically process and arrange the data. Therefore, there is a need to provide a technical solution that can convert the original PCB design data so that it can be applied to the front and back yin-yang layout splicing of the PCB.
基於本發明的至少一個目的,本發明提供一種印刷電路板設計資料轉換裝置,係用以將原始印刷電路板設計資料進行轉換,而能夠使轉換後的印刷電路板設計資料適用於印刷電路板之正反面陰陽排版拼接,其包括資料獲取單元、資料解析單元、信息添加單元、排序與標記單元與層調整單元。資料獲取單元用於獲取原始印刷電路板設計資料,其中原始印刷電路板設計資料包括多個層名及多個孔結構的信息,多個層名信息用於表示原始印刷電路板設計資料中的上標示層、上焊層、多個電路層、下焊層及下標示層,以及多個孔結構信息用於表示原始印刷電路板設計資料中的多個電路層間導通孔。資料解析單元信號連接資料獲取單元,用於對原始印刷電路板設計資料進行解析,並根據解析後的多個層名及多個孔結構,計算出原始印刷電路板設計資料中多個層的排序方式。信息添加單元信號連接資料解析單元,用於記錄原始印刷電路板設計資料的原始信息,並加入計算調整後的信息於記錄信息中,其中記錄信息包括排序方式。排序與標記單元信號連接信息添加單元,根據記錄信息對記錄信息的多個層進行排序和標記,並轉換被標記的層的屬性,所轉換的標記的層的屬性用於表示層被多個導通孔的一者貫通。層調整單元信號連接排序與標記單元,根據排序和標記結果,對記錄信息的多個層進行上下翻轉,以調整多 個層的位置,其中在對多個層進行上下翻轉後,紀錄信息包括多個層名的信息與調整後的多個孔結構的信息,調整後的多個孔結構的信息用於表示正反面陰陽排版拼接後之連通於不同電路層間的陰陽版共用導通孔、連通於不同電路層間的陽版導通孔、連通於不同電路層間的陰版導通孔。 Based on at least one purpose of the present invention, the present invention provides a printed circuit board design data conversion device, which is used to convert the original printed circuit board design data, so that the converted printed circuit board design data can be suitable for the front and back side yin and yang layout splicing of the printed circuit board, which includes a data acquisition unit, a data analysis unit, an information adding unit, a sorting and marking unit and a layer adjustment unit. The data acquisition unit is used to acquire original printed circuit board design data, wherein the original printed circuit board design data includes information of multiple layer names and multiple hole structures, the multiple layer name information is used to represent the upper marking layer, the upper solder layer, multiple circuit layers, the lower solder layer and the lower marking layer in the original printed circuit board design data, and the multiple hole structure information is used to represent multiple circuit layer inter-layer conductive holes in the original printed circuit board design data. The data parsing unit signal connection data acquisition unit is used to parse the original printed circuit board design data, and calculate the sorting method of multiple layers in the original printed circuit board design data according to the multiple layer names and multiple hole structures after parsing. The information adding unit signal connection data parsing unit is used to record the original information of the original printed circuit board design data, and add the calculated and adjusted information to the recorded information, wherein the recorded information includes the sorting method. The sorting and marking unit signal connection information adding unit sorts and marks multiple layers of the recorded information according to the recorded information, and converts the properties of the marked layers, and the converted marked layer properties are used to indicate that the layer is connected by one of the multiple vias. The layer adjustment unit signal connection sorting and marking unit flips up and down the multiple layers of recorded information according to the sorting and marking results to adjust the positions of the multiple layers. After the multiple layers are flipped up and down, the recorded information includes the information of the multiple layer names and the information of the adjusted multiple hole structures. The information of the adjusted multiple hole structures is used to indicate the positive and negative plates shared conductive holes connected between different circuit layers, the positive plate conductive holes connected between different circuit layers, and the negative plate conductive holes connected between different circuit layers after the positive and negative plates are spliced.
根據上述印刷電路板設計資料轉換裝置,其中印刷電路板設計資料轉換裝置更包括層歸位單元。層歸位單元信號連接層調整單元,根據記錄信息,將進行上下翻轉的多個層恢復排序和標記。 According to the above-mentioned printed circuit board design data conversion device, the printed circuit board design data conversion device further includes a layer return unit. The layer return unit signal is connected to the layer adjustment unit, and according to the recorded information, the multiple layers that are flipped up and down are restored to order and marked.
根據上述印刷電路板設計資料轉換裝置,其中資料解析單元以perl語言解析原始印刷電路板設計資料。 According to the above-mentioned printed circuit board design data conversion device, the data parsing unit parses the original printed circuit board design data using the Perl language.
基於本發明的至少一個目的,本發明提供一種印刷電路板設計資料轉換方法,係用以將原始印刷電路板設計資料進行轉換,而能夠使轉換後的印刷電路板設計資料適用於印刷電路板之正反面陰陽排版拼接,此方法包括:用於獲取原始印刷電路板設計資料,其中原始印刷電路板設計資料包括多個層名及多個孔結構的信息,多個層名的信息用於表示原始印刷電路板設計資料中的上標示層、上焊層、多個電路層、下焊層及下標示層,以及多個孔結構的信息用於表示原始印刷電路板設計資料中的連通於不同電路層間的多個導通孔;用於對原始印刷電路板設計資料進行解析,並根據解析後的多個層名及多個孔結構,計算出原始印刷電路板設計資料中多個層的排序方式;用於記錄原始印刷電路板設計資料的原始信息,並加入計算調整後的信息於記錄信息中,其中記錄信息包括排序方式;根據記錄信息對記錄信息的多個層進行排序和標記,轉換被標記的層的屬性,所轉換的被標記的層的屬性用於表示層被多個導通孔的一者貫通;以 及根據排序和標記結果,對記錄信息的多個層進行上下翻轉,以調整多個層的位置,其中在對多個層進行上下翻轉後,紀錄信息包括多個層名的信息與調整後的多個孔結構的信息,調整後的多個孔結構的信息用於表示正反面陰陽排版拼接後之連通於不同電路層間的陰陽版共用導通孔、連通於不同電路層間的陽版導通孔、連通於不同電路層間的陰版導通孔。 Based on at least one purpose of the present invention, the present invention provides a printed circuit board design data conversion method, which is used to convert the original printed circuit board design data, and can make the converted printed circuit board design data suitable for the front and back side yin and yang layout splicing of the printed circuit board. The method includes: obtaining the original printed circuit board design data, wherein the original printed circuit board design data includes information of multiple layer names and multiple hole structures, multiple The information of the layer names is used to represent the upper marking layer, the upper solder layer, the multiple circuit layers, the lower solder layer and the lower marking layer in the original printed circuit board design data, and the information of the multiple hole structures is used to represent the multiple vias connected between different circuit layers in the original printed circuit board design data; the original printed circuit board design data is parsed, and according to the multiple layer names and the multiple hole structures after parsing, the original printed circuit board design data is calculated. A method for sorting multiple layers; recording original information of original printed circuit board design data and adding calculated and adjusted information to the recorded information, wherein the recorded information includes a sorting method; sorting and marking multiple layers of the recorded information according to the recorded information, converting the properties of the marked layers, and the converted properties of the marked layers are used to indicate that the layers are connected by one of the multiple vias; and according to the sorting and marking results, The multiple layers are flipped up and down to adjust the positions of the multiple layers. After the multiple layers are flipped up and down, the recorded information includes the information of the multiple layer names and the information of the adjusted multiple hole structures. The information of the adjusted multiple hole structures is used to indicate the positive and negative plates shared conductive holes connecting different circuit layers, the positive plate conductive holes connecting different circuit layers, and the negative plate conductive holes connecting different circuit layers after the positive and negative plates are spliced.
根據上述印刷電路板設計資料轉換方法,其中印刷電路板設計資料轉換方法更包括:根據記錄信息,將進行上下翻轉的多個層恢復排序和標記。 According to the above-mentioned printed circuit board design data conversion method, the printed circuit board design data conversion method further includes: according to the recorded information, the multiple layers that are flipped up and down are restored to order and marked.
根據上述印刷電路板設計資料轉換方法,其中以perl語言解析原始印刷電路板設計資料。 According to the above-mentioned printed circuit board design data conversion method, the original printed circuit board design data is parsed using the perl language.
綜合以上所述,本發明的技術方案可以將原始印刷電路板設計資料進行轉換後而能夠適用於印刷電路板之正反面陰陽排版拼接。 In summary, the technical solution of the present invention can convert the original printed circuit board design data and can be applied to the positive and negative layout splicing of the front and back of the printed circuit board.
S1、M1、L1、L2、L3、L4、M2、S2、DRL1-4、LS1-2、LS3-4:信息 S1, M1, L1, L2, L3, L4, M2, S2, DRL1-4, LS1-2, LS3-4: Information
31:資料獲取單元 31: Data acquisition unit
32:資料解析單元 32: Data analysis unit
33:信息添加單元 33: Information adding unit
34:排序與標記單元 34: Sorting and marking units
35:層調整單元 35: Layer adjustment unit
36:層歸位單元 36: Layer-reduction unit
S41~S46:步驟 S41~S46: Steps
PCS1、PCS2:印刷電路板 PCS1, PCS2: Printed circuit board
圖1是現有印刷電路板設計軟體呈現未進行之正反面陰陽排版拼接之印刷電路板的印刷電路板設計資料的示意圖。 FIG. 1 is a schematic diagram of the existing printed circuit board design software showing the printed circuit board design data of a printed circuit board without the front and back side yin and yang layout splicing.
圖2是本發明實施例的印刷電路板設計資料轉換裝置對原始印刷電路板設計資料進行轉換後之印刷電路板設計資料的示意圖。 FIG2 is a schematic diagram of printed circuit board design data after the printed circuit board design data conversion device of the embodiment of the present invention converts the original printed circuit board design data.
圖3是本發明實施例的印刷電路板設計資料轉換裝置的方塊示意圖。 FIG3 is a block diagram of a printed circuit board design data conversion device according to an embodiment of the present invention.
圖4是本發明實施例的印刷電路板設計資料轉換方法的流程示意圖。 Figure 4 is a schematic diagram of the process of the printed circuit board design data conversion method of the embodiment of the present invention.
為充分瞭解本發明之目的、特徵及功效,茲藉由下述具體之實施例,並配合所附之圖式,對本發明做一詳細說明,說明如後。 In order to fully understand the purpose, features and effects of the present invention, the present invention is described in detail through the following specific embodiments and the attached drawings. The description is as follows.
於本發明中,係使用「一」或「一個」來描述本文所述的單元、元件和組件。此舉只是為了方便說明,並且對本發明之範疇提供一般性的意義。因此,除非很明顯地另指他意,否則此種描述應理解為包括一個、至少一個,且單數也同時包括複數。 In the present invention, "one" or "an" is used to describe the units, components and assemblies described herein. This is only for the convenience of explanation and to provide a general meaning for the scope of the present invention. Therefore, unless it is obvious that it is otherwise intended, such description should be understood to include one, at least one, and the singular also includes the plural.
於本發明中,用語「包含」、「包括」、「具有」、「含有」或其他任何類似用語意欲涵蓋非排他性的包括物。舉例而言,含有複數要件的一元件、結構、製品或裝置不僅限於本文所列出的此等要件而已,而是可以包括未明確列出但卻是該元件、結構、製品或裝置通常固有的其他要件。除此之外,除非有相反的明確說明,用語「或」是指涵括性的「或」,而不是指排他性的「或」。 In the present invention, the terms "include", "including", "have", "contain" or any other similar terms are intended to cover non-exclusive inclusions. For example, a component, structure, product or device containing multiple elements is not limited to the elements listed herein, but may include other elements that are not explicitly listed but are generally inherent to the component, structure, product or device. In addition, unless expressly stated to the contrary, the term "or" refers to an inclusive "or" rather than an exclusive "or".
請參照圖2,圖2是本發明實施例的印刷電路板設計資料轉換裝置對原始印刷電路板設計資料進行轉換後之印刷電路板設計資料的示意圖。圖1的印刷電路板設計資料若要用於印刷電路板的正反面陰陽排版拼接,則需要對資料進一步的轉換。由圖2可以知悉,在做正反面陰陽排版拼接後,第二片的印刷電路板PCS2中,第一電路層~第四電路層的導通孔(鑽孔機形成的)位於右邊,以及第一電路層與第二電路層(鐳射形成)的導通孔位於左邊,因此,相較於圖1的印刷電路板設計資料,圖2的印刷電路板設計資料更包括了孔結構的信息LS1-2,其表示透過鐳射形成第一電路層及第一電路層的導通孔。 Please refer to Figure 2, which is a schematic diagram of the printed circuit board design data after the printed circuit board design data conversion device of the embodiment of the present invention converts the original printed circuit board design data. If the printed circuit board design data of Figure 1 is to be used for the front and back yin and yang layout splicing of the printed circuit board, the data needs to be further converted. As can be seen from Figure 2, after the front and back sides are spliced, in the second printed circuit board PCS2, the via holes (formed by drilling machine) of the first to fourth circuit layers are located on the right, and the via holes of the first and second circuit layers (formed by laser) are located on the left. Therefore, compared with the printed circuit board design data of Figure 1, the printed circuit board design data of Figure 2 also includes hole structure information LS1-2, which indicates that the first circuit layer and the via holes of the first circuit layer are formed by laser.
本發明的目的就是希望將圖1的印刷電路板設計資料轉換為圖2的印刷電路板設計資料,並且印刷電路板設計資料轉換裝置在將資料送到加工設備前,會把圖2的印刷電路板設計資料進行排序與標記,並且在加工後,將排序與標記的印刷電路板設計資料進行歸位。 The purpose of the present invention is to convert the printed circuit board design data of FIG. 1 into the printed circuit board design data of FIG. 2, and the printed circuit board design data conversion device will sort and mark the printed circuit board design data of FIG. 2 before sending the data to the processing equipment, and after processing, the sorted and marked printed circuit board design data will be returned to the original position.
請參照圖3,圖3是本發明實施例的印刷電路板設計資料轉換裝置的方塊示意圖。於圖3中,印刷電路板設計資料轉換裝置包括資料獲取單元31、資料解析單元32、信息添加單元33、排序與標記單元34、層調整單元35與層歸位單元36。資料解析單元32信號連接資料獲取單元31,信息添加單元33信號3連接資料解析單元32,排序與標記單元34信號連接信息添加單元33,層調整單元35信號連接排序與標記單元34,以及層歸位單元36信號連接層調整單元35。 Please refer to FIG. 3, which is a block diagram of a printed circuit board design data conversion device of an embodiment of the present invention. In FIG. 3, the printed circuit board design data conversion device includes a data acquisition unit 31, a data analysis unit 32, an information adding unit 33, a sorting and marking unit 34, a layer adjustment unit 35, and a layer return unit 36. The data analysis unit 32 is connected to the data acquisition unit 31, the information adding unit 33 is connected to the data analysis unit 32, the sorting and marking unit 34 is connected to the information adding unit 33, the layer adjustment unit 35 is connected to the sorting and marking unit 34, and the layer return unit 36 is connected to the layer adjustment unit 35.
請參照圖3與圖4,圖4是本發明實施例的印刷電路板設計資料轉換方法的流程示意圖。在步驟S41中,資料獲取單元31用於獲取原始印刷電路板設計資料,其中原始印刷電路板設計資料包括多個層名及多個孔結構的信息,其中多個層名信息用於表示原始印刷電路板設計資料中的上標示層、上焊層、多個電路層、下焊層及下標示層,以及多個孔結構信息用於表示原始印刷電路板設計資料中的連通於不同電路層間的多個導通孔。在步驟S42中,資料解析單元32用於對原始印刷電路板設計資料進行解析,以計算出原始印刷電路板設計資料中多個層的排序方式。資料解析單元32是根據解析後的多個層名及多個孔結構結構,計算出原始印刷電路板設計資料中多個層的排序方式,而且是使用perl語言軟體來進行解析。 Please refer to FIG. 3 and FIG. 4, FIG. 4 is a schematic flow chart of the printed circuit board design data conversion method of the embodiment of the present invention. In step S41, the data acquisition unit 31 is used to acquire the original printed circuit board design data, wherein the original printed circuit board design data includes information of multiple layer names and multiple hole structures, wherein the multiple layer name information is used to represent the upper marking layer, the upper solder layer, the multiple circuit layers, the lower solder layer and the lower marking layer in the original printed circuit board design data, and the multiple hole structure information is used to represent the multiple conductive holes connected between different circuit layers in the original printed circuit board design data. In step S42, the data parsing unit 32 is used to parse the original printed circuit board design data to calculate the sorting method of the multiple layers in the original printed circuit board design data. The data parsing unit 32 calculates the order of multiple layers in the original printed circuit board design data based on the parsed multiple layer names and multiple hole structures, and uses perl language software to perform the parsing.
在步驟S43中,信息添加單元33用於記錄原始印刷電路板設 計資料的原始信息,並加入計算調整後的信息於記錄信息中,其中記錄信息包括排序方式。在步驟S44中,排序與標記單元34根據記錄信息對記錄信息的多個層進行排序和標記,其中排序與標記單元34轉換被標記的層的屬性,所轉換的被標記的該層的該屬性用於表示該層被該多個導通孔的一者貫通。在步驟S45中,層調整單元35根據排序和標記結果,對記錄信息的多個層進行上下翻轉,以調整多個層的位置,其中在對多個層進行上下翻轉後,紀錄信息包括多個層名的信息與調整後的多個孔結構的信息,調整後的多個孔結構的信息用於表示正反面陰陽排版拼接後之連通於不同電路層間的陰陽版共用導通孔、連通於不同電路層間的陽版導通孔、連通於不同電路層間的陰版導通孔。在步驟S46中,層歸位單元36根據記錄信息,將進行上下翻轉的多個層恢復排序和標記。 In step S43, the information adding unit 33 is used to record the original information of the original printed circuit board design data, and add the calculated and adjusted information to the recorded information, wherein the recorded information includes the sorting method. In step S44, the sorting and marking unit 34 sorts and marks the multiple layers of the recorded information according to the recorded information, wherein the sorting and marking unit 34 converts the attribute of the marked layer, and the converted attribute of the marked layer is used to indicate that the layer is penetrated by one of the multiple vias. In step S45, the layer adjustment unit 35 flips the multiple layers of recorded information up and down according to the sorting and marking results to adjust the positions of the multiple layers, wherein after the multiple layers are flipped up and down, the recorded information includes the information of the multiple layer names and the information of the adjusted multiple hole structures, and the information of the adjusted multiple hole structures is used to indicate the positive and negative plates common conductive holes connected between different circuit layers, the positive plate conductive holes connected between different circuit layers, and the negative plate conductive holes connected between different circuit layers after the positive and negative plates are spliced. In step S46, the layer repositioning unit 36 restores the sorting and marking of the multiple layers that have been flipped up and down according to the recorded information.
綜合以上所述,本發明的技術方案可以將原始印刷電路板設計資料進行轉換後而能夠適用於印刷電路板之正反面陰陽排版拼接。本發明的技術方案解決鐳射或背後鑽孔情況導致現有技術之系統不處理導致資料錯誤問題,同時本發明的技術方案解決了解決層需要人為排列才能進行下去的問題,並進而提升效率、簡化操作流程及提升良率。 In summary, the technical solution of the present invention can convert the original printed circuit board design data and be applicable to the positive and negative layout splicing of the front and back of the printed circuit board. The technical solution of the present invention solves the problem of data errors caused by laser irradiation or back drilling, and at the same time, the technical solution of the present invention solves the problem that the layers need to be manually arranged before they can proceed, thereby improving efficiency, simplifying the operation process and improving the yield rate.
本發明在上文中已以較佳實施例揭露,然熟習本項技術者應理解的是,實施例僅用於描繪本發明,而不應解讀為限制本發明之範圍。應注意的是,舉凡與實施例等效之變化與置換,均應設為涵蓋於本發明之範疇內。因此,本發明之保護範圍當以申請專利範圍所界定者為準。 The present invention has been disclosed in the above text with preferred embodiments, but those familiar with the present technology should understand that the embodiments are only used to describe the present invention and should not be interpreted as limiting the scope of the present invention. It should be noted that all changes and substitutions equivalent to the embodiments should be included in the scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the patent application.
31:資料獲取單元 31: Data acquisition unit
32:資料解析單元 32: Data analysis unit
33:信息添加單元 33: Information adding unit
34:排序與標記單元 34: Sorting and marking units
35:層調整單元 35: Layer adjustment unit
36:層歸位單元 36: Layer-reduction unit
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112129554A TWI844441B (en) | 2023-08-07 | 2023-08-07 | Printed circuit board design data conversion device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112129554A TWI844441B (en) | 2023-08-07 | 2023-08-07 | Printed circuit board design data conversion device and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI844441B true TWI844441B (en) | 2024-06-01 |
| TW202507536A TW202507536A (en) | 2025-02-16 |
Family
ID=92541517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW112129554A TWI844441B (en) | 2023-08-07 | 2023-08-07 | Printed circuit board design data conversion device and method |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI844441B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110154277A1 (en) * | 2009-12-18 | 2011-06-23 | Ankenbauer Christopher J | Method and apparatus for generating substrate layout |
| CN113868985A (en) * | 2021-09-09 | 2021-12-31 | 苏州浪潮智能科技有限公司 | A method, device, equipment and medium for drawing a PCB panel |
| CN115640777A (en) * | 2022-11-04 | 2023-01-24 | 北京航天新立科技有限公司 | Layout method, device, medium and equipment for aerospace printed board engineering pretreatment |
| TW202326502A (en) * | 2021-12-24 | 2023-07-01 | 和碩聯合科技股份有限公司 | Circuit board manufacturing system and circuit board manufacturing method |
-
2023
- 2023-08-07 TW TW112129554A patent/TWI844441B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110154277A1 (en) * | 2009-12-18 | 2011-06-23 | Ankenbauer Christopher J | Method and apparatus for generating substrate layout |
| CN113868985A (en) * | 2021-09-09 | 2021-12-31 | 苏州浪潮智能科技有限公司 | A method, device, equipment and medium for drawing a PCB panel |
| TW202326502A (en) * | 2021-12-24 | 2023-07-01 | 和碩聯合科技股份有限公司 | Circuit board manufacturing system and circuit board manufacturing method |
| CN115640777A (en) * | 2022-11-04 | 2023-01-24 | 北京航天新立科技有限公司 | Layout method, device, medium and equipment for aerospace printed board engineering pretreatment |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202507536A (en) | 2025-02-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5475135B2 (en) | Flexible printed wiring board and manufacturing method thereof | |
| TW575485B (en) | Method of manufacturing circuit board and data for producing the same | |
| US8535547B2 (en) | Printed circuit board manufacturing system and manufacturing method thereof | |
| CN101426337B (en) | Method of manufacturing film resistance-embedded printed wiring board | |
| DE102006021765A1 (en) | Electronic component-embedded printed circuit board (PCB) manufacture for e.g. mobile telephones, involves pressing metal foils against B-stage thermosetting layer to form core layer in which electronic components are embedded | |
| TWI844441B (en) | Printed circuit board design data conversion device and method | |
| CN107041063A (en) | A kind of processing method of multilayer PCB and multilayer PCB | |
| CN106793583A (en) | A kind of pcb board local electric thick gold with it is non local electricity gold wiring preparation method | |
| CN103096646A (en) | Method for manufacturing multiple layers of substrates of buried element | |
| CN107318233A (en) | A kind of preparation method of HDI board blind holes | |
| KR20060092176A (en) | Laminated substrate, manufacturing method thereof and electronic device having the laminated substrate | |
| CN119443024A (en) | Printed circuit board design data conversion device | |
| CN1783055A (en) | Automatic designing method for ICT test conversion PCB | |
| JP2003017856A (en) | Multilayer printed-wiring board and manufacturing method therefor | |
| Savic et al. | Electrical performance assessment of advanced substrate technologies for high speed networking applications | |
| CN1700839A (en) | A printed wiring board and production method thereof | |
| CN1035409A (en) | Make the equipment and the method for printed circuit prototypes | |
| CN115460774A (en) | Method for processing blind holes of multilayer printed board and multilayer printed board | |
| CN113795082B (en) | Preparation method of 5G ultra-thin rigid-flex printed circuit board | |
| KR100651467B1 (en) | Shear method of flexible printed circuit board | |
| JP2004087785A (en) | Method for manufacturing printed circuit board and apparatus for manufacturing printed circuit board | |
| CN113923870B (en) | Circuit board preparation method | |
| CN112105153A (en) | Self-defined manufacturing method of LED circuit board | |
| CN118250937B (en) | Manufacturing process of any-layer interconnection printed circuit board | |
| JP2012138262A (en) | Substrate mounting structure, substrate manufacturing method, and electronic apparatus of press-fit connector |