TWI713085B - Semiconductor process result prediction method - Google Patents

Abstract

Present invention provides a semiconductor process result prediction method, which comprises inputting at least one process parameter into a neural network(NN) at least one neural network(NN) estimation value, and inputting the process parameter into a physical estimation model to estimate at least one physical estimate. Then, the process parameters are inputted to a neural network (NN) weight model and a physical weight model, respectively, to train a neural network (NN) training weight and a physical training weight. Finally, inputting the neural network (NN) estimation value, the physical estimation value, the neural network (NN) weight and the physical model weight into a semiconductor process result prediction equation to estimate a semiconductor process result prediction value. According to the method of the present invention, semiconductor process results can be estimated with fewer data points.

Description

Method for predicting semiconductor process results

The present invention relates to a process data estimation technology, in particular to a method for predicting semiconductor process results.

After the advent of semiconductors, the use of electronic products has been greatly changed. The invention of semiconductors has made mobile devices, computers and other related electronic products smaller, lighter, and more convenient to carry. At the same time, the invention of semiconductors is also known as the printing machine. , Electric power, and penicillin are among the four important inventions.

Semiconductors are small in size and can carry many functions, so semiconductors can be said to be very precise electronic components. Of course, the machines and manufacturing processes for making semiconductors are also relatively sophisticated and complex technologies. Of course, there are relatively many parameters for making semiconductors. The pen is complicated, and if the key parameters are deviated, it is likely to cause process deviation and reduce the production yield of semiconductor devices. In severe cases, the entire batch of semiconductor devices may need to be scrapped, and the cost of manufacturing will also increase.

The manufacturing process of semiconductors can be simply as shown in the first figure. First, pattern the active area, then perform local oxidation (LOCOS), P-well and N-well ion implantation, and then implant P-type and N-type semiconductors. Enter the threshold voltage (Vt) to sequentially form two gate oxide layers, polysilicon gate deposition, (poly gate), patterned gate after re-oxidation, and perform one N-type and two P-type semiconductor Halo/low Doped drain (LDD) and heavily doped on the source/drain of N-type and P-type semiconductors, followed by rapid thermal annealing (Spike RTA), physical vapor deposition of nickel (PVD NI) and nickel Low temperature annealing of silicide.

Take semiconductor etching as an example, please refer to the second A and second B diagrams, as shown in the figure, according to different threshold voltage (Vt), width (Width), etching ratio (d/W), gas etching Time(s) And so on will affect the depth of etching (R). The third picture A to the third picture D are the samples after etching under the microscope. The third picture is at 40 millitorr (mTorr) pressure, inductively coupled plasma 1250 watts (W ICP) power, 200 standard state ml /6 minutes (sccm SF6) flow rate, 50 etching cycle time, and line width of 1 micron (μm) under the conditions of the etching state; the third B is at 40 millitorr (mTorr) pressure , Inductively coupled plasma 1250 watts (W ICP) power, 200 standard state milliliters/6 minutes (sccm SF6) flow rate, 50 etching cycle time and line width of 0.8 microns (μm) under the conditions of the etching state Like; the third C figure line width is 40 millitorr (mTorr) pressure, inductively coupled plasma 1250 watts (W ICP) power, 200 standard state milliliters/6 minutes (sccm SF6) flow rate, 20 etching cycles Time and line width of 1 micron (μm) under the conditions of the etching state; the third D line width is 40 millitorr (mTorr) pressure, inductively coupled plasma 1250 watts (W ICP) power, 200 standard state milliliters/6 minutes (sccm SF6) flow rate, 20 etching cycle time and line width of 0.3 microns (μm) under the conditions of etching.

It can be seen from the above that the manufacturing process of small semiconductors is not only delicate, but the steps are also quite cumbersome. Therefore, in order to reduce the cost and time consumption of semiconductor manufacturing, the use of semiconductor process simulation tools to predict the semiconductor process before semiconductor manufacturing has gradually become the semiconductor industry Emerging methods in. At present, the use of semiconductor process simulation tools is mostly the computer aided design technology (Technology Computer Aided Design, TCAD) estimation model of physical prediction, or the artificial neural network (Artificial Neural Network, which is trained by the neural network using past historical statistical data). ANN) estimation model. The TCAD estimation model inputs process parameters such as etching gas, etching width, and etching time into the TCAD estimation model. The TCAD estimation model can estimate various parameters of the etched semiconductor, such as the etching depth of the semiconductor.

Next, please refer to the fourth figure to explain the ANN estimation model. The ANN estimation model is trained by large amounts of semiconductor data. You only need to enter multiple etching widths, time and other parameters for training, and then you only need to enter the etching width and time. Parameter, the etching depth can be predicted. Therefore, if the ANN estimation model can collect more data, the estimated semiconductor process results will be more accurate, but the collection is larger. The pen data has considerable resistance to the semiconductor process. In addition to the large amount of money required to collect data, for the precision-made semiconductor process, the data required to be collected is always insufficient, so the ANN estimation model can estimate The semiconductor manufacturing process is also quite limited.

In view of this, the present invention proposes a method for predicting semiconductor manufacturing process results in order to effectively overcome the above-mentioned problems in order to overcome the above-mentioned problems.

The main purpose of the present invention is to provide a method for predicting semiconductor process results, which requires less data points to quickly estimate semiconductor process results, which not only reduces the cost of process trial and error, but also reduces the semiconductor process Of depletion.

In order to achieve the above objective, the present invention provides a method for predicting semiconductor process results. The steps include first inputting at least one process parameter into a neural network estimation model to estimate at least one neural network estimation value, and input At least one process parameter is added to a physical estimation model to estimate at least one physical estimation value. Then input process parameters to a neural network weight model to train a neural network training weight, and input process parameters to a physical weight model to train a physical training weight, and finally input neural network estimation values, physical estimates The measured values, neural network training weights, and physical training weights are added to a semiconductor process result prediction equation to estimate a semiconductor process result prediction value.

其中y _AWNN為半導體製程結果預測值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值，w _NN為類神經網路訓練權重，w _TCAD 為物理訓練權重，X為製程參數。 The equation for predicting semiconductor process results is as follows:

Where y _AWNN is the predicted value of the semiconductor process result, y _NN is the estimated value of the similar neural network, y _TCAD is the estimated value of the physical, w _NN is the training weight of the similar neural network, w _TCAD is the weight of the physical training, X is the process parameter .

其中w _ANN,target為類神經網路目標權重，y _exp為製程結果目標數值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值。最後輸入製程參數與類神經網路目標權重至一神經網路模型(Neural Network)進行訓練，以產生類神經網路權重模型。 Among them, the step of generating the weight model of the neural network includes collecting the process results of the semiconductor when the semiconductor is actually produced, and setting it as a process result target value, and then setting the process result target value, the neural network estimated value, and The physical estimation value is input into a type of neural network target weight equation to estimate the weight of a type of neural network target. The neural network-like target weight equation is as follows:

Among them, w _ANN,target are the weights of the neural network-like target, y _exp is the target value of the process result, y _NN is the neural network-like estimated value, and y _TCAD is the physical estimated value. Finally, input process parameters and neural network-like target weights to a neural network model (Neural Network) for training to generate a neural network-like weight model.

其中w _TCAD,target為物理目標權重，y _exp為製程結果目標數值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值。最後輸入製程參數與物理目標權重至一神經網路模型(Neural Network)進行訓練，以產生物理權重模型。 The physical weight model generation step includes collecting the semiconductor process results when the semiconductor is actually produced, and setting it as a process result target value, and then inputting the process result target value, neural network-like estimated value, and physical estimated value A physical target weight equation to estimate a physical target weight, where the target weight equation is as follows:

Among them, w _{TCAD, target} is the weight of the physical target, y _exp is the target value of the process result, y _NN is the neural network-like estimated value, and y _TCAD is the physical estimated value. Finally, input process parameters and physical target weights to a neural network model (Neural Network) for training to generate a physical weight model.

w _NN為類神經網路訓練權重，X為製程參數；物理權重模型可表示為以下方程式：

w _TCAD 為物理訓練權重，X為製程參數。 The neural network-like weight model can be expressed as the following equation:

w _NN is the neural network training weight, X is the process parameter; the physical weight model can be expressed as the following equation:

w _TCAD is the physical training weight, and X is the process parameter.

Detailed descriptions are given below by specific embodiments, so that it will be easier to understand the purpose, technical content, features, and effects of the present invention.

10: Input device

12: Processing device

14: display device

The first figure is a flow chart of the conventional semiconductor manufacturing process.

The second diagram A is a schematic diagram of a conventional semiconductor etching state.

The second diagram B is a schematic diagram of experimental data generated by conventionally known different process parameters.

The third A to the third D are schematic diagrams of the semiconductor after etching under a conventional microscope.

The fourth picture is the state diagram of the conventional ANN estimation model.

The fifth figure is a block diagram of the device used in the method of the present invention.

The sixth figure is a flowchart of the method of the present invention.

The seventh diagram is the state diagram of the ANN estimation model of the present invention.

The eighth figure is a schematic diagram of the prediction equation of the semiconductor process result of the present invention.

The ninth figure is a schematic diagram of the neural network and physical weight model of the invention.

Figure 10A is a flow chart of the method for generating a neural network weight model of the present invention.

The tenth diagram B is a state diagram of the neural network weight model of the present invention.

Figure 11A is a flowchart of the method for generating a physical weight model.

Figure 11B is a state diagram of the physical weight model of the present invention.

Figures 12A to 12C are experimental data diagrams of the first embodiment of the present invention.

Figures 13A to 13C are experimental data diagrams of the second embodiment of the present invention.

Figures 14A to 14C are experimental data diagrams of the third embodiment of the present invention.

The method of the present invention only needs to input fewer data points to quickly estimate the results of the semiconductor process, which not only reduces the cost of collecting large amounts of semiconductor experimental data, but also uses the method of the present invention. The method can also improve the accuracy of the semiconductor manufacturing process and effectively reduce the cost loss in the semiconductor manufacturing process.

The following describes in detail how the method of the present invention achieves the above-mentioned effects. First, please refer to Figure 5 to illustrate the hardware device used in the method for predicting semiconductor process results of the present invention, which includes an input device 10, a processing device 12, and A display device 14 and the processing device 12 are electrically connected to the input device 10 and the display device 14 respectively. The input device 10 can be a keyboard or a device that can input data, and the processing device 12 is a central processing unit. The processing device 12 contains the computer program flow of the method for predicting the results of the semiconductor manufacturing process of the present invention, and semiconductor process simulation tools, such as neuron-like Network estimation model and physical estimation model. Neural network estimation model is artificial neural network (ANN) estimation model trained by neural network data brought into neural network, and physical estimation model , Which can be a computer aided design (Technology Computer Aided Design, TCAD) estimation model. The processing device 12 can estimate or process other data based on the process parameters and other data input by the input device 10 to generate the predicted value of the semiconductor process result . The display device 14 can be a display screen to display the predicted value of the semiconductor process result estimated by the processing device 12 or other information.

)，本實施例舉例為蝕刻深度類神經網路估測數值，同時處理裝置12也一併將相同的製程參數輸入物理估算模型(TACD)中，以估測出至少一物理估測數值y _TCAD(

)，本實施例舉例為蝕刻深度物理估測數值。其中類神經網路估算模型為過去多筆的半導體的製程參數以及實際製作完成之實際半導體數值，帶入人工神經網路(Artificial Neural Network，ANN)中所訓練出來而產生的估算模型，本實施例舉例製程參數為蝕刻寬度、蝕刻時間以及蝕刻 的氣體流量等，相對的實際半導體數值就為半導體的蝕刻深度等資訊。物理估算模型則因本實施例舉例製程參數為蝕刻寬度、蝕刻時間以及蝕刻的氣體流量，故本實施例舉例物理估算模型可表示為以下方程式：

其中k為傳輸概率或克努生係數(Knudsen coefficient)，v _t 為影響蝕刻特徵頂部的氣體流量，W為蝕刻寬度，s為蝕刻特徵底部表面的反應機率，R

為蝕刻特徵底部表面的蝕刻比率，R(0)為蝕刻特徵頂部的蝕刻比率，d ^(t+dt)為經過t+dt時間的蝕刻寬度，d ^(t)為在時間t的特徵寬度，以估測出蝕刻深度物理估測數值。 Next, please refer to the fifth and sixth figures to explain in detail how to use the method of the present invention to estimate the predicted value of the semiconductor process result. First, enter step S10, and input at least one process parameter into the input device 10. This embodiment exemplifies the process The parameters are the etching width, the etching time, and the gas flow rate of the etching, etc., so that the processing device 12 will bring the process parameters into the neural network-like estimation model (ANN). Please also cooperate with the seventh figure, as shown in the figure. The parameter X is brought into the neural network estimation model (ANN) to estimate at least one neural network estimation value y _NN (

), the present embodiment exemplifies the etch depth neural network estimation value, and the processing device 12 also inputs the same process parameters into the physical estimation model (TACD) to estimate at least one physical estimation value y _TCAD (

), this embodiment exemplifies the physical estimation value of the etching depth. Among them, the neural network estimation model is the estimation model generated by training in artificial neural network (Artificial Neural Network, ANN) with the process parameters of the past many semiconductors and the actual semiconductor values actually produced. This implementation For example, the process parameters are etching width, etching time, and gas flow rate for etching. The relative actual semiconductor value is information such as the etching depth of the semiconductor. The physical estimation model of this embodiment is the etching width, etching time, and the gas flow rate of the etching. Therefore, the physical estimation model of this embodiment can be expressed as the following equation:

Where k is the transmission probability or Knudsen coefficient, v _t is the gas flow that affects the top of the etched feature, W is the etch width, s is the reaction probability of the bottom surface of the etched feature, R

Is the etch ratio of the bottom surface of the etched feature, R (0) is the etch ratio of the top of the etched feature, d ^{( t + dt )} is the etch width after t + dt time, d ^{( t )} is the feature width at time t , The physical estimation value of the etching depth is estimated.

)以及物理估測數值y _TCAD(

)之後，接著進入步驟S12，處理裝置12再將與上述步驟S10相同的製程參數輸入至一類神經網路權重模型中，以訓練出一類神經網路訓練權重，同時處理裝置12也一併輸入相同的製程參數至一物理權重模型中，以訓練出一物理訓練權重，其中類神經網路權重模型可表示為以下方程式：

w _NN為類神經網路訓練權重，X為製程參數。物理權重模型可表示為以下方程式：

w _TCAD 為物理訓練權重，X為製程參數。 Estimate the number y _NN (

) And the physical estimated value y _TCAD (

), then proceed to step S12, the processing device 12 inputs the same process parameters as the above step S10 into a type of neural network weight model to train a type of neural network training weight, and the processing device 12 also inputs the same The process parameters of to a physical weight model to train a physical training weight. The neural network-like weight model can be expressed as the following equation:

w _NN is the neural network training weight, and X is the process parameter. The physical weight model can be expressed as the following equation:

w _TCAD is the physical training weight, and X is the process parameter.

)、物理估測數值y _TCAD(

)、類神經網路訓練權重w _NN以 及物理訓練權重w _TCAD至一半導體製程結果預測方程式中，以估算出一半導體製程結果預測值，其中半導體製程結果預測方程式如下所示：

其中y _AWNN為半導體製程結果預測值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值，w _NN為類神經網路訓練權重，w _TCAD 為物理訓練權重，X為製程參數。 Finally, go to step S14, and please refer to the eighth figure, the processing device 12 inputs the neural network-like estimated value y _NN (

), physical estimated value y _TCAD (

), the neural network training weight w _NN and the physical training weight w _TCAD into a semiconductor process result prediction equation to estimate a semiconductor process result prediction value. The semiconductor process result prediction equation is as follows:

Where y _AWNN is the predicted value of the semiconductor process result, y _NN is the estimated value of the similar neural network, y _TCAD is the estimated value of the physical, w _NN is the training weight of the similar neural network, w _TCAD is the weight of the physical training, X is the process parameter .

Through the above steps, the predicted value of the manufactured semiconductor process results can be quickly estimated. According to the method of the present invention, even if the amount of data that can be collected is reduced, at the same time, through the adjustment and distribution of different weights, the present invention effectively improves the semiconductor The reliability of the predicted value of the process result. Therefore, the neural network-like weight model and the physical weight model that define the weight ratio also occupy a very important part of the method of the present invention. Therefore, this embodiment will then describe the neural network-like weight model and the physical weight model in detail.

其中w _NN,target為類神經網路目標權重，y _exp為製程結果目標數值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值。 First, the neural network-like weight model will be explained. Please refer to the ninth figure, tenth figure A and tenth figure B to explain in detail the steps of generating the neural network-like weight model in step S12 of the present invention, as shown in step S20. The process result target value is collected when the semiconductor is actually produced, and the semiconductor process result value, such as the etching depth of the semiconductor, is set as a process result target value y _exp to input the process result target in the processing device 12 through the input device 10 The value y _exp , the target value of the process result is the various values of the semiconductor when the semiconductor is actually produced, such as the etching depth of the semiconductor. Next, referring to step S22, the processing device 12 inputs the process result target value y _{exp of the} real experimental data, and the neural network-like estimated value y _NN and the physical estimated value y _TCAD estimated in step S10 into a neural network target The weight equation is used to estimate the weight of a class of neural network targets. The weight equation of the class of neural network targets is as follows:

Among them, w _{NN and target} are the target weights of the neural network, y _exp is the target value of the process result, y _NN is the neural network estimated value, and y _TCAD is the physical estimated value.

Finally, in step S24, the processing device 12 inputs the process parameters and the neural network-like target weight estimated in the above step S22 to a neural network model (Neural Network) for training to generate a neural network-like weight model. As shown in Figure 10B. Of course, the above-mentioned process parameters and neural network-like target weights are plural, and most can reach tens of millions of pens. After the process parameters and neural network-like target weights are brought into model training, a neural network-like weight model is generated. In the future, as long as the input layer inputs the process parameters to the neural network-like weight model, the neural network-like weight model can generate neural network-like training weights corresponding to the process parameters.

其中w _TCAD,target為物理目標權重，y _exp為製程結果目標數值，y _NN為類神經網路估測數值，y _TCAD為物理估測數值。 Next, please refer to the ninth figure, the eleventh figure A, and the eleventh figure B to describe in detail the steps of generating the physical weight model in step S12 of the present invention. First, go to step S30, and collect the target value of the process result as the actual semiconductor the process result value, the semiconductors such as the etching depth of the semiconductor and setting the process result target value of a braking y _exp, 10 enter the process results of the target value through the input device y _exp to the processing means 12, which processes the results of the target value It is the value of the semiconductor when the semiconductor is actually produced, such as the etching depth of the semiconductor. Then enter step S32, the processing device 12 inputs the process result target value y _exp , the neural network-like estimated value y _NN and the physical estimated value y _TCAD estimated in step S10 into a physical target weight equation to estimate a Physical target weight, where the target weight equation is as follows:

Among them, w _{TCAD, target} is the weight of the physical target, y _exp is the target value of the process result, y _NN is the neural network-like estimated value, and y _TCAD is the physical estimated value.

Finally, step S34 is entered, the processing device 12 inputs the process parameters, and the physical target weights estimated in step S32 above are trained on a neural network model (Neural Network) to generate a physical weight model, as shown in Figure 11B Shown. Of course, the above-mentioned process parameters and physical target weights are plural, which can reach more than tens of millions of pens. After the process parameters and neural network-like target weights are brought into the neural network model training, the physical weight model is generated. The layer inputs the process parameters to the physical weight model, and the physical weight model can generate physical training weights corresponding to the process parameters.

Next, please refer to Fig. 12A, Fig. 12B, and Fig. 12C to compare the estimated values of ANN and the method for predicting semiconductor process results (AWNN) of the present invention. The twelfth picture A is the experimental data diagram of using 15 collected data to train the ANN estimation module. It can be seen that the traditional ANN estimation module can adapt to the aspect ratio dependent etching effect (ARDE) The training set in question. Figure 12B compares the training set in the case of using the traditional ANN estimation module and the semiconductor process result prediction method (AWNN) of the present invention. Then the actual estimated data is shown in Figure 12C, which is the actual estimated situation of the AWNN and ANN of the present invention. It can be seen from the figure that the predicted value of AWNN and the actual semiconductor value are compared with the traditional ANN model. In terms of the estimated value and the actual semiconductor value, the value predicted by AWNN is closer to the actual semiconductor value. Therefore, it is believed that the estimated effect of the AWNN of the present invention will be better than that estimated by the traditional ANN model in the past. Be precise.

Please refer to Figure 13A, Figure 13B, and Figure 13C, where Figure 13A is an experimental data map using 30 collected data to train the ANN estimation module. The thirteenth plan B compares The training set in the case of using the traditional ANN estimation module and the semiconductor process result prediction method (AWNN) of the invention. The actual estimated data is as shown in Figure 13C, which is the actual estimated situation of the AWNN and ANN of the present invention. It can be seen from the figure that when the AWNN of the present invention collects 30 data, the value predicted by AWNN is the same as the actual semiconductor The value is closer than the value estimated by the traditional ANN model. It can be known that the estimated effect of the AWNN of the present invention will be more accurate than that estimated by the traditional ANN model in the past.

Please refer to Figure 14A, Figure 14B, and Figure 14C, where Figure 14A is an experimental data map using 45 collected data to train the ANN estimation module. Figure 14B compares the training set in the case of using the traditional ANN estimation module and the semiconductor process result prediction method (AWNN) of the present invention. As shown in Figure 14C, it is the actual estimation situation of the AWNN and ANN of the present invention. It can be seen from the figure that when the AWNN of the present invention collects a data volume of 45, the predicted value and the actual semiconductor value are higher than the traditional ANN The value estimated by the model is even closer, so it can be known that the estimation effect of the AWNN of the present invention is more accurate than the value estimated by the traditional ANN model estimation in the past.

In summary, according to the method of the present invention to estimate the semiconductor process results, not only can the accuracy of the semiconductor process results be estimated, but also fewer data points are required for the estimation, which can effectively reduce the cost of data collection and improve the semiconductor The accuracy of the process to reduce the loss of the semiconductor process.

Only the above are merely preferred embodiments of the present invention, and are not used to limit the scope of the present invention. Therefore, all equivalent changes or modifications made in accordance with the characteristics and spirit of the application scope of the present invention shall be included in the patent application scope of the present invention.

Claims (9)

A method for predicting semiconductor manufacturing process results includes the following steps: inputting at least one process parameter into a neural network estimation model to estimate at least one neural network estimation value, and inputting at least one process parameter into a physical estimation model In, to estimate at least one physical estimation value; input the process parameter to a type of neural network weight model to train a type of neural network training weight, and input the process parameter to a physical weight model to train a physical training Weight; and input the neural network estimation value, the physical estimation value, the neural network training weight and the physical training weight into a semiconductor process result prediction equation to estimate a semiconductor process result prediction value, The prediction equation of the semiconductor process results is as follows:

The y _{AWNN is} the predicted value of the semiconductor process result, the y _NN is the estimated value of the neural network, the y _{TCAD is} the estimated physical value, the w _NN is the training weight of the neural network, and the w _TCAD Is the physical training weight, and the X is the process parameter. The method for predicting semiconductor process results according to claim 1, wherein the step of generating the neural network weight model includes: collecting the process results of the semiconductor when the semiconductor is actually produced, and setting it as a process result target value; The process result target value, the neural network estimated value, and the physical estimated value are input into a neural network target weight equation to estimate a neural network target weight; and input the process parameters and the neural network Target weight to a neural network model (Neural Network) for training to generate this type of neural network weight model. The method for predicting semiconductor manufacturing process results as described in claim 2, wherein the target weight equation of this type of neural network is as follows:

The w _{NN, target} is the target weight of the neural network, the y _{exp is} the target value of the process result, the y _NN is the estimated value of the neural network, and the y _{TCAD is} the estimated physical value. The method for predicting a semiconductor process result according to claim 1, wherein the step of generating the physical weight model includes: collecting the process result of the semiconductor when the semiconductor is actually produced, and setting it as a process result target value; the process result The target value, the neural network estimated value and the physical estimated value are input into a physical target weight equation to estimate a physical target weight; and input the process parameter and the physical target weight to a neural network model (Neural Network) for training to generate the physical weight model. The method for predicting semiconductor manufacturing process results according to claim 4, wherein the physical target weight equation is as follows:

The w _{TCAD,target is} the weight of the physical target, the y _{exp is} the target value of the process result, the y _NN is the estimated value of this type of neural network, and the y _{TCAD is} the estimated value of the physical. The method for predicting semiconductor manufacturing process results according to claim 1, wherein this type of neural network weight neural network model can be expressed as the following equation:

The w _NN is the training weight of this type of neural network, and the X is the process parameter; the physical weight neural network model can be expressed as the following equation:

The w _{TCAD is} the physical training weight, and the X is the process parameter. The method for predicting a semiconductor process result according to claim 1, wherein the process parameter may be an etching width and an etching time. The method for predicting semiconductor manufacturing process results according to claim 1, wherein the neural network estimation model is an artificial neural network (ANN) estimation model. The method for predicting semiconductor manufacturing process results according to claim 1, wherein the physical estimation model is a Technology Computer Aided Design (TCAD) estimation model.

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