TWI710768B - Testing apparatus and testing flow using the same - Google Patents
Testing apparatus and testing flow using the same Download PDFInfo
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Abstract
Description
本發明是有關於一種測試裝置及使用其的測試流程,且特別是有關於一種適於對覆晶接合於線路板上的晶片進行測試的測試裝置及使用其的測試流程。The present invention relates to a test device and a test process using the same, and more particularly to a test device suitable for testing a flip chip bonded to a circuit board and a test process using the same.
近年來,隨著電子技術的日新月異,高科技電子產業的相繼問世,使得更人性化、功能更佳的電子產品不斷地推陳出新,並朝向輕、薄、短、小的趨勢設計。In recent years, with the rapid development of electronic technology and the emergence of high-tech electronic industries, more humane, better-functioning electronic products are constantly being introduced and designed toward the trend of light, thin, short and small.
然而,越薄的電子產品可能對於壓力的承受度較小。因此,在電子產品的製造過程(如:未完成品或中間結構的測試過程)中可能會因此容易造成破損或碎裂。However, thinner electronic products may be less resistant to pressure. Therefore, during the manufacturing process of electronic products (such as the test process of unfinished products or intermediate structures), it may be easily damaged or broken.
本發明提供一種測試裝置及使用其的測試流程,可以降低線路板及/或線路板上的晶片破損或碎裂的可能。The invention provides a testing device and a testing process using the same, which can reduce the possibility of damage or chipping of a circuit board and/or a chip on the circuit board.
本發明的測試裝置,對晶片進行測試,晶片係覆晶接合於線路板上。測試裝置包括測試模組以及取放模組。測試模組包括多個探針。取放模組具有容置空間。取放模組包括吸附頭、第一氣體管路以及第二氣體管路。吸附頭位於容置空間內。第一氣體管路連通於吸附頭。第二氣體管路連通於容置空間。其中對晶片進行測試時,線路板以及晶片置於容置空間內,吸附頭與晶片的背面相接觸,多個探針電性連接於線路板,且第二氣體管路的端點基本上不接觸線路板及晶片。The test device of the present invention tests the wafer, and the wafer is flip-chip bonded to the circuit board. The test device includes a test module and a pick-and-place module. The test module includes multiple probes. The pick-and-place module has an accommodation space. The pick-and-place module includes an adsorption head, a first gas pipeline, and a second gas pipeline. The adsorption head is located in the containing space. The first gas pipeline is connected to the adsorption head. The second gas pipeline communicates with the accommodating space. When testing the wafer, the circuit board and the wafer are placed in the accommodating space, the adsorption head is in contact with the back of the wafer, a plurality of probes are electrically connected to the circuit board, and the end of the second gas pipeline is basically not Contact circuit boards and chips.
在本發明的一實施例中,第一氣體管路與第二氣體管路彼此不連通。In an embodiment of the present invention, the first gas pipeline and the second gas pipeline are not connected to each other.
在本發明的一實施例中,取放模組更包括卡合槽,卡合槽具有階梯面以及底面,且階梯面以及底面構成容置空間。In an embodiment of the present invention, the pick-and-place module further includes an engaging groove, the engaging groove has a stepped surface and a bottom surface, and the stepped surface and the bottom surface constitute an accommodation space.
在本發明的一實施例中,吸附頭配置於底面上,且第二氣體管路的端點位於底面。In an embodiment of the present invention, the adsorption head is disposed on the bottom surface, and the end of the second gas pipeline is located on the bottom surface.
在本發明的一實施例中,容置空間具有第一區以及第二區,第一區具有第一深度,第二區具有第二深度,且第二深度大於第一深度。In an embodiment of the present invention, the accommodating space has a first area and a second area, the first area has a first depth, the second area has a second depth, and the second depth is greater than the first depth.
在本發明的一實施例中,吸附頭位於第二區,且第二氣體管路的端點不位於第二區。In an embodiment of the present invention, the adsorption head is located in the second zone, and the end of the second gas pipeline is not located in the second zone.
本發明的測試流程包括以下步驟。提供前述的測試裝置。提供電子元件,其中電子元件包括線路板以及覆晶接合於線路板上的晶片。以測試裝置的取放模組拾取電子元件。令拾取電子元件的取放模組與測試模組相接近。使被取放模組拾取的電子元件的線路板電性連接於多個探針,以進行測試。The test procedure of the present invention includes the following steps. Provide the aforementioned test device. An electronic component is provided, wherein the electronic component includes a circuit board and a flip chip bonded to the circuit board. Pick up the electronic components with the pick-and-place module of the test device. Make the pick-and-place module for picking up electronic components close to the test module. The circuit board of the electronic component picked up by the pick-and-place module is electrically connected to a plurality of probes for testing.
在本發明的一實施例中,使被取放模組拾取的電子元件的線路板電性連接於多個探針的步驟包括依序進行以下第(1)步驟以及第(2)步驟。第(1)步驟:令拾取電子元件的取放模組與測試模組相接近,以使被取放模組拾取的電子元件的線路板電性連接於多個探針的至少其中之一。第(2)步驟:藉由第二氣體管路向容置空間灌入氣體。In an embodiment of the present invention, the step of electrically connecting the circuit boards of the electronic components picked up by the pick-and-place module to the multiple probes includes the following steps (1) and (2) in sequence. Step (1): Make the pick-and-place module for picking up the electronic component and the test module close, so that the circuit board of the electronic component picked up by the pick-and-place module is electrically connected to at least one of the multiple probes. Step (2): Fill the accommodating space with gas through the second gas pipeline.
在本發明的一實施例中,更包括進行多次第(1)步驟以及第(2)步驟。In an embodiment of the present invention, it further includes performing step (1) and step (2) multiple times.
在本發明的一實施例中,其中以測試裝置的取放模組拾取電子元件之後,電子元件與取放模組基本上構成封閉空間,且第二氣體管路的端點連通於封閉空間。In an embodiment of the present invention, after the electronic component is picked up by the pick-and-place module of the test device, the electronic component and the pick-and-place module basically form a closed space, and the end of the second gas pipeline is connected to the closed space.
基於上述,本發明的測試裝置及使用其的測試流程,可以降低線路板及/或線路板上的晶片破損或碎裂的可能。Based on the above, the test device and the test process using the same of the present invention can reduce the possibility of damage or chipping of the circuit board and/or the chip on the circuit board.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.
圖1是依照本發明的一實施例的一種測試流程的部分流程圖。圖2A至圖2C是依照本發明的一實施例的一種測試流程的部分側視示意圖。圖2D是依照本發明的一實施例的一種測試流程的部分側視剖視示意圖。圖2D可以是相同或類似於圖2A中區域R的剖視示意圖。圖3是依照本發明的一實施例的一種測試流程的部分時序圖。Fig. 1 is a partial flowchart of a test process according to an embodiment of the present invention. 2A to 2C are schematic partial side views of a test process according to an embodiment of the invention. FIG. 2D is a schematic partial side cross-sectional view of a test process according to an embodiment of the present invention. FIG. 2D may be the same or similar to the cross-sectional schematic diagram of the area R in FIG. 2A. Fig. 3 is a partial sequence diagram of a test process according to an embodiment of the present invention.
請參照圖1、圖2A及圖2D,於步驟S11中,提供測試裝置100。測試裝置100包括取放模組200以及測試模組300。取放模組200具有容置空間210。取放模組200包括吸附頭220、第一氣體管路230以及第二氣體管路240。吸附頭220位於容置空間210內。第一氣體管路230連通於吸附頭220。第二氣體管路240連通於容置空間210。測試模組300包括多個探針310。Please refer to FIG. 1, FIG. 2A and FIG. 2D, in step S11, a
在本實施例中,第一氣體管路230可以直接連通於吸附頭220,且第二氣體管路240可以直接連通於容置空間210。In this embodiment, the
在本實施例中,取放模組200可以更包括卡合槽(nes)250。卡合槽250可以藉由鉗、夾、鎖或其他適宜的治具或對應的方式固定於測試臂260上。卡合槽250具有頂面255(即,最遠離測試臂260的表面)、階梯面256以及底面257(即,容置空間210內最接近測試臂260的表面)。階梯面256連接頂面255與底面257。階梯面256以及底面257可以構成開放式的容置空間210。換句話說,卡合槽250中的容置空間210可以具有第一區211以及第二區212,其中第一區211具有第一深度T1,第二區212具有第二深度T2,且第二深度T2大於第一深度T1。In this embodiment, the pick-and-
在本實施例中,階梯面256可以包括第一梯面256a、連接面256b以及第二梯面256c。連接面256b位於第一梯面256a與第二梯面256c之間。第一梯面256a可以連接頂面255。第二梯面256c可以連接底面257。In this embodiment, the
在本實施例中,吸附頭220可以配置於底面257上,且第二氣體管路240的端點244可以位於底面257。換句話說,吸附頭220可以位於容置空間210的第二區212,且第二氣體管路240的端點244不位於容置空間210的第一區211(如:可以位於容置空間210的第二區212)。In this embodiment, the
在本實施例中,第一氣體管路230與第二氣體管路240彼此不連通。舉例而言,在一開放式的空間中,若經由第一氣體管路230進行增壓或降壓,則基本上不會使第二氣體管路240中的氣壓對應地造成增壓或降壓;或是若經由第二氣體管路240進行增壓或降壓,則基本上不會使第一氣體管路230中的氣壓對應地造成增壓或降壓。簡單來說,在一開放式的空間中,第一氣體管路230中的氣壓增減與第二氣體管路240中的氣壓增減基本上不連動。In this embodiment, the
在本實施例中,吸附頭220可以由具有彈性的聚合物材料所製成。舉例而言,吸附頭220可以包括橡膠吸盤,且第一氣體管路230的端點234可以直接連通於吸附頭220,但本發明不限於此。In this embodiment, the
在本實施例中,測試模組300可以更包括基座(socket)320以及電路板330。探針310可以嵌入基座320,且探針310可以電性連接於電路板330上對應的接觸墊(contact pad)338。舉例而言,探針310可以包括第一導電端311、彈性導電件312以及第二導電端313。第一導電端311可以凸出於基座320的上表面325以與待測元件(如:後述的電子元件400)相接觸。第二導電端313可以凸出於基座320的下表面327以與待電路板330上對應的接觸墊338相接觸。彈性導電件312位於第一導電端311及第二導電端313。In this embodiment, the
在本實施例中,彈性導電件312例如為由導電材質構成的彈簧。也就是說,探針310可以是彈針(pogo pin)。In this embodiment, the elastic
在一實施例中,彈性導電件312的彈性係數大約為60公克/毫米(g/mm)至90公克/毫米,但本發明不限於此。In one embodiment, the elastic coefficient of the elastic
在一實施例中,取放模組200及/或測試模組300上可以具有對位元件,但本發明不限於此。舉例而言,取放模組200及測試模組300上可以具有定位孔(guide hole)及對應的定位銷(guide pin)。In an embodiment, the pick-and-
請參照圖1及圖2B,於步驟S12中,提供電子元件400。電子元件400包括線路板410以及晶片420(die)。線路板410具有彼此相對的第一表面415以及第二表面417。晶片420配置於線路板410的第一表面415上,且晶片420可以經由覆晶接合(flip chip bonding)的方式電性連接於線路板410。1 and 2B, in step S12, an
在本實施例中,線路板410可以具有核心層(未繪示)。核心層可以包括高分子玻璃纖維複合材料基板、玻璃基板、陶瓷基板、絕緣矽基板、聚醯亞胺(polyimide;PI)玻璃纖維複合基板。核心層可以與位於其相對兩側的至少兩個線路層構成雙面線路板(double sided wiring board)。舉例而言,線路板410可以為銅箔基板(Copper Clad Laminate;CCL)或其他適宜的印刷線路板,但本發明不限與此。In this embodiment, the
在一實施例中,線路板410可以被稱為硬板(hard board PCB)。In an embodiment, the
在一實施例中,線路板410的厚度基本上小於或等於1.6毫米(millimeter;mm),但本發明不限於此。In an embodiment, the thickness of the
在一實施例中,線路板410的尺寸大約為10毫米×10毫米至25毫米×25毫米,但本發明不限於此。In one embodiment, the size of the
在本實施例中,線路板410上的晶片420可以裸晶(bare die)。換句話說,線路板410上不會具有將晶片420包封的模塑化合物(molding compound)。In this embodiment, the
在一實施例中,晶片420上的連接墊可以經由對應的凸塊(bump)(未繪示)電性連接至線路板410中對應的線路(未繪示)。凸塊可以包括錫、鉛、金或上述之組合,但本發明不限於此。In an embodiment, the connection pads on the
在一實施例中,晶片420與線路板410之間可以填充底膠(underfill)(未繪示),但本發明不限於此。In an embodiment, an underfill (not shown) may be filled between the
在一實施例中,晶片420的厚度基本上小於或等於1.0毫米(millimeter;mm),但本發明不限於此。In an embodiment, the thickness of the
在本實施例中,電子元件400可以更包括多個導電端子430。多個導電端子430可以是以陣列狀的方式配置於線路板410的第二表面417上,但本發明不限於此。導電端子430例如為銲球,但本發明不限於此。In this embodiment, the
在一實施例中,導電端子430的數量可以大於或等於400個,但本發明不限於此。In an embodiment, the number of
請參照圖1及圖2B,於步驟S20中,以測試裝置100的取放模組200拾取電子元件400。1 and 2B, in step S20, the
舉例而言,可以先將取放模組200的吸附頭220移動至線路板410上的晶片420上方。接著,可以藉由對第一氣體管路230進行抽氣,以使第一氣體管路230內的氣壓小於環境的氣壓,而使吸附頭220與晶片420的背面427(即,相對於主動面(active serface)425的表面)相接觸,且使晶片420可以被固定於吸附頭220上。也就是說,線路板410以及覆晶接合於線路板410上的晶片420可以被置於容置空間210內。For example, the
在本實施例中,以測試裝置100的取放模組200拾取電子元件400之後,電子元件400與取放模組200基本上構成封閉空間270(即,容置空間210的一部分)。In this embodiment, after the
在本實施例中,藉由吸附頭220吸附晶片420,可以對應地使電子元件400的線路板410與連接面256b相接觸。如此一來,電子元件400可以與第二梯面256c及底面257構成封閉空間270。也就是說,當對第一氣體管路230進行抽氣以吸附晶片420時,基本上不會使封閉空間270內的氣壓對應地造成下降;或是對第二氣體管路240進行進氣以提升封閉空間270內的氣壓時,基本上不會使電子元件400自取放模組200的吸附頭220上脫離。In this embodiment, by sucking the
在本實施例中,第二氣體管路240的端點244連通於封閉空間270。也就是說,第二氣體管路240的端點244基本上不會與電子元件400相接觸。In this embodiment, the
值得注意的是,封閉空間270並非完全的封閉系統(closed system)。舉例而言,氣體可以經由預設的管路(如:第二氣體管路240)被灌入封閉空間270或從封閉空間270被抽出;或是些許的氣體可以經由相接處(如:線路板410與連接面256b之間的接觸面)的細縫而於封閉空間270的內部或外部間轉移。It is worth noting that the
請參照圖1及圖2B至圖2C,於步驟S30中,令拾取電子元件400的取放模組200與測試模組300相接近。1 and 2B to 2C, in step S30, the pick-and-
在一實施例中,可以令拾取電子元件400的取放模組200朝向測試模組300移動,但本發明不限於此。在另一實施例中,可以令測試模組300朝向被取放模組200拾取的電子元件400移動。In an embodiment, the pick-and-
請參照圖1及圖2C,於步驟S40中,使被取放模組200拾取的電子元件400的線路板410電性連接於多個探針310,以進行測試。也就是說,測試裝置100適於對覆晶接合於線路板410上的晶片420進行測試。1 and 2C, in step S40, the
在本實施例中,使被所述取放模組200拾取的電子元件400的線路板410電性連接於多個探針310的步驟可以包括依序進行以下第(1)步驟以及第(2)步驟。In this embodiment, the step of electrically connecting the
第(1)步驟:令拾取電子元件400的取放模組200與測試模組300相接近,以使被取放模組200拾取的電子元件400的線路板410電性連接於多個探針310的至少其中之一。Step (1): Make the pick-and-
第(2)步驟:藉由第二氣體管路240向封閉空間270(即,容置空間210的一部分)灌入氣體。Step (2): Inject gas into the closed space 270 (ie, a part of the accommodating space 210) through the
在藉由第二氣體管路240向封閉空間270灌入氣體之後,可以使封閉空間270內的氣壓提升。如此一來,可以使施加於線路板410的第一表面415上的壓力(如:封閉空間270內的氣壓)與施加於線路板410的第二表面417上的壓力(如:探針310施加於導電端子430接觸力而直接或間接轉移至第二表面417上的應力)可以相接近,而可以降低線路板410及/或線路板410上的晶片420破損或碎裂的可能。After gas is injected into the
在本實施例中,前述的第(1)步驟以及前述的第(2)步驟可以進行多次。In this embodiment, the aforementioned step (1) and the aforementioned step (2) may be performed multiple times.
請參照圖1、圖2C至圖2D及圖3。圖3可以是第(1)步驟至第(6)步驟、測試步驟以及第(7)步驟至第(12)步驟中,對應的相對壓力及對應的相對壓縮量的關係圖。值得注意得是,在圖3中,橫軸的標示僅用於表示各個步驟,並不一定代表了各個步驟的進行時間長短;並且,在圖3中,各條連線(如:實線、虛線、點虛線)僅用於表示各個步驟進行前及完成後之對應的相對壓力及對應的相對壓縮量的趨勢,並不一定代表了各個步驟於進行時的相對壓力或壓縮量的關係。另外,在圖3中,實線可以是各個步驟於進行前及完成後的至少一個探針310的相對壓縮量(如:三角型點)的連線,虛線可以是各個步驟於進行前及完成後施加於線路板410的第二表面417上的壓力值(如:方型點)的連線,點虛線可以是各個步驟於進行前及完成後施加於線路板410的第一表面415上的壓力值(如:菱型點)的連線。在圖3左側的縱軸中,所標示的相對壓力P
1至P
10的值為依序升高。也就是說,相對壓力P
1的值小於相對壓力P
2的值,相對壓力P
2的值小於相對壓力P
3的值,依此類推。在圖3右側的縱軸中,所標示的相對壓縮量X
1至X
10的值為依序升高。也就是說,相對壓縮量X
1的值小於相對壓縮量X
2的值,相對壓縮量X
2的值小於相對壓縮量X
3的值,依此類推。
Please refer to Figure 1, Figure 2C to Figure 2D and Figure 3. Figure 3 may be a diagram of the relationship between the corresponding relative pressure and the corresponding relative compression in the steps (1) to (6), the test steps, and the steps (7) to (12). It is worth noting that, in Figure 3, the horizontal axis is only used to indicate each step, and does not necessarily represent the length of time for each step; and, in Figure 3, each line (such as: solid line, The dotted line, dotted line) are only used to indicate the relative pressure and relative compression trend before and after each step, and do not necessarily represent the relative pressure or compression relationship of each step. In addition, in FIG. 3, the solid line can be the connection of the relative compression amount (such as triangular point) of the at least one
舉例而言,請參照圖3,使被所述取放模組200拾取的電子元件400的線路板410電性連接於多個探針310的步驟可以包括依序進行以下第(1)步驟至第(6)步驟,其中第(3)步驟及第(5)步驟基本上相同或相似於第(1)步驟,且第(4)步驟及第(6)步驟基本上相同或相似於第(2)步驟。For example, referring to FIG. 3, the step of electrically connecting the
在藉由前述的第(1)步驟以及前述的第(2)步驟之後,可以使探針310的接觸端(如:第一導電端311;繪示於圖2D)與電子元件400的接觸端(如:對應的導電端子430)有良好的接觸,且/或使探針310的接觸端(如:第二導電端313)與電路板330的接觸端(如:對應的接觸墊338;繪示於圖2D)有良好的接觸,且可以降低線路板410及/或線路板410上的晶片420破損或碎裂的可能。After the aforementioned step (1) and the aforementioned step (2), the contact end of the probe 310 (such as the first
在本實施例中,於使電子元件400藉由探針310而與電路板330電性連接之後,可以進行測試步驟。測試步驟例如可以包括電路檢測或電性檢測。測試步驟的參數(recipe)及內容可以依據設計或使用上的需求而進行調整,於本發明並不加以限制。In this embodiment, after the
在本實施例中,於停止或完成測試步驟之後,可以使被取放模組200拾取的電子元件400的線路板410與對應的探針310電性分離。In this embodiment, after stopping or completing the test step, the
使被取放模組200拾取的電子元件400的線路板410與對應的探針310電性分離的步驟可以包括依序進行以下第(7)步驟以及第(8)步驟。The step of electrically separating the
第(7)步驟:藉由第二氣體管路240從封閉空間270(即,容置空間210的一部分)中抽出氣體。Step (7): Extract gas from the enclosed space 270 (ie, a part of the accommodating space 210) through the
第(8)步驟:令拾取電子元件400的取放模組200與測試模組300相遠離。Step (8): Keep the pick-and-
在藉由第二氣體管路240從封閉空間270中抽出氣體之後,可以使封閉空間270內的氣壓降低。如此一來,可以使施加於線路板410的第一表面415上的壓力(如:封閉空間270內的氣壓)與施加於線路板410的第二表面417上的壓力(如:探針310施加於導電端子430接觸力而直接或間接轉移至第二表面417上的應力)可以相接近,而可以降低線路板410及/或線路板410上的晶片420破損或碎裂的可能。After the gas is extracted from the
在本實施例中,前述的第(7)步驟以及前述的第(8)步驟可以進行多次。In this embodiment, the aforementioned step (7) and the aforementioned step (8) may be performed multiple times.
舉例而言,請參照圖3,使被取放模組200拾取的電子元件400的線路板410與對應的探針310電性分離的步驟可以包括依序進行以下第(7)步驟至第(12)步驟,其中第(9)步驟及第(11)步驟基本上相同或相似於第(7)步驟,且第(10)步驟及第(12)步驟基本上相同或相似於第(8)步驟。For example, referring to FIG. 3, the step of electrically separating the
在藉由前述的第(7)步驟以及前述的第(8)步驟之後,可以使探針310的接觸端(如:第一導電端311)與電子元件400的接觸端(如:對應的導電端子430)電性分離,且可以降低線路板410及/或線路板410上的晶片420破損或碎裂的可能。After the aforementioned step (7) and the aforementioned step (8), the contact end of the probe 310 (such as the first conductive end 311) and the contact end of the electronic component 400 (such as the corresponding conductive The terminals 430) are electrically separated, and the possibility of damage or cracking of the
綜上所述,本發明的測試裝置及使用其的測試流程,可以降低線路板及/或線路板上的晶片破損或碎裂的可能。In summary, the test device and the test process using it of the present invention can reduce the possibility of damage or chipping of the circuit board and/or the chip on the circuit board.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.
100:測試裝置
200:取放模組
210:容置空間
211:第一區
T1:第一深度
212:第二區
T2:第二深度
220:吸附頭
230:第一氣體管路
234:端點
240:第二氣體管路
244:端點
250:卡合槽
255:頂面
256:階梯面
256a:第一梯面
256b:連接面
256c:第二梯面
257:底面
260:測試臂
270:封閉空間
300:測試模組
310:探針
311:第一導電端
312:彈性導電件
313:第二導電端
320:基座
325:上表面
327:下表面
330:電路板
338:接觸墊
400:電子元件
410:線路板
415:第一表面
417:第二表面
420:晶片
425:主動面
427:背面
430:導電端子
R:區域
S11、S12、S20、S30、S40:步驟
100: test device
200: Pick and place module
210: housing space
211: District One
T1: first depth
212: Second District
T2: second depth
220: Adsorption head
230: The first gas pipeline
234: Endpoint
240: second gas pipeline
244: Endpoint
250: snap slot
255: top surface
256:
圖1是依照本發明的一實施例的一種測試流程的部分流程圖。 圖2A至圖2C是依照本發明的一實施例的一種測試流程的部分側視示意圖。 圖2D是依照本發明的一實施例的一種測試流程的部分側視剖視示意圖。 圖3是依照本發明的一實施例的一種測試流程的部分時序圖。 Fig. 1 is a partial flowchart of a test process according to an embodiment of the present invention. 2A to 2C are schematic partial side views of a test process according to an embodiment of the invention. FIG. 2D is a schematic partial side cross-sectional view of a test process according to an embodiment of the present invention. Fig. 3 is a partial sequence diagram of a test process according to an embodiment of the present invention.
S11、S12、S20、S30、S40:步驟 S11, S12, S20, S30, S40: steps
Claims (10)
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|---|---|---|---|
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|---|---|---|---|---|
| TW200606432A (en) * | 2004-08-11 | 2006-02-16 | King Yuan Electronics Co Ltd | Method and apparatus for picking up an electric component under test |
| US7400158B2 (en) * | 2006-01-26 | 2008-07-15 | Horng Terng Automation Co., Ltd. | Test fixture and method for testing a semi-finished chip package |
| TW200928395A (en) * | 2007-10-31 | 2009-07-01 | Advantest Corp | Abnormality detecting device for detecting abnormality of contact section of contact arm |
| TW200951449A (en) * | 2008-04-25 | 2009-12-16 | Advantest Corp | Test system and probe device |
| TW201447325A (en) * | 2013-04-23 | 2014-12-16 | Seiko Epson Corp | Processor and inspection device |
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2019
- 2019-09-04 TW TW108131787A patent/TWI710768B/en active
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|---|---|---|---|---|
| TW200606432A (en) * | 2004-08-11 | 2006-02-16 | King Yuan Electronics Co Ltd | Method and apparatus for picking up an electric component under test |
| US7400158B2 (en) * | 2006-01-26 | 2008-07-15 | Horng Terng Automation Co., Ltd. | Test fixture and method for testing a semi-finished chip package |
| TW200928395A (en) * | 2007-10-31 | 2009-07-01 | Advantest Corp | Abnormality detecting device for detecting abnormality of contact section of contact arm |
| TW200951449A (en) * | 2008-04-25 | 2009-12-16 | Advantest Corp | Test system and probe device |
| TW201447325A (en) * | 2013-04-23 | 2014-12-16 | Seiko Epson Corp | Processor and inspection device |
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