JP2010045104A - Method for producing electronic component - Google Patents

Abstract

The semiconductor chip and the tape substrate are likely to be peeled off due to changes in the usage environment such as the temperature of the semiconductor chip, and the reliability may be lowered, for example, the circuit resistance increases due to oxidation of the bump itself.
A method of manufacturing an electronic component in which a semiconductor chip including an electrode portion and a stud bump fixed to the electrode portion is flip-chip bonded to a tape substrate on which a connection bump is formed. An arrangement step of arranging an adhesive layer on the surface of the semiconductor device, and a stud bump so that the semiconductor chip is positioned at a predetermined position to connect the stud bump and the connection bump, and a predetermined gap is provided between the adhesive layer and the surface of the semiconductor chip. Flip chip by pressing in the thickness direction while heating the semiconductor chip and the tape substrate while fixing the adhesive layer and the surface of the semiconductor chip by pressing under reduced pressure A method for manufacturing an electronic component, comprising: a bonding step of bonding.
[Selection] Figure 4

Description

  The present invention relates to a method for manufacturing an electronic component on which a semiconductor chip is mounted.

  In recent years, as a mounting technology for semiconductor elements such as integrated circuits, a WL-CSP (Wafer Level Chip Size Package) for performing packaging in a wafer state before dicing has been put into practical use. WL-CSP has the characteristics that it can be mounted in a small size, a thin shape, and a high speed because it is almost the same size as a bare chip and has a short wiring length. For example, WL-CSP is adopted as a CSP for mobile phones.

  As the WL-CSP, there is a flip-chip connection type CSP in which a bump-formed tape substrate is used as an interposer (semiconductor package substrate) and a bump formed on the semiconductor wafer side is connected to a bump formed on the tape substrate ( Patent Document 1) below. FIG. 8 is a cross-sectional view showing the structure of a conventional WL-CSP900.

  The WL-CSP 900 has a structure in which a semiconductor chip 910 and an interposer 920 are joined via an insulating layer 930 formed of an insulating resin. On the surface bonded to the insulating layer 930 of the semiconductor chip 910, an electrode pad 911 for external connection made of, for example, Al, and a protective layer 912 covering other than the electrode pad 911 are provided. The electrode pad 911 is provided with a stud bump 913 made of, for example, Au.

  The interposer 920 is formed from a tape substrate in which a conductor pattern 922 is formed on an insulating base material 921, and SnAg bumps 923 are provided on the surface of the conductor pattern 922 that is bonded to the insulating layer 930. In addition, on the opposite surface of the conductor pattern 922, a protruding electrode portion 924 that penetrates the base material 921 is provided. The protruding electrode portion 924 is filled with the same resin as the resin forming the insulating layer 930 therein.

  The WL-CSP 900 having the above structure is manufactured as follows. First, the semiconductor wafer on which the semiconductor chip 910 is formed and the tape substrate on which the interposer 920 is formed are bonded to each other with a predetermined insulating adhesive, and the stud bump 913 penetrates the uncured insulating adhesive to form the SnAg bump 923. Press until it touches. Then, the stud bump 913 and the SnAg bump 923 are flip-chip bonded. Thereafter, the uncured insulating adhesive is cured to form the insulating layer 930. Finally, the WL-CSP 900 is manufactured by cutting (dicing) the semiconductor wafer bonded to the tape substrate into chips. The WL-CSP 900 is connected to and mounted on a mother board, which is a mounting board, via solder balls 940 disposed on the protruding electrode portions 924.

As another method for manufacturing the WL-CSP 900, the semiconductor wafer on which the semiconductor chip 910 is formed is cut to produce individual semiconductor chips 910, and this is a tape substrate on which the interposer 920 is formed. There is a method of mounting on top (hereinafter referred to as a manufacturing method by mounting individual pieces). In this manufacturing method, the separated semiconductor chip 910 is mounted on an uncured insulating adhesive and pressed until the stud bump 913 penetrates the insulating adhesive and contacts the SnAg bump 923. Thereafter, the stud bump 913 and the SnAg bump 923 are flip-chip bonded. Then, the WL-CSP 900 can be manufactured by cutting the tape substrate on which the separated semiconductor chip 910 is mounted into chips.
Japanese Patent No. 3445441

  However, the conventional method for manufacturing a semiconductor package has the following problems. In other words, since stud bumps for electrical connection are formed on the semiconductor wafer, when the semiconductor wafer and the tape substrate are joined, air enters the periphery of the stud bumps due to the convex shape of the stud bumps, and a gap is formed. It is formed. Due to this gap, peeling between the semiconductor chip and the tape substrate is likely to occur due to a change in the operating temperature of the semiconductor chip, and the reliability of the circuit may be reduced, such as an increase in circuit resistance due to oxidation of the bump itself. there were.

  The present invention has been made to solve the above problems, and provides a method for manufacturing a highly reliable semiconductor package that can be bonded without causing a gap between a semiconductor wafer and a tape substrate. It is.

In order to solve the above problems, a method for manufacturing an electronic component according to a first aspect of the present invention is a tape in which a connection bump is formed on a semiconductor chip including an electrode portion and a stud bump fixed to the electrode portion. A method of manufacturing an electronic component that is flip-chip bonded to a substrate, comprising: an arranging step of arranging an adhesive layer on one surface of the tape substrate; and the semiconductor chip at a predetermined position for connecting the stud bump and the connection bump Positioning, fixing the stud bump to the adhesive layer so as to have a predetermined interval between the adhesive layer and the surface of the semiconductor chip, and pressing the adhesive layer under reduced pressure Bonding process for bonding the surface of a semiconductor chip and flip chip bonding by pressing the semiconductor chip and the tape substrate in the thickness direction while heating And having a degree.

Another aspect of the method for manufacturing an electronic component according to the present invention is characterized in that, in the fixing step, the stud bump further includes a step of passing through the adhesive layer and contacting the connection bump.

Another aspect of the method for producing an electronic component of the present invention is characterized in that the bonding step is performed in a state where the viscosity of the adhesive layer is set to 10 ³ to 10 ⁵ Pa · s.

Another aspect of the electronic component manufacturing method of the present invention is characterized in that the arranging step is arranged under reduced pressure.

In another aspect of the method for producing an electronic component of the present invention, in the arranging step, the adhesive layer is composed of a plurality of adhesive layer portions, and at least the adhesive layer portion arranged on the tape substrate is pre-conditioned, The reaction is carried out until a predetermined Young's modulus or higher is reached.

According to the present invention, there is provided a semiconductor package manufacturing method capable of bonding without generating a gap between a semiconductor wafer and a tape substrate, preventing air bubbles from remaining, and realizing highly reliable bonding. It is.

Embodiments according to a method for manufacturing a semiconductor package of the present invention will be described below in detail with reference to the drawings. Note that the description in the present embodiment shows an example of a method for manufacturing a semiconductor package according to the present invention, and the present invention is not limited to this, and can be appropriately changed without departing from the spirit of the present invention. .

  1 to 5 are schematic sectional views showing a method for manufacturing a semiconductor package according to the first embodiment. As shown in FIG. 1A, the semiconductor chip 200 is fixed to the semiconductor element 211, an electrode pad (electrode part) 212 made of, for example, Al fixed to the semiconductor element 211, and the electrode pad 212. The stud bump 214 is made of, for example, Au or Cu. At this time, a protective layer 213 that covers one surface of the semiconductor element 211 may be provided so that at least a part of the electrode pad 212 is exposed.

As shown in FIG. 1B, the tape substrate 100 is formed from a tape-like substrate in which a conductor pattern 110 is formed on an insulating base material 120. The adhesive layer 150 shown in FIG. A connection bump 130 made of, for example, a Sn-based alloy such as SnAg is provided on the surface to be bonded to the surface. Further, on the surface opposite to the surface on which the conductor pattern 110 is formed, a protruding electrode portion 140 that penetrates the base material 120 is provided.

In the semiconductor package manufacturing method of the present embodiment, first, as shown in FIG. 2, the adhesive layer 150 is disposed over the entire surface of the tape substrate 100 under reduced pressure. The adhesive layer 150 is disposed on all of the upper surface of the conductor pattern 110, the portion of the conductor pattern 110 where the copper or the like is removed and the base material 120 is exposed, and the inside of the protruding electrode portion 140. Further, the surface of the adhesive layer 150 is made substantially parallel to the conductor pattern 110.

Examples of the synthetic resin used for the adhesive layer 150 include acrylic resins, urethane resins, urethane-modified polyester resins, polyester resins, epoxy resins, ethylene-vinyl acetate copolymers (EVA), natural rubber, SBR, NBR, Synthetic rubbers such as silicone rubber are exemplified, and particularly preferred are polyurethane resins (for example, Toyobo Co., Ltd .: Byron UR (trade name), Nippon Polyurethane Co., Ltd .: Nippon Polan (trade name)). Two or more of these synthetic resins may be mixed and used.

  Next, as shown in FIG. 3, the tape substrate 100 on which the adhesive layer 150 is arranged and the semiconductor chip 200 on which the stud bump 214 is formed are arranged to face each other, and the connection bump 130 and the stud bump 214 are connected. Then, the semiconductor chip 200 is lowered in the direction of the arrow X shown in the figure, and the tape substrate 100 and the semiconductor chip 200 are fixed.

When the tape substrate 100 and the semiconductor chip 200 are fixed, the tape substrate 100 and the semiconductor chip 200 are fixed so that at least the tip of the stud bump 214 enters the adhesive layer 150. Desirably, the connection bump 130 and the stud bump 214 are fixed so that at least a part thereof is in contact. By fixing in this way, when the tape substrate 100 and the semiconductor chip 200 are moved after being fixed, it is possible to prevent the position from being shifted from the predetermined position.

  Further, when the tape substrate 100 and the semiconductor chip 200 are positioned and fixed under reduced pressure, a gap 300 is formed in advance between the adhesive layer 150 and the surface of the semiconductor chip 200 as shown in FIG. It is preferable to do. By fixing in this way, a gap 300 is formed between the adhesive layer 150 and the semiconductor chip 200, and by reducing the pressure of the gap portion, bubbles remain between the surface of the adhesive layer 150 and the semiconductor chip 200. In addition, it is possible to perform bonding with high reliability.

  Next, as shown in FIG. 5, the packaging process is completed by further pressing the positioned tape substrate 100 and semiconductor chip 200 so that the adhesive layer 150 and the surface of the semiconductor chip 200 are in contact with each other under reduced pressure. To do. In this way, the adhesive bump 150 and the surface of the semiconductor chip 200 are bonded under reduced pressure, preferably in an atmosphere of 50 hPa or less with a vacuum pump or the like, so that stud bumps disposed on the surfaces of the tape substrate 100 and the semiconductor chip 200 are provided. It is possible to reduce the problem that air enters the periphery of unevenness such as 214 to form a gap.

Moreover, it is more preferable to perform the above-mentioned adhesion after heating the material to the adhesive layer 150 to a temperature at which the material is softened and the viscosity is 10 ² to 10 ⁴ Pa · s. By performing the bonding under such conditions, a part of the adhesive layer 150 goes around to the end face side of the semiconductor chip 200 as shown in FIG. 6 which is an enlarged view of A in FIG. Adhesion reliability between 150 can be improved. At this time, the wraparound height 151 is preferably 5 μm or more, and more preferably 1/2 or more of the thickness of the semiconductor chip. In addition, the wraparound at the end face of the semiconductor chip 200 has been described. Even when a groove (not shown) is formed on the surface of the semiconductor chip 200 by half dicing, a part of the adhesive layer wraps around the recess. The same effect can be obtained. In addition, in the present Example, it describes on the assumption that the adhesive layer material will become a viscosity of 10 ² to 10 ⁴ Pa · s by heating, but depending on the material, the viscosity may be 10 ² to 10 ⁴ by cooling. It may be Pa · s.

Next, the manufacturing method of the semiconductor package concerning 2nd Embodiment is demonstrated below using FIG. When bonding the tape substrate 100 and the semiconductor chip 200 as in the first embodiment, the adhesive 150 has a two-layer structure in a step before bonding in a reduced pressure environment. The Young's modulus of the adhesive layer 150a on the tape substrate side having a structure is set larger than the Young's modulus of the adhesive layer 150b on the semiconductor chip side.

  In FIG. 7I, the adhesive layer 150a is disposed on the side of the conductor pattern 110 of the tape substrate 100 under reduced pressure, as in FIG. The adhesive layer 150 is disposed on the upper surface of the conductive pattern 110, the portion where the copper or the like of the conductive pattern 110 is removed, and the base material 120 is exposed, and the interior of the protruding electrode portion 140. Further, the surface of the adhesive layer 150 is made substantially parallel to the conductor pattern 110.

Here, the adhesive layer 150 disposed by primary heating is cured. By this primary heating, the adhesive layer 150 becomes hard to some extent and becomes an adhesive layer 150a. In the curing here, when the Young's modulus is heated to 10 ⁴ Pa or more, the arranged adhesive layer 150 flows out because it is in an uncured state, and the interval between the tape substrate 100 and the semiconductor chip 200 is reduced. The problem that the insulation between the tape substrate 100 and the semiconductor chip 200 cannot be ensured can be suppressed, and the misalignment when the tape substrate 100 and the semiconductor chip 200 are bonded can be prevented by curing the adhesive layer to some extent.

Next, the adhesive layer 150b is disposed on the upper surface of the adhesive layer 150a cured by the primary heating. The adhesive layer 150b at this time may be the same as the adhesive layer 150, but it is necessary to use a layer having a Young's modulus lower than that of the adhesive layer 150a. By doing so, the closer to the tape substrate 100 side, the harder the adhesive layer becomes, and it is possible to achieve highly reliable adhesion when the semiconductor chip 200 is fixed.

In addition, the adhesive layer can have a multilayer structure, and by adopting the multilayer structure, flexible adhesion between the tape substrate 100 and the semiconductor chip 200 can be realized. This multilayer structure can be appropriately selected depending on the material of the adhesive layer, the height of the stud bump, and the like. Here, the adhesive layers may be sequentially stacked and arranged under reduced pressure. Alternatively, an adhesive layer having a multilayer structure may be prepared in advance, and the manufactured adhesive layer may be placed on the tape substrate 100 and flip-chip bonded. Thus, by disposing the adhesive layer under reduced pressure, it is possible to prevent bubbles from remaining and perform highly reliable adhesion.

  Further, as shown in FIG. 7 (ii), the semiconductor chip 200 is lowered and fixed on the upper surface of the adhesive layer 150b created in FIG. 7 (i). The tape substrate 100 and the semiconductor chip 200 are fixed so that at least the tip of the stud bump 214 enters the adhesive layer 150a. Desirably, the connection bump 130 and the stud bump 214 are fixed so that at least a part thereof is in contact. By fixing in this manner, it is possible to prevent the tape substrate 100 and the semiconductor chip 200 from being displaced from the predetermined positions when the tape substrate 100 and the semiconductor chip 200 are moved after the fixing.

Next, under reduced pressure, the tape substrate 100 and the semiconductor chip 200 that have been positioned are flip-chip bonded by pressing in the thickness direction while further heating so that the adhesive layer 150b and the surface of the semiconductor chip 200 are in contact with each other. The process is complete. As described above, by bonding the adhesive layer 150b and the surface of the semiconductor chip 200 under reduced pressure, preferably in an atmosphere of 50 hPa or less, the unevenness of the stud bumps 214 and the like disposed on the surfaces of the tape substrate 100 and the semiconductor chip 200 is achieved. It is possible to reduce the problem that air enters the periphery and a gap is formed.

  Further, when the tape substrate 100 and the semiconductor chip 200 are positioned and fixed under reduced pressure, it is preferable that a gap 300 is formed in advance between the adhesive layer 150 b and the surface of the semiconductor chip 200. By fixing in this way, a gap 300 is formed between the adhesive layer 150b and the semiconductor chip 200, and by reducing the pressure in the gap portion, bubbles remain between the surface of the adhesive layer 150b and the semiconductor chip 200. Preventing and highly reliable adhesion can be performed.

The bonding is more preferably performed by heating to a temperature at which the material of the bonding layer 150b on the semiconductor chip 200 side is softened and the viscosity is 10 ² to 10 ⁴ Pa · s. By performing bonding under such conditions, a part of the adhesive layer 150 wraps around the end surface side of the semiconductor chip 200 as in FIG. 6, thereby improving the adhesion reliability between the semiconductor chip 200 and the adhesive layer 150. Can be made.

  As will be described later, the semiconductor chip and the tape substrate were heated to increase the viscosity of the adhesive layer, and then the semiconductor chip and the adhesive layer were bonded and flip chip bonding was performed.

(Semiconductor chip)
The used semiconductor chip has an area of 10 mm × 10 mm, has a protective layer covering one surface of a semiconductor element having a thickness of 0.2 mm, and a stud bump made of Au is provided on an electrode pad made of Al. It has been.

(adhesive)
The insulating adhesive used was a thermosetting adhesive sheet (thickness 10 to 40 μm) mainly composed of epoxy.

(Tape substrate)
The tape substrate is a conductor formed by Cu plating on an insulating base material obtained by exposing, developing, UV curing, and heat curing a photosensitive coverlay (for example, Hitachi Chemical: FR-5550 (trade name)). The conductor pattern has solder bumps made of SnAg. A projecting electrode portion is provided on the surface opposite to the surface on which the conductor pattern is formed.

(Adhesion process)
The stud bumps of the semiconductor chip and the bumps for connecting the tape substrate are aligned, and the stud bumps of the semiconductor chip are fixed on the adhesive layer. Here, it fixed so that the front-end | tip of a stud bump might contact a bump for connection. Thereafter, under reduced pressure, the semiconductor chip and the tape substrate were bonded together by pressing in the thickness direction while heating so as to have the viscosity shown in Table 1. Moreover, it set so that it might become a predetermined | prescribed viscosity by measuring the relationship between a viscosity and heating temperature beforehand.

(Flip chip bonding)
Both the bonded semiconductor chip and the tape substrate were heated at 230 ° C. for several tens of seconds, and then heated at 180 ° C. for about 60 minutes to fully cure the adhesive layer, and the semiconductor chip was flip-chip bonded to the tape substrate.

  The semiconductor package thus obtained was evaluated for the following characteristics.

(Evaluation methods)
(1) Thickness of adhesive layer The thickness of the adhesive layer was measured.
(2) Number of occurrences of adhesion failure The obtained semiconductor package was subjected to a temperature cycle test in which the environmental temperature was changed 3000 times from −65 ° C. to 150 ° C. to confirm the number of occurrences of peeling between the adhesive layer and the semiconductor chip.

As can be seen from Table 1, when the heating temperature is too high and the viscosity of the adhesive layer is less than 10 ³ Pa · s, the adhesive layer flows out and the thickness of the adhesive layer is reduced. It is impossible to obtain a thickness of 10 μm or more that can ensure insulation.

On the other hand, if the heating temperature is too low and the viscosity of the adhesive layer exceeds 10 ⁵ Pa · s, the thickness of the adhesive layer hardly changes, and a part of the adhesive layer wraps around the side surface of the semiconductor chip. You can see that it is not.

Furthermore, it can be confirmed from Table 2 that a defect has occurred when the number of defects at the junction between the semiconductor chip and the adhesive layer after the temperature cycle test is larger than 10 ⁵ Pa · s.

It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 1st Embodiment. It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 1st Embodiment. It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 1st Embodiment. It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 1st Embodiment. It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 1st Embodiment. It is the elements on larger scale which show the part A of FIG. It is a cross-sectional schematic diagram which shows the manufacturing method of the semiconductor package concerning 2nd Embodiment. It is a cross-sectional schematic diagram which shows the structure of the conventional semiconductor package.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Tape board | substrate 110 Conductive pattern 120 Base material 130 Connection bump 140 Protruding electrode part 150 Adhesive layer 151 Rounding height 200 Semiconductor chip 211 Semiconductor element 212 Electrode pad 213 Protective layer 214 Stud bump 300 Gap

Claims (5)

A method of manufacturing an electronic component in which a semiconductor chip including an electrode portion and a stud bump fixed to the electrode portion is flip-chip bonded to a tape substrate on which a connection bump is formed,
An arranging step of arranging an adhesive layer on one surface of the tape substrate;
The semiconductor chip is positioned at a predetermined position to connect the stud bump and the connection bump, and the stud bump is fixed to the adhesive layer so as to have a predetermined distance between the adhesive layer and the surface of the semiconductor chip. Fixing process to perform,
A bonding step for bonding the adhesive layer and the surface of the semiconductor chip by pressing under reduced pressure; and a bonding step for flip-chip bonding by pressing the semiconductor chip and the tape substrate in the thickness direction while heating. The manufacturing method of the electronic component characterized by having. 2. The method of manufacturing an electronic component according to claim 1, wherein in the fixing step, the stud bump further includes a step of penetrating the adhesive layer and contacting the connection bump. ^{3. The} method of manufacturing a semiconductor package according to claim 1, wherein in the bonding step, pressing is performed in a state where the viscosity of the bonding layer is set to 10 ³ to 10 ⁵ Pa · s.   The method of manufacturing a semiconductor package according to claim 1, wherein the arranging step is arranged under reduced pressure.   In the arranging step, the adhesive layer is composed of a plurality of adhesive layer portions, and at least the adhesive layer portion arranged on the tape substrate is temperature-controlled in advance and reacted until a predetermined Young's modulus or higher is reached. The method of manufacturing a semiconductor package according to claim 1, wherein:

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