TWI703390B - Display device - Google Patents
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- TWI703390B TWI703390B TW108119193A TW108119193A TWI703390B TW I703390 B TWI703390 B TW I703390B TW 108119193 A TW108119193 A TW 108119193A TW 108119193 A TW108119193 A TW 108119193A TW I703390 B TWI703390 B TW I703390B
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Abstract
Description
本發明是有關於一種顯示裝置,且特別是有關於一種具有重疊資料線之共用電極的顯示裝置。 The present invention relates to a display device, and more particularly, to a display device having common electrodes with overlapping data lines.
隨著平面式顯示面板的普及,具有空間利用效率佳、高畫質、低消耗功率、無輻射等優越特性之液晶顯示面板,目前已被廣為使用。一般而言,液晶顯示面板包括畫素陣列基板、相對於畫素陣列基板的彩色濾光片基板以及夾設於畫素陣列基板與彩色濾光片基板之間的液晶層。畫素陣列基板包括多個畫素電極。彩色濾光片基板包以括多個彩色濾光圖案以及遮蔽彩色濾光圖案之間的間隙的遮光圖案(即俗稱的黑色矩陣,black matrix)。在理想的組立(assembly)條件下,彩色濾光片基板的多個彩色濾光圖案與畫素陣列基板的多個畫素電極對齊,且彩色濾光片基板的遮光圖案會遮蔽畫素電極之間的間隙,以防止漏光或混色現象發生。 With the popularization of flat display panels, liquid crystal display panels with excellent space utilization efficiency, high image quality, low power consumption, and no radiation have been widely used. Generally speaking, a liquid crystal display panel includes a pixel array substrate, a color filter substrate opposite to the pixel array substrate, and a liquid crystal layer sandwiched between the pixel array substrate and the color filter substrate. The pixel array substrate includes a plurality of pixel electrodes. The color filter substrate includes a plurality of color filter patterns and a light shielding pattern that shields the gaps between the color filter patterns (that is, a black matrix, commonly known as black matrix). Under ideal assembly conditions, the multiple color filter patterns of the color filter substrate are aligned with the multiple pixel electrodes of the pixel array substrate, and the light shielding pattern of the color filter substrate will shield one of the pixel electrodes. To prevent light leakage or color mixing.
然而,隨著顯示面板的解析度提高,組立精度的要求也隨之提升,因此無法進一步縮減遮光圖案,以增加畫素開口率。此外,顯示面板可能因為衝擊或拍打,而導致遮光圖案與畫素電 極無法對準而於導致漏光。另外,為了防止訊號走線斷裂失效而設置的導電通孔會進一步降低畫素開口率。因此,如何提升顯示面板的畫素開口率並提升顯示品質,為本領域相關技術人員亟需解決的課題。 However, as the resolution of the display panel increases, the requirements for assembly accuracy also increase. Therefore, it is impossible to further reduce the shading pattern to increase the pixel aperture ratio. In addition, the display panel may be impacted or slapped, resulting in shading patterns and pixel electricity Extremely unable to align and cause light leakage. In addition, the conductive vias provided to prevent the signal traces from breaking and failing will further reduce the pixel aperture ratio. Therefore, how to increase the pixel aperture ratio of the display panel and improve the display quality is an urgent issue for those skilled in the art to solve.
本發明提供一種顯示裝置,可以提升顯示裝置的畫素開口率以及性能,而具有良好的顯示品質。 The present invention provides a display device, which can improve the pixel aperture ratio and performance of the display device, and has good display quality.
本發明的顯示裝置包括第一基板、多條資料線以及多條掃描線設置於第一基板上、多個畫素單元設置於第一基板上、平坦層覆蓋這些資料線、第一共用電極層設置於平坦層上、第二基板設置於第一基板的對向以及第二共用電極層設置於第二基板上。這些資料線沿著第一方向延伸,該些掃描線沿著第二方向延伸,且第一方向垂直第二方向。這些畫素單元電性連接至這些掃描線及這些資料線。第一共用電極層具有延第一方向延伸的多個第一部,且於垂直第一基板的方向上,這些第一部重疊這些資料線。第二共用電極層位於第二基板與第一共用電極層之間。 The display device of the present invention includes a first substrate, a plurality of data lines, and a plurality of scan lines are arranged on the first substrate, a plurality of pixel units are arranged on the first substrate, a flat layer covers the data lines, and a first common electrode layer The second substrate is disposed on the flat layer, the second substrate is disposed opposite to the first substrate, and the second common electrode layer is disposed on the second substrate. The data lines extend along the first direction, the scan lines extend along the second direction, and the first direction is perpendicular to the second direction. The pixel units are electrically connected to the scan lines and the data lines. The first common electrode layer has a plurality of first portions extending in a first direction, and in a direction perpendicular to the first substrate, the first portions overlap the data lines. The second common electrode layer is located between the second substrate and the first common electrode layer.
本發明的顯示裝置包括第一基板、多條資料線以及多條掃描線設置於第一基板上、第一畫素單元及第二畫素單元設置於第一基板上、平坦層覆蓋這些資料線、第一共用電極層設置於平坦層上、間隙物設置於平坦層上、共用電極線通過貫孔與第一共用電極層電性連接、第二基板設置於第一基板的對向以及第二共 用電極層設置於第二基板上。這些資料線沿著第一方向延伸,這些掃描線沿著第二方向延伸,且第一方向垂直第二方向。第一畫素單元及第二畫素單元分別電性連接至這些掃描線及這些資料線。第一共用電極層具有沿著第一方向延伸的多個第一部,且於垂直第一基板的方向上,這些第一部重疊這些資料線。於垂直第一基板的方向上,間隙物重疊這些掃描線的一者。第二共用電極層位於第二基板與第一共用電極層之間。這些掃描線包括第一掃描線以及第二掃描線。這些資料線包括第一資料線,且第一資料線交錯第一掃描線以及第二掃描線。第一畫素單元以及第二畫素單元位於第一掃描線以及第二掃描線之間。第一畫素單元具有第一角落鄰近第二掃描線與第一資料線。間隙物鄰近第一畫素單元的第一角落。於第一方向上,間隙物與貫孔之間的距離為2微米至10微米。 The display device of the present invention includes a first substrate, a plurality of data lines, and a plurality of scan lines are arranged on the first substrate, the first pixel unit and the second pixel unit are arranged on the first substrate, and the flat layer covers the data lines , The first common electrode layer is disposed on the flat layer, the spacer is disposed on the flat layer, the common electrode line is electrically connected to the first common electrode layer through the through hole, the second substrate is disposed opposite to the first substrate, and the second Total The electrode layer is arranged on the second substrate. The data lines extend along the first direction, the scan lines extend along the second direction, and the first direction is perpendicular to the second direction. The first pixel unit and the second pixel unit are electrically connected to the scan lines and the data lines, respectively. The first common electrode layer has a plurality of first portions extending along a first direction, and in a direction perpendicular to the first substrate, the first portions overlap the data lines. In the direction perpendicular to the first substrate, the spacer overlaps one of these scan lines. The second common electrode layer is located between the second substrate and the first common electrode layer. These scan lines include a first scan line and a second scan line. The data lines include a first data line, and the first data line intersects the first scan line and the second scan line. The first pixel unit and the second pixel unit are located between the first scan line and the second scan line. The first pixel unit has a first corner adjacent to the second scan line and the first data line. The spacer is adjacent to the first corner of the first pixel unit. In the first direction, the distance between the spacer and the through hole is 2 μm to 10 μm.
基於上述,本發明一實施例的顯示裝置具有以網狀設置的第一共用電極層,且於垂直第一基板的方向上,共用電極層重疊這些資料線以及部分重疊這些掃描線,因此重疊資料線及掃描線之處的顯示介質層可受到第一共用電極層與第二共用電極層之間電場而轉動。藉此,顯示介質層可形成不透光區域,以吸收或阻擋自第一基板斜向穿透顯示介質層的光。如此,因平坦層厚度或遮光圖案層位移所產生側向漏光及混光的機率可被減少,進而提升顯示裝置的畫素開口率、性能以及顯示品質。 Based on the above, the display device of an embodiment of the present invention has a first common electrode layer arranged in a mesh shape, and in a direction perpendicular to the first substrate, the common electrode layer overlaps these data lines and partially overlaps these scan lines, thus overlapping data The display medium layer at the line and scan line can be rotated by the electric field between the first common electrode layer and the second common electrode layer. Thereby, the display medium layer can form an opaque area to absorb or block the light that obliquely penetrates the display medium layer from the first substrate. In this way, the probability of lateral light leakage and light mixing due to the thickness of the flat layer or the displacement of the shading pattern layer can be reduced, thereby improving the pixel aperture ratio, performance and display quality of the display device.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉 實施例,並配合所附圖式作詳細說明如下。 In order to make the above-mentioned features and advantages of the present invention more obvious and understandable, the following special The embodiments and the accompanying drawings are described in detail as follows.
10、10A、10B、10C:顯示裝置 10, 10A, 10B, 10C: display device
100:第一基板 100: first substrate
110:閘絕緣層 110: gate insulation
120:平坦層 120: flat layer
140、140’:第一共用電極層 140, 140’: The first common electrode layer
141:第一部 141: Part One
142:第二部 142: Part Two
143:第三部 143: Part Three
144:第四部 144: Part Four
151:第一角落 151: The first corner
152:第二角落 152: second corner
160、160n、160n+1、160n+2、160n+3:共用電極線 160, 160 n , 160 n+1 , 160 n+2 , 160 n+3 : common electrode line
162:主幹 162: Trunk
164:分支 164: branch
1641:第一分支 1641: first branch
170、170A、172:貫孔 170, 170A, 172: Through hole
180:間隙物 180: Spacer
200:第二基板 200: second substrate
220:遮光圖案層 220: shading pattern layer
240:第二共用電極層 240: second common electrode layer
301、302:驅動電路 301, 302: drive circuit
A-A’、B-B’:剖面線 A-A’, B-B’: Section line
Q:電荷 Q: Charge
C1、C2:儲存電容 C1, C2: storage capacitor
CCS:電容器 C CS : Capacitor
CH1、CH1’:第一半導體通道層 CH1, CH1’: The first semiconductor channel layer
CH2:第二半導體通道層 CH2: second semiconductor channel layer
D1、D1’:第一汲極 D1, D1’: the first drain
D2:第二汲極 D2: second drain
DL、DLn、DLn+1、DLn+2、DLn+3:資料線 DL, DL n , DL n+1 , DL n+2 , DL n+3 : data line
DL1:第一資料線 DL1: The first data line
DL2:第二資料線 DL2: The second data line
DL3:第三資料線 DL3: The third data line
G1、G1’:第一閘極 G1, G1’: first gate
G2:第二閘極 G2: second gate
LC:顯示介質層 LC: display medium layer
PE:畫素電極 PE: pixel electrode
PE1:第一畫素電極 PE1: The first pixel electrode
PE1A:第一子畫素電極 PE1A: The first sub-pixel electrode
PE1B:第二子畫素電極 PE1B: second sub-pixel electrode
PE2:第二畫素電極 PE2: second pixel electrode
PX:畫素單元 PX: pixel unit
PX1、PX1’、PX1”:第一畫素單元 PX1, PX1’, PX1”: the first pixel unit
PX1A:第一子畫素區 PX1A: The first sub-pixel area
PX1B:第二子畫素區 PX1B: second sub-pixel area
PX2:第二畫素單元 PX2: The second pixel unit
S1、S1’:第一源極 S1, S1’: first source
S2:第二源極 S2: second source
SL、SLn、SLn+1、SLn+2、SLn+3:掃描線 SL, SL n , SL n+1 , SL n+2 , SL n+3 : scan line
SL1:第一掃描線 SL1: First scan line
SL2:第二掃描線 SL2: second scan line
T:主動元件 T: Active component
T1、T1’、T1A:第一主動元件 T1, T1’, T1A: the first active component
T2、T1B:第二主動元件 T2, T1B: second active component
T1C:第三主動元件 T1C: The third active component
V1:第一電壓電位 V1: first voltage potential
V2:第二電壓電位 V2: second voltage potential
W1:第一寬度 W1: first width
W2:第二寬度 W2: second width
X:第二方向 X: second direction
Y:第一方向 Y: first direction
圖1繪示為本發明一實施例的顯示裝置的局部上視示意圖。 FIG. 1 is a schematic partial top view of a display device according to an embodiment of the invention.
圖2繪示為圖1的顯示裝置沿剖面線A-A'的剖面示意圖。 FIG. 2 is a schematic cross-sectional view of the display device of FIG. 1 along the section line AA′.
圖3繪示為圖1的顯示裝置沿剖面線B-B'的剖面示意圖。 FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 along the section line BB′.
圖4繪示為本發明另一實施例的顯示裝置的局部上視示意圖。 4 is a schematic partial top view of a display device according to another embodiment of the invention.
圖5繪示為本發明又一實施例的顯示裝置的局部上視示意圖。 FIG. 5 is a schematic partial top view of a display device according to another embodiment of the invention.
圖6繪示為本發明再一實施例的顯示裝置的等效電路圖。 FIG. 6 is an equivalent circuit diagram of a display device according to still another embodiment of the invention.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。如本領域技術人員將認識到的,可以以各種不同的方式修改所描述的實施例,而不脫離本發明的精神或範圍。 In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present invention.
在附圖中,為了清楚起見,放大了各元件等的厚度。在整個說明書中,相同的附圖標記表示相同的元件。應當理解,當諸如層、膜、區域或基板的元件被稱為在“另一元件上”、或“連接到另一元件”、“重疊於另一元件”時,其可以直接在另一元件上或 與另一元件連接,或者中間元件可以也存在。相反,當元件被稱為“直接在另一元件上”或“直接連接到”另一元件時,不存在中間元件。如本文所使用的,“連接”可以指物理及/或電連接。 In the drawings, the thickness of each element and the like are exaggerated for clarity. Throughout the specification, the same reference numerals denote the same elements. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being “on”, or “connected to,” or “overlapped with, another element,” it may be directly on another element. Up or It is connected to another element, or an intermediate element may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connected" can refer to physical and/or electrical connections.
應當理解,儘管術語“第一”、“第二”、“第三”等在本文中可以用於描述各種元件、部件、區域、層及/或部分,但是這些元件、部件、區域、及/或部分不應受這些術語的限制。這些術語僅用於將一個元件、部件、區域、層或部分與另一個元件、部件、區域、層或部分區分開。因此,下面討論的“第一元件”、“部件”、“區域”、“層”、或“部分”可以被稱為第二元件、部件、區域、層或部分而不脫離本文的教導。 It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and/or parts, these elements, components, regions, and/or Or part should not be restricted by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the “first element,” “component,” “region,” “layer,” or “portion” discussed below may be referred to as a second element, component, region, layer or portion without departing from the teachings herein.
這裡使用的術語僅僅是為了描述特定實施例的目的,而不是限制性的。如本文所使用的,除非內容清楚地指示,否則單數形式“一”、“一個”和“該”旨在包括複數形式,包括“至少一個”。“或”表示“及/或”。如本文所使用的,術語“及/或”包括一個或多個相關所列項目的任何和所有組合。還應當理解,當在本說明書中使用時,術語“包括”及/或“包括”指定所述特徵、區域、整體、步驟、操作、元件的存在及/或部件,但不排除一個或多個其他特徵、區域整體、步驟、操作、元件、部件及/或其組合的存在或添加。 The terminology used here is only for the purpose of describing specific embodiments and is not limiting. As used herein, unless the content clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms, including "at least one." "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the related listed items. It should also be understood that when used in this specification, the terms "including" and/or "including" designate the presence of the features, regions, wholes, steps, operations, elements, and/or components, but do not exclude one or more The existence or addition of other features, regions as a whole, steps, operations, elements, components, and/or combinations thereof.
此外,諸如“下”或“底部”和“上”或“頂部”的相對術語可在本文中用於描述一個元件與另一元件的關係,如圖所示。應當理解,相對術語旨在包括除了圖中所示的方位之外的裝置的不同方位。例如,如果一個附圖中的裝置翻轉,則被描述為在其他元件 的“下”側的元件將被定向在其他元件的“上”側。因此,示例性術語“下”可以包括“下”和“上”的取向,取決於附圖的特定取向。類似地,如果一個附圖中的裝置翻轉,則被描述為在其他元件“下方”或“下方”的元件將被定向為在其他元件“上方”。因此,示例性術語“下面”或“下面”可以包括上方和下方的取向。 In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship between one element and another element, as shown in the figure. It should be understood that relative terms are intended to include different orientations of the device other than those shown in the figures. For example, if the device in one figure is turned over, it is described as Elements on the "lower" side of the will be oriented on the "upper" side of other elements. Therefore, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the specific orientation of the drawing. Similarly, if the device in one figure is turned over, elements described as "below" or "beneath" other elements will be oriented "above" the other elements. Thus, the exemplary terms "below" or "below" can include an orientation of above and below.
除非另有定義,本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本發明的上下文中的含義一致的含義,並且將不被解釋為理想化的或過度正式的意義,除非本文中明確地這樣定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of related technologies and the present invention, and will not be interpreted as idealized or excessive The formal meaning, unless explicitly defined as such in this article.
本文參考作為理想化實施例的示意圖的截面圖來描述示例性實施例。因此,可以預期到作為例如製造技術及/或公差的結果的圖示的形狀變化。因此,本文所述的實施例不應被解釋為限於如本文所示的區域的特定形狀,而是包括例如由製造導致的形狀偏差。例如,示出或描述為平坦的區域通常可以具有粗糙及/或非線性特徵。此外,所示的銳角可以是圓的。因此,圖中所示的區域本質上是示意性的,並且它們的形狀不是旨在示出區域的精確形狀,並且不是旨在限制權利要求的範圍。 The exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Therefore, a change in the shape of the diagram as a result of, for example, manufacturing technology and/or tolerance can be expected. Therefore, the embodiments described herein should not be interpreted as being limited to the specific shape of the area as shown herein, but include, for example, shape deviations caused by manufacturing. For example, areas shown or described as flat may generally have rough and/or non-linear characteristics. In addition, the acute angles shown may be rounded. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the precise shape of the regions, and are not intended to limit the scope of the claims.
圖1繪示為本發明一實施例的顯示裝置的局部上視示意圖,圖1為了方便說明及觀察,僅示意性地繪示部分構件。圖2繪示為圖1的顯示裝置沿剖面線A-A'的剖面示意圖。圖3繪示為
圖1的顯示裝置沿剖面線B-B'的剖面示意圖。請參考圖1、圖2及圖3,顯示裝置10包括第一基板100、多條資料線DL以及多條掃描線SL、平坦層120、第一共用電極層140、第二基板200以及第二共用電極層240、多個畫素單元PX設置於第一基板100上且分別電性連接至這些掃描線SL及這些資料線DL。如圖1所示,顯示裝置10還包括共用電極線160設置於第一基板100上。此外,如圖2及圖3所示,顯示裝置10還包括遮光圖案層220設置於第二基板200與第二共用電極層240之間以及顯示介質層LC設置於第一基板100與第二基板200之間。換句話說,顯示裝置10例如為包括畫素陣列基板以及彩色濾光基板的液晶顯示面板(Liquid Crystal Display,LCD),但本發明不以此為限。以下將以一實施例簡單說明顯示裝置10的結構。
FIG. 1 is a partial top view schematic diagram of a display device according to an embodiment of the present invention. For the convenience of description and observation, only some components are schematically shown in FIG. 1. FIG. 2 is a schematic cross-sectional view of the display device of FIG. 1 along the section line AA′. Figure 3 is shown as
A schematic cross-sectional view of the display device in FIG. 1 along the section line BB′. Please refer to FIGS. 1, 2 and 3, the
請參考圖1、圖2及圖3,在本實施例中,多條資料線DL以及多條掃描線SL交錯地設置於第一基板100上。詳細而言,第一基板100的材質例如為玻璃、石英、塑膠、有機聚合物、不透光/反射材料(例如:導電材料、金屬、晶圓、陶瓷、或其他可適用的材料)或是其他可適用的材料。在一些實施例中,第一基板100也可為可撓性基板,其材質包括有機聚合物,例如:聚醯亞胺(polyimide,PI)、聚萘二甲酸乙醇酯(polyethylene naphthalate,PEN)或其它合適的材料,本發明不以此為限。
Please refer to FIGS. 1, 2 and 3. In this embodiment, a plurality of data lines DL and a plurality of scan lines SL are alternately arranged on the
請參考圖1及圖3,在本實施例中,多條掃描線SL設置於第一基板100上。多條掃描線SL包括第一掃描線SL1及第二掃
描線SL2彼此平行地設置於第一基板100上。如圖1所示,這些掃描線SL(包括:第一掃描線SL1及第二掃描線SL2)可沿著第一方向Y排列,且沿著第二方向X延伸。在本實施例中,第一方向Y垂直第二方向X。如圖1所示,第一掃描線SL1例如位於圖1的下方而第二掃描線SL2位於圖1的上方,但本發明不以此為限。
Please refer to FIGS. 1 and 3, in this embodiment, a plurality of scan lines SL are disposed on the
如圖1及圖2所示,顯示裝置10還包括共用電極線160設置於第一基板100上。共用電極線160設置於第一掃描線SL1與第二掃描線SL2之間,且共用電極線160具有沿著第二方向X延伸的主幹162以及沿著多條第一方向Y延伸的分支164。從另一角度而言,主幹162可以平行於掃描線SL,而多個分支164可垂直交錯於主幹162,但本發明不以此為限。在本實施例中,基於導電性考量,共用電極線160與掃描線SL一般是使用金屬材料製作,但也可以使用其他適當的導電材料。例如:合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、或是金屬材料與其它導電材料的堆疊層。需注意的是,圖1雖然僅繪示一條共用電極線160,然而實際上可以有多條共用電極線160且其中每一者分別設置於任兩相鄰的掃描線SL之間,而不僅以圖1所示為限。
As shown in FIGS. 1 and 2, the
如圖2及圖3所示,閘絕緣層110設置於第一基板100上並覆蓋掃描線SL(例如:第二掃描線SL2)以及共用電極線160(例如:分支164)。需注意的是,圖1為了圖式清楚而省略繪示
閘絕緣層110,然而閘絕緣層110是整面地設置於第一基板100上而會覆蓋並重疊多條掃描線SL以及共用電極線160(包括:主幹162及分支164)。在本實施例中,閘絕緣層110的材質包括無機材料、有機材料或上述材料的組合或其他合適的材料。上述無機材料例如是(但不限於):氧化矽、氮化矽、氮氧化矽或上述至少二種材料的堆疊層。上述有機材料例如是(但不限於):聚醯亞胺系樹脂、環氧系樹脂或壓克力系樹脂等高分子材料。在本實施例中,閘絕緣層110為單一膜層,但本發明不限於此。在其他實施例中,閘絕緣層110也可以由多個膜層堆疊而成。
As shown in FIGS. 2 and 3, the
請參考圖1及圖2,在本實施例中,多條資料線DL設置於第一基板100上的閘絕緣層110上。這些資料線DL與這些掃描線SL位於不同平面上且分別彼此交錯。詳細而言,多條資料線DL包括第一資料線DL1。在本實施例中,這些資料線DL還包括第二資料線DL2與第三資料線DL3。第一資料線DL1、第二資料線DL2與第三資料線DL3彼此平行地設置於第一基板100上並交錯第一掃描線SL1與第二掃描線SL2。如圖1所示,這些資料線DL(包括:第一資料線DL1、第二資料線DL2及第三資料線DL3)可沿著第二方向X排列,且沿著第一方向Y延伸。如圖1所示,第一資料線DL1例如位於圖1的中間,第二資料線DL2位於圖1中第一資料線DL1的右方,而第三資料線DL3位於圖1中第一資料線DL1的左方,但本發明不以此為限。
1 and FIG. 2, in this embodiment, a plurality of data lines DL are disposed on the
在本實施例中,基於導電性考量,資料線DL一般是使用 金屬材料製作,但也可以使用其他適當的導電材料。例如:合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、或是金屬材料與其它導電材料的堆疊層。需注意的是,圖1雖然僅繪示二條掃描線SL及三條資料線DL,然而實際上可以有更多條掃描線SL以及資料案DL彼此交錯排列,而不僅以圖1所示數量為限。 In this embodiment, based on conductivity considerations, the data line DL is generally used It is made of metal materials, but other suitable conductive materials can also be used. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or stacked layers of metallic materials and other conductive materials. It should be noted that although FIG. 1 only shows two scan lines SL and three data lines DL, in fact, there can be more scan lines SL and data files DL arranged alternately, and not only limited to the number shown in FIG. 1 .
如圖1所示,顯示裝置10包括多個畫素單元PX位於同一列且相鄰地設置,但本發明不以此為限。實際上,多個畫素單元PX是以二維陣列的方式設置於第一基板100上。這些畫素單元PX電性連接至掃描線SL及資料線DL。一般而言,每一畫素單元PX可例如代表一種顏色的子畫素(sub-pixel)。舉例而言,畫素單元PX例如可為紅色的子畫素、綠色的子畫素、藍色的子畫素、橘色的子畫素、黃色的子畫素或白色的子畫素,但不以此為限。在一些實施例中,每一畫素單元PX還可以包括多種顏色的子畫素,例如包括藍色及綠色的子畫素、紅色及綠色的子畫素或藍色及紅色的子畫素,但本發明不以此為限。
As shown in FIG. 1, the
在本實施例中,這些畫素單元PX可包括第一畫素單元PX1以及第二畫素單元PX2設置於第一基板100上,且可以位於同一列並且相鄰。如圖1所示,第一畫素單元PX1例如設置於第一資料線DL1的左側,而第二畫素單元PX2例如設置於第二資料線DL2的右側,且第一畫素單元PX1及第二畫素單元PX2分別電性連接至對應的掃描線SL及資料線DL。詳細而言,第一畫素單
元PX1與第二畫素單元PX2均設置於第一掃描線SL1以及第二掃描線SL2之間,且第一畫素單元PX1電性連接至第二掃描線SL2,第二畫素單元PX2也電性連接至第二掃描線SL2。從另一角度而言,第一畫素單元PX1及第二畫素單元PX2可以共用相同一條第二掃描線SL2,但本發明不以此為限。此外,如圖1所示第一畫素單元PX1電性連接至第三資料線DL3,而第二畫素單元PX2電性連接至第一資料線DL1,但本發明不以此為限。在此需注意的是,圖1僅繪示兩個畫素單元PX(例如為:第一畫素單元PX1及第二畫素單元PX2),實際上顯示裝置10可包括更多個畫素單元PX,例如十萬個、數百萬個或數千萬個個畫素單元,而不以圖1所示數量為限。
In this embodiment, these pixel units PX may include a first pixel unit PX1 and a second pixel unit PX2, which are disposed on the
在本實施例中,各畫素單元PX例如包括主動元件T(標示於圖5)以及畫素電極PE(標示於圖5)。舉例而言,第一畫素單元PX1包括第一畫素電極PE1以及第一主動元件T1,而第二畫素單元PX2包括第二畫素電極PE2以及第二主動元件T2。如圖1所示,第一畫素電極PE1可透過第一主動元件T1而電性連接至第二掃描線SL2以及第三資料線DL3,而第二畫素電極PE2可透過第二主動元件T2而電性連接至第二掃描線SL2以及第一資料線DL1。在本實施例中,主動元件T例如為低溫多晶矽薄膜電晶體(low temperature poly-Si,LTPS)或非晶矽薄膜電晶體(amorphous Si,a-Si),但本發明不以此為限。在本實施例中,第一主動元件T1以及第二主動元件T2的結構及材料均相同。舉例而言,第一 主動元件T1包括第一閘極G1、第一半導體通道層CH1以及分別電性連接至第一半導體通道層CH1的第一源極S1與第一汲極D1。第二主動元件T2包括第二閘極G2、第二半導體通道層CH2以及分別電性連接至第二半導體通道層CH2的第二源極S2與第二汲極D2。 In this embodiment, each pixel unit PX includes, for example, an active device T (labeled in FIG. 5) and a pixel electrode PE (labeled in FIG. 5). For example, the first pixel unit PX1 includes a first pixel electrode PE1 and a first active device T1, and the second pixel unit PX2 includes a second pixel electrode PE2 and a second active device T2. As shown in FIG. 1, the first pixel electrode PE1 can be electrically connected to the second scan line SL2 and the third data line DL3 through the first active device T1, and the second pixel electrode PE2 can be connected to the second active device T2. It is electrically connected to the second scan line SL2 and the first data line DL1. In this embodiment, the active device T is, for example, low temperature poly-Si (LTPS) or amorphous Si (a-Si), but the invention is not limited thereto. In this embodiment, the structures and materials of the first active device T1 and the second active device T2 are the same. For example, the first The active device T1 includes a first gate G1, a first semiconductor channel layer CH1, and a first source S1 and a first drain D1 electrically connected to the first semiconductor channel layer CH1, respectively. The second active device T2 includes a second gate G2, a second semiconductor channel layer CH2, and a second source S2 and a second drain D2 electrically connected to the second semiconductor channel layer CH2, respectively.
詳細而言,第一主動元件T1的第一閘極G1與第二掃描線SL2是由同一膜層製作且彼此電性連接。第二主動元件T2的第二閘極G2與第二掃描線SL2是由同一膜層製作且彼此電性連接。從另一角度而言,第一閘極G1與第二閘極G2均屬於第二掃描線SL2的部分。 In detail, the first gate G1 and the second scan line SL2 of the first active device T1 are made of the same film layer and are electrically connected to each other. The second gate G2 of the second active device T2 and the second scan line SL2 are made of the same film layer and are electrically connected to each other. From another perspective, both the first gate G1 and the second gate G2 belong to the second scan line SL2.
第一半導體通道層CH1以及第二半導體通道層CH2分別設置於第二掃描線SL2上。舉例而言,第一半導體通道層CH1對應第一閘極G1設置,而第二半導體通道層CH2對應第二閘極G2設置。在本實施例中,第一半導體通道層CH1以及第二半導體通道層CH2的材質包含非晶矽、多晶矽、微晶矽、單晶矽、有機半導體材料、氧化物半導體材料(例如:銦鋅氧化物、銦鍺鋅氧化物、或是其它合適的材料、或上述之組合)、或其它合適的材料、或含有摻雜物(dopant)於上述材料中、或上述之組合,但本發明不以此為限。 The first semiconductor channel layer CH1 and the second semiconductor channel layer CH2 are respectively disposed on the second scan line SL2. For example, the first semiconductor channel layer CH1 is provided corresponding to the first gate G1, and the second semiconductor channel layer CH2 is provided corresponding to the second gate G2. In this embodiment, the materials of the first semiconductor channel layer CH1 and the second semiconductor channel layer CH2 include amorphous silicon, polycrystalline silicon, microcrystalline silicon, monocrystalline silicon, organic semiconductor materials, and oxide semiconductor materials (for example: indium zinc oxide). , Indium germanium zinc oxide, or other suitable materials, or a combination of the above), or other suitable materials, or containing dopants in the above materials, or a combination of the above, but the present invention does not This is limited.
在本實施例中,第一主動元件T1的第一源極S1電性連接第三資料線DL3與第一半導體通道層CH1,而第二主動元件T2的第二源極S2電性連接第一資料線DL1與第二半導體通道層 CH2。第一主動元件T1的第一汲極D1電性連接至第一半導體通道層CH1,且第二主動元件T2的第二汲極D2電性連接至第二半導體通道層CH2。在本實施例中,資料線DL(包括第一資料線DL1以及第三資料線DL3)與第一源極S1及第二源極S2例如是由同一膜層製作,但本發明不以此為限。在本實施例中,第一汲極D1及第二汲極D2也可與第一源極S1及第二源極S2製作於相同的平面上,但本發明不以此為限。 In this embodiment, the first source S1 of the first active device T1 is electrically connected to the third data line DL3 and the first semiconductor channel layer CH1, and the second source S2 of the second active device T2 is electrically connected to the first Data line DL1 and second semiconductor channel layer CH2. The first drain D1 of the first active device T1 is electrically connected to the first semiconductor channel layer CH1, and the second drain D2 of the second active device T2 is electrically connected to the second semiconductor channel layer CH2. In this embodiment, the data line DL (including the first data line DL1 and the third data line DL3) and the first source electrode S1 and the second source electrode S2 are, for example, made of the same film layer, but the invention does not take this as limit. In this embodiment, the first drain electrode D1 and the second drain electrode D2 can also be fabricated on the same plane as the first source electrode S1 and the second source electrode S2, but the invention is not limited thereto.
在本實施例中,第一源極S1與第二源極S2以及第一汲極D1與第二汲極D2是使用金屬材料製作,但本發明不限於此,根據其他實施例,第一源極S1與第二源極S2以及第一汲極D1與第二汲極D2也可以使用其他適當的導電材料。例如:合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、或是金屬材料與其它導電材料的堆疊層。 In this embodiment, the first source S1 and the second source S2, and the first drain D1 and the second drain D2 are made of metal materials, but the present invention is not limited to this. According to other embodiments, the first source The electrode S1 and the second source electrode S2, and the first drain electrode D1 and the second drain electrode D2 can also use other suitable conductive materials. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or stacked layers of metallic materials and other conductive materials.
在本實施例中,第一主動元件T1與第二主動元件T2以例如為底閘極型薄膜電晶體(bottom gate TFT),但本發明不以此為限。在其他實施例中,第一主動元件T1與第二主動元件T2也可為頂閘極型薄膜電晶體(top gate TFT)或其他合適的薄膜電晶體。 In this embodiment, the first active device T1 and the second active device T2 are, for example, bottom gate TFTs, but the invention is not limited to this. In other embodiments, the first active device T1 and the second active device T2 may also be top gate TFTs or other suitable thin film transistors.
請參考圖1、圖2及圖3,平坦層120設置於閘絕緣層110上並覆蓋資料線DL(包括:第一資料線DL1、第二資料線DL2及第三資料線DL3)以及第一主動元件T1及第二主動元件T2。圖1為了圖式清楚起見而省略繪示平坦層120,實際上平坦層120
是整面地形成於閘絕緣層110上。在本實施例中,平坦層120的材質包括無機材料、有機材料或上述材料的組合或其他合適的材料。上述無機材料例如是(但不限於):氧化矽、氮化矽、氮氧化矽或上述至少二種材料的堆疊層。上述有機材料例如是(但不限於):聚醯亞胺系樹脂、環氧系樹脂或壓克力系樹脂等高分子材料。在本實施例中,平坦層120分別為單一膜層,但本發明不限於此。在其他實施例中,平坦層120也可以由多個膜層堆疊而成。
Please refer to Figure 1, Figure 2 and Figure 3, the
如圖1、圖2及圖3所示,第一畫素電極PE1設置於平坦層120上並電性連接至第一主動元件T1,且第二畫素電極PE2也設置於平坦層120上並電性連接至第二主動元件T2,但本發明不以此為限。如圖1所示,第一主動元件T1的第一汲極D1透過一個貫孔172電性連接至第一畫素電極PE1,而第二主動元件T2的第二汲極D2透過另一個貫孔172電性連接至第二畫素電極PE2。在上述的設置下,第三資料線DL3可藉由第一主動元件T1而電性連接並提供驅動訊號至第一畫素電極PE1,且第一資料線DL1可藉由第二主動元件T2而電性連接並提供驅動訊號至第二畫素電極PE2,但本發明不以此為限。
As shown in FIGS. 1, 2 and 3, the first pixel electrode PE1 is disposed on the
在本實施例中,第一畫素電極PE1與第二畫素電極PE2的材質可為透明的導體材料,例如銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋁錫氧化物(ATO)、鋁鋅氧化物(AZO)或銦鍺鋅氧化物(IGZO)等金屬氧化物,但本發明不以此為限。在上述的設置下,第一基板100例如為液晶顯示面板的畫素陣列基板,但本
發明不以此為限。
In this embodiment, the materials of the first pixel electrode PE1 and the second pixel electrode PE2 can be transparent conductive materials, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum tin oxide ( Metal oxides such as ATO), aluminum zinc oxide (AZO) or indium germanium zinc oxide (IGZO), but the present invention is not limited thereto. Under the above arrangement, the
如圖1、圖2及圖3所示,第一共用電極層140設置於平坦層120上。如圖1所示,第一共用電極層140具有沿著第一方向Y延伸的多個第一部141以及沿著第二方向X延伸的多個第二部142。在本實施例中,這些第二部142連接相鄰的兩個第一部141,但本發明不以此為限。在一些實施例中,也可以僅一部分的這些第二部142連接相鄰的兩個第一部141,而另一部分的這些第二部142僅連接至相鄰的兩個第一部141的其中之一者,而不連接其中另一者。在上述的設置下,於俯視上,具有這些第一部141與這些第二部142的第一共用電極層140可形成網狀或格子狀的圖案,但本發明不以此為限。在本實施例中,第一共用電極層140的材質可為透明的導體材料,例如銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋁錫氧化物(ATO)、鋁鋅氧化物(AZO)或銦鍺鋅氧化物(IGZO)等金屬氧化物,但本發明不以此為限。
As shown in FIGS. 1, 2 and 3, the first
在本實施例中,間隙物180可設置於第二掃描線SL2上,但本發明不以次為限。實際上,間隙物180可以設置在任一掃描線SL上。換句話說,依使用者的需求,間隙物180也可以設置於第一掃描線SL1上,而不僅以圖1所繪示者為限。如圖1所示,第一畫素單元PX1例如為具有四個角落的矩形。上述四個角落的其中之一可定義為第一角落151。第一角落151例如為第一畫素單元PX1鄰近第二掃描線SL2與第一資料線DL1的右上角角落。此外,第二畫素單元PX2也例如為具有四個角落的矩形,且其中之
一可定義為第二角落152。第二角落152例如為第二畫素單元PX2鄰近第二掃描線SL2與第一資料線DL1的左上角角落。換句話說,第一角落151與第二角落152是分別位於第一資料線DL1的兩側。在本實施例中,間隙物180可以對應第一畫素單元PX1的第一角落151設置。換句話說,間隙物180可以鄰近第二掃描線SL2與第一資料線DL1設置,但本發明不以此為限。此外,如圖1所示,第二主動元件T2可以鄰近第二角落152設置,但本發明不以此為限。藉此,可提升畫素開口率。
In this embodiment, the
請參考圖2及圖3,第二基板200設置於第一基板100的對向。在本實施例中,第二基板200的材質例如為玻璃、石英、塑膠、有機聚合物、或是其他可適用的材料。在一些實施例中,第一基板100也可為可撓性基板,其材質包括有機聚合物,例如:聚醯亞胺(polyimide,PI)、聚萘二甲酸乙醇酯(polyethylene naphthalate,PEN)或其它合適的材料,本發明不以此為限。
Please refer to FIG. 2 and FIG. 3, the
如圖2及圖3所示,遮光圖案層220設置於第二基板200上。遮光圖案層220於第一基板100上的正投影完全重疊第一共用電極層140的第一部141於第一基板100上的正投影以及第一資料線DL1於第一基板100上的正投影。換句話說,第一共用電極層140的第一部141於第一基板100上的正投影以及第一資料線DL1於第一基板100上的正投影位於遮光圖案層220於第一基板100上的正投影之內。此外,第二掃描線SL2於第一基板100上的正投影也位於遮光圖案層220於第一基板100上的正投影之
內。如此一來,遮光圖案層220可以遮住資料線DL(例如包括:第一資料線DL1)以及掃描線SL(例如包括:第二掃描線SL2)。從另一角度而言,遮光圖案層220例如為遮蔽設置於畫素單元PX之間的資料線DL與掃描線SL的黑色矩陣(Black Matrix,BM),用以遮蔽顯示裝置10中不欲被使用者觀看到的元件及走線,以及減少產生混光及漏光的機率。在本實施例中,遮光圖案層220的材質例如是黑色樹脂或是遮光金屬(例如:鉻)等反射性較低的材料,但本發明不以此為限。
As shown in FIGS. 2 and 3, the light
如圖2及圖3所示,第二共用電極層240設置於第二基板200上並覆蓋遮光圖案層220。在本實施例中,第二共用電極層240例如是整面地形成於第二基板200上,而位於第二基板200與第一共用電極層140之間。在本實施例中,第二共用電極層240的材質可為透明的導體材料,例如銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋁錫氧化物(ATO)、鋁鋅氧化物(AZO)或銦鍺鋅氧化物(IGZO)等金屬氧化物,但本發明不以此為限。在本實施例中,第一共用電極層140與第二共用電極層240電性連接至共同電壓電位。如此,第一共用電極層140與第二共用電極層240之間可產生電場。
As shown in FIGS. 2 and 3, the second
在一些實施例中,第二基板200與第二共用電極層240之間還可以夾設有彩色濾光片(Color Filter)、偏光片(polarizer)或其他光學元件,本發明不以此為限。在上述的設置下,第二基板200例如為液晶顯示面板的彩色濾光基板,但本發明不以此為
限。
In some embodiments, a color filter, a polarizer, or other optical elements may be sandwiched between the
如圖2及圖3所示,顯示介質層LC設置於第一基板100的畫素電極PE(例如包括:第一畫素電極PE1及第二畫素電極PE2)與第二基板200的第二共用電極層240之間。顯示介質層LC可包括液晶分子、電泳顯示介質、或是其他可適用的介質。在本發明下列實施例中的顯示介質層LC係以包括液晶分子當作範例,但本發明不以此為限。再者,在本發明下列實施例中的液晶分子,較佳地,可為負型液晶,係以可被垂直電場轉動或切換的液晶分子為範例,但本發明不以此為限。
2 and 3, the display medium layer LC is disposed on the pixel electrode PE of the first substrate 100 (for example, including: the first pixel electrode PE1 and the second pixel electrode PE2) and the second pixel electrode PE of the
值得注意的是,在本實施例中,第一共用電極層140是以網狀的方式設置於平坦層120上,並且於垂直第一基板100的方向上,重疊這些資料線DL以及部分重疊這些掃描線SL。具體而言,第一共用電極層140的這些第一部141可以完全地重疊這些資料線DL,而這些第二部142可以部分地重疊這些掃描線SL。從另一角度而言,如圖2及圖3所示,第一共用電極層140可以與畫素電極(例如為:第一畫素電極PE1及第二畫素電極PE2)位於相同的平面,且透過相同材料製作而具有導電性。在上述的設置下,如圖2及圖3所示,遮光圖案層220重疊資料線DL(例如為:第一資料線DL1)及掃描線SL(例如為:第二掃描線SL2)之處的顯示介質層LC會位於第一共用電極層140與第二共用電極層240之間。因此,如位於畫素電極與第二共用電極240之間的顯示介質層LC一般,顯示介質層LC中的液晶分子會受到第一共
用電極層140與第二共用電極層240之間電場而轉動,搭配適當的偏光片設置,進而可在遮光圖案層220於第一基板100上的正投影之內形成不透光區域。
It is worth noting that, in this embodiment, the first
如此一來,相較於習知的顯示裝置,其遮光圖案層與訊號線(例如資料線或掃描線)之間為液晶不受控區域,本實施例的顯示裝置10在遮光圖案層220與第一資料線DL1及/或第二掃描線SL2之間顯示介質層LC的液晶分子可被第一共用電極層140與第二共用電極層240之間的電場轉動而受調控。因此,顯示介質層LC在遮光圖案層220於第一基板100上的正投影之內所形成的不透光區域,可吸收或阻擋自第一基板100斜向穿透顯示介質層LC的光。換句話說,如圖2所示,第一畫素電極PE1與第二畫素電極PE2之間重疊遮光圖案220及第一資料線DL1的顯示介質層LC為不透光。藉此,可以減少因平坦層120厚度或遮光圖案層220位移所產生側向漏光及混光的機率,因而可進一步縮小遮光圖案層220所需的寬度,進而提升畫素開口率。
In this way, compared with the conventional display device, the area between the light-shielding pattern layer and the signal line (such as the data line or the scan line) is an uncontrolled area of the liquid crystal. The
此外,相較於習知的顯示裝置,其重疊於資料線與掃描線的顯示介質層可被來自資料線的電場所影響。反觀,本實施例的第一共用電極層140可降低第一資料線DL1影響顯示介質層LC中液晶分子的風險,更進一步地提升對液晶分子的控制,而具有良好的性能。因此,顯示裝置10可透過第一共用電極層140調控重疊資料線DL以及遮光圖案層220的顯示介質層LC中的液晶分子,而減少側向漏光及混光的機率並提升畫素開口率,提升顯示
裝置10的性能並具有良好的顯示品質。
In addition, compared to the conventional display device, the display medium layer overlapping the data line and the scan line can be affected by the electric field from the data line. In contrast, the first
另外,如圖3所示,第一共用電極層140的兩個相鄰的第二部142之間與第二共用電極層240也可以產生電場。如此一來,重疊掃描線SL(例如為:第二掃描線SL2)以及遮光圖案層220的顯示介質層LC中的液晶分子也可被轉動而形成不透光區域,進而獲致上述的技術功效。
In addition, as shown in FIG. 3, an electric field may also be generated between two adjacent
請參考圖1及圖2,在本實施例中,第一共用電極140的第一部141具有第一寬度W1,而資料線DL(例如為:第一資料線DL1)具有第二寬度W2。在本實施例中,第一寬度W1≧第二寬度W2。換句話說,第一資料DL1於第一基板100上的正投影會完全位於第一部141於第一基板100上的正投影之內。如此,當第一部141的第一寬度W1定義為不透光區域時,上述不透光區域可完全重疊第一資料線DL1。藉此,可進一步縮減遮蔽圖案220的寬度,以增加畫素開口率,而提升顯示裝置10的顯示品質。
1 and FIG. 2, in this embodiment, the
請參考圖1,本實施例的顯示裝置10還包括多個貫孔170。貫孔170例如為貫穿平坦層120與閘絕緣層110的開口,以暴露出共用電極線160。在上述的設置下,共用電極線160可通過貫孔170與第一共用電極層140電性連接。詳細而言,貫孔170可以重疊於共用電極線160。如圖1所示,共用電極線160包括主幹162以及自主幹162沿第一方向Y延伸的分支164。主幹162可以部分重疊第一畫素電極PE1與第二畫素電極PE2、第一資料線DL1、第二資料線DL2、第三資料線DL3以及第一共用電極層
140的多個第一部141。在本實施例中,多個分支164是位於第一部141與第一畫素電極PE1及/或第二畫素電極PE2之間並平行於第一部141。從另一角度而言,這些分支164例如是設置於資料線DL兩側的遮光金屬圖案(shielding metal),但本發明不以此為限。
Please refer to FIG. 1, the
在本實施例中,第一資料線DL1與第一畫素電極PE1之間的分支164可被定義為第一分支1641。第一分支1641沿著第一方向Y延伸並連接主幹162。如圖1所示,貫孔170可以設置於第一畫素單元PX1的第一角落151中,重疊第一分支1641。更詳細而言,第一共用電極層140還包括沿第二方向X延伸的第三部143。第三部143平行於第二部142且與第一部141連接。如圖1所示,第三部143位於第二部142與第一畫素電極PE1之間,且第三部143部分重疊第二掃描線SL2,但不重疊第一畫素電極PE1。在本實施例中,第二部142也可以部分重疊第二掃描線SL2,且第二部142及/或第三部143於第一基板100上的垂直投影與第二掃描線SL2於第一基板100上的垂直投影的重疊部分之寬度為0.5微米至4微米,且較佳地為2微米至4微米。此外,於第一角落151之處,第三部143部分重疊第一分支1641。更詳細而言,第一分支1641於重疊第三部143之處,設置有貫孔170。也就是說,貫孔170可以在第一角落151暴露出第一分支1641,使共用電極線160的第一分支1641可通過貫孔170與第一共用電極層140的第三部143電性連接,但本發明不以此為限。
In this embodiment, the
在上述的設置下,當共用電極線160出現斷線時,共用
電極線160的訊號可以透過貫孔170(例如為位於第一角落151的貫孔170)而傳遞至第一共用電極層140。上述訊號可再沿著網格狀並重疊資料線DL及掃描線SL的第一共用電極層140,而傳遞至另一貫孔(未繪示)而傳遞回共用電極線160。如此一來,可以減少共用電極線160因斷線產生訊號異常或失效的風險,更可減少貫孔170所占顯示區域的空間以提升開口率,增加顯示裝置10的顯示區域,因而提升性能以及顯示品質。
Under the above configuration, when the
另外,如圖1所示,設置於第二掃描線SL2上的間隙物180可以對應第一畫素單元PX1的第一角落151設置。在上述的設置下,可以將間隙物180與貫孔170鄰近地設置於靠近第一角落151。舉例而言,在本實施例中,於第一方向Y上,間隙物180與貫孔170之間的距離例如可為2微米至15微米。在一優選的實施例中,間隙物180與貫孔170之間的距離更可為2微米至7微米。如此一來,間隙物180與貫孔170可以對應的設置以縮減遮光圖案層220(繪示於圖2及圖3)的寬度,而進一步增加畫素開口率,提升顯示裝置10的顯示品質。
In addition, as shown in FIG. 1, the
在一些實施例中,間隙物180除了對應第一畫素單元PX1的第一角落151設置外,上述間隙物180所對應的第一畫素單元PX1所對應的第一顏色還可以為藍色。舉例而言,第一畫素單元PX1可以對應第一顏色,而第二畫素單元PX2可以對應第二顏色。第一顏色舉例為藍色,且不同於第二顏色,第二顏色例如為紅色或綠色或其他顏色。在上述的實施例中,貫孔170與間隙物
180可以對應第一顏色設置,但不以此為限。在上述的設置下,可以進一步地提升顯示裝置10之穿透率,而提升顯示裝置10的顯示品質。
In some embodiments, in addition to the
簡言之,由於本實施例顯示裝置10具有以網狀設置的第一共用電極層140,且於垂直第一基板100的方向上,共用電極層140重疊這些資料線DL以及部分重疊這些掃描線SL,因此遮光圖案層220重疊資料線DL及掃描線SL之處的顯示介質層LC可受到第一共用電極層140與第二共用電極層240之間電場而轉動。藉此,搭配適當的偏光片配置,顯示介質層LC可在遮光圖案層220於第一基板100上的正投影之內形成不透光區域,以吸收或阻擋自第一基板100斜向穿透顯示介質層LC的光。如此,因平坦層120厚度或遮光圖案層220位移所產生側向漏光及混光的機率可被減少,因而可進一步縮小遮光圖案層220所需的寬度,進而提升顯示裝置10的畫素開口率及顯示品質。
In short, since the
此外,本實施例的第一共用電極層140可降低第一資料線DL1影響顯示介質層LC中液晶分子的風險,更進一步地提升顯示裝置10對液晶分子的控制,而具有良好的性能。
In addition, the first
另外,本實施例顯示裝置10還可以透過貫孔170將共用電極線160電性連接至第一共用電極層140。如此,共用電極線160可透過第一共用電極層140傳遞訊號。藉此,可以減少共用電極線160因斷線產生訊號異常或失效的風險,以減少貫孔170所佔顯示區域,增加顯示裝置10的顯示區域並提升性能。因此,顯
示裝置10除了可透過第一共用電極層140以減少側向漏光及混光的機率,還可以提升畫素開口率、性能以及顯示品質。
In addition, the
下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,關於省略了相同技術內容的部分說明可參考前述實施例,下述實施例中不再重複贅述。 The following embodiments follow the component numbers and part of the content of the previous embodiments, where the same numbers are used to represent the same or similar components. For the omission of the same technical content, please refer to the aforementioned embodiments. The following embodiments will not Repeat it.
圖4繪示為本發明另一實施例的顯示裝置的局部上視示意圖。本實施例所示的顯示裝置10A與圖1所示的顯示裝置10類似,主要的差異在於:第一畫素單元PX1’的第一主動元件T1’電性連接第一掃描線SL1,而第二畫素單元PX2電性連接第二掃描線SL2,且第一畫素單元PX1’與第二畫素單元PX2皆電性連接至第一資料線DL1。換句話說,本實施例的顯示裝置10A例如包括以半源極驅動(Half Source Driving,HSD)架構的畫素陣列。如此一來,相鄰的第一畫素單元PX1’與第二畫素單元PX2可以共用第一資料線DL1,而得以使資料線DL的整體數目減半。如此,除了可以減少資料線DL等走線所需的空間,使顯示裝置10B周邊線路的設計更有裕度外,還可以減少於顯示裝置10B周邊設置驅動元件(例如驅動晶片)的數量,以降低成本並縮小邊框。
4 is a schematic partial top view of a display device according to another embodiment of the invention. The
在本實施例中,第一主動元件T1’包括第一閘極G1’、第一半導體通道層CH1’以及分別電性連接至第一半導體通道層CH1’的第一源極S1’與第一汲極D1’。第一主動元件T1’與圖1的第一主動元件T1的結構及材料相似,故於此不再贅述。在本實施
例中,第一主動元件T1’是透過第一源極S1’電性連接至第一資料線DL1,但本發明不以此為限。如此,顯示裝置10A可獲致與上述實施例類似的技術功效。
In this embodiment, the first active device T1' includes a first gate G1', a first semiconductor channel layer CH1', and a first source S1' and a first source S1' electrically connected to the first semiconductor channel layer CH1', respectively. Dip pole D1'. The structure and material of the first active device T1' are similar to those of the first active device T1 in FIG. 1, so it will not be repeated here. In this implementation
In an example, the first active device T1' is electrically connected to the first data line DL1 through the first source S1', but the invention is not limited to this. In this way, the
圖5繪示為本發明又一實施例的顯示裝置的局部上視示意圖。本實施例所示的顯示裝置10B與圖1所示的顯示裝置10類似,主要的差異在於:圖5繪示了多個畫素單元PX以3X4方式排列的陣列。具體而言,圖5繪示了4條掃描線SLn、SLn+1、SLn+2、SLn+3沿著第一方向Y排列以及4條資料線DLn、DLn+1、DLn+2、DLn+3沿著第二方向X排列而彼此交錯。3個畫素單元PX沿著第二方向X排列而4個畫素單元PX沿著第一方向Y排列,且各畫素單元PX分別位於兩條掃描線及兩條資料線之間(例如位於掃描線SLn、SLn+1以及資料線DLn、DLn+之間,但不以此為限)。各畫素單元PX包括主動元件T以及畫素電極PE。主動元件T及畫素電極PE與圖1的第一主動元件T1、第二主動元件T2及第一畫素電極PE1、第二畫素電極PE2的結構及材料相似,故於此不再贅述。在本實施例中,位於同一列的多個畫素單元PX電性連接至同一條掃描線(例如為掃描線SLn),而分別連接至對應的資料線(例如為資料線DLn、DLn+1、DLn+2),但不以此為限。此外,如圖5所是,每一列的畫素單元PX可以與共用電極線160n、160n+1、160n+2、160n+3重疊。舉例而言,共用電極線160n的主幹162可以位於相鄰的的兩條掃描線(例如為掃描線SLn、SLn+1)之間,但不以此為限。在此需注意的是,圖5僅繪示顯示裝置10B的局部,
因此本發明的掃描線SLn、SLn+1、SLn+2、SLn+3、資料線DLn、DLn+1、DLn+2、DLn+3、共用電極線160n、160n+1、160n+2、160n+3以及畫素電極PE的數量並不以圖5所示為限。
FIG. 5 is a schematic partial top view of a display device according to another embodiment of the invention. The
在本實施例中,第一共用電極層140’更具有沿著第二方向X延伸的第四部144。第四部144連接至第一部141且重疊共用電極線160n、160n+1、160n+2、160n+3的主幹162的部分。在本實施例中,貫孔170A可設置於第四部144重疊主幹162之處,以暴露出主幹162,使主幹162可通過貫孔170A與第四部164電性連接,但本發明不以此為限。如圖5所示,畫素電極PE不重疊第四部144而部分重疊主幹162。如此,顯示裝置10B可獲致與上述實施例類似的技術功效。
In this embodiment, the first
此外,顯示裝置10B上設置有多個驅動電路301、302。驅動電路301、302例如為晶片以提供驅動訊號或參考訊號至共用電極線160n、160n+1、160n+2、160n+3,n為正整數。如圖5所示,位於左右兩側的兩個驅動電路301、302可分別電性連接至對應的共用電極線160n、160n+1、160n+2、160n+3。舉例而言,位於左側的驅動電路301可電性連接至共用電極線160n及160n+2,而位於右側的驅動電路302可電性連接至共用電極線160n+1及160n+3。換句話說,共用電極線160n、160n+1、160n+2、160n+3不需連接至相同的驅動電路(例如:驅動電路301或驅動電路302),因此可以提升驅動電路301、302以及周邊走線設置的裕度。在一些實施例中,驅動電路301、302可以分別電性連接至這些共用電極線160n、
160n+1、160n+2、160n+3的其中數條,但本發明不以此為限。換句話說,並非每一共用電極線160n、160n+1、160n+2、160n+3均須連接驅動電路301或驅動電路302以提供訊號。舉例而言,圖5中的四條共用電極線160n、160n+1、160n+2、160n+3可以僅一條、兩條或三條連接至對應的驅動電路301或驅動電路302。在另一些實施例中,也可以僅一條共用電極線160n連接至左側的驅動電路301而僅另一條共用電極線160n+3連接至右側的驅動電路302。在又一些實施例中,也可以依使用者的需求,僅於顯示裝置10B的一側設置驅動電路301(或驅動電路302)而僅部分或全部的共用電極線160n、160n+1、160n+2、160n+3電性連接至上述的驅動電路301(或驅動電路302)。
In addition, a plurality of
在上述的設置下,由於共用電極線160n、160n+1、160n+2、160n+3可電性連接至第一共用電極層140’,以透過第一共用電極層140’傳遞訊號,因此僅需部分的共用電極線160n、160n+1、160n+2、160n+3電性連接至驅動電路301或驅動電路302,即可將上述訊號傳遞至共用電極線160n、160n+1、160n+2、160n+3的任一處。如此一來,顯示裝置10B於周邊的走線設計可更有裕度,而能進一步縮小標框,提升顯示品質。
Under the above configuration, since the
圖6繪示為本發明再一實施例的顯示裝置的等效電路圖。請參考圖1及圖6,本實施例所示的顯示裝置10C與圖1所示的顯示裝置10類似,主要的差異在於:第一畫素單元PX1”包括第一子畫素區PX1A及第二子畫素區PX1B。詳細而言,顯示裝
置10C包括第一掃描線SL1與第二掃描線SL2、第一資料線DL1交錯第一掃描線SL1與第二掃描線SL2以及共用電極線160。
FIG. 6 is an equivalent circuit diagram of a display device according to still another embodiment of the invention. 1 and FIG. 6, the
第一畫素單元PX1”中的第一子畫素區PX1A中包括第一子畫素電極PE1A以及第一主動元件T1A。第一子畫素電極PE1A通過第一主動元件T1A電性連接至第一資料線DL1以及第二掃描線SL2。第一主動元件T1A還可以電性連接至儲存電容C1,但本發明不以此為限。在本實施例中,第一主動元件T1A具有電性連接至第二掃描線SL2的控制端。因此,第一子畫素電極PE1A與儲存電容C1的充放電由第二掃描線SL2通過第一主動元件T1A所控制。 The first sub-pixel area PX1A in the first pixel unit PX1" includes a first sub-pixel electrode PE1A and a first active element T1A. The first sub-pixel electrode PE1A is electrically connected to the first sub-pixel electrode PE1A through the first active element T1A. a data line DL1 and the second scan line SL2. T1A of the first active element may also be electrically connected to the storage capacitor C 1, but the present invention is not limited thereto. in the present embodiment, a first active device having electrically T1A connected to the control terminal of the second scan line SL2. Thus, the first sub-pixel electrode and the storage capacitor C PE1A charging and discharging a first active element controlled by T1A second scan line SL2 through.
第一畫素單元PX1”中的第二子畫素區PX1B中包括第二子畫素電極PE1B、第二主動元件T1B以及第三主動元件T1C。第二子畫素電極PE1B通過第二主動元件T1B電性連接至第一資料線DL1及第二掃描線SL2。在本實施例中,第三主動元件T1C還可以串聯至第二主動元件T1B並電性連接至第一掃描線SL1。第三主動元件T1C電性連接至電容器CCS。在上述的設置下,第二子畫素電極PE1B可通過第三主動元件T1C以電性連接至電容器CCS。如圖6所示,第二主動元件T1B還可以電性連接至儲存電容C2,但本發明不以此為限。在本實施例中,第二主動元件T1B具有電性連接至第二掃描線SL2的控制端。因此,第二子畫素電極PE1B與儲存電容C2的充放電由第二掃描線SL2通過第二主動元件T1B所控制。此外,第三主動元件T1C具有電性連接至第一掃 描線SL1的控制端。因此,電容器CCS的充放電由第一掃描線SL1通過第三主動元件T1C所控制。藉此,第二子畫素電極PE1B與電容器CCS可具相關連的電荷Q以達成電荷分享(charge sharing)的需求。 The second sub-pixel area PX1B in the first pixel unit PX1" includes a second sub-pixel electrode PE1B, a second active element T1B, and a third active element T1C. The second sub-pixel electrode PE1B passes through the second active element. T1B is electrically connected to the first data line DL1 and the second scan line SL2. In this embodiment, the third active device T1C can also be connected in series to the second active device T1B and electrically connected to the first scan line SL1. The active element T1C is electrically connected to the capacitor C CS . Under the above configuration, the second sub-pixel electrode PE1B can be electrically connected to the capacitor C CS through the third active element T1C. As shown in FIG. 6, the second active element T1B may also be electrically connected to the storage capacitor C 2, but the present invention is not limited thereto. in the present embodiment, a second active device having a control terminal T1B is electrically connected to the second scan line SL2. Accordingly, the second PE1B sub-pixel electrodes and storage capacitor C charging and discharging a second active element 2 is controlled by T1B second scan line SL2 via Furthermore, T1C third active element having a control terminal electrically connected to the first scan line SL1. Thus , The charging and discharging of the capacitor C CS is controlled by the first scan line SL1 through the third active element T1C. In this way, the second sub-pixel electrode PE1B and the capacitor C CS can have an associated charge Q to achieve charge sharing. ) Needs.
綜上所述,本發明一實施例的顯示裝置具有以網狀設置的第一共用電極層,且於垂直第一基板的方向上,共用電極層重疊這些資料線以及部分重疊這些掃描線,因此遮光圖案層重疊資料線及掃描線之處的顯示介質層可受到第一共用電極層與第二共用電極層之間電場而轉動。藉此,顯示介質層可在遮光圖案層220於第一基板上的正投影之內形成不透光區域,以吸收或阻擋自第一基板斜向穿透顯示介質層的光。如此,因平坦層厚度或遮光圖案層位移所產生側向漏光及混光的機率可被減少,因而可進一步縮小遮光圖案層所需的寬度,進而提升顯示裝置的畫素開口率及顯示品質。
In summary, the display device of an embodiment of the present invention has a first common electrode layer arranged in a mesh shape, and in a direction perpendicular to the first substrate, the common electrode layer overlaps these data lines and partially overlaps these scan lines. The display medium layer where the light-shielding pattern layer overlaps the data line and the scan line can be rotated by the electric field between the first common electrode layer and the second common electrode layer. Thereby, the display medium layer can form an opaque area within the orthographic projection of the light-
此外,第一共用電極層可降低第一資料線影響顯示介質層中液晶分子的風險,更進一步地提升顯示裝置對液晶分子的控制,而具有良好的性能。 In addition, the first common electrode layer can reduce the risk of the first data line affecting the liquid crystal molecules in the display medium layer, and further improve the control of the liquid crystal molecules by the display device, and has good performance.
另外,本發明的顯示裝置還可以透過貫孔將共用電極線電性連接至第一共用電極層。如此,共用電極線可透過第一共用電極層傳遞訊號。藉此,可以減少共用電極線因斷線產生訊號異常或失效的風險,更可直接在掃描線或對應的畫素單元上形成貫孔。如此,除了可以增加顯示裝置的顯示區域並提升性能,還可 將間隙物對應貫孔設置,以進一步提升對應顏色的畫素單元的畫素開口率,提升顯示裝置的顯示品質。因此,顯示裝置除了可透過第一共用電極層以減少側向漏光及混光的機率,還可以提升畫素開口率、性能以及顯示品質。 In addition, the display device of the present invention can also electrically connect the common electrode line to the first common electrode layer through the through hole. In this way, the common electrode line can transmit signals through the first common electrode layer. Thereby, the risk of signal abnormality or failure due to disconnection of the common electrode line can be reduced, and the through hole can be directly formed on the scan line or the corresponding pixel unit. In this way, in addition to increasing the display area and performance of the display device, it can also The spacers are arranged corresponding to the through holes to further increase the pixel aperture ratio of the pixel unit of the corresponding color and improve the display quality of the display device. Therefore, the display device can not only reduce the probability of lateral light leakage and light mixing through the first common electrode layer, but also improve the pixel aperture ratio, performance and display quality.
此外,由於共用電極線可電性連接至第一共用電極層,以透過第一共用電極層傳遞訊號,因此僅需部分的共用電極線電性連接至驅動電路即可將上述訊號傳遞至共用電極線的任一處。如此,顯示裝置於周邊的走線設計可更有裕度,而能進一步縮小顯示裝置的標框,提升顯示品質。 In addition, since the common electrode line can be electrically connected to the first common electrode layer to transmit signals through the first common electrode layer, only part of the common electrode line is electrically connected to the driving circuit to transmit the above signal to the common electrode. Anywhere on the line. In this way, the wiring design of the display device around the periphery can be more marginal, and the frame of the display device can be further reduced, and the display quality can be improved.
另外,本發明的顯示裝置還包括以半源極驅動架構的畫素陣列,而得以使資料線的整體數目減半。如此,除了可以減少資料線等走線所需的空間,使顯示裝置周邊線路的設計更有裕度外,還可以減少於顯示裝置周邊設置驅動元件(例如驅動晶片)的數量,以降低成本並縮小邊框。 In addition, the display device of the present invention also includes a pixel array with a half-source drive structure, so that the total number of data lines can be halved. In this way, in addition to reducing the space required for data lines and other wiring, and making the design of the peripheral circuits of the display device more marginal, it can also reduce the number of driving components (such as driving chips) provided around the display device to reduce costs and Reduce the border.
此外,本發明的顯示面板更透過第三主動元件而將電容器串接至第二子畫素電極。藉此,第二子畫素電極與電容器相關連的電荷可以重新分布,而達成電荷分享的需求。 In addition, the display panel of the present invention further connects the capacitor to the second sub-pixel electrode in series through the third active element. In this way, the charge associated with the second sub-pixel electrode and the capacitor can be redistributed to meet the charge sharing requirement.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make slight changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.
10:顯示裝置
100:第一基板
140:第一共用電極層
141:第一部
142:第二部
143:第三部
151:第一角落
152:第二角落
160:共用電極線
162:主幹
164:分支
1641:第一分支
170、172:貫孔
180:間隙物
A-A’、B-B’:剖面線
CH1:第一半導體通道層
CH2:第二半導體通道層
D1:第一汲極
D2:第二汲極
DL:資料線
DL1:第一資料線
DL2:第二資料線
DL3:第三資料線
G1:第一閘極
G2:第二閘極
PE1:第一畫素電極
PE2:第二畫素電極
PX:畫素單元
PX1:第一畫素單元
PX2:第二畫素單元
S1:第一源極
S2:第二源極
SL:掃描線
SL1:第一掃描線
SL2:第二掃描線
T1:第一主動元件
T2:第二主動元件
W1:第一寬度
W2:第二寬度
X:第二方向
Y:第一方向
10: Display device
100: The first substrate
140: The first common electrode layer
141: Part One
142: Part Two
143: Part Three
151: The first corner
152: The second corner
160: Common electrode line
162: Trunk
164: Branch
1641: The
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| TW202022447A (en) | 2020-06-16 |
| TW202022462A (en) | 2020-06-16 |
| TWI699749B (en) | 2020-07-21 |
| TWI709884B (en) | 2020-11-11 |
| TWI704395B (en) | 2020-09-11 |
| TW202022834A (en) | 2020-06-16 |
| TW202022582A (en) | 2020-06-16 |
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