TWI780979B - Method for manufacturing fingerprint sensing module - Google Patents

Abstract

A method for manufacturing a fingerprint sensing module including: sequentially forming a planar layer and a photoresist material layer on a substrate including a pixel region including a photosensitive array and a peripheral region surrounding the pixel region; removing a portion of the photoresist material layer on the pixel region to form a photoresist pattern exposing the planar layer; removing a portion of the planar layer on the pixel region to form a patterned planar layer exposing the substrate; forming an IR cut layer on the photoresist pattern and the on pixel region of the substrate; removing the photoresist pattern and a portion of the IR cut layer on the photoresist pattern to form an IR cut pattern on the pixel region; forming a light-shielding layer on the IR cut pattern and on the patterned planar layer; and patterning the light-shielding layer to form a collimator structure layer including a pinhole array on the IR cut pattern and a mark pattern on the patterned planar layer.

Description

Manufacturing method of fingerprint sensing module

The present invention relates to a manufacturing method of an optical sensing element, and in particular to a manufacturing method of a fingerprint sensing module.

In order to make the display have a narrow bezel design, under-screen fingerprint sensing technology has become a current trend. The under-screen fingerprint sensing technology is to configure the fingerprint sensing module under the display panel of the electronic device. After the electronic device detects that the user touches the display screen, the electronic device controls the display panel to emit light to illuminate the surface of the user's finger. The sensing light will be reflected by the user's finger into the fingerprint sensing module under the display panel, and the reflected light will be concentrated on the photosensitive element through multiple micro-lenses and collimating structures, so that the optical image signal can be converted into a digital image signal to obtain the user's fingerprint image. The collimation structure may include a light-shielding material layer with pinholes, so that the reflected light can be concentrated on the photosensitive element through the pinholes, and the light-shielding material can absorb the reflected light with a large angle to avoid interference between different reflected lights.

However, in the patterning process for forming the light-shielding material layer with pinholes, the exposure conditions of the light-shielding material layer are significantly affected by its thickness. For example, taking the exposure wavelength of about 365 nm as an example, when the thickness of the light-shielding material layer is about 1 μm, the light transmittance of the exposure light is about 70%, but when the thickness of the light-shielding material layer increases to about 1.5 μm In the case of , the light transmittance of the exposure light is reduced to about 10%. It can be seen that although the difference in thickness between the two is only 0.5 μm, the difference in light transmittance between the two is as high as about 7 times. Therefore, in the process of forming the light-shielding material layer, some patterns to be formed may not be well exposed to some areas by the exposure light due to the difference in light transmittance caused by the thickness difference, so that in the developing process, these The pattern to be formed may not be well formed on these areas.

The present invention provides a method for manufacturing a fingerprint sensing module. The design of the light-shielding layer formed on the infrared cut-off pattern and the patterned flat layer enables the light-shielding layer to have approximately the same thickness in different regions of the substrate. In the step of thinning the light-shielding layer, the alignment structure layer including the pinhole array and the marking pattern can be well formed in different regions of the substrate (such as the pixel region and the peripheral region).

An embodiment of the invention provides a method for manufacturing a fingerprint sensing module, which includes the following steps. A flat layer and a photoresist material layer are sequentially formed on the substrate. The base includes a pixel area containing a photosensitive array and a peripheral area surrounding the pixel area. The portion of the photoresist material layer on the pixel area is removed to form a photoresist pattern exposing the planar layer. The portion of the planar layer on the pixel area is removed to form a patterned planar layer exposing the base. An infrared cut-off layer is formed on the photoresist pattern and the pixel area of the substrate. The photoresist pattern and the portion of the infrared cutoff layer on the photoresist pattern are removed to form an infrared cutoff pattern on the pixel area of the base. A light-shielding layer is formed on the infrared cut-off pattern and the patterned flat layer. The light-shielding layer is patterned to form an alignment structure layer including a pinhole array on the infrared cut-off pattern, and a mark pattern is formed on the patterned flat layer.

In some embodiments, the thickness of the infrared cut pattern is approximately equal to the thickness of the patterned flat layer on the substrate.

In some embodiments, the infrared cut pattern is spaced apart from the patterned flat layer by a distance in a direction parallel to the substrate.

In some embodiments, the photoresist pattern includes a bottom surface in contact with the patterned flat layer and a top surface opposite to the bottom surface, and an area of the top surface is larger than that of the bottom surface.

In some embodiments, the photoresist pattern includes sloped sidewalls, and an included angle between the sloped sidewalls and the bottom surface is greater than 90 degrees.

In some embodiments, the infrared cutoff layer is not formed on the inclined sidewalls of the photoresist pattern, such that the infrared cutoff layer includes discontinuous first and second portions. The first part is formed on the pixel area of the base. The second part is formed on the photoresist pattern.

In some embodiments, the infrared cut-off layer includes a first portion formed on the pixel area of the substrate and a second portion formed on the photoresist pattern. The first part and the second part are separated by a photoresist pattern.

In some embodiments, the photoresist pattern is formed by an exposure process and a first development process, and the patterned flat layer is formed by an exposure process and a second development process different from the first development process.

In some embodiments, the light used in the exposure process exposes the portion of the photoresist layer and the portion of the planarization layer below the portion of the photoresist layer.

In some embodiments, the manufacturing method of the fingerprint sensing module further includes forming an additional flat layer on the infrared cut-off pattern and the patterned flat layer before forming the light-shielding layer.

Based on the above, in the above-mentioned manufacturing method of the fingerprint sensing module, since the light-shielding layer is formed on the infrared cut-off pattern and the patterned flat layer, the thickness of the light-shielding layer in different areas of the substrate (such as the pixel area and the peripheral area) About the same. In this way, some patterns to be formed on different regions of the substrate (such as an alignment structure layer including a pinhole array in the pixel region and a marking pattern in the peripheral region) can be well formed in the step of patterning the light-shielding layer. form.

The present invention will be described more fully with reference to the drawings of this embodiment. However, the present invention can also be embodied in various forms and should not be limited to the embodiments described herein. The thicknesses of layers and regions in the drawings may be exaggerated for clarity. The same or similar reference numbers indicate the same or similar elements, and the following paragraphs will not repeat them one by one.

It will be understood that when an element is referred to as being “on” or “connected to” another element, it can be directly on or connected to the other element or intervening elements may also be present. When an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connection" may refer to physical and/or electrical connection, while "electrical connection" or "coupling" may refer to the presence of other elements between two elements. "Electrical connection" as used herein may include physical connection (such as wired connection) and physical disconnection (such as wireless connection).

As used herein, "about", "approximately" or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value that one of ordinary skill in the art can determine, taking into account the The measurement in question and the specific amount of error associated with the measurement (ie, the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value. Furthermore, the terms "about", "approximately" or "substantially" used herein can choose a more acceptable deviation range or standard deviation according to optical properties, etching properties or other properties, and it is not necessary to use one standard deviation to apply to all properties .

The terms used herein are only used to illustrate exemplary embodiments, not to limit the present disclosure. In such cases, singular forms include plural forms unless the context explains otherwise.

1 to 7 are schematic cross-sectional views of a manufacturing method of a fingerprint sensing module according to an embodiment of the present invention. (b) of FIG. 4 is an enlarged view of area A in (a) of FIG. 4 . The manufacturing method of the fingerprint sensing module will be illustrated below with reference to FIG. 1 to FIG. 7 .

First, please refer to FIG. 1 , a flat layer 110 is formed on a substrate 100 . The substrate 100 includes a pixel area 10 including a photosensitive array and a peripheral area surrounding the pixel area 10 and including a wiring area 20 , a pad area 30 and a scribe line area 40 .

In some embodiments, the substrate 100 may include a plurality of film layers, a plurality of structures and/or elements formed in a back end of line (BEOL). For example, the substrate 100 may include inter-metal dielectric layers, vias, wiring layers, active components (such as transistors) and/or passive components (such as capacitors). As shown in FIG. 1 , the pixel region 10 of the substrate 100 may include an interconnection structure 102 and an active element and/or a passive element connected to the interconnection structure 102 (for example, an active element and a passive element included in a CMOS image sensor. /or passive components), and the peripheral area of the substrate 100 may include the wiring 104 disposed in the wiring area 20 and the pad structure 106 disposed in the pad area 30 .

In some embodiments, the substrate 100 may include a plurality of film layers, a plurality of structures and/or elements formed in a front end of line (FEOL). For example, the substrate 100 may include device layers formed on a semiconductor substrate. The element layer may include various elements and an interlayer dielectric layer covering the elements. In some embodiments, the elements may include active elements, passive elements or a combination thereof (eg, active elements and/or passive elements included in a CMOS image sensor). For example, the elements may include transistors, capacitors, resistors, diodes, photodiodes, or the like. In some embodiments, the device layer may include a gate structure, a source/drain region, and an isolation structure such as a shallow trench isolation (STI). In the element layer, various N-type metal-oxide semiconductors (NMOS) and/or P-type metal oxide semiconductors (P-type metal oxide semiconductors) interconnected with each other such as transistors and memories can be formed. -oxide semiconductor, PMOS) components to perform one or more functions. Other elements such as capacitors, resistors, diodes, photodiodes, etc. can also be formed on the semiconductor substrate. The functions of these components may include memory, processor, sensor, amplifier, power distribution, or I/O circuit (input/output circuitry), etc.

The semiconductor substrate may be a bulk semiconductor, a semiconductor-on-insulator (SOI) substrate, or the like. The semiconductor substrate can be doped (for example doped with P-type or N-type dopants) or undoped. The semiconductor substrate can be a wafer such as a silicon wafer. Generally speaking, an SOI substrate is a layer of semiconductor material formed on an insulating layer. The insulating layer may be, for example, a buried oxide (BOX) layer or a silicon oxide layer. The insulating layer is provided, for example, on a silicon substrate or a glass substrate. In some embodiments, the semiconductor substrate may include an element semiconductor such as silicon or germanium, such as silicon carbide, gallium arsenic, gallium phosphide, indium phosphide ( Indium phosphide), indium arsenide (indium arsenide) and indium antimonide (indium antimonide) and other compound semiconductors, such as SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, GaInAsP and other alloy semiconductors or combinations thereof.

The substrate 100 may include an opening 108 exposing the pad structure 106 , and a planarization layer 110 may be formed on the top surface of the substrate 100 and filled in the opening 108 . In some embodiments, the planarization layer 110 may be, for example, a photosensitive material. In some embodiments, the planarization layer 110 may be formed on the pixel area 10 and the peripheral area including the wiring area 20 , the pad area 30 and the scribe line area 40 of the substrate 100 .

Next, referring to FIG. 1 and FIG. 2 , a photoresist pattern PR is formed on the planarization layer 110 . In some embodiments, the photoresist pattern PR may be formed, for example, through the following steps. First, a photoresist material layer (not shown) is formed on the flat layer 110 . In some embodiments, the photoresist material layer is formed on the substrate 100 above the pixel area 10 and the peripheral area including the wiring area 20 , the pad area 30 and the scribe line area 40 . In some embodiments, the photoresist material layer may use a negative photoresist material. Next, a portion of the photoresist material layer above the pixel region 10 of the substrate 100 is removed to form a photoresist pattern PR exposing the planar layer 110 . That is, the photoresist pattern PR is formed over the peripheral area of the substrate 100 .

The photoresist pattern PR may include a bottom surface S1 in contact with the planarization layer 110 and a top surface S2 opposite to the bottom surface S1. In some embodiments, the area of the top surface S2 of the photoresist pattern PR is larger than the area of the bottom surface S1. In other words, the photoresist pattern PR may include an inclined sidewall SW1, and the included angle θ between the inclined sidewall SW1 and the bottom surface S1 is greater than 90 degrees. In some embodiments, in the case where the photoresist material layer adopts a negative photoresist material, the photoresist pattern PR formed after the exposure and development processes will have an inverted trapezoidal pattern, so that the top surface S2 of the photoresist pattern PR The area is larger than that of the bottom surface S1.

Then, referring to FIG. 2 and FIG. 3 , the portion of the flat layer 110 on the pixel region 10 is removed to form a patterned flat layer 112 exposing the pixel region 10 of the substrate 100 . In some embodiments, the patterned flat layer 112 can be formed, for example, through the following steps. In the exposure process and the first development process of forming the photoresist pattern PR (the photoresist material layer uses a negative photoresist material as an example), the photoresist material layer and the flat layer 110 are placed on the pixel area 10 of the substrate 100 Part of it is not exposed to the light used in the exposure process, so after removing the part of the photoresist material layer above the pixel area 10 of the substrate 100 by the first developing process, the flat layer 110 is in the pixel area 10 The portion on the pixel region 10 of the flat layer 110 may be removed through a second developing process different from the first developing process. That is, the photoresist pattern PR can be formed by an exposure process and a first development process, and the patterned flat layer 112 can be formed by the exposure process and a second development process different from the first development process. In some other embodiments, the portion of the planar layer 110 on the pixel region 10 can also be processed by another exposure process and development process (that is, different from the exposure process and development process used in the process of forming the photoresist pattern PR). ) removed. In other embodiments, the portion of the flat layer 110 on the pixel region 10 may also be used as a mask by the photoresist pattern PR, and the portion of the flat layer 110 on the pixel region 10 is removed by an etching process.

In some embodiments, the sidewall SW1 of the photoresist pattern PR and the sidewall SW2 of the patterned flat layer 112 may be non-coplanar. In other words, one end of the sidewall SW2 of the patterned flat layer 112 that contacts the photoresist pattern PR may contact the bottom surface S1 of the photoresist pattern PR.

Then, referring to FIGS. 3 and 4 , an infrared cut-off layer 120 is formed on the photoresist pattern PR and the pixel region 10 of the substrate 100 . The infrared cut-off layer 120 can be a film layer with an infrared filter function, and it can be a single layer or a multi-layer. In some embodiments, since the photoresist pattern PR has an inclined sidewall SW1 with an angle θ greater than 90 degrees with its bottom surface S1, the infrared cut-off layer 120 is only formed on the top surface S2 of the photoresist pattern PR and the pixel area of the substrate 100. 10, but not formed on the inclined sidewall SW1 of the photoresist pattern PR. That is, the infrared cut layer 120 may include discontinuous first and second portions 120a and 120b. The first portion 120a of the infrared cut-off layer 120 may be formed on the pixel region 10 of the substrate 100, and the second portion 120b of the infrared cut-off layer 120 may be formed on the photoresist pattern PR. In other words, the first portion 120 a of the infrared cut layer 120 and the second portion 120 b of the infrared cut layer 120 may be separated by the photoresist pattern PR (for example, in a direction perpendicular to the top surface of the substrate 100 ). In some embodiments, the thickness of the infrared cut-off layer 120 is approximately equal to the thickness of the patterned flat layer 112 on the substrate 100 .

In some embodiments, since the photoresist pattern PR has an inclined sidewall SW1 with an angle θ greater than 90 degrees with the bottom surface S1, that is, the area of the top surface S2 of the photoresist pattern PR is larger than the area of the bottom surface S1, it is formed at The infrared cut-off layer 120 (for example, the first portion 120 a of the infrared cut-off layer 120 ) on the pixel area 10 of the substrate 100 is separated from the patterned flat layer 112 by a distance (for example, the distance d).

Next, please refer to FIG. 4 and FIG. 5 , remove the photoresist pattern PR and the part of the infrared cut-off layer 120 on the photoresist pattern PR (for example, the second part 120b of the infrared cut-off layer 120 ), so that the pixel area of the substrate 100 10 is formed with an infrared cut pattern 122 . In some embodiments, the infrared cut pattern 122 is spaced apart from the patterned flat layer 112 by a distance (eg, distance d) in a direction parallel to the substrate 100 . In some embodiments, the thickness of the infrared cut pattern 122 is approximately equal to the thickness of the patterned flat layer 112 on the substrate 100 . That is, the top surface of the infrared cut pattern 122 is located at substantially the same level as the top surface of the patterned flat layer 112 . In other words, the film layer (such as the light-shielding layer 140 to be mentioned later) formed on the infrared cut pattern 122 and the patterned flat layer 112 subsequently has approximately the same thickness above the pixel region 10 and the peripheral region of the substrate 100 . Has good flatness. In this way, when the light-shielding layer 140 is subjected to the subsequent exposure process, the light used in the exposure process can be well exposed to some desired areas of the light-shielding layer 140, so that the pattern to be formed can be well formed on the light-shielding layer 140. in some areas.

In some embodiments, the second portion 120b of the infrared cut-off layer 120 can be lifted off from above the patterned flat layer 112 by removing the photoresist pattern PR. That is to say, the infrared cut pattern 122 can be formed on the pixel region 10 of the substrate 100 in a self-aligned manner without using an additional photomask. In some embodiments, the photoresist pattern PR may be removed by, for example, acetone-based photoresist solvent (ACE), but the invention is not limited thereto.

After that, referring to FIGS. 5 and 6 , a light shielding layer 140 is formed on the infrared cut pattern 122 and the patterned flat layer 112 . The thickness of the light-shielding layer 140 above the pixel area 10 and above the peripheral area of the substrate 100 is substantially the same, and has good flatness. In some embodiments, before forming the light-shielding layer 140, the additional flat layer 130 can be formed on the infrared cut pattern 122 and the patterned flat layer 112, so that the performance of the light-shielding layer 140 formed on the additional flat layer 130 can be further improved. flatness. The light shielding layer 140 may be, for example, a material capable of blocking and/or absorbing visible light (eg, black photoresist). The additional planarization layer 130 may be, for example, an organic material or an inorganic material.

Then, please refer to FIG. 6 and FIG. 7 , pattern the light-shielding layer 140 to form an alignment structure layer 142 including a pinhole array (pinhole array) 146 on the infrared cut pattern 122 , and form a mark pattern on the patterned flat layer 112 144. The light-shielding layer 140 has good flatness and has approximately the same thickness above the pixel region 10 of the substrate 100 and above the wiring region 20, the pad region 30 and the scribe region 40 in the peripheral region (for example, on each region of the substrate 100 The thickness difference of the light-shielding layer 140 is less than 0.5 μm or less than 0.4 μm). In this way, during the process of patterning the light-shielding layer 140, some patterns to be formed, such as the alignment structure layer 142 formed on the pixel area 10 of the substrate 100 and the marks formed on the scribe line area 40 of the substrate 100 The pattern 144 will not cause the exposure light to fail to be well exposed to some areas (such as the scribe line area 40 in the peripheral area) due to the difference in light transmittance caused by the difference in thickness. Therefore, in the subsequent development process, these desired The formed patterns (such as the alignment structure layer 142 and the marking pattern 144 ) can be respectively formed on the regions (such as the pixel region 10 and the scribe region 40 ) without being removed during the developing process. The mark pattern 144 may include an alignment mark, an overlay mark, or a combination thereof.

To sum up, in the above-mentioned manufacturing method of the fingerprint sensing module, since the light-shielding layer is formed on the infrared cut-off pattern and the patterned flat layer, the light-shielding layer is formed in different areas of the substrate (such as the pixel area and the peripheral area). approximately the same thickness. In this way, some patterns to be formed on different regions of the substrate (such as an alignment structure layer including a pinhole array in the pixel region and a marking pattern in the peripheral region) can be well formed in the step of patterning the light-shielding layer. form.

10: Pixel area 20: Wiring area 30: pad area 40: cutting lane area 100: base 102: Inner connection structure 104: Wiring 106: pad structure 108: opening 110: flat layer 112: Patterned flat layer 120: Infrared cut-off layer 120a: Part I 120b: Part II 122: Infrared cut pattern 130:Additional flattening layer 140: shading layer 142: Collimation structure layer 144: mark pattern 146: pinhole array A: area d: distance PR: photoresist pattern S1: bottom surface S2: top surface SW1: Sloped side wall / side wall SW2: side wall θ: included angle

1 to 7 are schematic cross-sectional views of a manufacturing method of a fingerprint sensing module according to an embodiment of the present invention.

10: Pixel area

20: Wiring area

30: pad area

40: cutting lane area

100: base

102: Inner connection structure

104: Wiring

106: pad structure

108: opening

112: Patterned flat layer

120: Infrared cut-off layer

120a: Part I

120b: Part II

A: area

d: distance

PR: photoresist pattern

S1: bottom surface

S2: top surface

SW1: side wall

θ: included angle

Claims (10)

A method for manufacturing a fingerprint sensing module, comprising: sequentially forming a flat layer and a photoresist material layer on a substrate, the substrate including a pixel area including a photosensitive array and a peripheral area surrounding the pixel area; removing a portion of the photoresist material layer on the pixel area to form a photoresist pattern exposing the planar layer; removing a portion of the planar layer on the pixel region to form a patterned planar layer exposing the base; forming an infrared cut-off layer on the photoresist pattern and the pixel area of the substrate; removing the photoresist pattern and the portion of the infrared cutoff layer on the photoresist pattern to form an infrared cutoff pattern on the pixel area of the substrate; forming a light shielding layer on the infrared cut pattern and on the patterned flat layer; and The light-shielding layer is patterned to form an alignment structure layer including a pinhole array on the infrared cut-off pattern, and a mark pattern is formed on the patterned flat layer. The method for manufacturing a fingerprint sensing module as claimed in claim 1, wherein the thickness of the infrared cut-off pattern is approximately equal to the thickness of the patterned flat layer on the substrate. The method for manufacturing a fingerprint sensing module according to claim 1, wherein the infrared cut-off pattern and the patterned flat layer are separated by a distance in a direction parallel to the substrate. The method for manufacturing a fingerprint sensing module according to claim 1, wherein the photoresist pattern includes a bottom surface in contact with the patterned flat layer and a top surface opposite to the bottom surface, the top surface of the top surface The area is larger than the area of the bottom surface. The method for manufacturing a fingerprint sensing module as claimed in claim 4, wherein the photoresist pattern includes inclined sidewalls, and an included angle between the inclined sidewalls and the bottom surface is greater than 90 degrees. The method for manufacturing a fingerprint sensing module according to claim 5, wherein the infrared cut-off layer is not formed on the inclined sidewall of the photoresist pattern, so that the infrared cut-off layer includes a discontinuous first portion and The second part, the first part is formed on the pixel area of the substrate, and the second part is formed on the photoresist pattern. The manufacturing method of the fingerprint sensing module according to claim 1, wherein the infrared cut-off layer includes a first part formed on the pixel area of the substrate and a second part formed on the photoresist pattern part, the first part and the second part are separated by the photoresist pattern. The manufacturing method of the fingerprint sensing module as claimed in item 1, wherein: The photoresist pattern is formed by an exposure process and a first development process, The patterned flat layer is removed by the exposure process and a second development process different from the first development process. The method for manufacturing a fingerprint sensing module according to claim 8, wherein the light used in the exposure process is not exposed to the portion of the photoresist material layer and the portion of the photoresist material layer the portion of the planar layer underneath. The manufacturing method of the fingerprint sensing module as described in claim 1, further comprising: Before forming the light-shielding layer, an additional flat layer is formed on the infrared cut-off pattern and the patterned flat layer.

Images