TWI778615B - Method for manufacturing wafer-level semiconductor package components and semiconductor package components produced therefrom - Google Patents

Abstract

The present invention describes a method for manufacturing a semiconductor package element, which includes the following steps: preparing a wafer with a plurality of die, wherein an intermediate conductive structure and a solder ball are arranged on the upper side of each die; A molding structure on the top side is on the top side of the wafer; a portion of the molding structure is removed by plasma etching and a portion of each solder ball is exposed; a dicing process is performed along the junction of the dies to The dies are separated to obtain the desired semiconductor package components. Removing a part of the material of the encapsulation structure and exposing a part of the solder balls by plasma etching can ensure the cleanliness of the surface of the exposed solder balls and increase the external contact area of the solder balls.

Description

Method for manufacturing wafer-level semiconductor package components and semiconductor package components produced therefrom

The present invention relates to a manufacturing method of a semiconductor package element, specifically, to a manufacturing method of a semiconductor package element capable of preventing glue overflow from adhering to a solder ball, and a semiconductor package element manufactured by the same.

Please refer to FIG. 1A , FIG. 1B and FIG. 2 , which illustrate the process steps of a known manufacturing method of a semiconductor package device. The first step is to prepare a wafer 80. A plurality of dies 81 are provided on the wafer 80. Each die 81 is provided with an intermediate conductive structure 82, such as under bump metallurgy (UBM). Solder balls 83 are implanted on the intermediate conductive structure 82 . After that, each die 81 is molded by a compression molding process and a release film is used to expose a part of the solder balls 83 . Finally, a dicing process is performed to cut each molded die 81 .

However, the above-mentioned fabrication methods of semiconductor package components generally have the following disadvantages: 1. After the release film is removed, the surface of the solder balls 83 may be contaminated by mold flash. In order to deal with the above-mentioned contamination of the overflowing glue, under normal circumstances, the packaged components will be subjected to a remelting process to melt the overflowing glue into the solder balls 83. As a result, the solder balls 83 containing the overflowing glue may affect the packaging. component reliability. In addition, the volume of the remelted solder balls 83 may be reduced, thereby creating a gap between the solder balls 83 and the molding material 84 , and moisture may penetrate into the gap, which ultimately affects the reliability of the packaged components. 2. In the compression molding process, the force exerted by the mold on the molding material 84 is limited. Under normal circumstances, as shown in FIG. 2, the molding material 84 together with the solder balls 83 will form a structure similar to a cone. , the molding material 84 will extend along the tangent of the end edge of the solder ball 83 and the exposed part of the solder ball 83 is usually relatively small, especially between the two adjacent solder balls 83, and the exposed part of the above-mentioned solder ball 83 is difficult to adjust. In addition, when excessive force is applied to the molding material 84 through the mold, the solder balls 83 and the intermediate conductive structure 82 may be connected and fractured, which may also affect the subsequent surface adhesion operation and electrical performance.

It can be seen that the existing manufacturing method of the packaging element of the semiconductor element is not perfect and there is still room for improvement.

One of the objectives of the present invention is to improve the deficiencies of the existing manufacturing methods of packaging components, and further propose a novel manufacturing method of semiconductor packaging components, which can avoid the overflow of glue remaining on the surface of the solder balls, and maintain the surface of the solder balls. Clean and increase the contact area of the solder balls to the outside.

The reason is that, according to a method for manufacturing a semiconductor package element provided by the present invention, for manufacturing a semiconductor package element, the steps of the manufacturing method include: preparing a wafer with a plurality of die, wherein the upper side of each die is Both are provided with an intermediate conductive structure and a solder ball, the intermediate conductive structure is arranged on the top surface of the die and is electrically coupled to the die, and the solder ball is connected to the intermediate conductive structure; a mold with a flat top surface is formed Structure on the top side of the wafer to cover each die and the intermediate conductive structures and solder balls on each die; remove a portion of the encapsulated structure and expose a portion of each solder ball by plasma etching until etching The latter molding structure forms a molding body, wherein the molding body has a base and a plurality of protrusions, the base has a top surface, and each protrusion extends from the top surface of the base to the solder ball in the horizontal direction. Maximum outer edge. The above-mentioned raised portion has an outer peripheral surface, and the outer peripheral surface of the raised portion is perpendicular to the top surface of the base portion; a cutting process is performed along the boundary of the crystal grains to separate the crystal grains, so as to obtain the respective crystal grains, The intermediate conductive structures on each die together with the solder balls and the diced mold body constitute the above-mentioned semiconductor package element.

Through the above-mentioned manufacturing method of a semiconductor package element, after the molding structure is formed, a part of the molding structure is removed by plasma etching until a part of the solder balls are exposed, so the exposed solder balls are No molding material with molding structure remains on the surface, which effectively keeps the surface of the solder ball clean and avoids the problem of glue overflow that may occur in traditional manufacturing processes.

In addition, the present invention also provides a structure of a semiconductor package element, which includes a die, an intermediate conductive structure, a solder ball and a molding body. The above-mentioned die has a top surface, the intermediate conductive structure is disposed on the top surface of the die and is electrically coupled to the die, and the solder ball is disposed on the intermediate conductive structure. The above-mentioned molding encapsulates a part of the solder balls, the crystal grains and the intermediate conductive structure. The molding includes a base portion and a raised portion, the base portion has a top surface, and the raised portion extends from the top surface of the base portion to the solder balls. At the largest outer edge in the horizontal direction, the protruding portion has an outer peripheral surface, and the outer peripheral surface of the protruding portion is perpendicular to the top surface of the base portion.

The following describes the technical content and features of the present invention in detail with the help of several embodiments listed in the following figures. Directional descriptive terms such as "bottom" are merely illustrative terms based on the normal use direction, and are not intended to limit the scope of claims.

In order to illustrate the technical characteristics of the present invention in detail, the following embodiments are hereby given and described in conjunction with the drawings as follows, wherein:

As shown in FIG. 3, FIG. 4A to FIG. 4I, the following embodiments provide a manufacturing method of a semiconductor package element, which is used to manufacture a plurality of semiconductor package elements 10, and the steps of the manufacturing method of the above-mentioned semiconductor package element include:

Step S1: prepare a wafer 1 (as shown in FIG. 4A ). The wafer 1 includes a protective layer 2 and a plurality of dies 20 connected to the protective layer 2 , wherein each die 20 has a top surface 21 , and the top surface of the die 20 is The surface 21 is provided with structures such as the bonding pad 22 and the passivation layer 30. An intermediate conductive structure 40 is connected to the bonding pad 22 and a solder ball 50 is electrically coupled to the upper side of the intermediate conductive structure 40. In this embodiment, the intermediate conductive structure 40 is an under bump metal (UBM), the UBM includes a seed layer 41 , the UBM passes through the passivation layer 30 and is electrically connected to the bonding pad 22 , the present embodiment is not limited to this, the intermediate conductive structure 40 may also be a combination of an under bump metallization and a redistribution layer (RDL). In addition, in step S1 , a dicing process is also performed to form a plurality of dicing grooves 3 at the boundaries of the die 20 .

Step S2 : performing a molding process to form a molding structure 60A on the top side of the wafer 1 , so as to cover each die 20 and the intermediate conductive structures 40 and the solder balls 50 on each die 20 , and the molding structure 60A The same molding material will also fill up all the cutting grooves 3 , so the molding structure 60A will also surround the sides of each die 20 . The molding material of the molding structure 60A may be epoxy resin, for example. According to different molding processes, the top surface of the formed molding structure 60A may be slightly undulating (as shown in FIG. 4B ). Therefore, in order to make the top surface of the molding structure 60A flat, a grinding process may be performed. In the process, the molding material of the molding structure 60A with a predetermined height H is removed (as shown in FIG. 4C ), so that the top surface of the molded molding structure 60A after grinding is close to but not in contact with the top of the solder ball 50 (as shown in FIG. 4D ). .

Step S3 : removing a portion of the ground molding structure 60A and exposing a portion of each solder ball 50 by plasma etching in a manner perpendicular to the top surface of the molding structure 60A until the etched molding Structure 60A forms a molded body 60B (FIG. 4E). The molding body 60B has a base portion 61 and a plurality of raised portions 62 (see FIG. 6 ). The base portion 61 has a top surface 611 , and each raised portion 62 extends from the top surface 611 of the base portion 61 to the level of the solder balls 50 . On the largest outer edge 51 in the direction, each raised portion 62 surrounds and connects the lower half of the corresponding solder ball 50 , and the number of the raised portion 62 is equal to the number of the solder balls 50 . The raised portion 62 structurally includes an outer peripheral surface 621 and an inner concave surface 622. The height of the outer peripheral surface 621 and the position of the top surface 61 of the base portion 61 depend on the depth of plasma etching. When the slurry etching depth is deeper, the height of the raised portion 62 is also higher (as shown in FIG. 7 ). Since the plasma etching is performed perpendicular to the top surface of the mold encapsulation structure 60A, the solder balls 50 themselves will function like a mask, so that the plasma particles P will only etch the mold on the upper half of the solder balls 50 . However, the plasma particles P will not pass through the molding material shielded by the solder balls 50, so that the shielded molding material will not be etched, so that the outer peripheral surface 621 of the raised portion 62 and the solder balls 50 are in the horizontal direction. The largest outer edge 51 on the upper part is cut flush, the outer peripheral surface 621 of the raised part 62 will be a cylindrical surface under ideal conditions, and the outer peripheral surface 621 of the raised part 62 is perpendicular to the top surface of the base part 61, and the raised part 62 is The inner concave surface 622 is completely attached to the solder ball 50 . Since there is no gap between the bumps 62 and the solder balls 50, moisture does not penetrate.

Step S4: A layer of polishing tape 71 is attached to the top side of the etched wafer 1, the wafer 1 is turned upside down, and a polishing process is performed to remove the protective layer 2 of the wafer 1 (as shown in FIG. 4F ).

Step S5: Adhering a backside protective tape 72 to the bottom surface of the wafer 1 after removing the protective layer 2, and making a laser mark (as shown in FIG. 4G ).

Step S6 : removing the abrasive tape 71 , and performing an electrical test on each die 20 before cutting out each die 20 (as shown in FIG. 4H ).

Step S7 : placing the wafer 1 with the protective layer 2 removed on a carrier plate 73 , and performing a dicing process along the boundary of the die 20 (ie, the position of the dicing groove 3 ) to separate the die 20 (as shown in FIG. 4I ), the semiconductor package element 10 ( as shown in Figure 5).

It should be noted that steps S4 to S6 are performed for the purpose of shipping, steps S4 to S6 may not be performed in some cases, and step S6 may also be performed after step S7, which should not be used in this embodiment. limited.

For the package element 10 manufactured by the above-mentioned manufacturing method of a semiconductor package element, in step S3, the molding material is removed by plasma etching until a part of the solder balls 50 are exposed, so the exposed solder balls 50 The surface of the solder ball 50 does not have any residual molding material, which can effectively keep the surface of the solder ball 50 clean, and improve the reliability of the overall package element 10 . Secondly, in the conventional compression molding process, since the force exerted by the mold on the molding material is limited, the exposed area of the solder balls in the conventional compression molding process is relatively small; When the force of the molding material is excessively applied, the solder balls may be connected to the intermediate conductive structure, and the problem of connection and fracture may occur. In contrast, the manufacturing method of the package element of this embodiment does not have the above-mentioned “limited and excessive force on the molding material”. The problem is that a wider range of solder balls 50 can be exposed by plasma etching, so as to facilitate the subsequent surface bonding process, which is the focus of this embodiment.

Finally, it must be reiterated that the methods and constituent elements disclosed in the foregoing embodiments of the present invention are merely illustrative, and are not intended to limit the patent scope of the present invention. Or replacement with other equivalent elements should still fall within the scope covered by the scope of the patent application of the present invention.

prior art 80: Wafer 81: Die 82: Intermediate conductive structure 83: Solder Ball 84: Molding material Example 1: Wafer 2: protective layer 3: Cutting groove 10: Package components 20: Die 21: Top surface 22: Solder pads 30: Passivation layer 40: Intermediate conductive structure 41: Seed Layer 50: Solder Ball 51: Maximum outer edge 60A: Molded structure 60B: Molded body 61: Base 62: Raised part 621: Peripheral surface 622: Inner concave 71: Abrasive Tape 72: Back Protection Tape H: height P: Plasma particle S1-S7: Steps

The detailed structure, features and fabrication methods of the semiconductor package components will be described in the following embodiments. However, it should be understood that the embodiments and drawings to be described below are only illustrative and should not be used as limitations. The scope of the patent application of the present invention, wherein:

1A and FIG. 1B are schematic flowcharts of a conventional manufacturing method of a semiconductor package device; Fig. 2 is a partial enlarged view of Fig. 1B; FIG. 3 is a flow chart of the steps of a method for fabricating a semiconductor package element according to an embodiment; 4A to 4I are schematic cross-sectional views of the steps; 5 is a schematic cross-sectional view of a semiconductor package element of an embodiment; Fig. 6 is a partial enlarged view of Fig. 4; and FIG. 7 is similar to FIG. 5 to illustrate the case where the plasma etch depth is deeper.

S1-S7: Steps

Claims (8)

A semiconductor package element, comprising: a die with a top surface; an intermediate conductive structure disposed on the top surface of the die and electrically coupled to the die; a solder ball disposed on the intermediate conductive structure; and a molding body, covering a part of the solder ball, the die and the intermediate conductive structure, the molding body includes a base and a protrusion, the base has a top surface, the protrusion is The top surface of the base portion extends to the largest outer edge of the solder ball in the horizontal direction, the protruding portion has an outer peripheral surface, and the peripheral surface of the protruding portion is perpendicular to the top surface of the base portion, wherein the protruding portion has an inner concave surface, the inner concave surface is completely attached to the solder ball. The semiconductor package device as claimed in claim 1, wherein the die is further provided with a bonding pad, the intermediate conductive structure is an under-bump metal, and the under-bump metal is connected to the upper side of the bonding pad. The semiconductor package component of claim 1, wherein the raised portion surrounds and connects the lower half of the solder ball. A method for manufacturing a wafer-level semiconductor package element, which is used to manufacture a semiconductor package element. The steps of the manufacturing method include: preparing a wafer with a plurality of die, wherein an intermediate conductive layer is provided on the upper side of each die. structure and a solder ball, the intermediate conductive structure is disposed on the top surface of the die and is electrically coupled to the die, the solder ball is connected to the intermediate conductive structure; a molding structure with a flat top surface is formed in the top side of the wafer to encapsulate each of the die and the intermediate conductive structure and the solder ball on each of the die; A part of the molding structure is removed by plasma etching and a part of each of the solder balls is exposed, until the etched molding structure forms a molding body, wherein the molding body has a base and a plurality of protrusions A raised portion, the base portion has a top surface, each of the raised portions extends from the top surface of the base portion to the largest outer edge of the solder ball in the horizontal direction, the raised portion has an outer peripheral surface, and the raised portion has an outer peripheral surface. The outer peripheral surface is perpendicular to the top surface of the base; a dicing process is performed along the boundary of the crystal grains to separate the crystal grains, so as to obtain the intermediate conductive structure from each of the crystal grains and on each of the crystal grains The semiconductor package element is formed together with the solder balls and the diced mold body. The manufacturing method of a wafer-level semiconductor package device as claimed in claim 4, wherein the molding structure having the flat top surface is formed by performing a grinding process. The method for fabricating a wafer-level semiconductor package device as claimed in claim 4, wherein a part of the molding structure is removed in a manner perpendicular to the top surface of the molding structure. The method for manufacturing a wafer-level semiconductor package device as claimed in claim 4, wherein in the step of preparing the wafer, a dicing process is further performed to form a plurality of dicing grooves at the boundaries of the die. The method for manufacturing a wafer-level semiconductor package component as claimed in claim 7, wherein the molding structure further fills the cutting grooves.

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