TWI771852B - Direct memory access device, data transmission method and electronic device - Google Patents

Abstract

A direct memory access device includes: an Auto Transfer Count Detector (ATCD), having a descriptor for recording a transmission amount of data which are not transmitted, wherein the ATCD is used to determine whether the transmission amount of the data is larger than or equal to a preset transmission amount of one transmission, so as to generate a current transmission amount and a valid flag signal to a peripheral device, wherein the preset transmission amount is larger than or equal to multiple words; wherein the peripheral device generate a request signal according to the received current transmission amount and the received valid flag signal, and transmits the request signal to the direct memory access device for requesting a data transmission service.

Description

Direct memory access device, data transmission method and electronic equipment

The present invention relates to a direct memory access (Direct Memory Access, DMA) device, and more particularly to a direct memory access device capable of detecting data transfer volume and reducing transfer time, a data transfer method thereof, and the use of the above-mentioned direct memory access device. The electronic equipment of the body access device.

Direct memory access technology allows peripheral devices in electronic equipment with computing capabilities to directly access memory devices (such as but not limited to system memory) without the intervention of the processor. The above-mentioned electronic devices are, for example, but not limited to, computers, smart phones, tablet computers, or smart home appliances, and the above-mentioned peripheral devices are, for example, but not limited to, hard disk controllers, graphic display cards, network cards, or sound cards.

Please refer to FIG. 1 . FIG. 1 is a schematic diagram of the operation of the prior art direct memory access device for data transmission. When the peripheral device 12 wants to transmit data to the direct memory access device 10 or receive data from the direct memory access device 10, the direct memory access device 10 and the peripheral device 12 will communicate to set the corresponding channel Perform subsequent data transmission, and set the total amount of transmitted data and the preset single transmission amount for each transmission, wherein the total amount of transmitted data is usually an integer multiple of the preset single transmission amount. As shown in FIG. 1 , from top to bottom, the preset single transmission amount is respectively set as 1 byte (byte, also referred to as byte), half word (half word) and 1 word (word).

Assuming that 16 bytes of data are to be transmitted (ie, the total amount of data to be transmitted is 16 bytes), and the default single transmission amount is set to 1 byte, a total of 16 transmissions will be performed. In each transmission, the peripheral device 12 will first send a request signal (request signal) to the direct memory access device 10, and the direct memory access device 10 starts to process one byte of data after receiving the request signal. data transmission (transmitting to the peripheral device 12, or receiving the data from the peripheral device 12), and after transmitting the data amounting to 1 byte, the direct memory access device 10 will transmit the data corresponding to the request signal. An acknowledgement (ACK) signal is sent to the peripheral device 12 . After performing multiple transfers, in the last transfer (in this example, the 16th transfer), the DMA device 10 will send a pull-high ( A finish signal of pulling up is sent to the peripheral device 12 to indicate that the data of the total amount of data to be transmitted (in this example, the data of the data amount of 16 bytes) has been completely transmitted. As can be seen from the above, when the peripheral device 12 needs to transmit a large amount of data with the direct memory access device 10, a large number of channels and bandwidth in the system will be occupied, which will cause technical problems such as bandwidth congestion and system efficiency reduction. .

An embodiment of the present invention provides a direct memory access device, comprising: an automatic transfer data amount detector, which has a descriptor for recording the amount of data to be transferred, and is used to determine whether the amount of data to be transferred is greater than or equal to a preset amount a secondary transfer amount, so as to generate a current transfer amount and a valid flag signal to a peripheral device electrically connected to the direct memory access device, wherein the preset single transfer amount is greater than or equal to a plurality of characters; The peripheral device generates a request signal to the direct memory access device according to the current transmission amount and the valid flag signal to perform a data transmission service request.

Optionally, when the amount of data to be transmitted is greater than or equal to a preset single transmission amount, the automatic transmission data amount detector sets the current transmission amount as the preset single transmission amount; when the pending The amount of transmitted data is less than the preset single transmission amount, and the automatic transmission data amount detector sets the current transmission amount as the to-be-transmitted data amount.

Optionally, when the amount of data to be transmitted is zero, the direct memory access device transmits a high end signal to the peripheral device.

Optionally, when the direct memory access device receives the request signal, the direct memory access device performs data transmission with a data volume corresponding to the current transmission volume of the request signal, And after the data transmission is completed, a reply confirmation signal is sent to the peripheral device.

Optionally, the preset single transmission amount is two characters, and when the amount of data to be transmitted is greater than or equal to the preset single transmission amount, the completion of the data transmission service request takes three clock times; when The amount of data to be transmitted is less than the preset single transmission amount, and the completion of the data transmission service request takes two or three clock times.

An embodiment of the present invention provides a direct memory access device, characterized in that: when the amount of data to be transferred is greater than or equal to a preset single transfer amount, the direct memory access device sets the current transfer amount as the a preset single transmission amount; when the amount of data to be transmitted is less than the preset single transmission amount, the direct memory access device sets the current transmission amount as the amount of data to be transmitted; the direct memory access The memory access device transmits the current transfer amount to a peripheral device, wherein the direct memory access device is electrically connected to the peripheral device through a bus; the request is received from the direct memory access device signal, the direct memory access device performs data transmission with a data volume corresponding to the current transmission volume of the request signal, and sends a reply confirmation signal to the peripheral device after the data transmission is completed, wherein The request signal is generated by the peripheral device according to the received valid flag signal and the current transmission amount.

An embodiment of the present invention provides a data transmission method for a direct memory access device, comprising: judging whether the amount of data to be transmitted is greater than or equal to a preset single transmission amount, thereby generating the current transmission amount and a valid flag A signal is given to a peripheral device that is electrically connected to the direct memory access device setting, wherein the preset single transmission amount is greater than or equal to a plurality of characters; and receiving a request signal transmitted by a peripheral device electrically connected to the direct memory access device to perform a data transmission service request, wherein the peripheral device The device generates the request signal according to the current transmission amount and the valid flag signal.

Optionally, when the amount of data to be transmitted is greater than or equal to the preset single transmission amount, the current transmission amount is set as the preset single transmission amount; when the amount of data to be transmitted is less than the preset single transmission amount Transmission amount, the current transmission amount is set as the amount of data to be transmitted.

An embodiment of the present invention provides an electronic device, comprising: any of the foregoing direct memory access devices; and the peripheral device, which is electrically connected to the direct memory access device through a bus bar.

Optionally, the electronic device is a computer, a smart phone, a tablet computer or a smart home appliance, and the peripheral device is a hard disk controller, a graphics display card, a network card or a sound card.

To sum up, the direct memory access device of the embodiment of the present invention can save more clock time for data transmission than the prior art, and can effectively improve the overall system efficiency of the electronic device.

For a further understanding of the techniques, means and effects of the present invention, reference may be made to the following detailed description and accompanying drawings, so that the objects, features and concepts of the present invention can be thoroughly and specifically understood. However, the following detailed description and accompanying drawings are only used to refer to and illustrate the implementation of the present invention, and are not intended to limit the present invention.

10, 20: Direct memory access device

12, 22: Peripherals

2: Electronic equipment

202: Automatically transmit data volume detector

204: Descriptor

S40~S50: Steps

The accompanying drawings are provided to enable those of ordinary skill in the art to which the invention pertains to further understand the present invention, and are incorporated in and constitute a part of the specification of the present invention. The drawings illustrate exemplary embodiments of the invention, and together with the description of the invention serve to explain the principles of the invention.

FIG. 1 is a schematic diagram of the operation of the direct memory access device of the prior art for data transmission.

FIG. 2 is a functional block diagram of a direct memory access device according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of the operation of the direct memory access device for data transmission according to the embodiment of the present invention.

FIG. 4 is a schematic flowchart of a data transmission method used by a direct memory access device according to an embodiment of the present invention.

Reference will now be made in detail to exemplary embodiments of the present invention, exemplary embodiments of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and the description to refer to the same or like parts. In addition, the practice of the exemplary embodiment is only one way of realizing the design concept of the present invention, and the following examples are not intended to limit the present invention.

An embodiment of the present invention provides a direct memory access device that still complies with the service working mode of the hand shaking protocol of receiving a request signal and returning an acknowledgment reply signal, but the default single transmission amount can be set to multiple characters, for example, two or more characters. Furthermore, the direct memory access device has an Auto Transfer Count Detector (ATCD), which actively detects how much data should be transferred each time, and calculates the amount of data to be transferred. Automatically notify peripheral devices. If the amount of data to be transmitted in this transmission is lower than the preset single transmission amount (usually the last transmission of the data corresponding to the total amount of transmitted data), the automatic transmission data amount detector will still provide the secondary transmission. Data volume to peripheral devices. In this way, during this transmission, the peripheral device does not need to wait until the data of the data amount of a plurality of characters is collected before sending the request signal this time. In addition, during each transfer process, the direct memory access device will also send a valid flag signal to the peripheral device to indicate that the transfer is a valid transfer, and the peripheral device can send the direct memory access device to the direct memory access device. To make a data transfer service request. Through the structure of the direct memory access device according to the embodiment of the present invention, the number of times that the peripheral device sends a request signal to the direct memory access device to perform data transmission service requests can be improved, so that the bandwidth occupied by the bus can be improved. technical problems, and improve the system performance of the overall electronic equipment.

After describing the design concept of the direct memory access device according to the embodiment of the present invention, the implementation details will be further described. Please refer to FIG. 2 first. FIG. 2 is a functional block diagram of a direct memory access device according to an embodiment of the present invention. In the embodiment of FIG. 2 , the electronic device 2 includes a direct memory access device 20 and a peripheral device 22 , and the direct memory access device 20 and the peripheral device 22 can be electrically connected through the bus bar of the system. In this embodiment, the electronic device 2 is, for example, but not limited to, a computer, a smart phone, a tablet computer, or a smart home appliance, and the peripheral device 22 is, for example, but not limited to, a hard disk controller, a graphics card, a network card, or a sound card.

The direct memory access device 20 includes an automatic transfer data amount detector 202, wherein the automatic transfer data amount detector 202 records a descriptor 204, wherein the descriptor 204 records the to-be-transferred data amount CNT, wherein the to-be-transferred data The initial value of the amount CNT is the total amount of data to be transmitted, and in each transmission, the amount of data to be transmitted CNT is the amount of data to be transmitted CNT of the previous transmission minus the previous current transmission amount Info_Count. The default single transfer amount of the direct memory access device 20 can be set to be a plurality of characters, for example, two characters or more than two characters. The automatic transmission data volume detector 202 sends the current transmission volume Info_Count and the valid flag signal Valid_Flag to the peripheral device 22, so that the peripheral device 22 can send a request signal to the direct memory according to the current transmission volume Info_Count and the valid flag signal Valid_Flag The memory access device 20 performs a data transfer service request to the direct memory access device 20 whose data amount is the current transfer amount Info_Count.

When the amount of data to be transmitted CNT in the descriptor 204 is greater than or equal to the preset single transmission amount, the automatic transmission data amount detector 202 determines the current transmission amount Info_Count as the preset single transmission amount. When the amount of data to be transmitted CNT in the descriptor 204 is smaller than the preset single transmission amount, the automatic transmission amount of data detector 202 determines the amount of information to be transmitted Info_Count to be the amount of data to be transmitted CNT, so the peripheral device 22 does not need to continue to wait Only when the transmission data volume CNT is greater than or equal to the preset single transmission volume, can a request signal be sent to the direct memory access device 20 for a data transmission service request, which can prevent the bandwidth of the bus from being occupied for a long time and not used.

Next, please refer to FIG. 3 . FIG. 3 is a schematic diagram of the operation of the direct memory access device for data transmission according to the embodiment of the present invention. In this embodiment, the default single transmission amount is set to two characters, and the initial value of the amount of data to be transmitted CNT is 995 bytes. Therefore, except for the last transmission, the automatic transmission data amount detector 202 sends the current transmission amount Info_Count (Info_Count=8) with a value of 8 bytes (2 characters) and a valid flag signal Valid_Flag (Valid_Flag=Valid) with a value to the peripheral device 22, so that the peripheral device Lane 22 carries out data transmission with a data volume of two characters. In the last transmission, the value of the amount of data to be transmitted CNT is 3 bytes. Therefore, the automatic transmission data amount detector 202 transmits the current transmission amount Info_Count (Info_Count=3) with a value of 3 bytes and the value It is a valid valid flag signal Valid_Flag (Valid_Flag=Valid) to the peripheral device 22, so that the peripheral device 22 can perform data transmission with a data amount of 3 bytes.

As can be seen from the above, the method of transmitting the current transmission amount Info_Count and the valid flag signal Valid_Flag to the peripheral device 22 through the automatic transmission data amount detector 202 and setting the single transmission amount to multiple characters can reduce the amount of data sent by the peripheral device 22 The number of request signals, the time to wait for the request signal to be issued, and the time to occupy the bus, and in the case of the same total amount of transmitted data, the direct memory The access device 20 can save more cycle time for data transmission than the prior art, so it can effectively improve the overall system efficiency.

Further, in the prior art, to transmit 8 pieces of data with a data volume of 1 byte, the peripheral device needs to send a total of 8 request signals (assuming the default single transmission volume is 1 byte) , it will take about 2 clock time to process in each transmission (Note: the reading and writing of data less than 1 character requires 2 clock time). Therefore, in the prior art, it takes 16 clock times in total to complete the transmission of 8 pieces of data with a data volume of 1 byte. However, by using the direct memory access device 20 according to the embodiment of the present invention, since the default single transfer amount can be set to 2 characters or more, the automatic data transfer amount detection of the direct memory access device 20 The detector 202 detects that the current data volume is 8 bytes to be transmitted, and accordingly sends the current transmission volume Info_Count (Info_Count=8) with the value of 8 bytes and the value is valid. The flag signal Valid_Flag (Valid_Flag=Valid) is sent to the peripheral device 22, so that the peripheral device 22 only needs to send a request signal to the direct memory access device 20 to perform a data transfer service request. In the processing of this transfer, a total of It takes 3 clock time (Note: the data volume is more than 1 character but not more than 2 characters, it takes 3 clock time to read and write data).

In addition, when the transmission volume is smaller than the preset single transmission volume, assuming that the data volume is 3-byte data, the peripheral device of the prior art needs to send three request signals to perform three data transmissions, so it takes 6 clock times However, the automatic transmission data volume detector 202 in the embodiment of the present invention will send a current transmission volume Info_Count (Info_Count=3) with a value of 3 bytes and a valid flag signal Valid_Flag (Valid_Flag=Valid ) to the peripheral device 22, so the peripheral device 22 only needs to send a request signal to the direct memory access device 20 to perform a data transfer service request, so only two clock times are required. Therefore, if the example in FIG. 3 is taken, when the total amount of transmitted data is 995 bytes, the prior art requires 1990 (995*2=1990) clock times to complete the entire transmission. However, using the present invention The direct memory access device 20 of the present embodiment only needs 374 (124*3+2=374) clock times to complete all transfers.

Next, please refer to FIG. 2 and FIG. 4 at the same time. FIG. 4 is a schematic flowchart of a data transmission method used by a direct memory access device according to an embodiment of the present invention. The aforementioned direct memory access device 20 may implement the automatic data transfer amount detector 202 by means of hardware, or implement the automatic data transfer amount detector 202 by means of firmware, so that the direct memory storage The retrieval device 20 performs the data transmission method as shown in FIG. 4 . First, in step S40, it is determined whether the amount of data to be transmitted CNT recorded by the automatic transmission data amount detector 202 is greater than or equal to the preset single transmission amount. If the amount of data to be transmitted CNT is greater than or equal to the preset single transmission amount, go to step S42; if the amount of data to be transmitted CNT is less than the preset one-time transmission amount, go to step S42, and go to step S44.

In step S42 , the current transmission amount Info_Count is set as the preset single transmission amount and the valid flag signal Valid_Flag is set as valid, and the current transmission amount Info_Count and the valid flag signal Valid_Flag are sent to the peripheral device 22 . In step S44 , the current transmission amount Info_Count is set as the amount of data to be transmitted CNT and the valid flag signal Valid_Flag is set as valid, and the current transmission amount Info_Count and the valid flag signal Valid_Flag are sent to the peripheral device 22 . Next, in step S46 , the request signal from the peripheral device is received, and data transmission is performed with the data amount being the current transmission amount Info_Count, and after the data transmission is completed, a reply confirmation signal is sent to the peripheral device 22 . After that, in step S48, it is determined whether the amount of data to be transmitted CNT is zero, if the amount of data to be transmitted CNT is zero, then step S50 is performed; otherwise, step S40 is continued. In step S50, a high end signal is sent to the peripheral device 22 to indicate that the data of the total amount of data to be transmitted has been completely transmitted.

To sum up the above, compared with the prior art, under the condition of the same total amount of data to be transmitted, the DMA device according to the embodiment of the present invention can save more clock time for data transmission than the prior art. In addition, through the use of the automatic transmission data volume detector, the peripheral device does not need to continue to wait for the transmission data volume to be greater than or equal to the preset single transmission volume before sending a request signal to the direct The memory access device is connected to the data transmission service request, so that the bandwidth of the bus can be prevented from being occupied for a long time and not used. Overall, the direct memory access device of the embodiment of the present invention can effectively improve the overall system efficiency of the electronic device.

It is to be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in view thereof will be suggested to those skilled in the art and are to be included within the spirit and scope of the present application and the scope of the appended claims. within the range.

20: Direct memory access device

22: Peripherals

2: Electronic equipment

202: Automatically transmit data volume detector

204: Descriptor

Claims (10)

A direct memory access device, comprising: an automatic transfer data amount detector, having a descriptor for recording the amount of data to be transferred, for judging whether the amount of data to be transferred is greater than or equal to a preset single transfer amount, so as to thereby generating a current transfer amount and a valid flag signal to a peripheral device electrically connected to the direct memory access device, wherein the preset single transfer amount is greater than or equal to a plurality of characters; wherein the peripheral device is based on the The current transfer amount and the valid flag signal generate a request signal to the direct memory access device to perform a data transfer service request. The direct memory access device according to claim 1, wherein when the amount of data to be transferred is greater than or equal to a preset single transfer amount, the automatic transfer data amount detector sets the current transfer amount as the current transfer amount. the preset single transmission amount; when the to-be-transmitted data amount is less than the preset single-transmission amount, the automatic transmission data amount detector sets the current transmission amount as the to-be-transmitted data amount. The direct memory access device according to claim 1, wherein when the amount of data to be transmitted is zero, the direct memory access device transmits a high end signal to the peripheral device. The direct memory access device according to claim 1, wherein when the direct memory access device receives the request signal, the amount of data performed by the direct memory access device is corresponding to the request signal The data transmission of the current transmission amount, and after the data transmission is completed, a reply confirmation signal is sent to the peripheral device. The direct memory access device according to claim 1, wherein the preset single transfer size is two characters, and when the to-be-transferred data size is greater than or equal to the preset single transfer size, the data The completion of the transmission service request takes three clock times; when the amount of data to be transmitted is less than the preset single transmission volume, the completion of the data transmission service request takes two or three clock times. A direct memory access device, characterized in that: when the amount of data to be transferred is greater than or equal to a preset single transfer amount, the direct memory access device sets the current transfer amount as the preset single transfer amount; When the amount of data to be transferred is less than the preset single transfer amount, the direct memory access device sets the current transfer amount as the amount of data to be transferred; the direct memory access device sets the amount of data to be transferred When the sub-transmission amount is sent to a peripheral device, wherein the DMA device is electrically connected to the peripheral device through a bus; when the DMA device receives the request signal, the DMA device The body access device performs data transmission with a data volume corresponding to the current transmission volume of the request signal, and sends a reply confirmation signal to the peripheral device after the data transmission is completed, wherein the request signal is the The peripheral device generates according to the received valid flag signal and the current transmission amount. A data transmission method for a direct memory access device, comprising: judging whether the amount of data to be transmitted is greater than or equal to a preset single transmission amount, so as to generate the current transmission amount and a valid flag signal to the direct memory a peripheral device electrically connected to the direct memory access device, wherein the preset single transfer amount is greater than or equal to a plurality of characters; and receiving a request signal transmitted by the peripheral device electrically connected to the direct memory access device to perform A data transmission service request, wherein the peripheral device generates the request signal according to the current transmission amount and the valid flag signal. The data transmission method according to claim 7, wherein when the amount of data to be transmitted is greater than or equal to a preset single transmission amount, the current transmission amount is set as the preset single transmission amount; The amount of data to be transmitted is less than the preset single transmission amount, and the amount of current transmission is set as the amount of data to be transmitted. An electronic device with computing capability and supporting a direct memory access function, comprising: the direct memory access device as described in one of claims 1 to 6; and the peripheral device, connected to the direct memory access device through a bus bar The memory access device is electrically connected. The electronic device according to claim 9, wherein the electronic device is a computer, a smart phone, a tablet computer or a smart home appliance, and the peripheral device is a hard disk controller, a graphics display card, a network card or a sound card.

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