TWI762212B - Pixel driving device - Google Patents

Abstract

A pixel driving device includes a driving transistor, a first transistor, a second transistor, a first circuit, a second circuit, and a driving circuit. The first transistor and the second transistor are coupled to a first node. The first circuit is coupled to the first transistor. The second circuit is coupled to the second transistor. The first circuit and the second circuit are configured to receive the sweep signal, the first signal, and the second signal. The driving circuit is coupled to the driving transistor and the first node, and is configured to receive the first signal and the second signal. After the first circuit, the second circuit, and the driving circuit are reset and compensated, the first circuit and the second circuit turn on one of the first transistor and the second transistor in turn according to the sweep signal respectively. When the first transistor is turned off and the second transistor is turned on, the driving circuit controls the driving transistor to drive a light emitting device.

Description

pixel driver

This case involves an electronic device. In detail, this case relates to a pixel driving device.

Existing mini light-emitting diodes (mini light-emitting diodes, mini LEDs) require a large driving current. The power supply voltage that generates the driving current is prone to current errors, resulting in different voltages of each pixel, resulting in errors in the output current.

In addition, in the existing pixel driving circuit, when the micro light-emitting diode needs to output high brightness, the driving transistor needs to generate a large current. When a large current flows through the path between the two power supply voltages, the transistors on the path easily enter the linear region according to the large current, which makes it difficult to control the driving current.

Therefore, the above technology still has many defects, and other suitable circuit designs need to be developed by practitioners in the art.

One aspect of the present case relates to a pixel driving device. The pixel driving device includes a driving transistor, a first transistor, a second transistor, a first circuit, a second circuit and a driving circuit. The driving transistor is used to control the light-emitting element. The first transistor is coupled to the first node. The second transistor is coupled to the first node. The first circuit is coupled to the first transistor and used for receiving the scan signal and the first signal, so as to turn on the first transistor. The second circuit is coupled to the second transistor and used for receiving the scan signal, the first signal and the second signal, so as to turn on the second transistor. The driving circuit is coupled to the driving transistor and the first node and used for receiving the first signal and the second signal. The driving circuit, the first circuit and the second circuit reset the first node according to the first signal in the first stage. The first circuit, the second circuit and the driving circuit perform compensation according to the second signal in the second stage. The first circuit and the second circuit respectively turn on one of the first transistor and the second transistor in turn according to the scan signal in the third stage. When the first transistor is turned off and the second transistor is turned on, the driving circuit controls the driving transistor to drive the light-emitting element.

The following will clearly illustrate the spirit of this case with drawings and detailed descriptions. Anyone with ordinary knowledge in the technical field who understands the embodiments of this case can make changes and modifications with the techniques taught in this case, which does not deviate from the principles of this case. spirit and scope.

The language used herein is for the purpose of describing particular embodiments and is not intended to be limiting. The singular forms such as "a", "the", "the", "this" and "the", as used herein, also include the plural forms.

The terms "comprising", "including", "having", "containing", etc. used in this document are all open-ended terms, meaning including but not limited to. Regarding the terms (terms) used in this article, unless otherwise specified, they usually have the ordinary meaning of each term used in this field, in the content of this case and in the special content. Certain terms used to describe the present case are discussed below or elsewhere in this specification to provide those skilled in the art with additional guidance in the description of the present case.

FIG. 1 is a schematic circuit block diagram of a pixel driving device 100 according to some embodiments of the present application. In some embodiments, as shown in FIG. 1 , the pixel driving device 100 includes a driving transistor DT1 , a first transistor T1 , a second transistor T2 , a first circuit 110 , a second circuit 120 and a driving circuit 130 . In some embodiments, a display device (not shown) includes a plurality of pixels. Each pixel includes at least one pixel driving device 100 .

In some embodiments, please refer to FIG. 1, and take the top and right sides of the components in the figure as the first end, the light-emitting element L includes a first end and a second end, and the first end of the light-emitting element L receives Power supply voltage VDD. The driving transistor DT1 includes a first terminal, a second terminal and a control terminal. The first terminal of the driving transistor DT1 is coupled to the second terminal of the light-emitting element L. The second end of the driving transistor DT1 receives the power supply voltage VSS. The driving circuit 130 is coupled to the control terminal and the second terminal of the driving transistor DT1. The driving transistor DT1 is used to control the light-emitting element L.

In addition, the first transistor T1 includes a first terminal, a second terminal and a control terminal. The first end of the first transistor T1 is coupled to the first node N1. The second terminal of the first transistor T1 receives the voltage V _LED . The first circuit 110 is coupled to the control terminal of the first transistor T1. The second transistor T2 includes a first terminal, a second terminal and a control terminal. The first end of the second transistor T2 is coupled to the second end of the driving transistor DT1. The second end of the second transistor T2 is coupled to the first node N1. The second circuit 120 is coupled to the control terminal of the second transistor T2.

The first circuit 110 is used for receiving the first data voltage V _DATA1 , the power supply voltage VDD, the scanning signal V _SWEEP , the first signal S1[N] and the second signal S1[N+1], so as to turn on the first transistor T1. The second circuit 120 is used for receiving the second data voltage V _DATA2 , the scanning signal V _SWEEP , the reference voltage V _ref , the first signal S1[N] and the second signal S1[N+1]. The driving circuit 130 receives the reference voltage V _ref , the first signal S1[N] and the second signal S1[N+1] to turn on the second transistor T2 . In some embodiments, the first data voltage V _DATA1 , the second data voltage V _DATA2 , the reference voltage V _ref , the power supply voltage VDD/VSS and the voltage V _LED are all DC voltages. The first data voltage V _DATA1 is different from the second data voltage V _DATA2 . The first data voltage V _DATA1 and the second data voltage V _DATA2 are respectively supplied to the pixel driving device 100 by two sets of data lines.

In some embodiments, in order to make the operation of the pixel driving device 100 in FIG. 1 easier to understand, please refer to FIG. 2. FIG. 2 is a schematic diagram of the signal timing of the pixel driving device according to some embodiments of the present application. . The first circuit 110, the second circuit 120 and the driving circuit 130 reset the first node N1 according to the first signal S1[N] in the first stage I1. The first circuit 110, the second circuit 120 and the driving circuit 130 perform compensation according to the second signal S2[N+1] in the second stage I2. The first circuit 110 and the second circuit 120 respectively turn on one of the first transistor T1 and the second transistor T2 according to the scan signal V _SWEEP in the third stage I3 . When the first transistor T1 is turned off and the second transistor T2 is turned on, the driving circuit 130 controls the driving transistor DT1 to drive the light-emitting element L. In some embodiments, the light emitting element L comprises a micro light emitting diode (mini LED).

In some embodiments, please refer to FIG. 1, the first circuit 110 includes a first capacitor C1, a second node N2, a third transistor, a fourth transistor and a fifth transistor. The first capacitor C1 includes a first terminal and a second terminal. The first end of the first capacitor C1 is coupled to the second node N2. The second end of the first capacitor C1 receives the scan signal V _SWEEP . The control terminal of the first transistor T1 of the pixel driving device 100 is coupled to the second node N2 of the first circuit 110, and is turned on or off according to the voltage level of the second node N2.

In addition, please refer to FIG. 1 and FIG. 2 , the third transistor T3 includes a first terminal, a second terminal and a control terminal. The first terminal of the third transistor T3 receives the power supply voltage VDD, the second terminal of the third transistor T3 is coupled to the second node N2, and the control terminal of the third transistor T3 is used to receive the first phase I1 The signal S1[N], the third transistor T3 responds to the first signal S1[N] to reset the second node N2.

In addition, the fourth transistor T4 includes a first terminal, a second terminal and a control terminal, the second terminal of the fourth transistor T4 is coupled to the second node N2, and the control terminal of the fourth transistor receives the first terminal in the second stage I2. The second signal S1[N+1], the fourth transistor T4 responds to the second signal S1[N+1] to compensate the second node N2.

Furthermore, the fifth transistor T5 includes a first terminal, a second terminal and a control terminal. The first end of the fifth transistor T5 receives the first data voltage V _DATA1 , and the second end of the fifth transistor T5 is coupled to the first end of the fourth transistor T4 and the control end of the fifth transistor T5 . It should be noted that the fifth transistor T5 adopts a diode-like connection method to read the first data voltage V _DATA1 from the data line.

In some embodiments, please refer to FIG. 1, the second circuit 120 includes a second capacitor C2, a third node N3, a fourth node N4, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8 and The ninth transistor T9.

In addition, the second capacitor C2 includes a first terminal and a second terminal. The first end of the second capacitor C2 is coupled to the third node N3. The second end of the second capacitor C2 is coupled to the fourth node N4. The control terminal of the second transistor T2 of the pixel driving device 100 is coupled to the third node N3, and the second transistor T2 is turned on or off in response to the voltage level of the third node N3.

In addition, please refer to FIG. 1 and FIG. 2 , the sixth transistor T6 includes a first terminal, a second terminal and a control terminal. The first terminal of the sixth transistor T6 receives the second data voltage V _DATA2 . The second end of the sixth transistor T6 is coupled to the third node N3. The control terminal of the sixth transistor T6 receives the second signal S1[N+1] in the second stage I2, and the sixth transistor T6 responds to the second signal S1[N+1] to compensate the third node N3.

Furthermore, the seventh transistor T7 includes a first terminal, a second terminal and a control terminal. The first end of the seventh transistor T7 is coupled to the fourth node N4. The second end of the seventh transistor T7 receives the scan signal V _SWEEP . The control terminal of the seventh transistor T7 receives the second signal S1[N+1] in the third stage I3, and the seventh transistor T7 controls the voltage level of the fourth node N4 in response to the second signal S1[N+1].

In addition, the eighth transistor T8 includes a first terminal, a second terminal and a control terminal. The first end of the eighth transistor T8 is coupled to the fourth node N4. The control terminal of the eighth transistor T8 receives the second signal S1[N+1] in the second stage I2, and the eighth transistor T8 compensates the fourth node N4 in response to the second signal S1[N+1].

In addition, the ninth transistor T9 includes a first end, a second end and a control end. The first end of the ninth transistor T9 is coupled to the second end of the eighth transistor T8. The second terminal of the ninth transistor T9 receives the reference voltage V _ref . The control terminal of the ninth transistor T9 is turned on according to the first signal S1[N]. The seventh transistor T7 is of the same type as the ninth transistor T9. The transistor types of the seventh transistor T7 and the ninth transistor T9 are different from the transistor types of the eighth transistor T8.

In some embodiments, please refer to FIG. 1 and FIG. 2 , the driving circuit 130 includes a third capacitor C3 , a fifth node N5 , a tenth transistor T10 , an eleventh transistor T11 and a reset transistor RT1 . The third capacitor C3 includes a first terminal and a second terminal. The first end of the third capacitor C3 is coupled to the fifth node N5. The second end of the third capacitor C3 is coupled to the first node N1.

In addition, the tenth transistor T10 includes a first terminal, a second terminal and a control terminal. The first terminal of the tenth transistor T10 is coupled to the fifth node N5, the control terminal of the tenth transistor T10 receives the second signal S1[N+1] in the second stage I2, and the tenth transistor T10 responds to the second signal S1[N+1] to compensate the fifth node N5.

In addition, the eleventh transistor T11 includes a first end, a second end and a control end. The first end of the eleventh transistor T11 is coupled to the second end of the tenth transistor T10. The second terminal of the eleventh transistor T11 receives the reference voltage V _ref . The control terminal of the eleventh transistor T11 is coupled to the first terminal of the eleventh transistor T11. It should be noted that, the fifth transistor T5 adopts a diode-like connection method to read the reference voltage V _ref .

In addition, the reset transistor RT1 includes a first terminal, a second terminal and a control terminal. The first end of the reset transistor RT1 is coupled to the first node. The second terminal of the reset transistor RT1 is coupled to the first terminal of the second transistor T2 and receives the second power supply voltage VSS. The control terminal of the reset transistor RT1 receives the first signal S1[N] in the first stage I1, and the reset transistor RT1 resets the fifth node N5 in response to the first signal S1[N].

In some embodiments, the above-mentioned transistors T1, T2, T3, T4, T5, T6, T8, T10, T11, RT1 and DT1 are N-type Metal-Oxide-Semiconductor field effect transistors (N-type Metal-Oxide-Semiconductor Field Effect Transistors). Field-Effect Transistor, NMOS). The above-mentioned transistors T7 and T9 are P-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS).

FIG. 3 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application. In some embodiments, please refer to FIG. 2 and FIG. 3, in the first stage I1, the first signal S1[N] and the scanning signal V _SWEEP are at a high level, and the second signal S1[N+1] is At the low level, the first circuit 110, the second circuit 120 and the driving circuit 130 are reset according to the first signal S1[N], the scan signal V _SWEEP and the second signal S1[N+1].

In some embodiments, the first signal S1 [N] writes the power supply voltage VDD to the second node N2 through the third transistor T3 of the first circuit 110 . The control terminal of the first transistor T1 receives the voltage level of the second node N2, the first transistor T1 is turned on in response to the voltage level, and resets the first node N1 to the voltage V _LED . The second signal S1[N+1] writes the high level of the scan signal _VSWEEP to the fourth node N4 through the seventh transistor T7 of the second circuit 120 . The first signal S1[N] writes the power supply voltage VSS to the fifth node N5 through the reset transistor RT1 of the driving circuit 130 .

At this time, the voltage level of the first node N1 is the voltage V _LED . The voltage level of the second node N2 is the power supply voltage VDD. The fourth node N4 is the high level of the scan signal V _SWEEP . The fifth node N5 is the power supply voltage VSS.

FIG. 4 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application. In some embodiments, please refer to FIG. 2 and FIG. 4, in the second stage I2, the second signal S1[N+1] and the scan signal V _SWEEP are at a high level, and the first signal S1[N] is In the low level, the first circuit 110, the second circuit 120 and the driving circuit 130 perform compensation according to the first signal S1[N] and the second signal S1[N+1].

In some embodiments, the second signal S1[N+1] writes the first data voltage V _DATA1 to the second node N2 through the fourth transistor T4 of the first circuit 110 and adds the threshold of the fifth transistor T5 At the voltage Vth_T5, the control terminal of the first transistor T1 receives the voltage level of the second node N2, the first transistor T1 is turned on in response to the voltage level of the second node N2, and maintains the potential of the first node N1 at the voltage V _LED . The second signal S1[N+1] writes the second data voltage V _DATA2 through the sixth transistor T6 of the second circuit 120 . The second signal S1[N+1] writes the reference voltage _Vref to the fourth node N4 through the eighth transistor T8 of the second circuit 120, and adds the threshold voltage Vth_T9 of the ninth transistor T9. The second signal S1[N+1] writes the reference voltage _Vref to the fifth node N5 through the tenth transistor of the driving circuit 130 and adds the threshold voltage Vth_T11 of the eleventh transistor T11.

At this time, the voltage level of the first node N1 is maintained at the voltage V _LED . The voltage level of the second node N2 is (V _DATA1 +Vth_T5 ). The voltage level of the third node N3 is the second data voltage V _DATA2 . The voltage level of the fourth node N4 is (V _ref +Vth_T9 ). The voltage level of the fifth node N5 is (V _ref +Vth_T11 ).

FIG. 5 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application. In some embodiments, please refer to FIG. 2 and FIG. 5, in the first sub-stage I31 of the third stage I3, the first signal S1[N] and the second signal S1[N+1] are both low-level bit, the scanning signal VSWEEP in the figure corresponds to the scanning signal _VSWEEP in the first sub-stage _I31 which is linearly decreasing. The voltage level of the first terminal of the first capacitor C1 changes according to the scan signal V _SWEEP according to the second terminal of the first capacitor C1 . Therefore, the voltage level of the second node N2 is changed to (V _DATA1 +Vth_T5+V _SWEEP ), and the voltage level of the first node N1 is maintained at the voltage V _LED . The second signal S1[N+1] writes the scan signal V _SWEEP to the fourth node N4 through the seventh transistor T7 of the second circuit 120 . At this time, the first end of the second capacitor C2 (ie, the third node N3 ) Corresponding to the change of the second end of the second capacitor C2 (ie, the fourth node N4 ), the voltage level of the third node N3 is changed to (V _DATA2 +V _SWEEP - V _ref - Vth_T9 ).

At this time, the voltage level of the first node N1 is maintained at the voltage V _LED . The voltage level of the second node N2 is (V _DATA1 +Vth_T5+V _SWEEP ). The voltage level of the third node N3 is (V _DATA2 +V _SWEEP - V _ref - Vth_T9 ). The voltage level of the fourth node N4 is (V _SWEEP ). The voltage level of the fifth node N5 is maintained at (V _ref +Vth_T11 ).

FIG. 6 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application. In some embodiments, please refer to FIG. 2 and FIG. 6, in the second sub-stage I32 of the third stage I3, when the scan signal V _SWEEP drops to the time point P1, the second transistor T2 according to the first terminal and The voltage difference between the control terminals is turned on, and the first transistor T1 is turned off at this time. When the first transistor T1 is turned off and the second transistor T2 is turned on, the driving circuit 130 controls the driving transistor DT1 to drive the light-emitting element L. The waveform of the scan signal V _SWEEP includes a V-shaped waveform.

In some embodiments, the second transistor T2 is turned on according to the voltage difference between the first end of the second transistor T2 and the control end, and the voltage level of the first end of the second transistor T2 is the power supply voltage VSS, The control terminal of the second transistor T2 receives the voltage level of the third node N3 of the second circuit 120, and the second transistor T2 is turned on in response to the voltage level of the third node N3. Therefore, the formula of the voltage difference between the first terminal and the control terminal of the second transistor T2 is as follows: VSS-V _DATA2 -V _SWEEP +V _ref +Vth_T9>|Vth_T2|...Formula 1

In the above formula 1, Vth_T2 is the threshold voltage of the second transistor T2. Here, the ninth transistor T9 and the second transistor T2 are matched transistors, therefore, the threshold voltage of the ninth transistor T9 and the threshold voltage of the second transistor T2 can cancel each other, and formula 1 is rewritten as follows: VSS-V _DATA2 -V _SWEEP +V _ref >0...Formula 2

Equation 2 is the conduction conditional expression of the second transistor T2. When the second transistor T2 is turned on, the voltage level of the first node N1 is compensated to the power supply voltage VSS, and the first end of the third capacitor C3 (ie the fifth node N5 ) corresponds to the second end of the third capacitor C3 (ie The first node N1) changes, and at this time, the voltage level of the fifth node N5 is raised to (V _ref +Vth_T11+VSS-V _LED ).

In addition, the driving transistor DT1 outputs the driving current Id according to the voltage difference between the control terminal and the second terminal of the driving transistor DT1. The voltage difference between the control terminal and the second terminal of the driving transistor DT1 is equal to that between the first terminal of the third capacitor C3 (ie the fifth node N5 ) and the second terminal of the third capacitor C3 (ie the first node N1 ) difference value. The formula of the above driving current Id is as follows:

In Equation 3, Id is the driving current, VGS is the voltage difference between the control terminal and the second terminal of the driving transistor DT1 , and Vth is the threshold voltage. In the second sub-stage I32 of the third stage I3, the potential of the control terminal of the driving transistor DT1 is (V _ref +Vth_T11+VSS-V _LED ), and the second terminal of the driving transistor DT1 is VSS, which will drive the power Substitute the potentials of the control terminal and the second terminal of the crystal DM1 into Equation 3, we can get:

In the above formula 4, Vth_DT1 is the threshold voltage of the driving transistor DT1. Here, the eleventh transistor T11 and the driving transistor DT1 are matched transistors. Therefore, the threshold voltage of the eleventh transistor T11 and the threshold voltage of the driving transistor DT1 can cancel each other out. Equation 4 can be rewritten as follows:

FIG. 7 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application. In some embodiments, please refer to FIG. 2 and FIG. 7, in the third sub-stage I33 of the third stage I3, when the scan signal V _SWEEP drops from the time point P1 to the lowest point along the V-shaped waveform, and the scan signal When V _SWEEP gradually rises to the time point P2 along the V-shaped waveform, the second transistor T2 is turned on or off according to the voltage level of the third node N3 of the second circuit 120 . At this time, the scanning signal V _SWEEP in the drawing corresponds to the scanning signal V _SWEEP which is linearly raised in the second sub-stage I32 to the third sub-stage I33 . The first end (ie the third node N3 ) and the second end (ie the fourth node N4 ) of the second capacitor C2 vary according to the scan signal V _SWEEP .

When the scan signal V _SWEEP rises to the time point P2, the voltage difference between the first terminal and the control terminal of the second transistor T2 cannot satisfy the turn-on condition of Equation 2, so the second transistor T2 is turned off. Meanwhile, the first capacitor C1 of the first circuit 110 changes according to the scan signal V _SWEEP . The first transistor T1 is turned on or off according to the voltage difference between the control terminal and the second terminal of the first transistor T1. The voltage level of the control terminal of the first transistor T1 is equal to the voltage level of the first terminal (ie, the second node N2 ) of the first capacitor C1 of the first circuit 110 . Therefore, the voltage level of the control terminal of the first transistor T1 is (V _DATA1 +Vth_T5+V _SWEEP ), and the voltage level of the second terminal of the first transistor T1 is V _LED . Therefore, the formula of the voltage difference between the control terminal and the second terminal of the first transistor T1 is as follows: V _DATA1 +Vth_T5+V _SWEEP -VLED>|Vth_T1|...Formula 6

In Equation 6, Vth_T1 is the threshold voltage of the first transistor T1. Here, the fifth transistor T5 and the first transistor T1 are matched transistors, therefore, the threshold voltage of the fifth transistor T5 and the threshold voltage of the first transistor T1 can cancel each other, and formula 6 is rewritten as follows: V _DATA1 − V _SWEEP +V _LED >0...Formula 7

Equation 7 is the conduction conditional expression of the first transistor T1. When the first transistor When the body T1 is turned on, the second transistor T2 is turned off at the same time, thereby causing the driving transistor DT1 to be turned off.

In some embodiments, please refer to FIG. 2 and FIG. 5 to FIG. 7 , the mode of driving the light-emitting element L according to the scan signal V _SWEEP in the third stage I3 of the pixel driving device 100 is pulse width modulation. It should be noted that, in the third stage I3, although the time points P1 and P2 of the scan signal _VSWEEP are drawn as the midpoints of the falling waveform and the rising waveform of the scanning signal _VSWEEP , they are not limited to the illustrated embodiment.

In the above-mentioned embodiment, two sets of data lines are used to control the on and off of the driving device respectively to determine the displayed gray level.

In the above embodiment, the driving transistor and the power supply voltage VSS are compensated to increase the uniformity of the driving current Id and improve the problem of voltage rise caused by the power supply voltage VSS passing through the circuit.

In the above embodiment, the pixel driving device 100 uses three sets of matching transistors, so that there is only one driving transistor DT1 on the path of the driving current Id, which reduces the voltage drop caused by the plurality of transistors and reduces the power supply voltage VDD Voltage difference between /VSS.

According to the foregoing embodiments, the present invention provides a pixel driving device, which can precisely control the light-emitting elements and reduce the voltage difference between the power supply voltages VDD/VSS by the circuit structure of the present embodiment, thereby reducing power consumption.

Although this case is disclosed above with detailed embodiments, this case does not exclude other possible implementations. Therefore, the scope of protection in this case should be determined by the scope of the appended patent application, rather than by the aforementioned embodiments. limit.

For those skilled in the art, various changes and modifications can be made to this case without departing from the spirit and scope of this case. Based on the foregoing embodiments, all changes and modifications made to this case are also covered by the protection scope of this case.

100: pixel driver

110: First Circuit

120: Second Circuit

130: Drive circuit

T1~T11: Transistor

RT1: Reset transistor

DT1: drive transistor

L: light-emitting element

C1~C3: Capacitor

N1~N5: Node

S1[N], S1[N+1]: Signal

VDD, VSS: Power supply voltage

VLED: Voltage

Vref: reference voltage

VDATA1, VDATA2: data voltage

I1,I2,I3: Stages

I31~I33: sub-stage

P1, P2: time points

Id: drive current

The content of this case can be better understood with reference to the embodiments in the following paragraphs and the following drawings: FIG. 1 is a schematic circuit block diagram of a pixel driving device according to some embodiments of the present application; FIG. 2 is a schematic diagram of signal timing of a pixel driving device according to some embodiments of the present application; FIG. 3 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application; FIG. 4 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application; FIG. 5 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application; FIG. 6 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application; and FIG. 7 is a schematic diagram of a circuit state of a pixel driving device according to some embodiments of the present application.

Domestic storage information (please note in the order of storage institution, date and number) none Foreign deposit information (please note in the order of deposit country, institution, date and number) none

100: pixel driver

110: First Circuit

120: Second Circuit

130: Drive circuit

T1~T11: Transistor

RT1: Reset transistor

DT1: drive transistor

L: light-emitting element

C1~C3: Capacitor

N1~N5: Node

S1[N], S1[N+1]: Signal

VDD, VSS: Power supply voltage

V _LED : Voltage

V _ref : reference voltage

V _DATA1 , V _DATA2 : data voltage

Claims (10)

A pixel driving device, comprising: a driving transistor for controlling a light-emitting element; a first transistor coupled to a first node; a second transistor coupled to the first node; a first circuit, coupled to the first transistor, and used for receiving a scan signal, a first signal and a second signal, so as to turn on the first transistor; a second circuit, coupled to the second transistor, for receiving the scan signal, the first signal and the second signal, so as to turn on the second transistor; and a driving circuit, coupled to the driving transistor and the first node, and used for receiving the first signal and the second signal; wherein the driving circuit, the first circuit and the second circuit reset the first node according to the first signal in a first stage, wherein the first circuit, the second circuit and the driving circuit are in a second stage Compensation is performed according to the second signal, wherein the first circuit and the second circuit respectively turn on one of the first transistor and the second transistor in turn according to the scan signal in a third stage, wherein when the first When the transistor is turned off and the second transistor is turned on, the driving circuit controls the driving transistor to drive the light-emitting element. The pixel driving device of claim 1, wherein the first circuit includes a first capacitor and a second node, wherein the first capacitor includes a first terminal and a second terminal, and the first capacitor has the The first end is coupled to the second node, the second end of the first capacitor receives the scan signal, wherein a control end of the first transistor is coupled to the second node, and according to the second node A first voltage level is turned on or off. The pixel driving device of claim 2, wherein the first circuit comprises: a third transistor, wherein the third transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the third transistor receives a first power supply voltage, the third transistor The second terminal is coupled to the second node, wherein the control terminal of the third transistor is used for receiving the first signal in the first stage, and the third transistor is reset in response to the first signal the second node; a fourth transistor, wherein the fourth transistor includes a first terminal, a second terminal and a control terminal, the second terminal of the fourth transistor is coupled to the second node, the fourth transistor the control terminal receives the second signal in the second stage, the fourth transistor responds to the second signal to compensate the second node; and a fifth transistor, wherein the fifth transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the fifth transistor receives a first data voltage, and the fifth transistor The second terminal is coupled to the first terminal of the fourth transistor and the control terminal of the fifth transistor. The pixel driving device of claim 3, wherein the second circuit comprises a second capacitor, a third node and a fourth node, wherein the second capacitor comprises a first terminal and a second terminal, the The first end of the second capacitor is coupled to the third node, the second end of the second capacitor is coupled to the fourth node, and a control end of the second transistor is coupled to the third node, The second transistor is turned on or off in response to a second voltage level of the third node. The pixel driving device of claim 4, wherein the second circuit comprises: a sixth transistor, wherein the sixth transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the sixth transistor receives a second data voltage, and the sixth transistor The second terminal is coupled to the third node, the control terminal of the sixth transistor receives the second signal in the second stage, and the sixth transistor responds to the second signal to compensate the third node ; a seventh transistor, wherein the seventh transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the seventh transistor is coupled to the fourth node, the seventh transistor The second terminal of the seventh transistor receives the scan signal, the control terminal of the seventh transistor receives the second signal in the third stage, and the seventh transistor responds to the second signal to control a third of the fourth node voltage level; an eighth transistor, wherein the eighth transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the eighth transistor is coupled to the fourth node, the eighth transistor the control terminal receives the second signal in the second stage, the eighth transistor responds to the second signal to compensate the fourth node; and a ninth transistor, wherein the ninth transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the ninth transistor is coupled to the second terminal of the eighth transistor, The second terminal of the ninth transistor receives a reference voltage, the control terminal of the ninth transistor receives the first signal, and the ninth transistor is turned on in response to the first signal. The pixel driving device of claim 5, wherein the seventh transistor and the ninth transistor are of the same type, and the seventh transistor and the ninth transistor are of the same type as the eighth transistor The types of transistors are different. The pixel driving device of claim 6, wherein the driving circuit includes a third capacitor and a fifth node, wherein the third capacitor includes a first terminal and a second terminal, wherein the third capacitor has the The first terminal is coupled to the fifth node, and the second terminal of the third capacitor is coupled to the first node. The pixel driving device as claimed in claim 7, wherein the driving circuit comprises: A tenth transistor, wherein the tenth transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the tenth transistor is coupled to the fifth node, and the tenth transistor the control terminal receives the second signal in the second stage, and the tenth transistor responds to the second signal to compensate the fifth node; An eleventh transistor, wherein the eleventh transistor includes a first terminal, a second terminal and a control terminal, and the first terminal of the eleventh transistor is coupled to the tenth transistor a second terminal, the second terminal of the eleventh transistor receives the reference voltage, the control terminal of the eleventh transistor is coupled to the first terminal of the eleventh transistor; and a reset transistor, wherein the reset transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the reset transistor is coupled to the first node, the reset transistor The second terminal is coupled to a first terminal of the second transistor and receives a second power supply voltage. The control terminal of the reset transistor receives the first signal in the first stage, and the reset transistor receives the first signal. The crystal resets the fifth node in response to the first signal. The pixel driving device of claim 8, wherein the first circuit is used for receiving the first data voltage, the second circuit is used for receiving the second data voltage, the first data voltage and the second data voltage Not the same. The pixel driving device of claim 1, wherein the waveform of the scan signal comprises a V-shaped waveform.

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