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TWI742967B - Pixel driving circuit - Google Patents

Pixel driving circuit Download PDF

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TWI742967B
TWI742967B TW109145074A TW109145074A TWI742967B TW I742967 B TWI742967 B TW I742967B TW 109145074 A TW109145074 A TW 109145074A TW 109145074 A TW109145074 A TW 109145074A TW I742967 B TWI742967 B TW I742967B
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switch
terminal
control
control signal
period
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TW109145074A
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TW202147284A (en
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林志隆
廖威勝
李家倫
蔡佳凌
吳佳恩
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友達光電股份有限公司
國立成功大學
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Publication of TW202147284A publication Critical patent/TW202147284A/en

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40Control techniques providing energy savings, e.g. smart controller or presence detection

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Abstract

A pixel driving circuit includes a light emitting unit, thirteen switches and two capacitors. A driving circuit of the light emitting unit passes only one of the switches to reduce power consumption. In addition, threshold voltages and operation voltages are compensated in the pixel driving circuit so that the light emitting unit can provide consistent brightness.

Description

畫素驅動電路Pixel drive circuit

本揭露是有關於發光二極體的畫素驅動電路。This disclosure relates to a pixel driving circuit for light-emitting diodes.

目前發光二極體已經廣泛地應用於各類型的顯示器當中。發光二極體發光時的亮度與其驅動電流的大小有關,而其驅動電流的大小係由驅動電晶體來控制。然而,因為製程的變異會造成顯示器中的每個畫素的驅動電晶體的臨界電壓(threshold voltage,Vth)不盡相同,如此一來將會使得不同畫素之中的發光二極體具有不同的驅動電流而使每個發光二極體的亮度不一,進而造成顯示器在顯示畫面的時候會有亮度不均勻的問題。此外,驅動電流示由操作電壓所提供,而操作電壓容易因為傳遞路徑中的線阻產生壓降,使得每個畫素的操作電壓不同,使驅動電流產生誤差。At present, light-emitting diodes have been widely used in various types of displays. The brightness of the light-emitting diode when it emits light is related to the size of its driving current, and the size of its driving current is controlled by the driving transistor. However, because of the variation of the manufacturing process, the threshold voltage (Vth) of the driving transistor of each pixel in the display will be different, which will cause the light-emitting diodes in different pixels to have different values. The driving current makes the brightness of each light-emitting diode different, which in turn causes the problem of uneven brightness when the display displays a picture. In addition, the driving current is provided by the operating voltage, and the operating voltage is prone to a voltage drop due to the line resistance in the transmission path, which makes the operating voltage of each pixel different, which causes errors in the drive current.

因此,如何針對顯示器畫素之驅動電晶體的臨界電壓做補償,並也對操作電壓做補償,是本領域的技術人員所致力研究的目標。Therefore, how to compensate for the threshold voltage of the driving transistor of the display pixel and also compensate for the operating voltage is the goal of the research by those skilled in the art.

本揭露的實施例提出一種畫素驅動電路,包括以下元件。發光單元具有第一端及第二端,發光單元的第一端連接至第一操作電壓。第一開關具有控制端、第一端及第二端,第一開關的第一端連接至發光單元的第二端,第一開關的第二端連接至第二操作電壓。第二開關具有控制端、第一端及第二端,第二開關的第一端連接至第二操作電壓,第二開關的第二端連接至第一開關的控制端,第二開關的控制端連接至第一控制訊號。第三開關具有控制端、第一端及第二端,第三開關的第一端連接至第二操作電壓,第三開關的控制端連接至第一控制訊號。第四開關具有控制端、第一端及第二端,第四開關的第一端連接至第一開關的控制端與第二開關的第二端,第四開關的控制端連接至第三開關的第二端。第五開關具有控制端、第一端及第二端,第五開關的第一端連接至第一電壓,第五開關的第二端連接至第三開關的第二端與第四開關的控制端。第六開關具有控制端、第一端及第二端,第六開關的第一端連接至第五開關的控制端,第六開關的第二端連接至第二控制訊號,第六開關的控制端連接至第三控制訊號。第七開關具有控制端、第一端及第二端,第七開關的第二端連接至第五開關的控制端與第六開關的第一端,第七開關的控制端連接至第四控制訊號。第八開關具有控制端、第一端及第二端,第八開關的第一端連接至一資料電壓,第八開關的第二端連接至第八開關的控制端與第七開關的第一端。第一電容具有第一端及第二端,第一電容的第一端連接至第五開關的控制端、第六開關的第一端與第七開關的第二端,第一電容的第二端連接至第三控制訊號。第九開關具有控制端、第一端及第二端,第九開關的第一端連接至第一開關的第二端與第二操作電壓,第九開關的控制端連接至第一控制訊號。第十開關具有控制端、第一端及第二端,第十開關的第一端連接至第九開關的第二端,第十開關的第二端連接至一二極體電壓,第十開關的控制端連接至第一控制訊號。第二電容具有第一端及第二端,第二電容的第一端連接至第四開關的第二端,第二電容的第二端連接至第九開關的第二端與第十開關的第一端。第十一開關具有控制端、第一端及第二端,第十一開關的第一端連接至第四開關的第二端及第二電容的第一端,第十一開關的第二端連接至第一操作電壓,第十一開關的控制端連接至第三控制訊號。第十二開關,具有控制端、第一端及第二端,第十二開關的第一端連接至第四開關的第二端、第二電容的第一端及第十一開關的第一端,第十二開關的控制端連接至第四控制訊號。第十三開關具有控制端、第一端及第二端,第十三開關的第一端連接至第十二開關的第二端與第十三開關的控制端,第十三開關的第二端連接至一參考電壓。The embodiment of the disclosure provides a pixel driving circuit, which includes the following components. The light emitting unit has a first end and a second end, and the first end of the light emitting unit is connected to the first operating voltage. The first switch has a control terminal, a first terminal and a second terminal. The first terminal of the first switch is connected to the second terminal of the light-emitting unit, and the second terminal of the first switch is connected to the second operating voltage. The second switch has a control terminal, a first terminal and a second terminal. The first terminal of the second switch is connected to the second operating voltage, the second terminal of the second switch is connected to the control terminal of the first switch, and the control of the second switch is The terminal is connected to the first control signal. The third switch has a control terminal, a first terminal and a second terminal. The first terminal of the third switch is connected to the second operating voltage, and the control terminal of the third switch is connected to the first control signal. The fourth switch has a control terminal, a first terminal, and a second terminal. The first terminal of the fourth switch is connected to the control terminal of the first switch and the second terminal of the second switch, and the control terminal of the fourth switch is connected to the third switch The second end. The fifth switch has a control terminal, a first terminal and a second terminal. The first terminal of the fifth switch is connected to the first voltage, and the second terminal of the fifth switch is connected to the second terminal of the third switch and the control of the fourth switch end. The sixth switch has a control terminal, a first terminal, and a second terminal. The first terminal of the sixth switch is connected to the control terminal of the fifth switch, and the second terminal of the sixth switch is connected to the second control signal. The control of the sixth switch The terminal is connected to the third control signal. The seventh switch has a control terminal, a first terminal, and a second terminal. The second terminal of the seventh switch is connected to the control terminal of the fifth switch and the first terminal of the sixth switch. The control terminal of the seventh switch is connected to the fourth control. Signal. The eighth switch has a control terminal, a first terminal, and a second terminal. The first terminal of the eighth switch is connected to a data voltage, and the second terminal of the eighth switch is connected to the control terminal of the eighth switch and the first terminal of the seventh switch. end. The first capacitor has a first terminal and a second terminal. The first terminal of the first capacitor is connected to the control terminal of the fifth switch, the first terminal of the sixth switch, and the second terminal of the seventh switch. The second terminal of the first capacitor The terminal is connected to the third control signal. The ninth switch has a control terminal, a first terminal, and a second terminal. The first terminal of the ninth switch is connected to the second terminal of the first switch and the second operating voltage, and the control terminal of the ninth switch is connected to the first control signal. The tenth switch has a control terminal, a first terminal, and a second terminal. The first terminal of the tenth switch is connected to the second terminal of the ninth switch, and the second terminal of the tenth switch is connected to a diode voltage. The control terminal of is connected to the first control signal. The second capacitor has a first terminal and a second terminal. The first terminal of the second capacitor is connected to the second terminal of the fourth switch, and the second terminal of the second capacitor is connected to the second terminal of the ninth switch and the second terminal of the tenth switch. The first end. The eleventh switch has a control terminal, a first terminal and a second terminal. The first terminal of the eleventh switch is connected to the second terminal of the fourth switch and the first terminal of the second capacitor. The second terminal of the eleventh switch Connected to the first operating voltage, the control terminal of the eleventh switch is connected to the third control signal. The twelfth switch has a control end, a first end, and a second end. The first end of the twelfth switch is connected to the second end of the fourth switch, the first end of the second capacitor, and the first end of the eleventh switch. The control terminal of the twelfth switch is connected to the fourth control signal. The thirteenth switch has a control end, a first end and a second end. The first end of the thirteenth switch is connected to the second end of the twelfth switch and the control end of the thirteenth switch. The second end of the thirteenth switch is The terminal is connected to a reference voltage.

在一些實施例中,畫素驅動電路依序操作於第一期間、第二期間、第三期間及第四期間。在第一期間內,第一開關、第四開關、第五開關、第七開關、第九開關及第十二開關處於截止狀態,第二開關、第三開關、第六開關、第十開關及第十一開關處於導通狀態。在第二期間內,第一開關、第四開關、第五開關、第六開關、第九開關及第十一開關處於截止狀態,第二開關、第三開關、第七開關、第八開關、第十開關、第十二開關及第十三開關處於導通狀態。在第三期間的第一子期間內,第一開關至第七開關、第十開關、第十一開關及第十二開關處於截止狀態,第九開關處於導通狀態。在第三期間的第二子期間內,第二開關、第三開關、第六開關、第七開關及第十開關至第十二開關處於截止狀態,第一開關、第四開關、第五開關及第九開關處於導通狀態。在第四期間內,第一開關、第四開關至第七開關、第九開關、第十一開關及第十二開關處於截止狀態,第二開關、第三開關及第十開關處於導通狀態。In some embodiments, the pixel driving circuit sequentially operates in the first period, the second period, the third period, and the fourth period. During the first period, the first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch, and the twelfth switch are in the off state, and the second switch, the third switch, the sixth switch, the tenth switch, and the The eleventh switch is in the on state. In the second period, the first switch, the fourth switch, the fifth switch, the sixth switch, the ninth switch, and the eleventh switch are in the off state, and the second switch, the third switch, the seventh switch, the eighth switch, The tenth switch, the twelfth switch and the thirteenth switch are in a conducting state. In the first sub-period of the third period, the first switch to the seventh switch, the tenth switch, the eleventh switch, and the twelfth switch are in the off state, and the ninth switch is in the on state. In the second sub-period of the third period, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth to twelfth switches are in the off state, and the first switch, the fourth switch, and the fifth switch And the ninth switch is in the conducting state. In the fourth period, the first switch, the fourth switch to the seventh switch, the ninth switch, the eleventh switch and the twelfth switch are in the off state, and the second switch, the third switch and the tenth switch are in the on state.

在一些實施例中,第一開關至第四開關、第六開關、第七開關、第十開關、第十一開關、第十二開關及第十三開關為N型電晶體,第五開關、第八開關及第九開關為P型電晶體。In some embodiments, the first to fourth switches, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch, and the thirteenth switch are N-type transistors, and the fifth switch, The eighth switch and the ninth switch are P-type transistors.

在一些實施例中,第一開關的臨界電壓匹配至第十三開關的臨界電壓,第五開關的臨界電壓匹配至第八開關的臨界電壓。In some embodiments, the threshold voltage of the first switch matches the threshold voltage of the thirteenth switch, and the threshold voltage of the fifth switch matches the threshold voltage of the eighth switch.

在一些實施例中,在第一期間內,第一控制訊號及第三控制訊號為第一高準位,第二控制訊號為第二高準位,第四控制訊號為第一低準位。在第二期間內,第一控制訊號及第四控制訊號為第一高準位,第二控制訊號為第二高準位,第三控制訊號為第一低準位。在第三期間內,第一控制訊號、第三控制訊號及第四控制訊號為第一低準位,第二控制訊號由第二高準位逐漸地降低至第二低準位。在第四期間內,第一控制訊號為第一高準位,第二控制訊號為第二高準位,第三控制訊號及第四控制訊號為第一低準位。In some embodiments, during the first period, the first control signal and the third control signal are at the first high level, the second control signal is at the second high level, and the fourth control signal is at the first low level. In the second period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the second high level, and the third control signal is at the first low level. During the third period, the first control signal, the third control signal, and the fourth control signal are at the first low level, and the second control signal is gradually reduced from the second high level to the second low level. In the fourth period, the first control signal is the first high level, the second control signal is the second high level, and the third control signal and the fourth control signal are the first low level.

在一些實施例中,第一操作電壓大於第二操作電壓,並且第一操作電壓大於等於第一電壓。In some embodiments, the first operating voltage is greater than the second operating voltage, and the first operating voltage is greater than or equal to the first voltage.

在一些實施例中,上述的發光單元為發光二極體。In some embodiments, the above-mentioned light-emitting unit is a light-emitting diode.

在一些實施例中,上述發光二極體的尺寸為次毫米。In some embodiments, the size of the above-mentioned light-emitting diode is sub-millimeter.

在一些實施例中,上述的畫素驅動電路設置於顯示面板內。In some embodiments, the above-mentioned pixel driving circuit is disposed in the display panel.

在一些實施例中,上述的畫素驅動電路設置於背光模組內。In some embodiments, the above-mentioned pixel driving circuit is disposed in the backlight module.

在上述的畫素驅動電路中,可以補償臨界電壓與操作電壓,並且具有節省功率消耗的功效。In the above-mentioned pixel driving circuit, the threshold voltage and the operating voltage can be compensated, and it has the effect of saving power consumption.

關於本文中所使用之「第一」、「第二」等,並非特別指次序或順位的意思,其僅為了區別以相同技術用語描述的元件或操作。Regarding the “first”, “second”, etc. used in this text, it does not particularly mean the order or sequence, but only to distinguish elements or operations described in the same technical terms.

圖1是根據一實施例繪示畫素驅動電路的電路架構圖。畫素驅動電路100可以設置在顯示裝置的背光模組上以提供背光源,或者設置在顯示面板中做為一像素,本揭露並不在此限。畫素驅動電路100包括了發光單元110、開關T1~T13、第一電容C1與第二電容C2。發光單元110例如為發光二極體,此發光二極體的尺寸可以是次毫米等級或其他合適的大小,本揭露並不在此限。FIG. 1 is a circuit structure diagram of a pixel driving circuit according to an embodiment. The pixel driving circuit 100 can be arranged on a backlight module of a display device to provide a backlight, or arranged as a pixel in a display panel, and the present disclosure is not limited thereto. The pixel driving circuit 100 includes a light emitting unit 110, switches T1 to T13, a first capacitor C1 and a second capacitor C2. The light-emitting unit 110 is, for example, a light-emitting diode, and the size of the light-emitting diode may be sub-millimeter level or other suitable sizes, and the present disclosure is not limited thereto.

發光單元110具有第一端110-1及第二端110-2,發光單元110的第一端110-1連接至操作電壓VDD。開關T1具有控制端T1-3、第一端T1-1及第二端T1-2,開關T1的第一端T1-1連接至發光單元110的第二端110-2,開關T1的第二端T1-2連接至操作電壓VSS。在此實施例中,操作電壓VSS低於操作電壓VDD。開關T2具有控制端T2-3、第一端T2-1及第二端T2-2,開關T2的第一端T2-1連接至操作電壓VSS,開關T2的第二端T2-2連接至開關T1的控制端T1-3,開關T2的控制端T2-3連接至控制訊號EM。開關T3具有控制端T3-3、第一端T3-1及第二端T3-2,開關T3的第一端T3-1連接至操作電壓VSS,開關T3的控制端T3-3連接至控制訊號EM。開關T4具有控制端T4-3、第一端T4-1及第二端T4-2,開關T4的第一端T4-1連接至開關T1的控制端T1-3與開關T2的第二端T2-2,開關T4的控制端T4-3連接至開關T3的第二端T3-2。開關T5具有控制端T5-3、第一端T5-1及第二端T5-2,開關T5的第一端T5-1連接至電壓VH,開關T5的第二端T5-2連接至開關T3的第二端T3-2與開關T4的控制端T4-3。開關T6具有控制端T6-3、第一端T6-1及第二端T6-2,開關T6的第一端T6-1連接至開關T5的控制端T5-3,開關T6的第二端T6-2連接至控制訊號V sweep,開關T6的控制端T6-3連接至控制訊號S1。開關T7具有控制端T7-3、第一端T7-1及第二端T7-2,開關T7的第二端T7-2連接至開關T5的控制端T5-3與開關T6的第一端T6-1,開關T7的控制端T7-3連接至控制訊號S2。開關T8具有控制端T8-3、第一端T8-1及第二端T8-2,開關T8的第一端T8-1連接至資料電壓V DATA,開關T8的第二端T8-2連接至開關T8的控制端T8-3與開關T7的第一端T7-1。第一電容C1具有第一端C1-1及第二端C1-2,第一電容C1的第一端C1-1連接至開關T5的控制端T5-3、開關T6的第一端T6-1與開關T7的第二端T7-2,第一電容C1的第二端C1-2連接至控制訊號V sweepThe light-emitting unit 110 has a first terminal 110-1 and a second terminal 110-2, and the first terminal 110-1 of the light-emitting unit 110 is connected to the operating voltage VDD. The switch T1 has a control terminal T1-3, a first terminal T1-1, and a second terminal T1-2. The first terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light-emitting unit 110, and the second terminal 110-2 of the switch T1 The terminal T1-2 is connected to the operating voltage VSS. In this embodiment, the operating voltage VSS is lower than the operating voltage VDD. The switch T2 has a control terminal T2-3, a first terminal T2-1, and a second terminal T2-2. The first terminal T2-1 of the switch T2 is connected to the operating voltage VSS, and the second terminal T2-2 of the switch T2 is connected to the switch The control terminal T1-3 of T1 and the control terminal T2-3 of the switch T2 are connected to the control signal EM. The switch T3 has a control terminal T3-3, a first terminal T3-1, and a second terminal T3-2. The first terminal T3-1 of the switch T3 is connected to the operating voltage VSS, and the control terminal T3-3 of the switch T3 is connected to the control signal EM. The switch T4 has a control terminal T4-3, a first terminal T4-1, and a second terminal T4-2. The first terminal T4-1 of the switch T4 is connected to the control terminal T1-3 of the switch T1 and the second terminal T2 of the switch T2. -2, the control terminal T4-3 of the switch T4 is connected to the second terminal T3-2 of the switch T3. The switch T5 has a control terminal T5-3, a first terminal T5-1 and a second terminal T5-2. The first terminal T5-1 of the switch T5 is connected to the voltage VH, and the second terminal T5-2 of the switch T5 is connected to the switch T3 The second terminal T3-2 of the switch T4 and the control terminal T4-3 of the switch T4. The switch T6 has a control terminal T6-3, a first terminal T6-1, and a second terminal T6-2. The first terminal T6-1 of the switch T6 is connected to the control terminal T5-3 of the switch T5, and the second terminal T6 of the switch T6 -2 is connected to the control signal V sweep , and the control terminal T6-3 of the switch T6 is connected to the control signal S1. The switch T7 has a control terminal T7-3, a first terminal T7-1 and a second terminal T7-2. The second terminal T7-2 of the switch T7 is connected to the control terminal T5-3 of the switch T5 and the first terminal T6 of the switch T6. -1, the control terminal T7-3 of the switch T7 is connected to the control signal S2. The switch T8 has a control terminal T8-3, a first terminal T8-1, and a second terminal T8-2. The first terminal T8-1 of the switch T8 is connected to the data voltage V DATA , and the second terminal T8-2 of the switch T8 is connected to The control terminal T8-3 of the switch T8 and the first terminal T7-1 of the switch T7. The first capacitor C1 has a first terminal C1-1 and a second terminal C1-2. The first terminal C1-1 of the first capacitor C1 is connected to the control terminal T5-3 of the switch T5 and the first terminal T6-1 of the switch T6. The second terminal T7-2 of the switch T7 and the second terminal C1-2 of the first capacitor C1 are connected to the control signal V sweep .

開關T9具有控制端T9-3、第一端T9-1及第二端T9-2,開關T9的第一端T9-1連接至開關T1的第二端T1-2與操作電壓VSS,開關T9的控制端T9-3連接至控制訊號EM。開關T10具有控制端T10-3、第一端T10-1及第二端T10-2,開關T10的第一端T10-1連接至開關T9的第二端T9-2,開關T10的第二端T10-2連接至二極體電壓V LED,開關T10的控制端T10-3連接至控制訊號EM。第二電容C2具有第一端C2-1及第二端C2-2,第二電容C2的第一端C2-1連接至開關T4的第二端T4-2,第二電容C2的第二端C2-2連接至開關T9的第二端T9-2與開關T10的第一端T10-1。開關T11具有控制端T11-3、第一端T11-1及第二端T11-2,開關T11的第一端T11-1連接至開關T4的第二端T4-2及第二電容C2的第一端C2-1,開關T11的第二端T11-2連接至操作電壓VDD,開關T11的控制端T11-3連接至控制訊號S1。開關T12具有控制端T12-3、第一端T12-1及第二端T12-2,開關T12的第一端T12-1連接至開關T4的第二端T4-2、第二電容C2的第一端C2-1及開關T11的第一端T11-1,開關T12的控制端T12-3連接至控制訊號S2。開關T13具有控制端T13-3、第一端T13-1及第二端T13-2,開關T13的第一端T13-1連接至開關T12的第二端T12-2與開關T13的控制端T13-3,開關T13的第二端T13-2連接至參考電壓Vref。 The switch T9 has a control terminal T9-3, a first terminal T9-1, and a second terminal T9-2. The first terminal T9-1 of the switch T9 is connected to the second terminal T1-2 of the switch T1 and the operating voltage VSS. The switch T9 The control terminal T9-3 is connected to the control signal EM. The switch T10 has a control terminal T10-3, a first terminal T10-1, and a second terminal T10-2. The first terminal T10-1 of the switch T10 is connected to the second terminal T9-2 of the switch T9, and the second terminal of the switch T10 T10-2 is connected to the diode voltage V LED , and the control terminal T10-3 of the switch T10 is connected to the control signal EM. The second capacitor C2 has a first terminal C2-1 and a second terminal C2-2. The first terminal C2-1 of the second capacitor C2 is connected to the second terminal T4-2 of the switch T4, and the second terminal of the second capacitor C2 C2-2 is connected to the second terminal T9-2 of the switch T9 and the first terminal T10-1 of the switch T10. The switch T11 has a control terminal T11-3, a first terminal T11-1, and a second terminal T11-2. The first terminal T11-1 of the switch T11 is connected to the second terminal T4-2 of the switch T4 and the second terminal T4-2 of the second capacitor C2. One terminal C2-1, the second terminal T11-2 of the switch T11 is connected to the operating voltage VDD, and the control terminal T11-3 of the switch T11 is connected to the control signal S1. The switch T12 has a control terminal T12-3, a first terminal T12-1, and a second terminal T12-2. The first terminal T12-1 of the switch T12 is connected to the second terminal T4-2 of the switch T4 and the second terminal T4-2 of the second capacitor C2. One terminal C2-1 and the first terminal T11-1 of the switch T11, and the control terminal T12-3 of the switch T12 is connected to the control signal S2. The switch T13 has a control terminal T13-3, a first terminal T13-1, and a second terminal T13-2. The first terminal T13-1 of the switch T13 is connected to the second terminal T12-2 of the switch T12 and the control terminal T13 of the switch T13 -3, the second terminal T13-2 of the switch T13 is connected to the reference voltage Vref.

在此實施例中,開關T1~T13例如為薄膜電晶體(thin film transistor),其中開關T1~T4、T6、T7、T10~T13為N型電晶體,開關T5、T8、T9為P型電晶體。此外,開關T1的臨界電壓匹配至開關T13的臨界電壓,開關T5的臨界電壓匹配至開關T8的臨界電壓,以下會再詳細說明臨界電壓匹配的功效。In this embodiment, the switches T1 to T13 are, for example, thin film transistors, where the switches T1 to T4, T6, T7, and T10 to T13 are N-type transistors, and the switches T5, T8, and T9 are P-type transistors. Crystal. In addition, the threshold voltage of the switch T1 is matched to the threshold voltage of the switch T13, and the threshold voltage of the switch T5 is matched to the threshold voltage of the switch T8. The effect of the threshold voltage matching will be described in detail below.

圖2是根據一實施例繪示畫素驅動電路中各個控制訊號的時序圖。請參照圖2,畫素驅動電路依序操作於第一期間210、第二期間220、第三期間230及第四期間240,而第四期間240結束後又回到第一期間210。FIG. 2 is a timing diagram of various control signals in the pixel driving circuit according to an embodiment. Please refer to FIG. 2, the pixel driving circuit sequentially operates in the first period 210, the second period 220, the third period 230, and the fourth period 240, and after the fourth period 240 ends, it returns to the first period 210.

圖3是根據一實施例繪示在第一期間內畫素驅動電路的開關示意圖。請參照圖2與圖3,第一期間210是用以重置畫素驅動電路100。在第一期間210內,控制訊號S1及控制訊號EM為高準位V GH,控制訊號S2為低準位V GL,控制訊號V sweep為高準位V sweep_H,其中高準位V GH可相同或不同於高準位V sweep_H,本揭露並不在此限。因此,在第一期間210內,開關T1、T4、T5、T7、T9、T12處於截止狀態。另外,開關T2、T3、T6、T10、T11處於導通狀態。在此期間,節點A與節點D的電位相同於操作電壓VSS;節點B的電位相同於操作電壓VDD;節點C的電位相同於二極體電壓V LED;而節點E的電位相同於控制訊號V sweepFIG. 3 is a schematic diagram showing the switching of the pixel driving circuit in the first period according to an embodiment. 2 and 3, the first period 210 is used to reset the pixel driving circuit 100. In the first period 210, the control signal S1 and the control signal EM are at the high level V GH , the control signal S2 is at the low level V GL , and the control signal V sweep is at the high level V sweep_H , where the high level V GH can be the same Or different from the high level V sweep_H , this disclosure is not limited to this. Therefore, in the first period 210, the switches T1, T4, T5, T7, T9, and T12 are in the off state. In addition, the switches T2, T3, T6, T10, and T11 are in an on state. During this period, the potentials of node A and node D are the same as the operating voltage VSS; the potential of node B is the same as the operating voltage VDD; the potential of node C is the same as the diode voltage V LED ; and the potential of node E is the same as the control signal V sweep .

圖4是根據一實施例繪示在第二期間內畫素驅動電路的開關示意圖。請參照圖2與圖4,第二期間220是用以做電壓補償。在第二期間220,控制訊號S1為低準位V GL,控制訊號S2、控制訊號EM為高準位V GH,控制訊號V sweep為高準位V sweep_H。因此,開關T1、T4、T5、T6、T9、T11處於截止狀態,而開關T2、T3、T7、T8、T12、T13處於導通狀態。在此期間,節點A與節點D的電位相同於操作電壓VSS。節點B的電位為V ref+V TH_T13,其中V TH_T13為開關T13的臨界電壓。節點C的電位相同於二極體電壓V LED。節點E的電位為V DATA-|V TH_T8|,其中V TH_T8為開關T8的臨界電壓。 FIG. 4 is a schematic diagram showing the switching of the pixel driving circuit in the second period according to an embodiment. 2 and 4, the second period 220 is used for voltage compensation. In the second period 220, the control signal S1 is at the low level V GL , the control signal S2, the control signal EM is at the high level V GH , and the control signal V sweep is at the high level V sweep_H . Therefore, the switches T1, T4, T5, T6, T9, and T11 are in the off state, and the switches T2, T3, T7, T8, T12, and T13 are in the on state. During this period, the potentials of the node A and the node D are the same as the operating voltage VSS. The potential of the node B is V ref +V TH_T13 , where V TH_T13 is the threshold voltage of the switch T13. The potential of the node C is the same as the diode voltage V LED . The potential of the node E is V DATA -|V TH_T8 |, where V TH_T8 is the threshold voltage of the switch T8.

圖5是根據一實施例繪示在第三期間內第一子期間的畫素驅動電路的開關示意圖。請參照圖2與圖5,第三期間230分為第一子期間230-1及第二子期間230-2,在第一子期間230-1內發光單元110為截止,而在第二子期間230-2內發光單元110為導通並發光。第一子期間230-1及第二子期間230-2的長度是由資料電壓V DATA所決定。換言之,在此實施例中是以脈寬調變(pulse width modulation,PWM)的方式來驅動發光單元110,藉此決定像素的亮度。具體來說,在第三期間230內控制訊號S1、控制訊號S2及控制訊號EM為低準位V GL,而控制訊號V sweep由高準位V sweep_H逐漸地降低至低準位V sweep_L,其中低準位V sweep_L可相同或不同於低準位V GL,本揭露並不在此限。 FIG. 5 is a schematic diagram showing the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. 2 and 5, the third period 230 is divided into a first sub-period 230-1 and a second sub-period 230-2. In the first sub-period 230-1, the light-emitting unit 110 is turned off, and in the second sub-period 230-1 During the period 230-2, the light-emitting unit 110 is turned on and emits light. The lengths of the first sub-period 230-1 and the second sub-period 230-2 are determined by the data voltage V DATA . In other words, in this embodiment, the light-emitting unit 110 is driven in a pulse width modulation (PWM) manner, thereby determining the brightness of the pixel. Specifically, in the third period 230, the control signal S1, the control signal S2, and the control signal EM are at the low level V GL , and the control signal V sweep is gradually reduced from the high level V sweep_H to the low level V sweep_L , where The low level V sweep_L can be the same or different from the low level V GL , and the present disclosure is not limited thereto.

第一子期間230-1內,開關T1~T7、T10、T11、T12處於截止狀態,而開關T9處於導通狀態。此時節點A、節點C及節點D的電位相同於操作電壓VSS。節點C的電位從第二期間220的V LED改變為第一子期間230-1的VSS,其變化量為VSS-V LED,因此節點B的電位從V ref+V TH_T13改變為V ref+V TH_T13+VSS-V LED。類似地,節點E的電位是V DATA-|V TH_T8|+

Figure 02_image001
V sweep,其中
Figure 02_image001
V sweep表示控制訊號V sweep的變化量,由於控制訊號V sweep的電位是逐漸降低,因此節點E的電位也會逐漸的降低,當以下數學式1成立時,開關T5會切換為導通狀態,接著會進入第二子期間230-2。 [數學式1]
Figure 02_image003
Figure 02_image005
Figure 02_image007
>0 In the first sub-period 230-1, the switches T1 to T7, T10, T11, and T12 are in the off state, and the switch T9 is in the on state. At this time, the potentials of the node A, the node C, and the node D are the same as the operating voltage VSS. The potential of node C changes from V LED in the second period 220 to VSS in the first sub-period 230-1, and the amount of change is VSS-V LED , so the potential of node B changes from V ref +V TH_T13 to V ref +V TH_T13 +VSS-V LED . Similarly, the potential of node E is V DATA -|V TH_T8 |+
Figure 02_image001
V sweep , where
Figure 02_image001
Change amount V sweep a control signal V sweep, since the control signal V sweep potential is gradually reduced, the potential of the node E will gradually decrease, when the following Equation 1 is satisfied, the switch T5 is switched to a conducting state, and then Will enter the second sub-period 230-2. [Math 1]
Figure 02_image003
Figure 02_image005
Figure 02_image007
>0

其中V E表示節點E的電位,

Figure 02_image009
為開關T5的臨界電壓。值得注意的是,由於開關T5的臨界電壓匹配於開關T8的臨界電壓,因此在數學式1中兩個臨界電壓
Figure 02_image011
Figure 02_image013
相互抵消,也就是說刪除了開關T5的臨界電壓的影響。此外,當資料電壓V DATA越大時,數學式1越早成立,也就越早進入第二子期間230-2。 Where V E represents the potential of node E,
Figure 02_image009
Is the critical voltage of switch T5. It is worth noting that, since the threshold voltage of switch T5 matches the threshold voltage of switch T8, the two threshold voltages in Equation 1
Figure 02_image011
,
Figure 02_image013
Cancel each other, that is to say, delete the influence of the critical voltage of switch T5. In addition, when the data voltage V DATA is greater, the earlier mathematical formula 1 is established, and the earlier the second sub-period 230-2 is entered.

圖6是根據一實施例繪示在第三期間內第二子期間的畫素驅動電路的開關示意圖。請參照圖2與圖6,在第二子期間230-2內,開關T2、T3、T6、T7、T10~T12處於截止狀態,而開關T1、T4、T5、T9處於導通狀態。節點C的電位相同於操作電壓VSS,而節點E的電位相同於V DATA-|V TH_T8|+

Figure 02_image001
V sweep。除此之外,由於開關T5為導通狀態,節點D的電位相同於電壓V H。在此實施例中,操作電壓VDD大於等於電壓V H,但電壓V H大到足夠導通開關T4。電壓V H會施加在開關T4的控制端T4-3上使得開關T4處於導通狀態,節點A與節點B的電位相同於V ref+V TH_T13+VSS-V LED,藉此導通開關T1以產生電流I LED,此電流I LED流經發光單元110與開關T1。電流I LED的大小如以下數學式2所示,其中K為常數,V A為節點A的電位,臨界電壓
Figure 02_image015
Figure 02_image017
相互抵銷。 [數學式2]
Figure 02_image019
Figure 02_image021
Figure 02_image023
FIG. 6 is a schematic diagram showing the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. 2 and 6, in the second sub-period 230-2, the switches T2, T3, T6, T7, T10~T12 are in the off state, and the switches T1, T4, T5, and T9 are in the on state. The potential of node C is the same as the operating voltage VSS, and the potential of node E is the same as V DATA -|V TH_T8 |+
Figure 02_image001
V sweep . In addition, since the switch T5 is turned on, the potential of the node D is the same as the voltage V H. In this embodiment, the operating voltage VDD is greater than or equal to the voltage V H , but the voltage V H is large enough to turn on the switch T4. The voltage V H will be applied to the control terminal T4-3 of the switch T4 to make the switch T4 in the on state, and the potentials of the node A and the node B are the same as V ref +V TH_T13 +VSS-V LED , thereby turning on the switch T1 to generate current I LED , the current I LED flows through the light-emitting unit 110 and the switch T1. The magnitude of the current I LED is shown in the following mathematical formula 2, where K is a constant, V A is the potential of node A, and the critical voltage
Figure 02_image015
,
Figure 02_image017
Offset each other. [Math 2]
Figure 02_image019
Figure 02_image021
Figure 02_image023

透過操作電壓VSS與臨界電壓的補償,電流I LED已經無關於操作電壓VSS與任何開關的臨界電壓。在習知技術中驅動電流經過了兩個以上的開關,當電流較大時會產生壓降使得開關可能進入線性區,增加操作電壓VDD、VSS之間的跨壓可以解決此問題,但卻提高了功率消耗。相較之下,電流I LED只會流經一個開關T1,因此具有減少功率消耗的功效。 Through the compensation of the operating voltage VSS and the threshold voltage, the current I LED has nothing to do with the operating voltage VSS and the threshold voltage of any switch. In the conventional technology, the driving current has passed through more than two switches. When the current is large, a voltage drop may occur, which may cause the switch to enter the linear region. Increasing the cross voltage between the operating voltage VDD and VSS can solve this problem, but it increases Power consumption. In contrast, the current I LED only flows through one switch T1, so it has the effect of reducing power consumption.

圖7是根據一實施例繪示在第四期間內畫素驅動電路的開關示意圖。請參照圖2與圖7,第四期間240是用以關閉發光單元110。在第四期間240內,控制訊號S1及控制訊號S2為低準位V GL,控制訊號EM為高準位V GH,控制訊號V sweep為高準位V sweep_H。在此期間,開關T1、T4~T7、T9、T11、T12處於截止狀態,開關T2、T3、T10處於導通狀態。節點A與節點D的電位相同於操作電壓VSS。節點B的電位為V ref+V TH_T13。節點C的電位相同於二極體電壓V LED。節點E的電位為V DATA-|V TH_T8|。 FIG. 7 is a schematic diagram showing the switching of the pixel driving circuit in the fourth period according to an embodiment. 2 and FIG. 7, the fourth period 240 is used to turn off the light-emitting unit 110. In the fourth period 240, the control signal S1 and the control signal S2 are at the low level V GL , the control signal EM is at the high level V GH , and the control signal V sweep is at the high level V sweep_H . During this period, the switches T1, T4 to T7, T9, T11, and T12 are in an off state, and the switches T2, T3, and T10 are in an on state. The potentials of the node A and the node D are the same as the operating voltage VSS. The potential of node B is V ref +V TH_T13 . The potential of the node C is the same as the diode voltage V LED . The potential of the node E is V DATA -|V TH_T8 |.

在上述實施例中,“連接”可以是直接連接。In the above embodiment, "connection" may be a direct connection.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be subject to those defined by the attached patent application scope.

100:畫素驅動電路 110:發光單元 C1:第一電容 C2:第二電容 T1~T13:開關 I LED:電流 110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10-1,T11-1,T12-1,T13-1:第一端 110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10-2,T11-2,T12-2,T13-2:第二端 T1-3,T2-3,T3-3,T4-3,T5-3,T6-3,T7-3,T8-3,T9-3,T10-3,T11-3,T12-3,T13-3:控制端 A,B,C,D,E:節點 VDD,VSS:操作電壓 S1,S2,EM,V sweep:控制訊號 V H:電壓 V DATA:資料電壓 V LED:二極體電壓 V ref:參考電壓 210:第一期間 220:第二期間 230:第三期間 230-1:第一子期間 230-2:第二子期間 240:第四期間 V GH,V sweep_H:高準位 V GL,V sweep_L:低準位 100: pixel drive circuit 110: light-emitting unit C1: first capacitor C2: second capacitor T1~T13: switch I LED : current 110-1, C1-1, C2-1, T1-1, T2-1, T3 -1, T4-1, T5-1, T6-1, T7-1, T8-1, T9-1, T10-1, T11-1, T12-1, T13-1: First end 110-2, C1-2, C2-2, T1-2, T2-2, T3-2, T4-2, T5-2, T6-2, T7-2, T8-2, T9-2, T10-2, T11- 2, T12-2, T13-2: second end T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10 -3, T11-3, T12-3, T13-3: control terminals A, B, C, D, E: node VDD, VSS: operating voltage S1, S2, EM, V sweep : control signal V H : voltage V DATA : data voltage V LED : diode voltage V ref : reference voltage 210: first period 220: second period 230: third period 230-1: first sub-period 230-2: second sub-period 240: first Four-period V GH , V sweep_H : high level V GL , V sweep_L : low level

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 圖1是根據一實施例繪示畫素驅動電路的電路架構圖。 圖2是根據一實施例繪示畫素驅動電路中各個控制訊號的時序圖。 圖3是根據一實施例繪示在第一期間內畫素驅動電路的開關示意圖。 圖4是根據一實施例繪示在第二期間內畫素驅動電路的開關示意圖。 圖5是根據一實施例繪示在第三期間內第一子期間的畫素驅動電路的開關示意圖。 圖6是根據一實施例繪示在第三期間內第二子期間的畫素驅動電路的開關示意圖。 圖7是根據一實施例繪示在第四期間內畫素驅動電路的開關示意圖。 In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings. FIG. 1 is a circuit structure diagram of a pixel driving circuit according to an embodiment. FIG. 2 is a timing diagram of various control signals in the pixel driving circuit according to an embodiment. FIG. 3 is a schematic diagram showing the switching of the pixel driving circuit in the first period according to an embodiment. FIG. 4 is a schematic diagram showing the switching of the pixel driving circuit in the second period according to an embodiment. FIG. 5 is a schematic diagram showing the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. FIG. 6 is a schematic diagram showing the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. FIG. 7 is a schematic diagram showing the switching of the pixel driving circuit in the fourth period according to an embodiment.

100:畫素驅動電路 100: Pixel drive circuit

110:發光單元 110: light-emitting unit

C1:第一電容 C1: The first capacitor

C2:第二電容 C2: second capacitor

T1~T13:開關 T1~T13: switch

110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10-1,T11-1,T12-1,T13-1:第一端 110-1, C1-1, C2-1, T1-1, T2-1, T3-1, T4-1, T5-1, T6-1, T7-1, T8-1, T9-1, T10- 1, T11-1, T12-1, T13-1: first end

110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10-2,T11-2,T12-2,T13-2:第二端 110-2, C1-2, C2-2, T1-2, T2-2, T3-2, T4-2, T5-2, T6-2, T7-2, T8-2, T9-2, T10- 2, T11-2, T12-2, T13-2: second end

T1-3,T2-3,T3-3,T4-3,T5-3,T6-3,T7-3,T8-3,T9-3,T10-3,T11-3,T12-3,T13-3:控制端 T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10-3, T11-3, T12-3, T13- 3: Control terminal

A,B,C,D,E:節點 A, B, C, D, E: node

VDD,VSS:操作電壓 VDD, VSS: operating voltage

S1,S2,EM,Vsweep:控制訊號 S1, S2, EM, V sweep : control signal

VH:電壓 V H : Voltage

VDATA:資料電壓 V DATA : data voltage

VLED:二極體電壓 V LED : Diode voltage

Vref:參考電壓 V ref : reference voltage

Claims (9)

一種畫素驅動電路,包括:一發光單元,具有一第一端及一第二端,該發光單元的該第一端連接至一第一操作電壓;一第一開關,具有一控制端、一第一端及一第二端,該第一開關的該第一端連接至該發光單元的該第二端,該第一開關的該第二端連接至一第二操作電壓;一第二開關,具有一控制端、一第一端及一第二端,該第二開關的該第一端連接至該第二操作電壓,該第二開關的該第二端連接至該第一開關的該控制端,該第二開關的該控制端連接至一第一控制訊號;一第三開關,具有一控制端、一第一端及一第二端,該第三開關的該第一端連接至該第二操作電壓,該第三開關的該控制端連接至該第一控制訊號;一第四開關,具有一控制端、一第一端及一第二端,該第四開關的該第一端連接至該第一開關的該控制端與該第二開關的該第二端,該第四開關的該控制端連接至該第三開關的該第二端;一第五開關,具有一控制端、一第一端及一第二端,該第五開關的該第一端連接至一第一電壓,該第五開關的該第二端連接至該第三開關的該第二端與該第四開關的該控制端;一第六開關,具有一控制端、一第一端及一第二端,該第六開關的該第一端連接至該第五開關的該控制端,該第 六開關的第二端連接至一第二控制訊號,該第六開關的該控制端連接至一第三控制訊號;一第七開關,具有一控制端、一第一端及一第二端,該第七開關的該第二端連接至該第五開關的該控制端與該第六開關的該第一端,該第七開關的該控制端連接至一第四控制訊號;一第八開關,具有一控制端、一第一端及一第二端,該第八開關的該第一端連接至一資料電壓,該第八開關的該第二端連接至該第八開關的該控制端與該第七開關的該第一端;第一電容,具有一第一端及一第二端,該第一電容的該第一端連接至該第五開關的該控制端、該第六開關的該第一端與該第七開關的該第二端,該第一電容的該第二端連接至該第三控制訊號;一第九開關,具有一控制端、一第一端及一第二端,該第九開關的該第一端連接至該第一開關的該第二端與該第二操作電壓,該第九開關的該控制端連接至該第一控制訊號;一第十開關,具有一控制端、一第一端及一第二端,該第十開關的該第一端連接至該第九開關的該第二端,該第十開關的該第二端連接至一二極體電壓,該第十開關的該控制端連接至該第一控制訊號;第二電容,具有一第一端及一第二端,該第二電容的該第一端連接至該第四開關的該第二端,該第二電容的該第 二端連接至該第九開關的該第二端與該第十開關的該第一端;一第十一開關,具有一控制端、一第一端及一第二端,該第十一開關的該第一端連接至該第四開關的該第二端及該第二電容的該第一端,該第十一開關的該第二端連接至該第一操作電壓,該第十一開關的該控制端連接至該第三控制訊號;一第十二開關,具有一控制端、一第一端及一第二端,該第十二開關的該第一端連接至該第四開關的該第二端、該第二電容的該第一端及該第十一開關的該第一端,該第十二開關的該控制端連接至該第四控制訊號;以及一第十三開關,具有一控制端、一第一端及一第二端,該第十三開關的該第一端連接至該第十二開關的該第二端與該第十三開關的該控制端,該第十三開關的該第二端連接至一參考電壓。 A pixel driving circuit includes: a light-emitting unit having a first end and a second end, the first end of the light-emitting unit is connected to a first operating voltage; a first switch having a control end, a A first terminal and a second terminal, the first terminal of the first switch is connected to the second terminal of the light-emitting unit, and the second terminal of the first switch is connected to a second operating voltage; a second switch , Having a control terminal, a first terminal and a second terminal, the first terminal of the second switch is connected to the second operating voltage, and the second terminal of the second switch is connected to the Control terminal, the control terminal of the second switch is connected to a first control signal; a third switch has a control terminal, a first terminal and a second terminal, the first terminal of the third switch is connected to For the second operating voltage, the control terminal of the third switch is connected to the first control signal; a fourth switch has a control terminal, a first terminal and a second terminal, and the first terminal of the fourth switch Terminal is connected to the control terminal of the first switch and the second terminal of the second switch, the control terminal of the fourth switch is connected to the second terminal of the third switch; a fifth switch has a control Terminal, a first terminal and a second terminal, the first terminal of the fifth switch is connected to a first voltage, the second terminal of the fifth switch is connected to the second terminal of the third switch and the The control end of the fourth switch; a sixth switch having a control end, a first end and a second end, the first end of the sixth switch is connected to the control end of the fifth switch, the first The second end of the six switch is connected to a second control signal, and the control end of the sixth switch is connected to a third control signal; a seventh switch has a control end, a first end and a second end, The second end of the seventh switch is connected to the control end of the fifth switch and the first end of the sixth switch, and the control end of the seventh switch is connected to a fourth control signal; an eighth switch , Having a control terminal, a first terminal and a second terminal, the first terminal of the eighth switch is connected to a data voltage, and the second terminal of the eighth switch is connected to the control terminal of the eighth switch And the first terminal of the seventh switch; a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor is connected to the control terminal of the fifth switch, the sixth switch The first terminal of the seventh switch and the second terminal of the seventh switch, the second terminal of the first capacitor is connected to the third control signal; a ninth switch has a control terminal, a first terminal and a first terminal Two terminals, the first terminal of the ninth switch is connected to the second terminal of the first switch and the second operating voltage, the control terminal of the ninth switch is connected to the first control signal; a tenth switch , Having a control terminal, a first terminal and a second terminal, the first terminal of the tenth switch is connected to the second terminal of the ninth switch, and the second terminal of the tenth switch is connected to a second terminal Polar body voltage, the control terminal of the tenth switch is connected to the first control signal; a second capacitor has a first terminal and a second terminal, and the first terminal of the second capacitor is connected to the fourth switch The second end of the second capacitor, the first Two ends are connected to the second end of the ninth switch and the first end of the tenth switch; an eleventh switch has a control end, a first end and a second end, the eleventh switch The first end of the eleventh switch is connected to the second end of the fourth switch and the first end of the second capacitor, the second end of the eleventh switch is connected to the first operating voltage, the eleventh switch The control end of the twelfth switch is connected to the third control signal; a twelfth switch has a control end, a first end and a second end, and the first end of the twelfth switch is connected to the fourth switch The second terminal, the first terminal of the second capacitor, and the first terminal of the eleventh switch, the control terminal of the twelfth switch is connected to the fourth control signal; and a thirteenth switch, It has a control terminal, a first terminal and a second terminal. The first terminal of the thirteenth switch is connected to the second terminal of the twelfth switch and the control terminal of the thirteenth switch. The second end of the thirteen switch is connected to a reference voltage. 如請求項1所述之畫素驅動電路,其中該畫素驅動電路依序操作於一第一期間、一第二期間、一第三期間及一第四期間,其中在該第一期間內,該第一開關、該第四開關、該第五開關、該第七開關、該第九開關及該第十二開關處於一截止狀態,該第二開關、該第三開關、該第六開關、該第十開關及該第十一開關處於一導通狀態,其中在該第二期間內,該第一開關、該第四開關、該第 五開關、該第六開關、該第九開關及該第十一開關處於該截止狀態,該第二開關、該第三開關、該第七開關、該第八開關、該第十開關、該第十二開關及該第十三開關處於該導通狀態,其中在該第三期間的一第一子期間內,該第一開關至該第七開關、該第十開關、該第十一開關及該第十二開關處於該截止狀態,該第九開關處於該導通狀態,其中在該第三期間的一第二子期間內,該第二開關、該第三開關、該第六開關、該第七開關及該第十開關至該第十二開關處於該截止狀態,該第一開關、該第四開關、該第五開關及該第九開關處於該導通狀態,其中在該第四期間內,該第一開關、該第四開關至該第七開關、該第九開關、該第十一開關及該第十二開關處於該截止狀態,該第二開關、該第三開關及該第十開關處於該導通狀態,其中該第一開關的臨界電壓匹配至該第十三開關的臨界電壓,該第五開關的臨界電壓匹配至該第八開關的臨界電壓。 The pixel driving circuit according to claim 1, wherein the pixel driving circuit sequentially operates in a first period, a second period, a third period, and a fourth period, wherein during the first period, The first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch, and the twelfth switch are in an off state, and the second switch, the third switch, the sixth switch, The tenth switch and the eleventh switch are in a conducting state, wherein during the second period, the first switch, the fourth switch, and the first switch The fifth switch, the sixth switch, the ninth switch, and the eleventh switch are in the cut-off state, the second switch, the third switch, the seventh switch, the eighth switch, the tenth switch, and the first switch The twelfth switch and the thirteenth switch are in the conducting state, wherein during a first sub-period of the third period, the first switch to the seventh switch, the tenth switch, the eleventh switch, and the The twelfth switch is in the off state, the ninth switch is in the on state, and in a second sub-period of the third period, the second switch, the third switch, the sixth switch, and the seventh switch The switch and the tenth switch to the twelfth switch are in the off state, the first switch, the fourth switch, the fifth switch, and the ninth switch are in the on state, wherein during the fourth period, the The first switch, the fourth switch to the seventh switch, the ninth switch, the eleventh switch, and the twelfth switch are in the off state, and the second switch, the third switch, and the tenth switch are in the cut-off state. In the on state, the threshold voltage of the first switch matches the threshold voltage of the thirteenth switch, and the threshold voltage of the fifth switch matches the threshold voltage of the eighth switch. 如請求項2所述之畫素驅動電路,其中該第一開關至該第四開關、該第六開關、該第七開關、該第十開關、該第十一開關、該第十二開關及該第十三開關為N型電晶體,該第五開關、該第八開關及該第九開關為P型電晶體。 The pixel drive circuit according to claim 2, wherein the first switch to the fourth switch, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch, and The thirteenth switch is an N-type transistor, and the fifth switch, the eighth switch, and the ninth switch are P-type transistors. 如請求項3所述之畫素驅動電路,其中在該第一期間內,該第一控制訊號及該第三控制訊號為一第一高準位,該第二控制訊號為一第二高準位,該第四控制訊號為一第一低準位,其中在該第二期間內,該第一控制訊號及該第四控制訊號為該第一高準位,該第二控制訊號為該第二高準位,該第三控制訊號為該第一低準位,其中在該第三期間內,該第一控制訊號、該第三控制訊號及該第四控制訊號為該第一低準位,該第二控制訊號由該第二高準位逐漸地降低至一第二低準位,其中在該第四期間內,該第一控制訊號為該第一高準位,該第二控制訊號為該第二高準位,該第三控制訊號及該第四控制訊號為該第一低準位。 The pixel driving circuit according to claim 3, wherein in the first period, the first control signal and the third control signal are at a first high level, and the second control signal is at a second high level The fourth control signal is a first low level, and during the second period, the first control signal and the fourth control signal are the first high level, and the second control signal is the first high level. Two high levels, the third control signal is the first low level, and during the third period, the first control signal, the third control signal, and the fourth control signal are the first low level , The second control signal is gradually reduced from the second high level to a second low level, wherein during the fourth period, the first control signal is the first high level, and the second control signal Is the second high level, and the third control signal and the fourth control signal are the first low level. 如請求項4所述之畫素驅動電路,其中該第一操作電壓大於該第二操作電壓,並且該第一操作電壓大於等於該第一電壓。 The pixel driving circuit according to claim 4, wherein the first operating voltage is greater than the second operating voltage, and the first operating voltage is greater than or equal to the first voltage. 如請求項1所述之畫素驅動電路,其中該發光單元為發光二極體。 The pixel driving circuit according to claim 1, wherein the light-emitting unit is a light-emitting diode. 如請求項6所述之畫素驅動電路,其中該發光二極體的尺寸為次毫米。 The pixel driving circuit according to claim 6, wherein the size of the light-emitting diode is sub-millimeter. 如請求項1所述之畫素驅動電路,其中該畫素驅動電路設置於一顯示面板內。 The pixel driving circuit according to claim 1, wherein the pixel driving circuit is provided in a display panel. 如請求項1所述之畫素驅動電路,其中該畫素驅動電路設置於一背光模組內。 The pixel driving circuit according to claim 1, wherein the pixel driving circuit is arranged in a backlight module.
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