TWI634751B - Direct frequency synthesizer without read-only memory - Google Patents

Abstract

A direct frequency synthesizer includes a phase accumulator and a phase amplitude converter, the phase amplitude converter having a first complement unit, a first coefficient unit, a squarer, a plurality of second coefficient units, and a third coefficient a unit and a second complement unit, the first complement unit is coupled to the phase accumulator, the squarer is coupled to the first complement unit and the first coefficient unit, and the second coefficient units are coupled to the square The second complement unit is coupled to the second coefficient unit and the third coefficient unit, wherein the first coefficient unit, each of the second coefficient unit, and the third coefficient unit respectively have a complex coefficient segment and A multiplexer is coupled to the coefficient segments, wherein the coefficient segments are non-uniform segments according to a curvature variation of a chord.

Description

Direct frequency synthesizer without read-only memory

This invention relates to a direct frequency synthesizer, and more particularly to a direct frequency synthesizer without read only memory.

Please refer to Taiwan Patent Publication No. I469528 "Direct Frequency Synthesizer". The direct frequency synthesizer comprises a phase accumulator and a phase amplitude converter. The phase amplitude converter has a first complement unit and is electrically connected. a first adder of the first complement unit, a second coefficient unit electrically connected to the first complement unit and the first adder, a squarer electrically connected to the first adder, and an electrical connection The first complement unit and the first coefficient unit of the squarer, a third coefficient unit electrically connected to the first complement unit, and a second electrically coupled to the first coefficient unit and the third coefficient unit The adder and a second complement unit electrically connected to the second adder, please refer to the second figure of the patent specification, wherein the direct frequency synthesizer segments the sine wave by a phase 0 to π/8 is divided into 1 segment, the phase is between π/8 and π/2, and the equal region is divided into 15 segments, so that the spurious-free dynamic range of the sine wave output by the direct frequency synthesizer (Spurious-free Dynamic Range) , SFDR) reaches 68.67dBc, compared to 0 to π/2 completely And the like is divided into 16 segments of the direct frequency synthesizer improves 3.95dBc.

The main purpose of the present invention is to perform non-uniform segmentation according to the curvature variation of a sine wave, which can greatly improve the SFDR of the output frequency of the direct frequency synthesizer, so that the direct frequency synthesizer can conform to modern wireless communication and biomedical Engineering requirements for high purity chords.

A direct frequency synthesizer of the present invention comprises a phase accumulator and a phase amplitude converter, the phase accumulator receiving a frequency control code, the phase amplitude converter having a first complement unit, a first coefficient unit, and a square a second coefficient unit, a third coefficient unit, and a second complement unit, the first complement unit is coupled to the phase accumulator, the squarer is coupled to the first complement unit and the first a coefficient unit, the second coefficient unit is coupled to the squarer, the second complement unit is coupled to the second coefficient unit and the third coefficient unit, wherein the first coefficient unit and each of the second coefficient units And the third coefficient unit has a plurality of coefficient segments and a multiplexer, wherein the multiplexer is coupled to the coefficient segments, wherein the coefficient segments are uneven according to a curvature change of one of the chord waves Sub-section.

The direct frequency synthesizer of the present invention can segment the curvature of the sine wave by the first coefficient unit, the second coefficient unit and the third coefficient unit, so that the output of the direct frequency synthesizer can be more consistent. The ideal sine wave can be applied to modern communication systems and biomedical engineering.

Please refer to FIG. 1 , which is a circuit diagram of a direct frequency synthesizer 100 according to a first embodiment of the present invention. The direct frequency synthesizer 100 includes a phase accumulator 110 and a phase amplitude converter 120. The phase accumulator The 110 receives a frequency control code FCW and outputs a phase signal. The phase amplitude converter 120 is electrically coupled to the phase accumulator 110 to receive the phase signal.

Referring to FIG. 1 , the phase accumulator 110 has an adder 111 and a register 112. The adder 111 receives the frequency control code FCW. The register 112 is electrically connected to the adder 111. The device 112 is configured to store the output of the adder 111, and the output of the register 112 is sent back to the adder 111 to add an input signal, so that the phase accumulator 110 accumulates the frequency control code FCW to provide The phase signal required by the phase amplitude converter 120.

In this embodiment, the frequency control code FCW is 32 bits, and the phase accumulator 110 accumulates the frequency control code FCW and then uses the phase truncation technique to take the highest 20 bits as a phase signal. The phase-amplitude converter 120, wherein the most significant bit MSB (Most significant bit) of the 20-bit element is used to control the second complement unit 126 of the phase-amplitude converter 120 to output a vertically symmetrical signal, and the 20-bit element The second most significant bit 2 ^nd MSB is used to control the first complement unit 121 of the phase amplitude converter 120 to output a left-right symmetric signal.

In this embodiment, preferably, the phase amplitude converter 120 is sampled by Parabolic Interpolation, and the sampling equation is: among them For a second coefficient, For an input signal, For a first coefficient, For a third coefficient, For the number of segments of the chord in the π/2 phase according to the amount of curvature change, For the ith segment. Since the sine wave has the characteristics of left and right and upper and lower symmetry, it is only necessary to sample the π/2 phase to synthesize a full cycle sine wave.

In order to achieve the above sampling, the phase amplitude converter 120 has the first complement unit 121, a first coefficient unit 122, a squarer 123, a plurality of second coefficient units 124, a third coefficient unit 125, and a first The second complement unit 126, wherein the first complement unit 121 is coupled to the phase accumulator 110 to receive the remaining 18 bits of the phase signal, and the first complement unit 121 is subjected to the second most significant bit 2 ^nd MSB Control, and output left and right symmetrical signals.

Please refer to Fig. 2, which is a relationship between a sine wave and its curvature in the phase 0 to π/2. It can be seen that the curvature of the sine wave does not change much when the phase is 0.4, and then the phase is greater than 0.4. The curvature rises sharply, and finally the change of the curvature tends to be gentle again after the phase is greater than 1.4. Therefore, the present invention divides the non-uniform segment according to the curvature change amount of the sine wave, see Fig. 3, for the string The relationship between the amount of curvature change and the phase of the wave, the present invention is to segment the interval with a large amount of curvature into a plurality of segments, so as to avoid excessive variation of the curvature and cause excessive error between the sine wave and the parabola. In this embodiment, preferably, in the interval between 0 and π/2, the curvature of the sine wave is segmented into a segment, and the curvature of the sine wave is segmented. The variation amount is segmented into a segment from 0.4 to 0.6, and the curvature variation of the sine wave is segmented into two segments in a range of 0.6 to 0.8, and the curvature variation of the sine wave is between 0.8. One section up to 1.0 is segmented into three sections, and the curvature variation of the sine wave Segmented into a segment in a section of 1.0, since the maximum value of the curvature variation of the sine wave is about the phase 1.1, the phase is smaller than and greater than the phase 1.1, and can be segmented into 8 segments respectively. A total of 16 segments are divided between 0 and π/2, and the first coefficient unit 122, the second coefficient unit 124, and the third coefficient unit 125 are segmented in this manner.

Referring to FIG. 1 , the first coefficient unit 122 has a plurality of first coefficient segments 122a and a multiplexer 122b. The multiplexer 122b is electrically connected to the first coefficient segments 122a. The segment 122a is a non-uniform segment according to the curvature variation of the sine wave. Therefore, the first coefficient unit 122 has 16 first coefficient segments 122a, and the multiplexer 122b receives the phase signal. The 3rd to 6th most significant bits 3 ^nd ~ 6 ^nd MSB are controlled to determine which of the first coefficients b _{i of} the first coefficient section 122a is output.

The squarer 123 is coupled to the first complement unit 121 and the first coefficient unit 122 to receive the output of the first complement unit 121 and the signal added by the first coefficient unit 122 via an adder, the square The processor 123 multiplies the signals added by the adders to achieve a squared effect.

The second coefficient unit 124 is coupled to the squarer 123 to receive the square signal output by the squarer 123. Each of the second coefficient units 124 has a plurality of second coefficient segments 124a and a multiplexer 124b. The second coefficient section 124a is coupled to the second coefficient section 124a, and the second coefficient section 124a is used to shift the square signal. In this embodiment, there are a total of 15 second coefficient units 124. Each of the 15 second coefficient sections 124a of the second coefficient unit 124 shifts the square signal to achieve multiplication. The second coefficient segments 124a of each of the second coefficient units 124 are non-equalized segments according to the curvature variation amount of the sine wave, and therefore, each of the second coefficient units 124 has 16 second portions. coefficient segments 124a, 124b by the plurality of the phase signal multiplexer 3 to 6 of the high significant bits 3 ^nd ~ 6 ^nd MSB control, to which the second coefficient decision section 124a of the second coefficient a The shift of _i .

The third coefficient unit 125 has a plurality of third coefficient segments 125a and a multiplexer 125b. The multiplexer 125b is electrically connected to the third coefficient segments 125a. The third coefficient segments 125a are according to the above. The amount of curvature change of the sine wave is non-equalized. Therefore, the third coefficient unit 125 has 16 third coefficient segments 125a, and the multiplexer 125b receives the third to sixth signals of the phase signal. The high significant bit 3 ^nd ~6 ^nd MSB controls to determine which third coefficient c _{i of} the third coefficient segment 125a is output.

The second complement unit 126 is coupled to the second coefficient unit 124 and the third coefficient unit 125 to receive the signals added by the second coefficient unit 124 and the third coefficient unit 125 via a plurality of adders. And the second complement unit 126 is controlled by the most significant bit MSB, and outputs a signal that is symmetrically up and down, and the signal is a complete sine wave signal.

Please refer to FIG. 4, which is a second embodiment of the present invention, which differs from the first embodiment in that it further includes a first pipeline register 127, a second pipeline register 128, and a third a pipeline register 129 and a fourth pipeline register 130, the first pipeline register 127 is electrically connected to the phase accumulator 110, and the second pipeline register 128 is electrically connected to the first coefficient unit 122 and The first complement unit 121, the third pipeline register 129 is electrically connected to the squarer 123, and the fourth pipeline register 130 is electrically connected to the second coefficient units 124, wherein the fourth pipeline is temporarily stored. The device 130 is a fifth-order pipeline register, by which the operating speed of the direct frequency synthesizer 100 as a whole can be effectively improved.

Referring to FIG. 5, the SFDR of the sine wave outputted by the direct frequency synthesizer 100 of the present invention is known. The direct frequency synthesizer 100 of the present invention is configured by the first coefficient unit 122, the second coefficient unit 124, and the The third coefficient unit 125 segments the curvature variation of the sine wave, so that the SFDR of the sine wave outputted by the direct frequency synthesizer 100 can reach 95.16 dBc, which is significantly improved by 26.49 dBc compared with the prior art. The direct frequency synthesizer 100 is indeed ideal for modern communication systems and biomedical engineering.

The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are within the scope of the present invention. .

100‧‧‧Direct frequency synthesizer

110‧‧‧ phase accumulator

111‧‧‧Adder

112‧‧‧ register

120‧‧‧Phase Amplitude Converter

121‧‧‧First complement unit

122‧‧‧First coefficient unit

122a‧‧‧First coefficient section

122b‧‧‧Multiplexer

123‧‧‧ square

124‧‧‧Second coefficient unit

124a‧‧‧Second coefficient section

124b‧‧‧Multiplexer

125‧‧‧ third coefficient unit

125a‧‧‧ third coefficient section

125b‧‧‧Multiplexer

126‧‧‧second complement unit

127‧‧‧First pipeline register

128‧‧‧Second pipeline register

129‧‧‧ third pipeline register

130‧‧‧4th pipeline register

FCW‧‧‧ frequency control code

Figure 1 is a circuit diagram of a direct frequency synthesizer in accordance with a first embodiment of the present invention.

Figure 2 is a diagram showing the relationship between a sine wave and its curvature in accordance with a first embodiment of the present invention.

Figure 3 is a schematic illustration of the segmentation of the curvature of the sine wave in accordance with a first embodiment of the present invention.

Figure 4 is a circuit diagram of a direct frequency synthesizer in accordance with a second embodiment of the present invention.

Figure 5: SFDR of the sine wave output by the direct frequency synthesizer of the present invention.

Claims (7)

A direct frequency synthesizer comprising: a phase accumulator receiving a frequency control code; and a phase amplitude converter having a first complement unit, a first coefficient unit, a squarer, and a plurality of second coefficients a unit, a third coefficient unit, and a second complement unit, the first complement unit is coupled to the phase accumulator, the squarer is coupled to the first complement unit and the first coefficient unit, and the second The coefficient unit is coupled to the squarer, the second complement unit is coupled to the second coefficient unit and the third coefficient unit, wherein the first coefficient unit, each of the second coefficient unit, and the third coefficient unit are respectively Having a plurality of coefficient segments and a multiplexer, the multiplexer coupling the coefficient segments, wherein the coefficient segments are non-uniform segments according to a curvature change of a chord wave, wherein the An interval in which the curvature variation of the sine wave is less than 0.4 is segmented into a coefficient segment, and the curvature variation of the sine wave is segmented into one of the coefficient segments in a range of 0.4 to 0.6, and the curvature of the sine wave The amount of change is between 0.6 and 0.8 The segmentation is two of the coefficient segments, and the curvature variation of the sine wave is segmented into three of the coefficient segments in a range of 0.8 to 1.0, and the curvature variation of the sine wave is greater than 1.0. One of the coefficient segments. The direct frequency synthesizer of claim 1, further comprising a first pipeline register, a second pipeline register, a third pipeline register, and a fourth pipeline register. The first pipeline register is electrically connected to the phase accumulator, and the second pipeline register is electrically connected to the first coefficient unit and the first complement unit, and the third pipeline register is electrically connected to the square The fourth pipeline register is electrically connected to the second coefficient units. The direct frequency synthesizer of claim 2, wherein the fourth pipeline register is a fifth-order pipeline register. The direct frequency synthesizer of claim 1, wherein there are 15 such a second coefficient unit, wherein the second coefficient units achieve multiplication by shifting the signal. The direct frequency synthesizer of claim 1, wherein the phase amplitude converter is sampled by Parabolic Interpolation, and the sampling equation is: Where a _i is a second coefficient, x is an input signal, b _i is a first coefficient, c _i is a third coefficient, and M is the number of curvature changes of the π/2 phase of the sine wave , i is the i-th segment. A direct frequency synthesizer comprising: a phase accumulator receiving a frequency control code; and a phase amplitude converter having a first complement unit, a first coefficient unit, a squarer, and a plurality of second coefficients a unit, a third coefficient unit, and a second complement unit, the first complement unit is coupled to the phase accumulator, the squarer is coupled to the first complement unit and the first coefficient unit, and the second The coefficient unit is coupled to the squarer, the second complement unit is coupled to the second coefficient unit and the third coefficient unit, wherein the first coefficient unit, each of the second coefficient unit, and the third coefficient unit are respectively Having a plurality of coefficient segments and a multiplexer, the multiplexer coupling the coefficient segments, wherein the coefficient segments are non-uniform segments according to a curvature change of one chord wave, and another a first pipeline register, a second pipeline register, a third pipeline register, and a fourth pipeline register, wherein the first pipeline register is electrically connected to the phase accumulator, the first The second pipeline register is electrically connected to the first coefficient Yuan and the first complement means, the third pipeline register is electrically connected to the squarer, and the fourth register electrically connected to the plurality of second coefficient line unit. A direct frequency synthesizer comprising: a phase accumulator receiving a frequency control code; and a phase amplitude converter having a first complement unit, a first coefficient unit, a squarer, and a complex a plurality of second coefficient units, a third coefficient unit, and a second complement unit, wherein the first complement unit is coupled to the phase accumulator, and the squarer is coupled to the first complement unit and the first coefficient unit The second coefficient unit is coupled to the squarer, the second complement unit is coupled to the second coefficient unit and the third coefficient unit, wherein the first coefficient unit, each of the second coefficient unit, and the The third coefficient unit has a plurality of coefficient segments and a multiplexer, and the multiplexer is coupled to the coefficient segments, wherein the coefficient segments are non-uniform according to a curvature variation of one of the chord waves. Segmented, and having a total of 15 second coefficient units, wherein the second coefficient units achieve multiplication by shifting the signals.