TWI600262B - A system and method for providing an output voltage to a load - Google Patents

Description

System and method for providing an output voltage to a load

The present invention relates to the field of circuits, and more particularly to a system and method for providing an output voltage to a load.

At present, power factor correction switching converters based on Boost architecture are widely used. However, the Boost power factor correction converter with a constant on-time constant operation mode has a large input current harmonic distortion (THD), which cannot be applied in the case where the harmonic distortion is required to be high, and an optimization circuit is required. Meet the harmonic requirements.

The present invention provides a system for providing an output voltage to a load, comprising: a switch control element configured to characterize an output voltage indicative of an output voltage output to the load based on a demagnetization characterization signal characterizing a demagnetization condition of the inductor in series with the load The characterization signal, and the reference signal, generate a control signal and utilize the control signal to control the turn-on and turn-off of the system power switch, wherein the system power switch, capacitor, and load are connected in parallel between the inductor and ground.

The present invention also provides a method for providing an output voltage to a load, comprising: a demagnetization characterization signal indicative of a demagnetization condition of an inductor in series with a load, an output voltage characterization signal characterizing an output voltage output to the load, and a reference signal A control signal is generated and the control signal is used to control the turn-on and turn-off of the system power switch, wherein the system power switch, capacitor, and load are connected in parallel between the inductor and ground.

The system and method according to the present invention can eliminate the phase loss of the average value of the input current when the AC input voltage is at the bottom of the valley, and reduce the distortion of the input current over the entire power frequency period of the AC power source.

Vcs‧‧‧Demagnetization characterization signal

100,800‧‧‧BOOST quasi-resonant switching power supply

Vramp‧‧‧ ramp voltage

102, 802‧‧‧ AC rectifying components

Iramp‧‧‧ ramp current

104, 500, 804‧‧‧ switch control components

C1, C2‧‧‧ capacitor

106, 806‧‧‧Voltage output components

Vc2‧‧‧ voltage

Vref_ea‧‧‧ reference signal

V _AC ‧‧‧AC input voltage

Vcomp‧‧‧Output voltage characterization voltage

Vin‧‧‧ rectified input voltage

Rcs‧‧‧ resistance

L‧‧‧Inductors

Td‧‧‧Demagnetization time

S1‧‧‧ system power switch

Tr‧‧‧Resonance time

Iin‧‧‧Inductor Current

I _{n_pk ‧‧‧Negative} resonant current peak

I _PK ‧‧‧Inductance current peak

Vth‧‧‧negative threshold voltage

Vo‧‧‧ output voltage

Vth2‧‧‧ threshold voltage

C _ds ‧‧‧Parasitic capacitor

601, 1002‧‧‧ comparator

OP‧‧‧Buffer amplifier

1001‧‧‧voltage controlled current source

V1‧‧‧ voltage

1003‧‧‧Latch

Vvac‧‧‧Input voltage characterization signal

Transconductance of Gm‧‧‧ voltage-controlled current source

Trigger‧‧‧ trigger signal

Por‧‧‧Power-on reset signal

PWM‧‧‧ pulse width modulation

Iin_ave‧‧‧ average of input current

Tramp‧‧‧ ramp voltage Vramp rises from V1 to output voltage to characterize voltage Vcomp

Td1‧‧‧Demagnetization time when the voltage Vcs drops to the negative threshold voltage Vth

Td2‧‧‧Time when voltage Vc2 on capacitor C2 rises to threshold voltage Vth2

On time of Ton‧‧‧ system power switch S1

201, 501, 901‧‧‧ ramp signal generation module

202, 502, 902‧‧‧ pulse width modulation (PWM) signal generation module

203, 503, 903‧‧‧Logic Control Module

204, 504, 904‧‧‧ drive modules

205, 505, 905‧‧‧ demagnetization sensing module

206, 506, 906‧‧‧ Error Amplifier (EA) Module

207, 507, 907‧‧ ‧ undervoltage protection (UVLO) module

INV, CS/ZCD, GATE, COMP, CS, GND, VCC, VIN, VAC‧‧‧ terminals

K1, K2, Ks, Ks1, Ks2‧‧‧ switch

The invention will be better understood from the following description of the embodiments of the invention, in which: FIG. 1 is a circuit diagram of a system for providing an output voltage to a load in accordance with an embodiment of the present invention; A schematic block diagram of the switch control element shown in Figure 1; Figure 3a is a waveform diagram of the input current in the system shown in Figure 1 when the AC input voltage is near the peak; Figure 3b is the AC input voltage. The waveform of the input current in the system shown in Figure 1 near the bottom of the valley; Figure 4 is the average value of the input current in the system shown in Figure 1 with a standard sine wave in one power frequency cycle of the AC power supply. FIG. 5 is a schematic block diagram of a switch control element according to an embodiment of the present invention; FIG. 6 is a schematic diagram of a ramp signal generation module shown in FIG. 5; and FIG. 7 is a fifth diagram Schematic diagram of the inductor current characterization signal (ie, demagnetization characterization signal Vcs), ramp voltage Vramp, and operational waveform of the drive signal in the system of the illustrated switch control element; FIG. 8 is a diagram of another embodiment of the present invention, in accordance with another embodiment of the present invention A circuit diagram of a system for providing an output voltage to a load; FIG. 9 is a schematic block diagram of a switch control element in the system shown in FIG. 8; and FIG. 10 is a schematic diagram of a ramp signal generation module shown in FIG. Figure 11a is a schematic diagram of the voltage Vc2, the ramp voltage Vramp, and the operating waveform of the driving signal in the capacitor C2 in the system shown in Fig. 8 when the AC input voltage is near the peak; Figure 11b is the AC input voltage. The voltage Vc2 on the capacitor C2 in the system shown in FIG. 8 near the bottom of the valley, the ramp voltage Vramp, and the operation waveform of the drive signal intention.

Features and exemplary embodiments of various aspects of the invention are described in detail below. In the following detailed description, numerous specific details are set forth However, it will be apparent to those skilled in the art that the present invention may be practiced without some of the details. The following description of the embodiments is merely provided to provide a better understanding of the invention. The present invention is in no way limited to any specific configurations and algorithms presented below, but without departing from the spirit and scope of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessary obscuring the invention.

1 is a circuit diagram of a system for providing an output voltage to a load (ie, a BOOST quasi-resonant switching power supply) in accordance with an embodiment of the present invention. As shown in FIG. 1, the BOOST quasi-resonant switching power supply 100 includes an AC rectifying element 102, a switching control element 104, and a voltage output element 106. The AC rectifying element 102 receives the AC input voltage V _AC from the AC power source, and converts the AC input voltage V _AC into a rectified input voltage Vin (hereinafter referred to as an input voltage Vin) to provide an output voltage to the load. The switch control element 104 senses the output voltage output to the load through the INV terminal, senses the demagnetization characteristic voltage characterizing the demagnetization condition of the inductor L in series with the load in the voltage output element 106 through the CS/ZCD terminal, and based on the sensed The output voltage and demagnetization characterize the voltage, and the drive signal is output through the GATE terminal to drive the on and off of the system power switch S1, thereby adjusting the output voltage supplied to the load.

When the system power switch S1 is turned on, the input voltage Vin charges the inductor L in the voltage output element 106. The peak value I _PK of the inductor current flowing through the inductor L (ie, the input current Iin) is determined by the on-time Ton of the system power switch S1 (ie, the duration in which the system power switch S1 is in the conducting state):

When the system power switch S1 is turned from off to off, the difference Vo-Vin between the output voltage Vo and the input voltage Vin demagnetizes the inductor L, and the demagnetization characteristic voltage characterizing the demagnetization of the inductor L is CS/ of the switch control element 104. ZCD terminal sensing. After the demagnetization of the inductor L is completed, the parasitic capacitor C _{ds of the} system power switch S1 and the inductor L resonate. When the voltage across the system power switch S1 resonates to the bottom, the system power switch S1 is turned on again.

Fig. 2 is a schematic block diagram of the switch control element shown in Fig. 1. As shown in FIG. 2, the switch control element 104 has a GATE terminal, an INV terminal, a CS terminal, a GND terminal, a COMP terminal, and a VCC terminal, and includes a ramp signal generation module 201 and a pulse width modulation (Pulse Width Modulation, PWM). The signal generation module 202, the logic control module 203, the drive module 204, the demagnetization sensing module 205, the error amplifier (EA) module 206, and the Under Voltage Lock Out (UVLO) mode Group 207.

As shown in FIG. 2, the ramp signal generation module 201 is connected to the non-inverting input terminal of the PWM signal generation module 202. The output of the COMP terminal and error amplifier (EA) module 206 is coupled to the inverting input of the PWM signal generation module 202. The output of the PWM signal generating module 202 is connected to the logic control module 203, the logic control module 203 is connected to the driving module 204, and the driving module 204 is connected to the GATE terminal. The CS terminal is connected to the demagnetization sensing module 205, and the demagnetization sensing module 205 is connected to the logic control module 203. The INV terminal is coupled to the inverting input of the error amplifier (EA) module 206. The GND terminal is grounded. The VCC terminal is connected to the undervoltage protection module 207.

Specifically, during the on-time Ton of the system power switch S1, the ramp signal generating module 201 generates the ramp voltage Vramp based on the predetermined ramp current Iramp, and outputs the ramp voltage Vramp to the non-inverting input terminal of the PWM signal generating module 202; The error amplifier (EA) module 206 generates an output voltage characterization voltage Vcomp (ie, the voltage at the COMP terminal) based on the voltage at the INV terminal connected to its inverting input and the reference signal Vref_ea input to its non-inverting input, and Outputting the output voltage characterization voltage Vcomp to the inverting input of the PWM signal generation module 202; the PWM signal generation module 202 generates a PWM modulation signal by comparing the ramp voltage Vramp with the output voltage characterization voltage Vcomp And outputting the PWM modulation signal to the logic control module 203; the demagnetization sensing module 205 generates a demagnetization representation signal based on the demagnetization characteristic voltage at the CS terminal, and outputs the demagnetization representation signal to the logic control module 203; logic control The module 203 generates a control signal based on the PWM modulation signal and the demagnetization characterization signal; the driving module 204 generates a driving signal based on the control signal to drive the turn-on and turn-off of the system power switch S1. Here, the voltage at the INV terminal is obtained by dividing the output voltage Vo.

As shown in FIGS. 1 and 2, the inductor current Iin flowing through the inductor L generates a voltage Vcs via a resistor Rcs and an RC (Resistor-Capacitor) filter element, and this voltage is supplied to the CS terminal. The magnitude of the voltage Vcs at the CS terminal can characterize the magnitude of the inductor current and thus the demagnetization of the inductor L, so the voltage Vcs at the CS terminal is referred to herein as the demagnetization characterization voltage. Since the inductor current Iin flows from the GND terminal of the control element 104 to the CS terminal, the voltage Vcs on the CS terminal is a negative voltage, that is, Vcs=-Iin*Rcs. When the voltage at the CS terminal is higher than a negative threshold close to zero (for example, -10 mV), it is determined that the demagnetization of the inductor L ends, and the parasitic capacitor C _{ds of the} system power switch S1 and the inductor L resonate after a period of time. After the time (for example, 1us (Microsecond)), the voltage across the system power switch S1 resonates to the bottom. At this time, the system power switch S1 is turned on by logic control and driving the output high level. In some embodiments, the demagnetization of the inductor L may not be sensed directly from the voltage Vcs at the CS terminal, and the demagnetization characterization signal may be generated by conventional inductive coupling.

During the on-time of the system power switch S1, when the ramp signal generation module 201 generates a ramp voltage Vramp based on the predetermined ramp current Iramp that is higher than the output voltage representative voltage Vcomp, the PWM signal generation module 202 generates a low-level PWM modulation. Signal; the inductor L is in the charging process instead of the demagnetization process, the demagnetization sensing module 205 generates a low level demagnetization characterization signal; the logic control module 203 generates a low level based on the low level PWM modulation signal and the low level demagnetization characterization signal The control module 204 generates a low level driving signal based on the low level control signal, thereby turning off the system power switch S1 (the waveform of the driving signal generated by the driving module 204 and the control signal generated by the logic control module 203) The waveform is the same).

It can be seen that the output voltage representative voltage Vcomp generated by the error amplifier (EA) module 206 determines the on-time Ton of the system power switch S1. The output voltage characterization voltage Vcomp is substantially constant during one power frequency cycle of the AC power source, which determines that the on-time Ton of the system power switch S1 during one power cycle of the AC power source is constant. In the operation mode in which the on-time Ton of the system power switch S1 is fixed, the waveform of the inductor current flowing through the inductor L (i.e., the input current Iin) is as shown in Figs. 3a and 3b.

In the case shown in Figures 3a and 3b, the average value of the input current Iin can be calculated as follows based on the waveform of the input current Iin:

The points are:

Among them, Ton represents the on-time of the system power switch S1 (ie, the charging time of the inductor L), Td represents the demagnetization time of the inductor L, and Tr represents the resonance time of the inductor L and the parasitic capacitor C _ds of the system power switch S1.

I _PK is the peak value of the input current Iin:

I _{n_pk} is the negative resonant current peak:

Demagnetization time of inductor L:

Resonance time of inductor L:

During one power frequency cycle of the AC power source, the output voltage characterization voltage Vcomp is constant, so the on-time Ton time of the system power switch S1 is constant; the inductance L of the inductor L and the parasitic capacitor C _{ds of the} system power switch S1 are fixed, thus resonating The time Tr is also fixed; near the peak of the AC input voltage V _AC , the input voltage Vin is large, the negative resonance current peak I _{n_pk is} low, the inductor current peak I _{PK is} high, and the demagnetization time Td is also long, and the proportion of the negative resonance current is long. Small, the waveform is as shown in Fig. 3a; near the valley bottom of the AC input voltage V _AC , the input voltage Vin is small, the negative resonance current peak I _{n_pk is} high, the inductor current peak I _{PK is} low, and the demagnetization time Td is also short, negative The resonant current accounts for a large proportion, and the waveform is as shown in Fig. 3b. At this time, the negative resonant current will even cancel out with the forward current, causing the input current Iin to fail to follow the waveform of the input voltage Vin.

The waveform of the average value of the input current Iin in one power frequency cycle of the AC power source is as shown in Fig. 4. Fig. 4 is a view showing a comparison of the waveform of the average value of the input current Iin of the system shown in Fig. 1 with a standard sine wave. From the previous formula analysis, it can be concluded that the input current Iin is distorted compared with the standard sine wave in the entire power frequency cycle of the AC power source, especially in the vicinity of the valley bottom of the AC input voltage V _AC .

Therefore, the harmonic distortion generated by the switching control element shown in Fig. 2 is large, and it cannot be applied in the case where the harmonic distortion (THD) is required to be high.

In order to solve one or more problems present in the system described in connection with Figures 1-4, a novel switch control element for the system shown in Figure 1 is described in detail below with reference to Figures 5 through 7, which switch The control element has the same pins as the switch control elements shown in Figure 2, and can minimize the total current distortion in the system shown in Figure 1.

Figure 5 is a schematic block diagram of a switch control element in accordance with an embodiment of the present invention. As shown in FIG. 5, the switch control component 500 includes a ramp signal generation module 501, a PWM signal generation module 502, a logic control module 503, a drive module 504, a demagnetization sensing module 505, and an error amplifier (EA) mode. Group 506, and undervoltage protection (UVLO) module 507.

In the switch control element shown in FIG. 5, the ramp signal generation module 501, the PWM signal generation module 502, the logic control module 503, the drive module 504, the demagnetization sensing module 505, and the error amplifier (EA) mode Group 506, and undervoltage protection (UVLO) modules The connection relationship between the 507 and the signal processing flow are the same as the connection relationship between the corresponding modules shown in FIG. 2 and the signal processing flow, and will not be described herein.

Further, in the switch control element shown in FIG. 5, the ramp signal generation module 501 generates a ramp voltage Vramp based on the demagnetization flag voltage Vcs at the CS terminal, the negative threshold voltage Vth, and the predetermined ramp current Iramp, wherein the negative direction The threshold voltage Vth is a predetermined voltage.

Fig. 6 is a schematic block diagram of the ramp signal generating module shown in Fig. 5. As shown in FIG. 6, the ramp voltage generating module 501 includes a comparator 601, a switch K1, a switch Ks, a buffer amplifier OP, and a capacitor C1.

In the ramp signal generation module shown in FIG. 6, the ON and OFF of the switch Ks are controlled by the drive signal generated by the drive module 504 (ie, controlled by the control signal generated by the logic control module 503). Specifically, when the driving signal is at a high level, that is, the system power switch S1 is turned on, the switch Ks is turned off; when the driving signal is low, that is, the system power switch S1 is turned off, the switch Ks is turned on, and the ramp voltage Vramp (ie, the capacitor) The voltage on C1 is clamped at V1.

In the ramp signal generating module shown in FIG. 6, the turn-on and turn-off of the switch K1 is controlled by the output signal of the comparator 601, wherein the output signal of the comparator 601 is based on the demagnetization characteristic voltage of the non-inverting input terminal of the comparator 601. Vcs and the negative threshold voltage Vth generated at the inverting input. During the period when the system power switch S1 is turned on, the input voltage Vin charges the inductor L, and the demagnetization characteristic voltage Vcs starts to decrease from 0V. When the demagnetization characteristic voltage Vcs is higher than the negative threshold voltage Vth, the output signal of the comparator 601 is at a low level. At this time, K1 is turned off; when the demagnetization characteristic voltage Vcs is lower than the negative threshold voltage Vth, the output signal of the comparator 601 is at a high level, at which time K1 is turned on, and the ramp current Iramp charges the capacitor C1 until the ramp voltage Vramp on the capacitor C1. The output voltage is characterized by the voltage Vcomp and the drive signal becomes a low level; the ramp voltage Vramp on the capacitor C1 is output to the non-inverting input of the PWM signal generation module 502.

In the ramp signal generation module 501 shown in FIG. 6, when the switch Ks is guided When the time is up, the voltage on the capacitor C1 is maintained at V1; when the switches Ks, K1 are both turned off, the voltage on the capacitor C1 is still maintained at V1; when the switch K1 is turned on and the switch Ks is turned off, the ramp current Iramp charges the capacitor C1. Until the ramp voltage Vramp on the capacitor C1 reaches the output voltage characteristic voltage Vcomp and the drive signal becomes a low level; the ramp voltage Vramp on the capacitor C1 is output to the non-inverting input of the PWM signal generation module 502.

Figure 7 is a schematic illustration of the operational waveform of the demagnetization characterization voltage Vcs, the ramp voltage Vramp, and the drive signal (i.e., the signal at the GATE pin). As shown in Figure 7, when the Vcs voltage rises above a negative voltage close to zero (for example, -10mV), it is determined that the inductor L is demagnetized, and the drive signal is at a high level through the logic control and the drive output high level ( That is, during the system power switch S1 is turned on, the inductor L is charged, and the demagnetization characteristic voltage Vcs at the CS terminal starts to decrease from 0V; when the demagnetization characteristic voltage Vcs reaches the negative threshold voltage Vth, the switch K1 is turned on, and the ramp current Iramp starts to When the capacitor C1 is charged, the ramp voltage Vramp on the capacitor C1 starts to rise; when the ramp voltage Vramp reaches the output voltage characteristic voltage Vcomp, the drive signal becomes a low level, the system power MOS field effect transistor S1 is turned off, and the demagnetization characterization voltage Vcs starts to rise. The ramp voltage Vramp is clamped to V1. The time when the driving signal is at a high level (ie, the on-time Ton of the system power switch S1) is composed of two parts, one part is the time ramp of the ramp voltage Vramp rising from V1 to the output voltage characterization voltage Vcomp, and the output voltage is indicative of the voltage Vcomp It is substantially constant, so the Tramp is also constant; the other part is the time Td1 at which the demagnetization characterization voltage Vcs falls to the negative threshold voltage Vth.

According to the following inductor current charging formula:

Where Rcs is the inductor current sense resistor and L is the inductance of the inductor L. For a given system, the internal thresholds Vth and Rcs are constant. Td1 is inversely proportional to the input voltage Vin. The smaller the input voltage Vin is, the larger the Td1 is. This can make the on-time Ton of the system power switch S1 inversely proportional to the input voltage Vin, thereby increasing the system power control at the power frequency valley of the AC power source. The duration of the on-time Ton of the switch S1, eliminating the average value of the input current The phase loss of the power frequency valley of the AC power source and the current distortion of the input current during the entire power frequency cycle.

If the BOOST quasi-resonant switching power supply system is capable of sensing the rectified input voltage Vin, then the input voltage Vin can be utilized to achieve harmonic optimization.

Figure 8 is a circuit diagram of a system for providing an output voltage to a load in accordance with another embodiment of the present invention. As shown in FIG. 8, a system 800 for providing an output voltage to a load in accordance with another embodiment of the present invention includes an AC rectifying element 802, a switching control element 804, and a voltage output element 806. The AC rectifying element 802 receives the AC input voltage V _AC from the AC power source, and converts the AC input voltage V _AC into a rectified input voltage Vin (hereinafter simply referred to as an input voltage Vin) to provide an output voltage to the load. The switch control element 804 senses the input voltage Vin, the output voltage output to the load, and the demagnetization characterization voltage characterizing the demagnetization condition of the inductor L in series with the load in the voltage output element 806, and based on the sensed input voltage, output voltage And demagnetization characterize the voltage control system power switch S1 on and off, thereby regulating the output voltage of the load. Here, the switching control element 804 senses the input voltage Vin by sampling the input voltage Vin with the voltage dividing element, and senses the output voltage Vo by sampling the output voltage Vo with the voltage dividing element.

Figure 9 is a schematic block diagram of the switch control elements for the system shown in Figure 8. As shown in FIG. 9, the switch control component 804 includes a ramp signal generation module 901, a PWM signal generation module 902, a logic control module 903, a drive module 904, a demagnetization sensing module 905, and an error amplifier (EA) mode. Group 906, and undervoltage protection (UVLO) module 907.

In the switch control element shown in FIG. 9, the switch control element 804 has a VAC terminal and a ramp signal generation module in addition to the GATE terminal, the VIN terminal, the CS terminal, the GND terminal, the COMP terminal, and the VCC terminal. 901, the connection between the PWM signal generating module 902, the logic control module 903, the driving module 904, the demagnetization sensing module 905, the error amplifier (EA) module 906, and the undervoltage protection (UVLO) module 907 The relationship between the relationship and the signal processing flow and the corresponding module shown in FIG. 2 and the signal processing flow are the same, and are not described herein again.

In the switch control element shown in FIG. 9, the ramp signal generation module 901 generates a ramp voltage Vramp based on the input voltage characteristic signal Vvac, the threshold voltage Vth2, and the predetermined ramp current Iramp received by the VAC terminal, wherein the threshold voltage Vth2 is Predetermined voltage.

Fig. 10 is a schematic diagram of the ramp signal generating module shown in Fig. 9. As shown in FIG. 10, the ramp voltage generating module 901 includes a voltage controlled current source 1001, capacitors C1-C2, a comparator 1002, a latch 1003, switches K1-K2, switches Ks1-Ks2, and a buffer amplifier OP.

In the ramp signal generation module shown in FIG. 10, the ON and OFF of the switches Ks1-Ks2 are controlled by the drive signals generated by the drive module 904 (i.e., the control signals generated by the logic control module 903). Specifically, when the driving signal is at a high level, that is, during the period in which the system power switch S1 is turned on, the switch Ks1 is turned off and the switch Ks2 is turned on; when the driving signal is at a low level, that is, during the off period of the system power switch S1, the switch Ks1 is turned on, and the switch Ks2 is turned off.

During the period when the system power switch S1 is turned on, the switch Ks2 is turned on, the switch Ks1 is turned off, and the voltage-controlled current source 1001 generates a current of a size of Gm*Vvac based on the input voltage of the input voltage Vin (where Gm represents the cross-section of the voltage-controlled current source). The capacitor C2 is charged with this current, and the voltage Vc2 on the capacitor C2 is supplied to the comparator 1002 together with the threshold voltage Vth2.

The output signal of comparator 1002 controls the conduction and deactivation of switches K1 and K2. The output signal of the comparator 1002 is generated based on the voltage Vc2 on the capacitor C2 at the non-inverting input terminal of the comparator 1002 and the threshold voltage Vth2 at the inverting input terminal. When the voltage Vc2 on the capacitor C2 is higher than the threshold voltage Vth2, the output signal of the comparator 1002 is at a high level, the switch K2 is turned on, and the voltage on the capacitor C2 is cleared, at which time the output signal of the comparator 1002 becomes a low level; When the output signal of the comparator 1002 is at a high level, the high level output signal generated by the comparator 1002 and the reverse signal of the low level drive signal are input to the latch 1003, and the latch 1003 outputs a high level signal to cause the switch K1. Turn on. When the output signal of the comparator 1002 changes from a high level to a low level due to the conduction of K2, the high level of the comparator 1002 The output signal is latched at latch 1003 until system power switch S1 is turned off. During the turn-on of K1, the ramp current Iramp charges the capacitor C1 until the ramp voltage Vramp on the capacitor C1 reaches the output voltage characteristic voltage Vcomp and the drive signal becomes a low level; the ramp voltage Vramp on the capacitor C1 is output to the PWM signal generation module. The positive phase input of 902. When the driving signal generated by the driving module 904 is low, the system power switch S1 is turned off, and the switch Ks1 is turned on. At this time, the ramp voltage Vramp (ie, the voltage on the capacitor C1) is clamped at V1.

Figure 11a is a schematic diagram of the operating waveform of voltage Vc2, ramp voltage Vramp, and drive signal (i.e., signal at the GATE pin) when the input AC signal V _{AC is} near the peak; Figure 11b is the input AC signal V _AC Schematic diagram of the operating waveform of voltage Vc2, ramp voltage Vramp, and drive signal (ie, the signal at the GATE pin) near the bottom of the valley.

As shown in Figures 11a-11b, after the drive signal becomes high (ie, system power switch S1 is turned on), voltage controlled current source 1001 is controlled by input voltage characterization voltage Vvac to generate a current to charge capacitor C2, when capacitor C2 When the upper voltage Vc2 rises to the threshold voltage Vth2, the switch K1 is turned on and the capacitor on the capacitor C2 is cleared. At this time, the ramp voltage Vramp on the capacitor C1 starts to rise; when the ramp voltage Vramp is higher than the output voltage characteristic voltage Vcomp, the drive is driven. The signal goes low and the ramp voltage Vramp is clamped to V1. Wherein, the driving signal is at a high level time, that is, the system power switch S1 on-time Ton is composed of two parts, one part is the time ramp of the ramp voltage Vramp rising from V1 to the output voltage characterization voltage Vcomp; the other part is the voltage Vc2 on the capacitor C2 The time Td2 rising to the threshold voltage Vth2. During one power frequency cycle of the AC power source, the output voltage characterization voltage Vcomp is constant, so the rise time of the ramp voltage Vramp is constant, and only the rise time Td2 of Vc2 varies with the input voltage characterization voltage Vvac.

Among them, the capacitor charging formula is: Vvac × Gm × Td 2 = C 2 × Vth 2

The input voltage is characterized by a voltage Vvac by dividing the input voltage Vin The resulting sampling voltage, the capacitance C2 of the capacitor C2, the internal thresholds Vth2 and Gm are all constant, and Td2 only characterizes the voltage Vvac (corresponding to the input voltage Vin) with the input voltage. In the vicinity of the power frequency peak of the AC power supply, the input voltage Vin is high, the current for charging the capacitor C2 is large, and the time for Vc2 rising to Vth2 is short, as shown in Fig. 11a; the input voltage Vin is low near the power frequency valley of the AC power source. The current for charging capacitor C2 is small, and Vc2 rises to Vth2 for a long time, as shown in Fig. 11b. In this way, the on-time Ton of the system power switch S1 is inversely proportional to the input voltage Vin, thereby increasing the length of the on-time Ton of the system power control switch S1 at the power frequency valley of the AC power source, and eliminating the average value of the input current in the AC power source. The phase loss of the power frequency valley bottom and the current distortion of the input current during the entire power frequency cycle.

As can be seen in conjunction with Figures 1 through 11b, the present invention provides such a system for providing an output voltage to a load, comprising: a switch control element configured to demagnetize according to a demagnetization condition characterizing an inductor in series with a load A characterization signal (eg, a demagnetization characterization signal generated by the demagnetization sensing module 505/905 based on the demagnetization characterization voltage Vcs), an output voltage characterization signal characterizing the output voltage output to the load (eg, by an error amplifier (EA) module 506 The /960 generated output voltage characterizes the voltage Vcomp), and the reference signal (eg, Vth or Vth2) generates a control signal and uses the control signal to control the turn-on and turn-off of the system power switch, wherein the system power switch, capacitor, and load are connected in parallel Between the inductor and the ground.

The system according to the present invention can eliminate the phase loss of the average value of the input current when the AC input voltage is at the bottom of the valley, and reduce the distortion of the input current during the entire power frequency period of the AC power source.

The functional blocks shown in the block diagrams described above may be implemented as hardware, software, firmware, or a combination thereof. When implemented in a hardware manner, it may be, for example, an electronic circuit, an Application-Specific Integrated Circuit (ASIC), an appropriate firmware, a plug-in, a function card, or the like. When implemented in software, the elements of the present invention are programs or code segments that are used to perform the required tasks. The program or code segments may be stored on a machine readable medium or transmitted over a transmission medium or communication link by a data signal carried in a carrier. "Computer-readable medium" can include any medium that is capable of storing or transmitting information. quality. Examples of the machine readable medium include an electronic circuit, a semiconductor memory device, a ROM, a flash memory, an Erasable Read Only Memory (EROM), a floppy disk, and a CD-ROM (Compact Disc Read-Only Memory, only Read memory discs), CDs, hard drives, fiber media, radio frequency (RF) links, and more. The code segments can be downloaded via a computer network such as the Internet, an intranet, and the like.

The invention may be embodied in other specific forms without departing from the spirit and essential characteristics. For example, the algorithms described in the specific embodiments can be modified, and the system architecture does not depart from the basic spirit of the invention. The present embodiments are to be considered in all respects as illustrative and not restrict All changes in the scope are thus included in the scope of the invention.

Vcs‧‧‧Demagnetization characterization signal

500‧‧‧Switch control components

Iramp‧‧‧ ramp current

Vref_ea‧‧‧ reference signal

Trigger‧‧‧ trigger signal

Vcomp‧‧‧Output voltage characterization voltage

PWM‧‧‧ pulse width modulation

Vth‧‧‧negative threshold voltage

Por‧‧‧Power-on reset signal

501‧‧‧Ramp signal generation module

502‧‧‧ Pulse width modulation (PWM) signal generation module

503‧‧‧Logic Control Module

504‧‧‧Drive Module

505‧‧‧Demagnetization Sensing Module

506‧‧‧Error Amplifier (EA) Module

507‧‧‧Undervoltage protection (UVLO) module

INV, GATE, COMP, CS, GND, VCC‧‧‧ terminals

Claims (16)

A system for providing an output voltage to a load, comprising: a switch control element configured to characterize a signal based on a demagnetization characterization signal characterizing a demagnetization condition of an inductor in series with the load, an output voltage characterizing an output voltage output to the load And generating, by the reference signal, a control signal for controlling conduction and deactivation of the system power switch, wherein the system power switch, the parasitic capacitor of the system power switch, and the load are connected in parallel to the inductor Between the device and the ground; the switch control element generates a ramp voltage signal using the ramp current signal based on the demagnetization characterization signal and the reference signal, and based on the ramp voltage signal, the demagnetization characterization signal, and the output voltage Characterizing a signal to generate the control signal; the switch control element maintaining the ramp voltage signal at a predetermined voltage when the demagnetization characterization signal is higher than the reference signal, and dropping the demagnetization characterization signal to be equal to the reference Signaling the slope current signal to cause the slope Pressure signal is increased, and the ramp voltage signal is equal to the predetermined restore voltage characterizing said output voltage signal of the ramp voltage signal. The system of claim 1, wherein the switch control element comprises a ramp signal generation module, the ramp signal generation module comprising: a comparator, a first switch, a second switch, a capacitor, and a buffer amplifier Wherein the demagnetization characterization voltage is input to a negative phase input of the comparator, the reference signal is input to a non-inverting input of the comparator, and an output signal of the comparator controls the first switch Turning on and off; the predetermined voltage is input to a non-inverting input of the buffer amplifier, an inverting input of the buffer amplifier is coupled to an output of the buffer amplifier; and the second switch is turned on and off Controlled by the control signal; the ramp current charges the capacitor via the first switch when the first switch is turned on and the second switch is turned off, when the first switch is turned off or the second When the switch is turned on The voltage across the capacitor is maintained at the predetermined voltage. The system of claim 1, wherein the switch control element generates the output voltage characterization signal based on an output voltage output to the load and a second reference signal. The system of claim 3, wherein the demagnetization characterization signal is generated based on a current flowing through the inductor. The system of claim 3, further comprising: an AC rectifying element configured to rectify an AC input voltage, wherein the AC rectifying element comprises first, second, third, and fourth a rectifying element terminal, the first and second rectifying element terminals are respectively connected to both ends of an alternating current power source, and the third and fourth rectifying element terminals are respectively connected to the system power switch and the ground. A system for providing an output voltage to a load, comprising: a switch control element configured to characterize a signal based on a demagnetization characterization signal characterizing a demagnetization condition of an inductor in series with the load, an output voltage characterizing an output voltage output to the load And generating, by the reference signal, a control signal for controlling conduction and deactivation of the system power switch, wherein the system power switch, the parasitic capacitor of the system power switch, and the load are connected in parallel to the inductor Between the device and the ground; the switch control element further generates the control signal based on an input voltage characterization signal characterizing a rectified input voltage rectified from an alternating input voltage; the switch control element characterizing the signal based on the input voltage Generating a ramp voltage signal with the ramp current signal and generating the control signal based on the ramp voltage signal, the demagnetization characterization signal, and the output voltage characterization signal; the switch control element is at the input The voltage characterization signal rises equal to the reference Start with the current ramp signal causes the ramp signal voltage increases from a predetermined voltage signal, and the ramp voltage signal is equal to the predetermined restore voltage characterizing said output voltage signal of the ramp voltage signal. The system of claim 6, wherein the switch control component comprises a ramp signal generation module, the ramp signal generation module comprises: a voltage controlled current source, a first capacitor, a second capacitor, and a comparator a latch, a first switch, a second switch, a third switch, a fourth switch, and a buffer amplifier, wherein the first capacitor, the first switch, and the cross in series with the second switch a current source is connected in parallel between the non-inverting input of the comparator and ground, the reference signal is input to an inverting input of the comparator, and an output signal of the comparator controls the first switch Turning on and off and being input to a first input of the latch; the control signal is input to a second input of the latch, the output signal of the latch controlling the third Turning on and off of the switch; the predetermined voltage is input to a non-inverting input of the buffer amplifier, an inverting input of the buffer amplifier is coupled to an output of the buffer amplifier; the second switch and the fourth Turning on and off of the switch is controlled by the control signal; when the third switch is turned on and the fourth switch is turned off, the ramp current is charged to the second capacitor via the third switch, when the third The voltage on the second capacitor is maintained at the predetermined voltage when the switch is turned off or the fourth switch is turned on. The system of claim 6, wherein the switch control element generates the output voltage characterization signal based on an output voltage output to the load and a second reference signal. The system of claim 8 wherein the demagnetization characterization signal is generated based on current flowing through the inductor. The system of claim 8 , further comprising: an AC rectifying element configured to rectify an AC input voltage, wherein the AC rectifying element comprises first, second, third, and fourth a rectifying element terminal, the first and second rectifying element terminals are respectively connected to both ends of an alternating current power source, and the third and fourth rectifying element terminals are respectively connected to the system power switch and the ground. A method for providing an output voltage to a load, comprising: Degenerating a characterization signal representative of a demagnetization condition of an inductor in series with a load, an output voltage characterization signal characterizing an output voltage output to the load, and a reference signal generation control signal, and utilizing the control signal to control a system power switch Turning on and off, wherein the system power switch, a parasitic capacitor of the system power switch, and the load are connected in parallel between the inductor and ground; wherein a slope is utilized based on the demagnetization characterization signal and the reference signal The current signal generates a ramp voltage signal and generates the control signal based on the ramp voltage signal, the demagnetization characterization signal, and the output voltage characterization signal; the said demagnetization characterization signal is higher than the reference signal The ramp voltage signal is maintained at a predetermined voltage, and the ramp voltage signal is increased with the ramp current signal when the demagnetization flag signal falls to be equal to the reference signal, and the ramp voltage signal is equal to the output Recharging the ramp voltage signal to the voltage when the voltage is characterized Constant voltage. The method of claim 11, wherein the method further comprises: generating the output voltage characterization signal based on an output voltage output to the load, and a second reference signal. The method of claim 12, wherein the demagnetization characterization signal is generated based on a current flowing through the inductor. A method for providing an output voltage to a load, comprising: demagnetizing a characterization signal indicative of a demagnetization condition of an inductor in series with a load, an output voltage characterization signal characterizing an output voltage output to the load, and a reference signal generating a control signal And using the control signal to control conduction and deactivation of a system power switch, wherein the system power switch, a parasitic capacitor of the system power switch, and the load are connected in parallel between the inductor and ground; Generating the control signal based on an input voltage characterization signal characterizing a rectified input voltage rectified from an alternating input voltage; generating a ramp voltage signal based on the input voltage characterization signal and the reference signal using a ramp current signal, and based on The ramp voltage signal, the demagnetization characterization signal, and the output A voltage characterization signal generates the control signal; when the input voltage characterization signal rises to be equal to the reference signal, begins to increase the ramp voltage signal from a predetermined voltage with the ramp current signal, and at the ramp voltage signal The ramp voltage signal is restored to the predetermined voltage when the output voltage is characterized by a signal. The method of claim 14, wherein the method further comprises: generating the output voltage characterization signal based on an output voltage output to the load, and a second reference signal. The method of claim 15, wherein the demagnetization characterization signal is generated based on a current flowing through the inductor.