TW201810889A - System and method for providing output voltage for load - Google Patents

Abstract

The invention provides a system and a method for providing output voltage for a load. The system comprises a switch control component configured to generate a control signal according to a demagnetization representation signal representing the demagnetization condition of an inductor serially connected with the load, an output voltage representation signal representing the output voltage output to the load and a reference signal and control the on and off of a system power switch by using the control signal, wherein the system power switch, a capacitor and the load are connected in parallel between the inductor and the ground. According to the system provided by the invention, the default phase of the average value of input current when alternating current input voltage is in the valley can be eliminated, and the distortion of the input current during the whole power frequency period of an alternating current power supply is reduced.

Description

System and method for providing output voltage to a load

The present invention relates to the field of circuits, and more particularly to a system and method for providing an output voltage to a load.

At present, power factor correction switching converters based on Boost architecture are widely used. However, the input current harmonic distortion (THD) of the Boost power factor correction converter in the traditional constant-on-time operation mode is relatively large, and cannot be applied in the place where the harmonic distortion is required, and an optimized circuit can be added to it. Meet harmonic requirements.

The invention provides a system for providing an output voltage to a load, comprising: a switching control element configured to characterize a demagnetization signal that characterizes a demagnetization situation of an inductor connected in series with the load, and an output voltage characterizing an output voltage output to the load The characterization signal and the reference signal generate a control signal, and use the control signal to control the on and off of the system power switch. The system power switch, capacitor, and load are connected in parallel between the inductor and ground.

The invention also provides a method for providing an output voltage to a load, comprising: a demagnetization characterization signal characterizing a demagnetization condition of an inductor connected in series with the load; an output voltage characterization signal characterizing an output voltage output to the load; and a reference signal Generate a control signal and use the control signal to control the on and off of the system power switch. The system power switch, capacitor, and load are connected in parallel between the inductor and ground.

The system and method according to the present invention can eliminate phase loss when the average value of the input current is at the bottom of the AC input voltage, and reduce the distortion of the input current during the entire power frequency period of the AC power supply.

Vcs‧‧‧ Demagnetization Characterization Signal

100, 800‧‧‧BOOST quasi-resonant switching power supply

Vramp‧‧‧Ramp voltage

102、802‧‧‧AC rectifier

Iramp‧‧‧ Ramp Current

104, 500, 804‧‧‧ Switch control element

C1, C2‧‧‧ capacitors

106, 806‧‧‧ voltage output components

Vc2‧‧‧Voltage

Vref_ea‧‧‧Reference signal

V _AC ‧‧‧ AC input voltage

Vcomp‧‧‧Output voltage characterization voltage

Vin‧‧‧ Rectified Input Voltage

Rcs‧‧‧Resistor

L‧‧‧ inductor

Td‧‧‧ Demagnetization time

S1‧‧‧System Power Switch

Tr‧‧‧Resonance time

Iin‧‧‧Inductor current

I _{n_pk ‧‧‧Peak of} negative resonance current

I _PK ‧‧‧ peak inductor current

Vth‧‧‧ negative threshold voltage

Vo‧‧‧ output voltage

Vth2‧‧‧threshold voltage

C _ds ‧‧‧parasitic capacitor

601, 1002‧‧‧‧ Comparator

OP‧‧‧Buffer Amplifier

1001‧‧‧ Voltage-Controlled Current Source

V1‧‧‧Voltage

1003‧‧‧ Latch

Vvac‧‧‧Input voltage characterization signal

Gm‧‧‧ Transconductance of voltage-controlled current source

Trigger‧‧‧Trigger signal

por‧‧‧ Power-on reset signal

PWM‧‧‧Pulse Width Modulation

Iin_ave‧‧‧Average of input current

Tramp‧‧‧ Ramp voltage Vramp rise time from V1 to output voltage characterization voltage Vcomp

Td1‧‧‧ Time of demagnetization characteristic voltage Vcs falling to negative threshold voltage Vth

Td2‧‧‧The time when the voltage Vc2 on the capacitor C2 rises to the threshold voltage Vth2

Ton‧‧‧ System power switch S1 on time

201, 501, 901‧‧‧‧Slope signal generation module

202, 502, 902‧‧‧‧Pulse width modulation (PWM) signal generation module

203, 503, 903‧‧‧Logic Control Module

204, 504, 904‧‧‧ drive modules

205, 505, 905‧‧‧‧ Demagnetization sensor module

206, 506, 906‧‧‧‧ Error Amplifier (EA) Module

207, 507, 907‧‧‧ Under Voltage Protection (UVLO) Module

INV, CS / ZCD, GATE, COMP, CS, GND, VCC, VIN, VAC‧‧‧ terminals

K1, K2, Ks, Ks1, Ks2‧‧‧ switches

The present invention can be better understood from the following description of specific embodiments of the present invention with reference to the accompanying drawings, wherein: FIG. 1 is a circuit diagram of a system for providing an output voltage to a load according to an embodiment of the present invention; FIG. 2 is The schematic block diagram of the switching control element shown in Figure 1; Figure 3a is a waveform diagram of the input current in the system shown in Figure 1 when the AC input voltage is near the peak; Figure 3b is when the AC input voltage is When it is near the bottom of the valley, the waveform of the input current in the system shown in Figure 1; Figure 4 is the average value of the input current in the system shown in Figure 1 with a standard sine wave within one power frequency period of the AC power supply Fig. 5 is a schematic block diagram of a switch control element according to an embodiment of the present invention; Fig. 6 is a schematic diagram of a ramp signal generating module shown in Fig. 5; Fig. 7 is a diagram using Fig. 5 Schematic diagram of the operating waveforms of the inductor current characterization signal (ie, the demagnetization characterization signal Vcs), the ramp voltage Vramp, and the driving signal in the system of the switching control element shown; FIG. 8 is a diagram according to another embodiment of the present invention. A circuit diagram of a system for providing an output voltage to a load; FIG. 9 is a schematic block diagram of a switching control element in the system shown in FIG. 8; and FIG. 10 is a schematic diagram of a ramp signal generating module shown in FIG. 9 Figure 11a is a schematic diagram of the operating waveforms of the voltage Vc2, the ramp voltage Vramp, and the driving signal on the capacitor C2 in the system shown in Figure 8 when the AC input voltage is near the peak; Figure 11b is the AC input voltage When it is near the bottom of the valley, the voltage Vc2, the ramp voltage Vramp, and the driving waveforms of the capacitor C2 in the system shown in Figure 8 are shown. intention.

Features and exemplary embodiments of various aspects of the invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to a person skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely for providing a better understanding of the present invention by showing examples of the present invention. The invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

FIG. 1 is a circuit diagram of a system (ie, a BOOST quasi-resonant switching power supply) for providing an output voltage to a load according to an embodiment of the present invention. As shown in FIG. 1, the BOOST quasi-resonant switching power supply 100 includes an AC rectifying element 102, a switching control element 104, and a voltage output element 106. The AC rectifying element 102 receives an AC input voltage V _AC from an AC power source and converts the AC input voltage V _AC into a rectified input voltage Vin (hereinafter referred to as input voltage Vin) to provide an output voltage to the load. The switching control element 104 senses the output voltage output to the load through the INV terminal, and senses the demagnetization characteristic voltage that characterizes the demagnetization of the inductor L in series with the load in the voltage output element 106 through the CS / ZCD terminal, and is based on the sensed The output voltage and demagnetization characteristic voltage are output through the GATE terminal to drive the system power switch S1 on and off, thereby adjusting the output voltage provided to the load.

When the system power switch S1 is turned on, the input voltage Vin charges the inductor L in the voltage output element 106. The peak value I _PK of the inductive current (ie, the input current Iin) flowing through the inductor L is determined by the on-time Ton of the system power switch S1 (ie, the duration of the system power switch S1 in the on-state):

When the system power switch S1 changes from on to off, the difference Vo-Vin between the output voltage Vo and the input voltage Vin demagnetizes the inductor L. The demagnetization characteristic voltage that characterizes the demagnetization of the inductor L is determined by the CS / ZCD terminal sensing. After the demagnetization of the inductor L, the parasitic capacitor C _{ds of the} system power switch S1 and the inductor L resonate. When the voltage across the system power switch S1 resonates to the bottom, the system power switch S1 will be turned on again.

Fig. 2 is a schematic block diagram of a switching control element shown in Fig. 1. As shown in FIG. 2, the switching control element 104 includes a GATE terminal, an INV terminal, a CS terminal, a GND terminal, a COMP terminal, and a VCC terminal, and includes a ramp signal generation module 201, a pulse width modulation (PWM) ) Signal generation module 202, logic control module 203, drive module 204, demagnetization sensor module 205, error amplifier (EA) module 206, and under voltage lock out (UVLO) module Group 207.

As shown in FIG. 2, the ramp signal generating module 201 is connected to the non-inverting input terminal of the PWM signal generating module 202. The COMP terminal and the output terminal of the error amplifier (EA) module 206 are connected to the inverting input terminal of the PWM signal generating module 202. The output end of the PWM signal generating module 202 is connected to the logic control module 203, the logic control module 203 is connected to the driving module 204, and the driving module 204 is connected to the GATE terminal. The CS terminal is connected to the demagnetization sensing module 205, and the demagnetization sensing module 205 is connected to the logic control module 203. The INV terminal is connected to the inverting input terminal of the error amplifier (EA) module 206. The GND terminal is grounded. The VCC terminal is connected to the under-voltage protection module 207.

Specifically, during the on time Ton of the system power switch S1, the ramp signal generating module 201 generates a ramp voltage Vramp based on a predetermined ramp current Iramp, and outputs the ramp voltage Vramp to the non-inverting input terminal of the PWM signal generating module 202; The error amplifier (EA) module 206 generates an output voltage characterization voltage Vcomp (ie, the voltage at the COMP terminal) based on the voltage at the INV terminal connected to its inverting input and the reference signal Vref_ea input to its non-inverting input, and The output voltage characterization voltage Vcomp is output to the inverting input terminal of the PWM signal generation module 202; the PWM signal generation module 202 generates a PWM modulation signal by comparing the ramp voltage Vramp with the output voltage characterization voltage Vcomp And output the PWM modulation signal to the logic control module 203; the demagnetization sensing module 205 generates a demagnetization characterization signal based on the demagnetization characterization voltage at the CS terminal, and outputs the demagnetization characterization signal to the logic control module 203; the logic control The module 203 generates a control signal based on the PWM modulation signal and the demagnetization characterization signal. The driving module 204 generates a driving signal based on the control signal to drive the system power switch S1 on and off. Here, the voltage at the INV terminal is obtained by dividing the output voltage Vo.

As shown in FIGS. 1 and 2, the inductor current Iin flowing through the inductor L generates a voltage Vcs through a resistor Rcs and a Resistor-Capacitor (RC) filter element, and this voltage is sent to the CS terminal. The magnitude of the voltage Vcs at the CS terminal can characterize the magnitude of the inductor current and thus the demagnetization of the inductor L. Therefore, the voltage Vcs at the CS terminal is referred to herein as the demagnetization characteristic voltage. Since the inductor current Iin flows from the GND terminal to the CS terminal of the control element 104, the voltage Vcs on the CS terminal is a negative voltage, that is, Vcs = -Iin * Rcs. When the voltage at the CS terminal is higher than a negative threshold value (for example, -10mV) that is close to zero, it is determined that the demagnetization of the inductor L is completed. At this time, the parasitic capacitor C _{ds of the} system power switch S1 and the inductor L resonate. After a period of time, After time (for example, 1us (Microsecond)), the voltage across the system power switch S1 resonates to the bottom. At this time, the system power switch S1 is turned on by logic control and driving the output high level. In some embodiments, the demagnetization of the inductor L may not be sensed directly from the voltage Vcs at the CS terminal. The demagnetization characteristic signal may be generated by a conventional inductive coupling method.

During the on-time of the system power switch S1, when the ramp signal generating module 201 generates a ramp voltage Vramp based on a predetermined ramp current Iramp that is higher than the output voltage characteristic voltage Vcomp, the PWM signal generating module 202 generates a low level PWM modulation Signal; the inductor L is in the charging process instead of the demagnetization process, the demagnetization sensing module 205 generates a low-level demagnetization signal; the logic control module 203 generates a low-level based on the low-level PWM modulation signal and the low-level demagnetization signal The control module 204 generates a low-level driving signal based on the low-level control signal, so that the system power switch S1 is turned off (the waveform of the driving signal generated by the driving module 204 and the control signal generated by the logic control module 203 The same waveform).

It can be seen that the output voltage characteristic voltage Vcomp generated by the error amplifier (EA) module 206 determines the on-time Ton of the system power switch S1. The output voltage characteristic voltage Vcomp is basically constant within one power frequency period of the AC power source, which determines that the on-time Ton of the system power switch S1 within one power frequency period of the AC power source is constant. In such an operating mode in which the on-time Ton of the system power switch S1 is fixed, the waveform of the inductive current (ie, the input current Iin) flowing through the inductor L is as shown in Figs. 3a and 3b.

In the cases shown in Figures 3a and 3b, the average value of the input current Iin can be calculated from the waveform of the input current Iin as follows:

The points are:

Among them, Ton represents the on-time of the system power switch S1 (ie, the charging time of the inductor L), Td represents the demagnetization time of the inductor L, and Tr represents the resonance time of the inductor L and the parasitic capacitor C _ds of the system power switch S1.

I _PK is the peak value of the input current Iin:

I _{n_pk} is the peak value of the negative resonance current:

Demagnetization time of inductor L:

Resonant time of inductor L:

In one power frequency period of the AC power supply, the output voltage characterizing voltage Vcomp is constant, so the on-time Ton of the system power switch S1 is constant; the inductance L of the inductor L and the parasitic capacitor C _{ds of the} system power switch S1 are fixed, so they resonate The time Tr is also fixed; near the peak of the AC input voltage V _AC , the input voltage Vin is large, the negative resonance current peak I _{n_pk is} low, the inductor current peak I _{PK is} high, and the demagnetization time Td is also long, and the proportion of the negative resonance current Small, the waveform is as shown in Figure 3a; near the bottom of the AC input voltage V _AC , the input voltage Vin is small, the negative resonant current peak I _{n_pk is} high, the inductor current peak I _{PK is} low, and the demagnetization time Td is also short, negative The proportion of the resonance current is large, and the waveform is as shown in Figure 3b. At this time, the negative resonance current may even cancel out the forward current, resulting in that the input current Iin cannot follow the waveform of the input voltage Vin.

The waveform of the average value of the input current Iin within one power frequency period of the AC power source is shown in Figure 4. FIG. 4 is a diagram showing a comparison between the waveform of the average value of the input current Iin of the system shown in FIG. 1 and a standard sine wave. From the analysis of the previous formula, it can be concluded that the input current Iin is distorted during the entire power frequency period of the AC power supply compared with the standard sine wave, and the distortion is most serious near the bottom of the AC input voltage V _AC .

Therefore, the harmonic distortion generated by the switching control element shown in FIG. 2 is large, and it cannot be applied in a place with high requirements for harmonic distortion (THD).

In order to solve one or more problems existing in the system described in conjunction with Figs. 1-4, a novel switching control element for the system shown in Fig. 1 described below in detail with reference to Figs. 5 to 7 is proposed. The switch The control element has the same pins as the switching control element shown in FIG. 2, and can minimize the total current distortion in the system shown in FIG. 1.

FIG. 5 is a schematic block diagram of a switch control element according to an embodiment of the present invention. As shown in FIG. 5, the switching control element 500 includes a ramp signal generating module 501, a PWM signal generating module 502, a logic control module 503, a driving module 504, a demagnetization sensing module 505, and an error amplifier (EA) module. Group 506, and under-voltage protection (UVLO) module 507.

Among the switching control elements shown in FIG. 5, the ramp signal generating module 501, the PWM signal generating module 502, the logic control module 503, the driving module 504, the demagnetization sensing module 505, and the error amplifier (EA) module Group 506, and UVLO module The connection relationship between the 507 and the signal processing flow are the same as the connection relationship between the corresponding modules shown in FIG. 2 and the signal processing flow, and are not repeated here.

In addition, in the switching control element shown in FIG. 5, the ramp signal generating module 501 generates a ramp voltage Vramp based on the demagnetization characteristic voltage Vcs at the CS terminal, the negative threshold voltage Vth, and a predetermined ramp current Iramp, where the negative direction The threshold voltage Vth is a predetermined voltage.

FIG. 6 is a schematic block diagram of the ramp signal generating module shown in FIG. 5. As shown in FIG. 6, the ramp voltage generating module 501 includes a comparator 601, a switch K1, a switch Ks, a buffer amplifier OP, and a capacitor C1.

In the ramp signal generating module shown in FIG. 6, turning on and off of the switch Ks is controlled by a driving signal generated by the driving module 504 (that is, controlled by a control signal generated by the logic control module 503). Specifically, when the driving signal is at a high level, that is, the system power switch S1 is turned on, the switch Ks is turned off; when the driving signal is at a low level, that is, the system power switch S1 is turned off, the switch Ks is turned on, and at this time the ramp voltage Vramp (that is, the capacitor The voltage on C1) is clamped to V1.

In the ramp signal generating module shown in FIG. 6, the on and off of the switch K1 is controlled by the output signal of the comparator 601, wherein the output signal of the comparator 601 is based on the demagnetization characteristic voltage of the non-inverting input terminal of the comparator 601 Vcs and the negative threshold voltage Vth of the inverting input are generated. When the system power switch S1 is on, the input voltage Vin charges the inductor L, and the demagnetization characteristic voltage Vcs decreases from 0V. When the demagnetization characteristic voltage Vcs is higher than the negative threshold voltage Vth, the output signal of the comparator 601 is at a low level. At this time, K1 is turned off; when the demagnetization characteristic voltage Vcs is lower than the negative threshold voltage Vth, the output signal of the comparator 601 is at a high level. At this time, K1 is turned on and the ramp current Iramp charges the capacitor C1 until the ramp voltage Vramp on the capacitor C1 Until the output voltage characteristic voltage Vcomp is reached and the driving signal becomes low level; the ramp voltage Vramp on the capacitor C1 is output to the non-inverting input terminal of the PWM signal generating module 502.

In the ramp signal generating module 501 shown in FIG. 6, when the switch Ks is turned on, When the switch is on, the voltage on the capacitor C1 is maintained at V1; when the switches Ks and K1 are both off, the voltage on the capacitor C1 is still maintained at V1; when the switch K1 is on and the switch Ks is off, the ramp current Iramp charges the capacitor C1, Until the ramp voltage Vramp on the capacitor C1 reaches the output voltage characteristic voltage Vcomp and the driving signal becomes a low level; the ramp voltage Vramp on the capacitor C1 is output to the non-inverting input terminal of the PWM signal generating module 502.

FIG. 7 is a schematic diagram of operation waveforms of the demagnetization characterization voltage Vcs, the ramp voltage Vramp, and the driving signal (ie, the signal at the GATE pin). As shown in Figure 7, when the Vcs voltage rises above a near-zero negative voltage (for example, -10mV), it is determined that the demagnetization of the inductor L is over. Through logic control and drive output high level, the drive signal is high level ( That is, during the system power switch S1 is on), the inductor L is charged, and the demagnetization characteristic voltage Vcs at the CS terminal starts to decrease from 0V. When the demagnetization characteristic voltage Vcs reaches the negative threshold voltage Vth, the switch K1 is turned on and the ramp current Iramp starts The capacitor C1 is charged, and the ramp voltage Vramp on the capacitor C1 starts to rise. When the ramp voltage Vramp reaches the output voltage characteristic voltage Vcomp, the drive signal becomes low level, the system power MOS field effect transistor S1 is turned off, and the demagnetization characteristic voltage Vcs starts to rise. The ramp voltage Vramp is clamped to V1. The time when the driving signal is at a high level (that is, the on time Ton of the system power switch S1) is composed of two parts, one is the time Tramp when the ramp voltage Vramp rises from V1 to the output voltage characterizing voltage Vcomp, because the output voltage characterizing voltage Vcomp Basically constant, so Tramp is also constant; the other part is the time Td1 when the demagnetization characteristic voltage Vcs drops to the negative threshold voltage Vth.

According to the following inductor current charging formula:

Among them, Rcs is the inductor current sensing resistance, and L is the inductance of the inductor L. For a given system, the internal thresholds Vth and Rcs are constant. Td1 is inversely proportional to the input voltage Vin. The smaller the input voltage Vin, the larger Td1. This allows the on-time Ton of the system power switch S1 to be inversely proportional to the input voltage Vin, thereby increasing the system power control at the bottom of the power frequency of the AC power supply. The duration of the on-time Ton of the switch S1, eliminating the average value of the input current at The lack of phase at the bottom of the power frequency of the AC power supply and reducing the current distortion of the input current throughout the power frequency cycle.

If the BOOST quasi-resonant switching power supply system can sense the rectified input voltage Vin, then the input voltage Vin can be used to achieve harmonic optimization.

FIG. 8 is a circuit diagram of a system for providing an output voltage to a load according to another embodiment of the present invention. As shown in FIG. 8, a system 800 for providing an output voltage to a load according to another embodiment of the present invention includes an AC rectifying element 802, a switching control element 804, and a voltage output element 806. The AC rectifying element 802 receives an AC input voltage V _AC from an AC power source and converts the AC input voltage V _AC into a rectified input voltage Vin (hereinafter simply referred to as the input voltage Vin) to provide an output voltage to the load. The switching control element 804 senses the input voltage Vin, the output voltage output to the load, and a demagnetization characteristic voltage that characterizes the demagnetization of the inductor L in series with the load in the voltage output element 806, and is based on the sensed input voltage and output voltage. And demagnetization characterize the on and off of the power switch S1 of the voltage control system, thereby adjusting the output voltage of the load. Here, the switching control element 804 senses the input voltage Vin by sampling the input voltage Vin using a voltage dividing element, and senses the output voltage Vo by sampling the output voltage Vo using a voltage dividing element.

Fig. 9 is a schematic block diagram of a switch control element used in the system shown in Fig. 8. As shown in FIG. 9, the switching control element 804 includes a ramp signal generating module 901, a PWM signal generating module 902, a logic control module 903, a driving module 904, a demagnetization sensing module 905, and an error amplifier (EA) module. Group 906, and undervoltage protection (UVLO) module 907.

Among the switching control elements shown in FIG. 9, the switching control element 804 has a VAC terminal in addition to a GATE terminal, a VIN terminal, a CS terminal, a GND terminal, a COMP terminal, and a VCC terminal, and a ramp signal generation module therein 901, connection between PWM signal generating module 902, logic control module 903, driving module 904, demagnetization sensing module 905, error amplifier (EA) module 906, and undervoltage protection (UVLO) module 907 The relationship and the signal processing flow and the connection relationship between the corresponding modules shown in FIG. 2 and the signal processing flow are the same, and are not repeated here.

In the switching control element shown in FIG. 9, the ramp signal generating module 901 generates a ramp voltage Vramp based on the input voltage characterization signal Vvac, the threshold voltage Vth2 received by the VAC terminal, and a predetermined ramp current Iramp, where the threshold voltage Vth2 is Predetermined voltage.

FIG. 10 is a schematic diagram of the ramp signal generating module shown in FIG. 9. As shown in FIG. 10, the ramp voltage generating module 901 includes a voltage-controlled current source 1001, capacitors C1-C2, a comparator 1002, a latch 1003, switches K1-K2, switches Ks1-Ks2, and a buffer amplifier OP.

In the ramp signal generating module shown in FIG. 10, turning on and off of the switches Ks1-Ks2 is controlled by a driving signal (ie, a control signal generated by the logic control module 903) generated by the driving module 904. Specifically, when the driving signal is at a high level, that is, the system power switch S1 is turned on, the switch Ks1 is turned off and the switch Ks2 is turned on; when the driving signal is at a low level, that is, the system power switch S1 is turned off, the switch Ks1 is turned on and the switch Ks2 is turned off.

During the power-on period of the system power switch S1, the switch Ks2 is turned on, the switch Ks1 is turned off, and the voltage-controlled current source 1001 generates a current of the size Gm * Vvac based on the input voltage Vin input voltage (where Gm represents the voltage-controlled current source The capacitor C2 is charged with this current, and the voltage Vc2 on the capacitor C2 is sent to the comparator 1002 together with the threshold voltage Vth2.

The output signal of the comparator 1002 controls the on and off of the switches K1 and K2. The output signal of the comparator 1002 is generated based on the voltage Vc2 on the capacitor C2 at the non-inverting input terminal of the comparator 1002 and the threshold voltage Vth2 at the inverting input terminal. When the voltage Vc2 on the capacitor C2 is higher than the threshold voltage Vth2, the output signal of the comparator 1002 is high, the switch K2 is turned on, and the voltage on the capacitor C2 is cleared. At this time, the output signal of the comparator 1002 becomes low. When the output signal of the comparator 1002 is high level, the reverse signal of the high level output signal and the low level drive signal generated by the comparator 1002 is input to the latch 1003, and the latch 1003 outputs the high level signal to cause the switch K1 Continuity. When the output signal of the comparator 1002 changes from the high level to the low level due to the conduction of K2, the high level of the comparator 1002 The output signal is latched at the latch 1003 until the system power switch S1 is turned off. During the K1 on-time, the ramp current Iramp charges the capacitor C1 until the ramp voltage Vramp on the capacitor C1 reaches the output voltage characteristic voltage Vcomp and the driving signal becomes a low level; the ramp voltage Vramp on the capacitor C1 is output to the PWM signal generating module Non-inverting input of 902. When the driving signal generated by the driving module 904 is at a low level, the system power switch S1 is turned off and the switch Ks1 is turned on. At this time, the ramp voltage Vramp (that is, the voltage on the capacitor C1) is clamped at V1.

Figure 11a is a schematic diagram of the operating waveforms of the voltage Vc2, the ramp voltage Vramp, and the drive signal (ie, the signal at the GATE pin) when the input AC signal V _{AC is} near the peak; Figure 11b is the input AC signal V _AC A schematic diagram of the operating waveforms of the voltage Vc2, the ramp voltage Vramp, and the drive signal (ie, the signal at the GATE pin) when it is near the bottom of the valley.

As shown in Figures 11a-11b, after the driving signal becomes high (that is, the system power switch S1 is turned on), the voltage-controlled current source 1001 is controlled by the input voltage characteristic voltage Vvac to generate a current to charge the capacitor C2. When the capacitor C2 When the voltage Vc2 rises to the threshold voltage Vth2, the switch K1 is turned on and the capacitor C2 is cleared. At this time, the ramp voltage Vramp on the capacitor C1 starts to rise; when the ramp voltage Vramp is higher than the output voltage characteristic voltage Vcomp, the driver The signal goes low and the ramp voltage Vramp is clamped to V1. Among them, the drive signal is a high level time, that is, the system power switch S1 on-time Ton is composed of two parts, one is the time Tramp when the ramp voltage Vramp rises from V1 to the output voltage characteristic voltage Vcomp; the other is the voltage Vc2 on the capacitor C2 Time Td2 for rising to the threshold voltage Vth2. In one power frequency period of the AC power supply, the output voltage characterization voltage Vcomp is constant, so the rise time of the ramp voltage Vramp is constant, and only the rise time Td2 of Vc2 varies with the input voltage characterization voltage Vvac.

Among them, the capacitor charging formula is: Vvac × Gm × Td 2 = C 2 × Vth 2

The input voltage characterization voltage Vvac is obtained by dividing the input voltage Vin The obtained sampling voltage, the capacitance C2 of the capacitor C2, the internal thresholds Vth2 and Gm are all constant, and Td2 changes only with the input voltage characteristic voltage Vvac (equivalent to the input voltage Vin). Near the power frequency peak of the AC power source, the input voltage Vin is high, the current charging the capacitor C2 is large, and the time for Vc2 to rise to Vth2 is short, as shown in Figure 11a. Near the bottom of the power frequency of the AC power source, the input voltage Vin is low. The current for charging capacitor C2 is small, and the time for Vc2 to rise to Vth2 is long, as shown in Figure 11b. In this way, the on-time Ton of the system power switch S1 is inversely proportional to the input voltage Vin, thereby increasing the duration of the on-time Ton of the system power control switch S1 at the bottom of the power frequency valley of the AC power supply, eliminating the average input current in the AC power supply. The lack of phase at the bottom of the power frequency and reduces the current distortion of the input current throughout the power frequency cycle.

As can be seen in conjunction with Figures 1 to 11b, the present invention provides such a system for providing an output voltage to a load, including: a switching control element configured to demagnetize a demagnetization condition of an inductor connected in series with the load Characterization signals (e.g., demagnetization characterization signals generated by demagnetization sensing modules 505/905 based on demagnetization characterization voltage Vcs), output voltage characterization signals (e.g., by error amplifier (EA) module 506) / 906 generates an output voltage characterizing voltage Vcomp) and a reference signal (for example, Vth or Vth2) to generate a control signal, and uses the control signal to control the on and off of the system power switch, where the system power switch, capacitor, and load are connected in parallel Between the inductor and ground.

The system according to the present invention can eliminate phase loss when the average value of the input current is at the bottom of the AC input voltage, and reduce the distortion of the input current during the entire power frequency period of the AC power supply.

The functional blocks shown in the structural block diagram described above may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application-Specific Integrated Circuit (ASIC), appropriate firmware, plug-ins, function cards, and the like. When implemented in software, the elements of the invention are programs or code fragments that are used to perform the required tasks. The program or code fragment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link through a data signal carried on a carrier wave. A "machine-readable medium" may include any medium capable of storing or transmitting information. quality. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, Erasable Read Only Memory (EROM), floppy disks, and Compact Disc Read-Only Memory (CD-ROM). Read memory discs), optical discs, hard drives, fiber optic media, radio frequency (RF) links, and more. The code snippet can be downloaded via a computer network such as the Internet, an intranet, and the like.

The present invention may be implemented in other specific forms without departing from the spirit and essential characteristics thereof. For example, the algorithms described in particular embodiments may be modified without the system architecture departing from the basic spirit of the invention. Therefore, the present embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the present invention is defined by the appended claims rather than the above description, and falls within the meaning and equivalents of the claims. All changes within the scope are thus included in the scope of the present invention.

Vcs‧‧‧ Demagnetization Characterization Signal

500‧‧‧ switch control element

Iramp‧‧‧ Ramp Current

Vref_ea‧‧‧Reference signal

Trigger‧‧‧Trigger signal

Vcomp‧‧‧Output voltage characterization voltage

PWM‧‧‧Pulse Width Modulation

Vth‧‧‧ negative threshold voltage

por‧‧‧ Power-on reset signal

501‧‧‧Slope Signal Generation Module

502‧‧‧Pulse Width Modulation (PWM) Signal Generation Module

503‧‧‧Logic Control Module

504‧‧‧Drive Module

505‧‧‧Demagnetization sensor module

506‧‧‧Error Amplifier (EA) Module

507‧‧‧Under voltage protection (UVLO) module

INV, GATE, COMP, CS, GND, VCC‧‧‧ terminals

Claims (19)

A system for providing an output voltage to a load, comprising: a switching control element configured to characterize a demagnetization signal characterizing a demagnetization condition of an inductor connected in series with the load, and an output voltage characterization signal characterizing an output voltage output to the load And a reference signal to generate a control signal and use the control signal to control the on and off of a system power switch, wherein the system power switch, capacitor, and the load are connected in parallel between the inductor and ground. The system according to item 1 of the patent application scope, wherein the switch control element further generates the control signal according to an input voltage characterization signal characterizing a rectified input voltage obtained by rectifying an AC input voltage. The system according to item 1 of the patent application scope, wherein the switch control element generates a ramp voltage signal using a ramp current signal based on the demagnetization characterization signal and the reference signal, and based on the ramp voltage signal, the demagnetization The characterization signal and the output voltage characterization signal generate the control signal. The system according to item 3 of the scope of patent application, wherein the switch control element maintains the ramp voltage signal at a predetermined voltage when the demagnetization characterization signal is higher than the reference signal, and the demagnetization characterization signal Starting to increase the ramp voltage signal using the ramp current signal when falling to the reference signal, and returning the ramp voltage signal to the predetermined value when the ramp voltage signal is equal to the output voltage characterization signal Voltage. The system according to item 3 or 4 of the scope of patent application, wherein the switch control element includes a ramp signal generating module, the ramp signal generating module includes: a comparator, a first switch, a second switch, a capacitor, and A buffer amplifier, wherein the demagnetization characteristic voltage is input to a negative-phase input terminal of the comparator, the reference signal is input to a non-phase input terminal of the comparator, and an output signal of the comparator controls the first A switch is turned on and off; the predetermined voltage is input to a non-inverting input terminal of the buffer amplifier, and the buffer amplifier The inverting input terminal of the amplifier is connected to the output terminal of the buffer amplifier; the on and off of the second switch is controlled by the control signal; the ramp is when the first switch is on and the second switch is off Current charges the capacitor via the first switch, and the voltage on the capacitor is maintained at the predetermined voltage when the first switch is turned off or the second switch is turned on. The system according to item 2 of the scope of patent application, wherein the switch control element generates a ramp voltage signal using a ramp current signal based on the input voltage characterization signal and the reference signal, and based on the ramp voltage signal, the The demagnetization characterization signal and the output voltage characterization signal generate the control signal. The system according to item 6 of the scope of patent application, wherein the switch control element starts to use the ramp current signal to make the ramp voltage signal from a predetermined voltage when the input voltage characterization signal rises to be equal to the reference signal. Is increased, and the ramp voltage signal is restored to the predetermined voltage when the ramp voltage signal is equal to the output voltage characterization signal. The system according to item 6 or 7 of the scope of patent application, wherein the switch control element includes a ramp signal generating module, and the ramp signal generating module includes: a voltage-controlled current source, a first capacitor, a second capacitor, A comparator, a latch, a first switch, a second switch, a third switch, a fourth switch, and a buffer amplifier, wherein the first capacitor, the first switch, and all devices connected in series with the second switch The transconducting current source is connected in parallel between a non-inverting input terminal of the comparator and a ground, the reference signal is input to an inverting input terminal of the comparator, and an output signal of the comparator controls the first A switch is turned on and off and is input to a first input terminal of the latch; the control signal is input to a second input terminal of the latch, and an output signal of the latch controls the The third switch is turned on and off; the predetermined voltage is input to a non-inverting input terminal of the buffer amplifier; an inverting input terminal of the buffer amplifier is connected to an output terminal of the buffer amplifier; the second switch and Said Conducting the fourth switching control signal of the OFF; when the third switch is turned off and the fourth switch when the current through the ramp The third switch charges the second capacitor, and when the third switch is turned off or the fourth switch is turned on, the voltage on the second capacitor is maintained at the predetermined voltage. The system according to any one of claims 1 to 8, wherein the switch control element generates the output voltage characterization signal based on an output voltage output to the load and a second reference signal. The system of claim 9, wherein the demagnetization characterization signal is generated based on a current flowing through the inductor. The system according to item 9 of the patent application scope, further comprising: an AC rectifying element configured to rectify an AC input voltage, wherein the AC rectifying element includes first, second, third, and fourth A rectifier element terminal, the first and second rectifier element terminals are connected to both ends of an AC power source, and the third and fourth rectifier element terminals are connected to the system power switch and ground, respectively. A method for providing an output voltage to a load, comprising: generating a control signal based on a demagnetization characterization signal characterizing a demagnetization condition of an inductor connected in series with the load, an output voltage characterization signal characterizing an output voltage output to the load, and a reference signal And using the control signal to control the on and off of the system power switch, wherein the system power switch, the capacitor, and the load are connected in parallel between the inductor and ground. The method according to item 12 of the scope of patent application, wherein the control signal is further generated according to an input voltage characterization signal characterizing a rectified input voltage obtained by rectifying an AC input voltage. The method according to item 12 of the application, wherein a ramp voltage signal is generated using a ramp current signal based on the demagnetization characterization signal and the reference signal, and based on the ramp voltage signal, the demagnetization characterization signal, and The output voltage characterization signal generates the control signal. The method according to item 14 of the application, wherein the ramp voltage signal is maintained at a predetermined voltage when the demagnetization characterization signal is higher than the reference signal, and When the demagnetization characteristic signal drops to be equal to the reference signal, the ramp voltage signal is increased by using the ramp current signal, and the ramp voltage signal is restored to when the ramp voltage signal is equal to the output voltage characterization signal. The predetermined voltage. The method according to item 13 of the application, wherein a ramp voltage signal is generated using a ramp current signal based on the input voltage characterization signal and the reference signal, and based on the ramp voltage signal, the demagnetization characterization signal, and The output voltage characterization signal generates the control signal. The method according to item 16 of the scope of patent application, wherein when the input voltage characterization signal rises to be equal to the reference signal, the ramp current signal is used to increase the ramp voltage signal from a predetermined voltage, and When the ramp voltage signal is equal to the output voltage characteristic signal, the ramp voltage signal is restored to the predetermined voltage. The method according to any one of claims 12-17, further comprising: generating the output voltage characterization signal based on an output voltage output to the load and a second reference signal. The method of claim 18, wherein the demagnetization characterization signal is generated based on a current flowing through the inductor.