TWI676355B - Hybrid drive circuit - Google Patents

Abstract

A hybrid driving circuit drives a first characteristic transistor and a second characteristic transistor coupled in parallel according to an input signal, and the hybrid driving circuit includes a first conducting path, a first turning off path, a second conducting path, and a second turning off path. The first conduction path and the second conduction path generate a first delay time, and the first delay time delays the first characteristic transistor to be turned on. The first turn-off path and the second turn-off path generate a second delay time, and the second delay time causes the second characteristic transistor to be turned off after a delay.

Description

Hybrid drive circuit

The invention relates to a hybrid driving circuit, in particular to a hybrid driving circuit for driving transistors with different characteristics.

In the field of power electronics, Insulated Gate Bipolar Transistor (IGBT) and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) are common power switching elements. If the switching frequency is considered, an insulated gate bipolar transistor is usually suitable for a switching circuit below 20 kHz, and if the switching frequency is above 20 kHz, a metal-oxide half field effect transistor is usually used as the switching circuit.

The main reason for using switching frequency as the power switching element is the effect of different switching element characteristics on efficiency. Specifically, the conduction loss of the insulated gate bipolar transistor is low, and the switching losses are high. When it is used at high frequency switching, a higher switching loss will consume more power (the metal-oxygen half field effect transistor happens to be the opposite), resulting in a decrease in efficiency. However, in the design of switching circuits, only a single type of power switching element is often selected. In order to reduce the circuit size, a higher switching frequency is already a trend, but a single characteristic power element cannot effectively reduce power loss.

Therefore, how to design a hybrid driving circuit to drive power switching elements with different characteristics and have the advantages of both types of power switching elements is a major issue for the author of this case.

In order to solve the above problems, the present invention provides a hybrid driving circuit to overcome the problems of the conventional technology. Therefore, the hybrid driving circuit of the present invention drives a first characteristic transistor and a second characteristic transistor coupled in parallel according to an input signal. The hybrid driving circuit includes a first branch and a second branch, and the first branch includes: A conducting path turns on the first characteristic transistor according to the rising edge of the input signal. And the first shutdown path, the first characteristic transistor is turned off according to the falling edge of the input signal. The second branch includes: a second conducting path, which conducts the second characteristic transistor according to a rising edge. And the second turn-off path, turning off the second characteristic transistor according to the falling edge. Among them, the first conducting path and the second conducting path generate a first delay time, and the first delay time causes the first characteristic transistor to be turned on with a delay; the first off path and the second off path generate a second delay time, and the second The delay time delays turning off the second characteristic transistor.

In order to further understand the technology, means and effects adopted by the present invention to achieve the intended purpose, please refer to the following detailed description and accompanying drawings of the present invention. It is believed that the purpose, features and characteristics of the present invention can be obtained in-depth and Specific understanding, however, the drawings are provided for reference and description only, and are not intended to limit the present invention.

100, 100’‧‧‧ hybrid drive circuit

10, 10’‧‧‧ first branch road

Pc1‧‧‧First Conduction Path

Ps1‧‧‧First shutdown path

20, 20’‧‧‧Second Branch Road

Pc2‧‧‧Second Conduction Path

Ps2‧‧‧Second shutdown path

202‧‧‧discharge circuit

30, 30 ’‧‧‧ optocoupler drive module

302‧‧‧The first optocoupler driving circuit

302-1‧‧‧The first optocoupler driver

302-2, 302-2’‧‧‧‧First slope adjustment circuit

304‧‧‧Second Optocoupler Driving Circuit

304-1‧‧‧Second Optocoupler Driver

304-2, 304-2’‧‧‧Second slope adjustment circuit

306‧‧‧Optical coupling unit

308‧‧‧Drive unit

200‧‧‧ Controller

300‧‧‧ Insulated Gate Bipolar Transistor

400‧‧‧ Metal Oxide Half Field Effect Transistor

R1 ~ R9‧‧‧First resistance ~ Ninth resistance

RS1, RS2‧‧‧‧Slope adjustment resistor

D1 ~ D7‧‧‧First Diode ~ Seven Diode

C1 ~ C3‧‧‧ first capacitor ~ third capacitor

Sin‧‧‧Input signal

VCC‧‧‧Drive voltage

VEE‧‧‧ Reference Ground Voltage

(I) ~ (II) ‧‧‧Waveform

FIG. 1 is a schematic circuit block diagram of the first embodiment of the hybrid driving circuit of the present invention; FIG. 2A is a waveform schematic diagram of the hybrid driving circuit of the present invention turning on the insulated gate bipolar transistor and the metal-oxide half field effect transistor; FIG. 2B is a waveform diagram showing that the hybrid driving circuit of the present invention turns off the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor; FIG. 3A is a diagram of the hybrid driving circuit of the present invention turns on the insulated-gate bipolar transistor and the metal-oxide-semiconductor half-field-effect transistor. A schematic diagram of the conduction path; FIG. 3B is a schematic diagram of the off path of the hybrid driving circuit of the present invention to turn on the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor; FIG. 4 is a schematic circuit block diagram of the second embodiment of the hybrid driving circuit of the present invention; 5A is a block diagram of a first embodiment of a hybrid drive circuit with an optocoupler drive module according to the present invention; FIG. 5B is a block diagram of a second embodiment of a hybrid drive circuit with an optocoupler drive module according to the present invention; FIG. 6 is the present invention Circuit block diagram of an optocoupler driving module; and FIG. 7 is a circuit block diagram of a slope adjustment circuit according to the present invention.

The technical content and detailed description of the present invention are described below with reference to the drawings. Please refer to FIG. 1 which is a schematic circuit block diagram of the first embodiment of the hybrid driving circuit of the present invention. The hybrid driving circuit 100 receives an input signal Sin from the controller 200 and drives the first characteristic transistor and the second characteristic transistor coupled in parallel according to the input signal Sin. For convenience of explanation, the first characteristic transistor is here an insulated gate bipolar transistor 300 as an example, and the second characteristic transistor is here an example of a metal oxide half field effect transistor 400, but is not limited thereto. For example, the second characteristic transistor is The crystal can also be a power semiconductor device with different characteristics such as silicon carbide, gold-oxygen half field-effect transistor (SiC-MOSFET) or gallium nitride. The hybrid driving circuit 100 includes a first branch 10 and a second branch 20, and the first branch 10 is coupled to an insulated gate double The pole transistor 300 and the second branch 20 are coupled to a metal oxide half field effect transistor 400. The first branch circuit 10 includes a first diode D1 and a first resistor R1 coupled in series, a second diode D2 and a second resistor R2 coupled in series, and an anode of the first diode D1 and a second diode R1. The cathode of the pole D2 is coupled to the input signal Sin, and the first resistor R1 and the second resistor R2 are coupled to the insulated gate bipolar transistor 300. The first diode D1 and the second diode D2 are set to different current conduction. Direction, where direction means the direction of flow into or out of the transistor.

The second branch 20 includes a third diode D3 and a third resistor R3 coupled in series, and a discharge circuit 202. The discharge circuit 202 is coupled to the third diode D3, the third resistor R3, and the input signal Sin, and includes a fourth resistor R4, a first capacitor C1, a fifth resistor R5, and a fourth diode D4. One end of the fourth resistor R4 is coupled between the third diode D3 and the third resistor R3. The other end of the fourth resistor R4 is coupled to one end of the first capacitor C1, and the other end of the first capacitor C1 is coupled to a ground point. . One end of the fifth resistor R5 is coupled between the fourth resistor R4 and the first capacitor C1, and the other end of the fifth resistor R5 is coupled to the anode of the fourth diode D4. The anode of the third diode D3 and the cathode of the fourth diode D4 are coupled to the input signal Sin, and the third resistor R3 is coupled to the metal-oxide-semiconductor field-effect transistor 400. Similarly, the third diode D3 and the fourth diode Diode D4 is set to different current conduction directions.

Specifically, the first diode D1 and the first resistor R1 constitute a first conducting path, and the first conducting path turns on the insulated gate bipolar transistor 300 according to the rising edge of the input signal Sin. The second diode D2 and the second resistor R2 form a first turn-off path. The first turn-off path turns off the insulated gate bipolar transistor 300 according to the falling edge of the input signal Sin. The third diode D3 and the third resistor R3 constitute a second conducting path, and the second conducting path turns on the metal-oxygen half field-effect transistor 400 according to the rising edge of the input signal Sin. The third resistor R3, the fourth resistor R4, the fifth resistor R5, and the fourth diode D4 constitute a second turn-off path, and the second turn-off path turns off the metal-oxygen half field effect transistor 400 according to the falling edge of the input signal Sin .

Please refer to FIG. 2A for the waveform diagram of the hybrid driving circuit of the present invention turning on the insulated gate bipolar transistor and the metal oxide half field effect transistor, and FIG. 2B for the hybrid driving circuit of the present invention turning off the insulated gate bipolar transistor and the metal oxide half field effect transistor. The waveform of the crystal is shown in Figure 1. 2A ~ 2B. Since the conduction loss of the insulated gate bipolar transistor 300 is lower than that of the metal oxide half field effect transistor 400, but the switching loss is higher than that of the metal oxide half field effect transistor 400. Therefore, at the rising edge of the input signal Sin, the metal oxide half field effect transistor 400 can be turned on faster than the insulated gate bipolar transistor 300, which can effectively reduce switching losses. Conversely, at the falling edge of the input signal Sin, the metal-oxide half-field-effect transistor 400 can be turned off more slowly than the insulated-gate bipolar transistor 300, which can also effectively reduce switching losses. For convenience of description, in one embodiment of the present invention, the waveform of the metal-oxide-semiconductor field-effect transistor 400 is indicated by a dotted line, and the waveform of the insulated gate bipolar transistor 300 is indicated by a solid line.

Specifically, the main purpose of the hybrid driving circuit 100 of the present invention is how to efficiently turn on the metal-oxide-semiconductor half-field-effect transistor 400 in advance and delay it to turn off, so that the metal-oxide-semiconductor half-field-effect transistor 400 is turned on. When the pole transistor 300 is not turned on (as shown in FIG. 2A), a current can only flow through the metal-oxide half field effect transistor 400 with a lower switching loss to effectively reduce the switching loss. It is worth mentioning that, as shown in FIG. 2B, the operation when the insulated gate bipolar transistor 300 is first turned off is the same, and it will not be repeated here. As shown in FIGS. 2A to 2B, when the metal-oxide half-field-effect transistor 400 and the insulated-gate bipolar transistor 300 are both conducting, most of the current flows through the insulation due to the low on-resistance of the insulated-gate bipolar transistor 300. The gate bipolar transistor 300, and only a small part of the current flows through the metal-oxide half-field-effect transistor 400, can effectively reduce the conduction loss. For this reason, the hybrid driving circuit 100 needs to control the on and off times of the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor half-effect transistor 400.

Please refer to FIG. 3A for a schematic diagram of the conduction paths of the hybrid driving circuit for turning on the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor according to the present invention. For the complex coordination, see FIGS. 1 to 2B. The first conductive path Pc1 of the hybrid driving circuit 100 turns on the insulated gate bipolar transistor 300, and the second conductive path Pc2 turns on the MOSFET half-effect transistor 400. Since the metal-oxide half-field-effect transistor 400 must be turned on faster than the insulated-gate bipolar transistor 300, the resistance value of the first resistor R1 needs to be greater than that of the third resistor R3 (for example, but not limited to, the first resistor R1 It is 70 ohms and the third resistor R3 is 40 ohms), so that the time constant of the RC circuit formed by the first resistor R1 and the parasitic capacitance in the insulated gate bipolar transistor 300 is large, and the charging time is longer. (Compared to the time constant of the RC circuit formed by the third resistor R3 and the parasitic capacitance (indicated by the dotted line capacitance) in the metal-oxide-semiconductor half-effect transistor 400). Due to the difference in charging time, a first delay time is generated between the first conduction path Pc1 to turn on the insulated gate bipolar transistor 300 and the second conduction path Pc2 to turn on the metal-oxide-semiconductor field-effect transistor 400 to provide a voltage as shown in FIG. 2A. Turn-on sequence. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value of the first resistor R1 or the third resistor R3, the charging time can also be selected by selecting an insulated gate bipolar transistor 300 or a metal-oxide half field effect transistor. The capacitance value of the parasitic capacitance of 400 is adjusted.

Please refer to FIG. 3B for a schematic diagram of the turn-off paths of the hybrid driving circuit for turning on the insulated gate bipolar transistor and the metal-oxide half field effect transistor according to the present invention. For the complex cooperation, see FIGS. 1 to 2B. The first turn-off path Ps1 of the hybrid driving circuit 100 turns off the insulated-gate bipolar transistor 300, and the second turn-off path Ps2 turns off the metal-oxide-semiconductor field-effect transistor 400. Because the metal-oxide half-field-effect transistor 400 must be turned off more slowly than the insulated-gate bipolar transistor 300, the resistance value of the sum of the third resistor R3, the fourth resistor R4, and the fifth resistor R5 needs to be greater than that of the second resistor R2. Resistance values (for example, but not limited to, the third resistor R3 is 40 ohms, the fourth resistor R4 is 40 ohms, the fifth resistor R5 is 50 ohms, and the second resistor R2 is 50 ohms), so that the insulated gate bipolar transistor 300 is at When turned off, only a single second resistor R2 with a small resistance value is discharged, and the discharge time is short. However, because the time constant of the RC circuit formed by the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the first capacitor C1 is large, the discharge time is longer (compared with the second resistor R2 and the insulated gate bipolar voltage). Time constant of crystal 300). Due to the difference in discharge time, a second delay time is generated between the first turn-off path Ps1 to turn off the insulated gate bipolar transistor 300 and the second turn-off path Ps2 to turn off the MOSFET half-effect transistor 400 to provide Shutdown sequence shown in 2B. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value of the second resistor R2 or the third resistor R3, the fourth resistor R4, or the fifth resistor R5, the insulation gate bipolar can also be selected The parasitic capacitance of the transistor 300 and the metal-oxide-semiconductor half-effect transistor 400 (indicated by a dotted capacitor) or the capacitance of the first capacitor C1 is adjusted.

Please refer to FIG. 4 for a schematic circuit block diagram of the second embodiment of the hybrid driving circuit according to the present invention. For the complex cooperation, refer to FIGS. 1 to 3B. The hybrid driving circuit 100 ′ includes a first branch 10 ′ and a second branch 20 ′, and the first branch 10 ′ is coupled to the insulated gate bipolar transistor 300, and the second branch 20 ′ is coupled to the metal-oxygen half field effect power. Crystal 400. The first branch 10 'includes a fifth diode D5, a sixth resistor R6, and a second capacitor C2. The cathode of the fifth diode D5 is coupled to the input signal Sin, and the anode of the fifth diode D5 is coupled to the insulation. Grid bipolar transistor 300. The sixth resistor R6 is coupled in parallel to the fifth diode D5, and one end of the second capacitor C2 is coupled to the fifth diode D5, the sixth resistor R6 and the insulated gate bipolar transistor 300, and the other end of the second capacitor C2 Coupling to ground. The second branch 20 'includes a sixth diode D6, a seventh resistor R7, and a third capacitor C3. The anode of the sixth diode D6 is coupled to the input signal Sin, and the cathode of the sixth diode D6 is coupled to gold. In the oxygen half field effect transistor 400, the fifth diode D5 and the sixth diode D6 are set to different current conduction directions. The seventh resistor R7 is coupled in parallel to the sixth diode D6, and one end of the third capacitor C3 is coupled to the sixth diode D6, the seventh resistor R7 and the metal-oxide-semiconductor half-effect transistor 400, and the other end of the third capacitor C3 Coupling to ground.

Specifically, the sixth resistor R6 is a first on-path, and the fifth diode D5 is a first off-path. The sixth diode D6 is a second on-path, and the seventh resistor R7 is a second off-path. When the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor field-effect transistor 400 are turned on, the sixth resistor R6 and the second capacitor C2 form an RC circuit, and the rising edge of the input signal Sin directly charges the third capacitor C3. Therefore, the charging time of the RC circuit formed by the sixth resistor R6 and the second capacitor C2 is longer than the charging time of the third capacitor C3. Due to the difference in charging time, a first delay time is generated between the first conduction path to turn on the insulated gate bipolar transistor 300 and the second conduction path to turn on the MOSFET half-effect transistor 400 to provide a conduction sequence as shown in FIG. 2A . It is worth mentioning that, in one embodiment of the present invention, in addition to adjusting the resistance value, the capacitance value can also be adjusted.

When the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor field-effect transistor 400 are turned off, the seventh resistor R7 and the third capacitor C3 form an RC circuit, and the second capacitor C2 is directly discharged. So the seventh resistor The discharge time of the RC circuit formed by R7 and the third capacitor C3 is longer than the discharge time of the second capacitor C2. Due to the difference in discharge time, a second delay time is generated between the first turn-off path to turn off the insulated gate bipolar transistor 300 and the second turn-off path to turn off the metal-oxide-semiconductor field-effect transistor 400 to provide a circuit as shown in FIG. 2B. Shown in the shutdown sequence. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value, the discharge time can also be adjusted for the capacitance value.

Please refer to FIG. 5A for a block diagram of a first embodiment of a hybrid driving circuit with an optocoupler driving module according to the present invention. For a detailed description, refer to FIGS. 1 to 4. When the driving circuit needs to be isolated, isolation components are used, which may include components such as optical coupling, capacitive or magnetic coupling. For the convenience of description, the following uses an optical coupling type as an example. The hybrid driving circuit 100 includes an optical coupling driving module 30. The optical coupling driving module 30 is coupled to the first branch 10, the second branch 20, and the insulated gate bipolar transistor. 300 and the metal-oxide-semiconductor half-effect transistor 400, and the photocoupler driving module 30 includes a first photocoupler driving circuit 302 and a second photocoupler driving circuit 304. The first photocoupler driving circuit 302 includes a first photocoupler driver 302-1 and a first slope adjustment circuit 302-2. The first photocoupler driver 302-1 is coupled to the first branch 10, and the first slope adjustment circuit 302- 2 is coupled to the first optocoupler driver 302-1 and the insulated gate bipolar transistor 300. The second photocoupler driving circuit 304 includes a second photocoupler driver 304-1 and a second slope adjustment circuit 304-2, the second photocoupler driver 304-1 is coupled to the second branch 20, and the second slope adjustment circuit 304- 2 is coupled to the second optocoupler driver 304-1 and the metal oxide half field effect transistor 400.

Specifically, the first photocoupler driving circuit 302 provides a first driving signal to the insulated gate bipolar transistor 300 according to the signal provided by the first branch 10, and the second photocoupler driving circuit 304 according to the second branch 20 The provided signal provides a second driving signal to the MOSFET half-effect transistor 400. Because the first optocoupler driver 302-1 and the second optocoupler driver 304-1 have the characteristics that the rising edge rises to the trigger point and triggers as a high level signal, and the falling edge falls to the trigger point and triggers as a low level signal. Therefore, in FIG. 2A and FIG. 2B, after the waveform with the slope passes through the first photocoupler driver 302-1 and the second photocoupler driver 304-1, the first driving signal or the second driving signal obtained at point A becomes close. The waveform (I) of a square wave, such as This can achieve the control of the delay time of the IGBT 300 metal-oxide-semiconductor half-field-effect transistor 400 without causing the on and off processes to continue for too long and cause excessive losses. However, the waveform (I) close to a square wave has steep rising and falling edges, and therefore generates high electromagnetic interference (EMI). Therefore, the first slope adjustment circuit 302-2 and the second slope adjustment circuit 304 can be used. -2 slightly reduces the slope of the rising and falling edges of the waveform (I) so that the first driving signal or the second driving signal obtained at point B becomes a trapezoidal waveform (II). Among them, as shown in FIG. 5A, the first slope adjustment circuit 302-2 and the second slope adjustment circuit 304-2 can be slope adjustment resistors RS1 and RS2, and the characteristics of the resistance value provided by the resistors will have steep rising edges and falling edges. The waveform (I) of the edge is adjusted to the waveform (II) of a slowly rising rising edge and a slowly falling falling edge.

Please refer to FIG. 5B for a schematic block diagram of the second embodiment of the hybrid driving circuit with an optocoupler driving module according to the present invention. For the cooperation, refer to FIGS. 1 to 5A. The difference between this embodiment and the first embodiment of FIG. 5A lies in that the optocoupler driving module 30 'is coupled to the input signal Sin, the first branch 10, and the second branch 20. After the input signal Sin passes through the first optocoupler driver 302-1 and the second optocoupler driver 304-1, because the input signal Sin is the same, the signal obtained at point A will be basically the same, and then pass through the first branch 10, The second branch 20 achieves a delay effect. Specifically, the difference between the installation position of the optocoupler driving module 30 in FIGS. 5A and 5B is that, because the first optocoupler driver 302-1 and the second optocoupler driver 304-1 have a faster switching time for turning on or off, the optocoupler When the driving module 30 is disposed in the position of FIG. 5A, a delay time can be generated without lengthening the opening and closing process, so that unnecessary losses can be reduced. Therefore, the optocoupler driving module 30 is preferably disposed at the position shown in FIG. 5A, which can reduce the loss of the overall circuit.

Please refer to FIG. 6 for a schematic circuit block diagram of the optocoupler driving module according to the present invention. For the cooperation, refer to FIGS. 1 to 5B. The first photocoupler driver 302-1 and the second photocoupler driver 304-1 include an optical coupling unit 306 and a driving unit 308. Taking the circuit structure and connection relationship of FIG. 5A as an example, the optical coupling unit 306 provides a high-level signal according to a rising edge at a first trigger point, and provides a low-level signal when falling to a second trigger point according to a falling edge. . Specifically, because the output of the optical coupling unit 306 has a characteristic of fast switching speed, when the voltage value of the rising edge gradually increases to the voltage value of the trigger point, the optical coupling unit 306 is Switch on quickly (same as falling edge). Therefore, the optical coupling unit 306 can adjust the slowly rising or falling waveform to a waveform with a steep rising or falling. However, the optical coupling unit 306 only needs to be switched on or switched off when the rising or falling edge reaches the trigger point. Therefore, the optical coupling unit 306 also causes a slight delay in the input waveform and the output waveform.

Among them, VCC is the driving voltage, and VEE is the ground reference voltage. Since the high-level signal provided by the optical coupling unit 306 does not have enough driving voltage VCC to drive the insulated gate bipolar transistor 300 or metal-oxide-semiconductor field-effect transistor 400, the driving unit 308 must be used to provide the driving voltage VCC to drive the insulation. A gate bipolar transistor 300 or a metal oxide half field effect transistor 400. When the signal provided by the optical coupling unit 306 is a high-level signal, the driving unit 308 provides a driving voltage VCC according to the high-level signal to turn on the insulated gate bipolar transistor 300 or the metal-oxide-semiconductor half-effect transistor 400. Then, when the signal provided by the optical coupling unit 306 is a low-level signal, the driving unit 308 does not provide the driving voltage VCC according to the low-level signal to turn off the insulated gate bipolar transistor 300 or the metal-oxide-semiconductor field-effect transistor. 400. It is worth mentioning that in one embodiment of the present invention, the first optocoupler driver 302-1 and the second optocoupler driver 304-1 are based on the HCPL-3120 optocoupler driver manufactured by Hewlett-Packard as an example, but not limited thereto. In other words, both the first optocoupler driver 302-1 and the second optocoupler driver 304-1 can be replaced with the same photocoupler driver or other isolated driver.

Please refer to FIG. 7 for a schematic circuit block diagram of the slope adjustment circuit of the present invention. The first slope adjustment circuit 302-2 and the second slope adjustment circuit 304-2 shown in FIG. 5A are slope adjustment resistors RS1 and RS2, and can simultaneously adjust the slopes of the rising and falling edges of the waveform (I). Although its circuit structure is relatively simple, it is not possible to adjust the slope of the rising edge and the slope of the falling edge separately and independently. The slope adjustment circuits 302-2 'and 304-2' in the embodiment of FIG. 7 can adjust the slope of the rising edge and the slope of the falling edge separately and independently. Specifically, the first slope adjustment circuit 302-2 'and the second slope adjustment circuit 304-2' include an eighth resistor R8, a seventh diode D7, and a ninth resistor R9. The cathode of the seventh diode D7 is coupled in series with the eighth resistor R8, and the ninth resistor R9 is coupled in parallel with the eighth resistor R8 and the seventh diode Body D7, and the ninth resistor R9 is coupled to the anode of the seventh diode D7. The path of the rising edge of the first driving signal or the second driving signal flows through the ninth resistor R9, and the path of the falling edge of the first driving signal or the second driving signal flows through the eighth resistor R8 and the seventh diode. D7. When the first driving signal or the second driving signal is on the rising edge, the ninth resistor R9 slows down the slope of the first rising edge or the second rising edge, and when the first driving signal or the second driving signal is on the falling edge, the first The eight resistor R8 slows down the slope of the first falling edge or the second falling edge.

Furthermore, since the ninth resistor R9 and the eighth resistor R8 can adjust the slope of the rising edge and the slope of the falling edge separately and independently, the designer can choose a suitable rise based on the dual factors of switching loss and electromagnetic interference. The slope of the edge and the slope of the falling edge. In other words, the resistance values of the ninth resistor R9 and the eighth resistor R8 may be different according to the optimized design.

However, the above descriptions are only detailed descriptions and drawings of preferred embodiments of the present invention, but the features of the present invention are not limited thereto, and are not intended to limit the present invention. The full scope of the present invention should be applied as follows The scope of patents shall prevail. Any embodiment that is within the spirit of the scope of patent application of the present invention and similar changes shall be included in the scope of the present invention. Anyone skilled in the art can easily think about it in the field of the present invention. Variations or modifications can be covered by the patent scope of the following case.

Claims (12)

A hybrid driving circuit drives a first characteristic transistor and a second characteristic transistor coupled in parallel according to an input signal. The hybrid driving circuit includes: a first branch including: a first conducting path; A rising edge of an input signal turns on the first characteristic transistor; and a first turn-off path turns off the first characteristic transistor according to a falling edge of the input signal; and a second branch includes: a first Two conducting paths turn on the second characteristic transistor according to the rising edge; and a second turning off path turns off the second characteristic transistor according to the falling edge; wherein the rising edge is at the first conducting path and the A second delay path generates a first delay time, and the first delay time causes the first characteristic transistor to be turned on later; the falling edge generates a second delay time between the first turn-off path and the second turn-off path. , The second delay time delays the second characteristic transistor to turn off. The hybrid driving circuit according to item 1 of the scope of patent application, wherein the first branch includes a first diode and a first resistor coupled in series, a second diode and a first resistor coupled in series. Two resistors, the first diode and the second diode are arranged in different current conduction directions; the first diode and the first resistor constitute the first conduction path, and the second diode and the The second resistor constitutes the first shutdown path. The hybrid driving circuit according to item 2 of the scope of patent application, wherein the second branch includes a third diode and a third resistor coupled in series, and a discharge circuit, the discharge circuit includes: a fourth A resistor coupled to the third diode and the third resistor; a first capacitor coupled to the fourth resistor; a fifth resistor coupled to the fourth resistor and the first capacitor; and a fourth two A polar body coupled to the fifth resistor; wherein the third diode and the fourth diode are arranged in different current conduction directions, and the third diode and the third resistor constitute the second conduction Path, the third resistor, the fourth resistor, the fifth resistor, and the fourth diode constitute the second turn-off path. The hybrid driving circuit according to item 3 of the scope of patent application, wherein the resistance value of the first resistor is greater than the resistance value of the third resistor, so that a charging time provided by the first resistor is longer than that of the third resistor. This first delay time is generated. The hybrid driving circuit according to item 3 of the scope of the patent application, wherein the resistance value of the sum of the third resistor, the fourth resistor, and the fifth resistor is greater than the resistance value of the second resistor, so that the third resistor, the first resistor, A discharge time provided by the four resistors, the fifth resistor and the first capacitor is longer than the second resistor to generate the second delay time. The hybrid driving circuit according to item 1 of the patent application scope, wherein the first branch includes: a fifth diode; a sixth resistor coupled in parallel to the fifth diode; and a second capacitor, Coupled to the fifth diode and the sixth resistor; and the second branch includes: a sixth diode, which is set to a different current conduction direction from the fifth diode; a seventh resistor, connected in parallel Is coupled to the sixth diode; and a third capacitor is coupled to the sixth diode and the seventh resistor; wherein the sixth resistor is the first conduction path and the fifth diode is The first turn-off path; the sixth diode is the second turn-on path, and the seventh resistor is the second turn-off path. The hybrid driving circuit according to item 6 of the patent application, wherein a charging time provided by the sixth resistor and the second capacitor is longer than the third capacitor to generate the first delay time; the seventh resistor and A discharge time provided by the third capacitor is longer than the second capacitor to generate the second delay time. The hybrid driving circuit according to item 1 of the scope of the patent application, wherein the first characteristic transistor is an insulated gate bipolar transistor; the second characteristic transistor is a gold-oxygen half field effect transistor. The hybrid driving circuit described in item 1 of the scope of the patent application further includes an optocoupler driving module. The optocoupler driving module includes: a first optocoupler driving circuit, including: a first optocoupler driver, coupled. The first branch; and a first slope adjusting circuit coupled to the first photocoupler driver and the first characteristic transistor; and a second photocoupler driving circuit including: a second photocoupler driver, coupled The second branch; and a second slope adjustment circuit coupled to the second optocoupler driver and the second characteristic transistor; wherein the first optocoupler driver provides a first driving signal according to the input signal, And the first slope adjusting circuit slows down the slope of a first rising edge and a first falling edge of the first driving signal; the second optocoupler driver provides a second driving signal according to the input signal, and the first The two slope adjusting circuits slow down the slopes of a second rising edge and a second falling edge of the second driving signal. The hybrid driving circuit according to item 9 of the scope of the patent application, wherein the first and second optocoupler drivers each include: an optical coupling unit; and a driving unit coupled to the optical coupling unit; wherein, The optical coupling unit provides a high level signal according to a rising edge to a first trigger point, and provides a low level signal according to a falling edge to a second trigger point; the driving unit according to the high standard A driving voltage is provided to turn on the first characteristic transistor or the second characteristic transistor according to the bit signal, and the driving voltage is not provided according to the low level signal to turn off the first characteristic transistor or the first characteristic transistor. Two characteristics transistor. The hybrid driving circuit according to item 9 of the scope of the patent application, wherein the first slope adjustment circuit and the second slope adjustment circuit respectively include: an eighth resistor; a seventh diode, coupled in series to the eighth resistor And a ninth resistor, which is coupled in parallel to the eighth resistor and the seventh diode. The hybrid driving circuit described in item 1 of the patent application scope further includes an optocoupler driving module. The optocoupler driving module includes: a first optocoupler driving circuit coupled to the input signal; and a second optical The driving circuit is coupled to the input signal, wherein the output of the first photocoupler driver is coupled to the first branch, and the output of the second photocoupler driver is coupled to the second branch.