TWI663901B - Flexible printed circuit board and method for manufacturing the same - Google Patents
Flexible printed circuit board and method for manufacturing the same Download PDFInfo
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- TWI663901B TWI663901B TW106124680A TW106124680A TWI663901B TW I663901 B TWI663901 B TW I663901B TW 106124680 A TW106124680 A TW 106124680A TW 106124680 A TW106124680 A TW 106124680A TW I663901 B TWI663901 B TW I663901B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Laminated Bodies (AREA)
Abstract
一種柔性電路板,包括:一聚醯亞胺基材,開設有貫穿的至少一通孔,所述聚醯亞胺基材相對的兩表面均形成有凹槽;一聚醯亞胺導電膜,形成於所述聚醯亞胺基材相對的兩表面除所述凹槽之外的部分以及所述通孔的內壁上,包括位於所述通孔的內壁的第一聚醯亞胺導電層以及除第一聚醯亞胺導電層之外的一第二聚醯亞胺導電層;兩導電線路層,形成於所述第二聚醯亞胺導電層的表面,每一導電線路層具有與所述凹槽位置對應的線路開口,所述通孔中具有導電部以電性連接兩導電線路層;兩覆蓋膜,形成於兩導電線路層的表面並填充至所述凹槽。 A flexible circuit board includes: a polyimide substrate, which is provided with at least one through hole therethrough, and grooves are formed on opposite surfaces of the polyimide substrate; and a polyimide conductive film is formed. A first polyimide conductive layer on the inner wall of the through hole is provided on the opposite surfaces of the polyimide substrate except the groove and the inner wall of the through hole; And a second polyimide conductive layer other than the first polyimide conductive layer; two conductive circuit layers formed on the surface of the second polyimide conductive layer, each conductive circuit layer having A circuit opening corresponding to the groove position, and a conductive portion in the through hole is used to electrically connect the two conductive circuit layers; two cover films are formed on the surfaces of the two conductive circuit layers and fill the grooves.
Description
本發明涉及一種柔性電路板及其製作方法。 The invention relates to a flexible circuit board and a manufacturing method thereof.
隨著智慧手機、平板電腦和可穿戴式設備等電子產品向小型化、多功能化方向發展,柔性電路板也需要滿足高密度化的要求。改進型半加成法(MSAP)是一種較為常見的製作高密度柔性電路板的工藝。MSAP採用在聚醯亞胺(PI)基材表面壓合超薄底銅,將底銅減薄到所需厚度,然後壓合幹膜,利用曝光顯影技術在底銅上方形成電鍍銅層,然後撕除幹膜,再將位於電鍍銅層之間的底銅蝕刻去除。 As electronic products such as smart phones, tablet computers, and wearable devices are becoming smaller and more versatile, flexible circuit boards also need to meet the requirements of high density. Improved semi-additive method (MSAP) is a relatively common process for making high-density flexible circuit boards. MSAP uses ultra-thin copper on the surface of the polyimide (PI) substrate to reduce the thickness of the copper to the required thickness, and then compresses the dry film to form an electroplated copper layer on the copper by exposure and development technology. The dry film was removed, and the underlying copper between the electroplated copper layers was etched away.
然而,在底銅的蝕刻過程中,電鍍銅層的側壁也可能會被蝕刻,造成線路線距增加而難以獲得高密度的柔性電路板。而且,由於底銅一般為電解銅,本身材質比電鍍銅緻密,二者腐蝕速率的差異會導致銅線路底部產生側蝕(undercut)現象,造成線路歪斜。再者,PI基材表面具有一定的粗糙度,而且PI基材表面通常通過濺射的方式形成種子層以克服底銅與PI基材的附著力不佳的問題,而該種子層在後續的蝕刻過程中較難去除,導致殘留而引發短路風險。 However, during the etching of the underlying copper, the sidewalls of the electroplated copper layer may also be etched, resulting in an increase in the line pitch of the circuit and difficulty in obtaining a high-density flexible circuit board. In addition, since the base copper is generally electrolytic copper, the material itself is denser than that of electroplated copper, and the difference in the corrosion rate between the two will cause an undercut at the bottom of the copper circuit, causing the circuit to skew. In addition, the surface of the PI substrate has a certain roughness, and the surface of the PI substrate is usually formed with a seed layer by sputtering to overcome the problem of poor adhesion between the copper substrate and the PI substrate. It is difficult to remove during the etching process, resulting in residuals and the risk of short circuits.
有鑑於此,本發明提供一種柔性電路板及其製作方法,能夠解決以上問題。 In view of this, the present invention provides a flexible circuit board and a manufacturing method thereof, which can solve the above problems.
本發明提供一種柔性電路板的製作方法,其包括:提供一絕緣的聚醯亞胺基材,所述聚醯亞胺基材中形成有至少一貫穿的通孔;在所述通孔的內壁以及所述聚醯亞胺基材的表面形成一聚醯亞胺導電膜,所述聚醯亞胺導電膜包括位於所述通孔的內壁的第一聚醯亞胺導電層以及除所述第一聚醯亞胺導電層之外的一第二聚醯亞胺導電層;在所述第二聚醯亞胺導電層遠離所述聚醯亞胺基材的每一表面上覆蓋一感光層;利用曝光顯影技術在每一感光層中形成圖形開口,所述圖形開口用於暴露形成有所述第一聚醯亞胺導電層的通孔以及 部分所述第二聚醯亞胺導電層;在所述第二聚醯亞胺導電層所暴露的部分上鍍銅以形成兩導電線路層,並在形成有所述第一聚醯亞胺導電層的通孔中鍍銅以形成電性連接所述兩導電線路層的導電部;移除每一感光層以暴露位於所述導電線路層的線路開口;蝕刻所述第二聚醯亞胺導電層與所述線路開口對應的部分以及所述聚醯亞胺基材的每一表面與所述線路開口對應的部分,蝕刻後的所述聚醯亞胺基材的表面形成與所述線路開口對應的凹槽;以及在每一導電線路層遠離所述聚醯亞胺基材的表面覆蓋一覆蓋膜,然後壓合所述覆蓋膜以使其流動至所述凹槽,從而制得所述柔性電路板。 The invention provides a method for manufacturing a flexible circuit board, which includes: providing an insulating polyimide substrate, and at least one through-hole is formed in the polyimide substrate; A wall and a surface of the polyimide substrate form a polyimide conductive film, and the polyimide conductive film includes a first polyimide conductive layer located on an inner wall of the through hole, and a polyimide conductive film. A second polyimide conductive layer other than the first polyimide conductive layer; covering each surface of the second polyimide conductive layer away from the polyimide substrate with a photosensitive material A pattern opening is formed in each photosensitive layer by using an exposure and development technology, and the pattern opening is used to expose a through hole where the first polyfluorene imide conductive layer is formed, and Part of the second polyimide conductive layer; copper is plated on the exposed portion of the second polyimide conductive layer to form two conductive circuit layers, and the first polyimide is conductively formed. Copper is plated in the through holes of the layer to form a conductive portion electrically connecting the two conductive circuit layers; each photosensitive layer is removed to expose a circuit opening located in the conductive circuit layer; and the second polyimide is conductive. A portion of the layer corresponding to the circuit opening and a portion of each surface of the polyimide substrate corresponding to the circuit opening, and the surface of the polyimide substrate after etching forms the circuit opening A corresponding groove; and covering a surface of each of the conductive circuit layers away from the polyimide substrate with a cover film, and then pressing the cover film to flow to the groove, thereby making the Flexible circuit board.
本發明還提供一種柔性電路板,包括:一聚醯亞胺基材,開設有貫穿的至少一通孔,所述聚醯亞胺基材相對的兩表面均形成有凹槽;一聚醯亞胺導電膜,形成於所述聚醯亞胺基材相對的兩表面除所述凹槽之外的部分以及所述通孔的內壁上,所述聚醯亞胺導電膜包括位於所述通孔的內壁的第一聚醯亞胺導電層以及除所述第一聚醯亞胺導電層之外的一第二聚醯亞胺導電層;兩導電線路層,形成於所述第二聚醯亞胺導電層遠離所述聚醯亞胺基材的表面,每一導電線路層具有與所述凹槽位置對應的線路開口,其中,形成有所述第一聚醯亞胺導電層的通孔中具有導電部以電性連接所述兩導電線路層;以及兩覆蓋膜,形成於所述兩導電線路層遠離所述聚醯亞胺基材的表面,所述覆蓋膜填充至所述凹槽。 The present invention also provides a flexible circuit board, comprising: a polyimide substrate with at least one through hole formed therethrough, grooves formed on opposite surfaces of the polyimide substrate; and a polyimide A conductive film is formed on the opposite surfaces of the polyimide substrate except the groove and an inner wall of the through hole, and the polyimide conductive film includes the through hole A first polyimide conductive layer on the inner wall and a second polyimide conductive layer in addition to the first polyimide conductive layer; two conductive circuit layers formed on the second polyimide The imine conductive layer is far from the surface of the polyfluorene imide substrate, and each conductive circuit layer has a line opening corresponding to the position of the groove, wherein a through hole of the first polyfluorene imide conductive layer is formed A conductive portion is provided to electrically connect the two conductive circuit layers; and two cover films are formed on a surface of the two conductive circuit layers away from the polyimide substrate, and the cover film fills the groove. .
與現有技術相比,以上覆銅基板的製作過程為全加成法,通過在聚醯亞胺基材上形成聚醯亞胺導電膜以使所述聚醯亞胺基材的表面金屬化,而在蝕刻位於所述導電線路層之間的聚醯亞胺導電膜的過程中,不會對導電線路層進行蝕刻,這在保證較小的線距的同時可避免側蝕現象產生;再者,所述聚醯亞胺基材的每一表面與所述線路開口對應的部分也會被蝕刻而形成凹槽,從而確保導電線路層之間的聚醯亞胺導電膜被蝕刻去除,避免部分殘留造成引發短路風險。 Compared with the prior art, the manufacturing process of the above copper-clad substrate is a full addition method. By forming a polyimide conductive film on a polyimide substrate, the surface of the polyimide substrate is metallized. In the process of etching the polyfluorene imide conductive film located between the conductive circuit layers, the conductive circuit layer will not be etched, which can ensure a small line pitch while avoiding side etching; , A portion of each surface of the polyimide substrate corresponding to the circuit opening will also be etched to form a groove, thereby ensuring that the polyimide conductive film between the conductive circuit layers is etched away to avoid part Risk of short circuits due to residues.
10‧‧‧聚醯亞胺基材 10‧‧‧Polyimide substrate
11‧‧‧通孔 11‧‧‧through hole
12‧‧‧凹槽 12‧‧‧ groove
20‧‧‧聚醯亞胺導電膜 20‧‧‧Polyimide conductive film
21‧‧‧第一聚醯亞胺導電層 21‧‧‧ the first polyimide conductive layer
22‧‧‧第二聚醯亞胺導電層 22‧‧‧Second polyimide conductive layer
30‧‧‧感光層 30‧‧‧ Photosensitive layer
31‧‧‧圖形開口 31‧‧‧ Graphic opening
40‧‧‧導電線路層 40‧‧‧ conductive circuit layer
41‧‧‧導電部 41‧‧‧Conductive Section
42‧‧‧線路開口 42‧‧‧line opening
50‧‧‧覆蓋膜 50‧‧‧ cover film
100‧‧‧柔性電路板 100‧‧‧flexible circuit board
圖1為本發明一較佳實施方式提供的柔性電路板的製作方法的流程圖。 FIG. 1 is a flowchart of a method for manufacturing a flexible circuit board according to a preferred embodiment of the present invention.
圖2為圖1所示的製作方法所使用的聚醯亞胺基材的剖視圖。 FIG. 2 is a cross-sectional view of a polyimide substrate used in the production method shown in FIG. 1.
圖3為在圖2所示的聚醯亞胺基材中開設通孔後的剖視圖。 3 is a cross-sectional view of a polyfluorene imide substrate shown in FIG. 2 after a through hole is opened.
圖4為在圖3所示的通孔內壁以及聚醯亞胺基材表面形成聚醯亞胺導電膜後的剖視圖。 4 is a cross-sectional view of a polyimide conductive film formed on the inner wall of the through hole and the surface of the polyimide substrate in FIG. 3.
圖5為在圖4所示的聚醯亞胺導電膜的第二聚醯亞胺導電層上覆蓋兩感光層後的剖視圖。 5 is a cross-sectional view of the second polyimide conductive layer of the polyimide conductive film shown in FIG. 4 after being covered with two photosensitive layers.
圖6為對圖5所示的感光層進行曝光處理後的剖視圖。 FIG. 6 is a cross-sectional view of the photosensitive layer shown in FIG. 5 after exposure processing.
圖7為對圖6所示的感光層進行顯影處理以形成圖形開口後的剖視圖。 FIG. 7 is a cross-sectional view after developing the photosensitive layer shown in FIG. 6 to form a pattern opening.
圖8為在圖7所示的聚醯亞胺導電膜的第二聚醯亞胺導電層所暴露的部分鍍銅以形成導電線路層後的剖視圖。 FIG. 8 is a cross-sectional view of a portion of the polyimide conductive film of the polyimide conductive film shown in FIG. 7 after being plated with copper to form a conductive circuit layer.
圖9為將圖8所示的感光層移除後的剖視圖. Figure 9 is a cross-sectional view after the photosensitive layer shown in Figure 8 is removed.
圖10為蝕刻圖9所示的第二聚醯亞胺導電層以及聚醯亞胺基材後的剖視圖。 FIG. 10 is a cross-sectional view of the second polyimide conductive layer and the polyimide substrate shown in FIG. 9 after etching.
圖11為在圖10所示的導電線路層的表面覆蓋覆蓋膜後得到的柔性電路板的剖視圖。 11 is a cross-sectional view of a flexible circuit board obtained by covering a surface of a conductive circuit layer shown in FIG. 10 with a cover film.
請參閱圖1,本發明一較佳實施方式提供一種柔性電路板100的製作方法,其包括如下步驟: Referring to FIG. 1, a method for manufacturing a flexible circuit board 100 according to a preferred embodiment of the present invention includes the following steps:
步驟S1,請參閱圖2,提供一絕緣的聚醯亞胺(polyimide,PI)基材10。 Step S1, referring to FIG. 2, an insulating polyimide (PI) substrate 10 is provided.
步驟S2,請參閱圖3,在所述聚醯亞胺基材10中形成至少一貫穿的通孔11。 Step S2, referring to FIG. 3, at least one through-hole 11 is formed in the polyimide substrate 10.
在本實施方式中,通過鐳射打孔的方式形成所述通孔11。 In this embodiment, the through hole 11 is formed by laser drilling.
步驟S3,請參閱圖4,在所述通孔11的內壁以及所述聚醯亞胺基材10的表面形成一聚醯亞胺導電膜20,以使所述聚醯亞胺基材10的表面金屬化。所述聚醯亞胺導電膜20包括位於所述通孔11的內壁的第一聚醯亞胺導電層21以及除所述第一聚醯亞胺導電層21之外的一第二聚醯亞胺導電層22。 Step S3, referring to FIG. 4, a polyimide conductive film 20 is formed on the inner wall of the through hole 11 and the surface of the polyimide substrate 10, so that the polyimide substrate 10 Metallized surface. The polyimide conductive film 20 includes a first polyimide conductive layer 21 located on an inner wall of the through hole 11 and a second polyimide other than the first polyimide conductive layer 21. Imine conductive layer 22.
在本實施方式中,所述聚醯亞胺導電膜20中混合有金屬或金屬氧化物顆粒。所述聚醯亞胺導電膜20可採用原位分散法、原位沉積法、溶膠-凝膠法以及表面改性離子交換法中的其中一種形成。 In this embodiment, the polyfluorene imide conductive film 20 is mixed with metal or metal oxide particles. The polyfluoreneimide conductive film 20 may be formed by one of an in-situ dispersion method, an in-situ deposition method, a sol-gel method, and a surface-modified ion exchange method.
所述原位分散法具體為:提供一具有較低粘度的聚醯胺酸溶液作為聚醯亞胺前驅體,將帶有金屬或金屬氧化物顆粒的分散劑加入至所述聚醯胺 酸溶液中以得到一混合物,然後將所述混合物流延成膜並在一定溫度下熱亞胺化,從而得到所述聚醯亞胺導電膜20。所述原位分散法還可具體為:提供一聚醯胺酸溶液,將金屬或金屬氧化物顆粒加入至所述聚醯亞胺溶液中以得到一混合物,然後在所述通孔11的內壁以及所述聚醯亞胺基材10的表面塗布該混合物並進行熱處理,使得聚醯胺酸溶液中的溶劑揮發且聚醯胺酸發生醯亞胺環化反應生成聚醯亞胺,從而得到所述聚醯亞胺導電膜20。 The in-situ dispersion method is specifically: providing a polyamic acid solution having a lower viscosity as a polyimide precursor, and adding a dispersant with metal or metal oxide particles to the polyamine The mixture is casted into an acid solution to obtain a mixture, and the mixture is cast into a film and thermally imidized at a certain temperature to obtain the polyfluorene imine conductive film 20. The in-situ dispersion method may further be specifically: providing a polyamidic acid solution, adding metal or metal oxide particles to the polyamidoimine solution to obtain a mixture, and then in the through hole 11 The wall and the surface of the polyimide substrate 10 are coated with the mixture and subjected to heat treatment, so that the solvent in the polyimide solution is volatilized and the polyimide cyclization reaction occurs to form polyimide, thereby obtaining The polyfluorene imide conductive film 20.
所述原位沉積法具體為:提供一聚醯胺酸溶液作為聚醯亞胺前驅體,將金屬鹽加入至所述聚醯胺酸溶液中以制得一混合物,然後流延成膜並進行熱處理,使得聚醯胺酸發生醯亞胺環化反應生成聚醯亞胺,同時金屬鹽原位分解形成金屬或金屬氧化物顆粒,從而得到所述聚醯亞胺導電膜20。 The in-situ deposition method is specifically: providing a polyamic acid solution as a polyimide precursor, adding a metal salt to the polyamino acid solution to prepare a mixture, and then casting into a film and performing The heat treatment causes the polyimide cyclization reaction to generate polyimide, and at the same time, the metal salt is decomposed in situ to form metal or metal oxide particles, thereby obtaining the polyimide conductive film 20.
所述溶膠-凝膠法具體為:提供一具有較低粘度的聚醯胺酸溶液作為聚醯亞胺前驅體,將金屬有機醇鹽加入至所述聚丙烯酸溶液或聚醯亞胺溶液中以得到一混合物,然後流延成膜並進行熱處理,使得聚醯胺酸發生醯亞胺環化反應生成聚醯亞胺,同時有機金屬醇鹽經過溶膠-凝膠過程水解形成金屬氧化物,從而得到所述聚醯亞胺導電膜20。 The sol-gel method is specifically: providing a polyamidic acid solution having a lower viscosity as a polyimide precursor, and adding a metal organic alkoxide to the polyacrylic acid solution or polyimide solution to A mixture is obtained, which is then cast into a film and heat-treated, so that the polyimide cyclization occurs to form a polyimide, and the organometallic alkoxide is hydrolyzed to form a metal oxide through a sol-gel process, thereby obtaining The polyfluorene imide conductive film 20.
所述表面改性離子交換法具體為:提供一聚醯胺酸的半幹性薄膜作為聚醯亞胺前驅體,將所述半幹性薄膜在一無機金屬鹽水溶液中進行離子交換,然後在張力作用下在空氣中進行熱處理,使得聚醯胺酸發生醯亞胺環化反應生成聚醯亞胺,同時金屬離子被熱誘導還原成金屬並部分遷移聚集在所述半幹性薄膜的兩相對表面,從而形成雙面高反射高導電的所述聚醯亞胺導電膜20。 The surface modification ion exchange method is specifically: providing a semi-dry film of polyamic acid as a precursor of polyimide, subjecting the semi-dry film to ion exchange in an aqueous solution of an inorganic metal salt, and then Heat treatment in the air under tension causes the polyimide to undergo polyimide cyclization to form polyimide, and at the same time, metal ions are thermally induced to reduce to metal and partially migrate to collect on the two opposite sides of the semi-dry film Surface, thereby forming the polyfluorene imide conductive film 20 with high reflectivity and high conductivity on both sides.
其中,所述金屬包括銀(Ag)、銅(Cu)、鎳(Ni)、鉛(Pb)、鉑(Pt)、金(Au)、鈷(Co)、鋰(Li)、鋅(Zn)以及鋁(Al)等中的至少一種。所述金屬氧化物包括氧化銀、氧化銅、氧化鎳、氧化鉛、氧化鉑、氧化金、氧化鈷、氧化鋰、氧化鋅以及氧化鋁等中的至少一種。 Wherein, the metal includes silver (Ag), copper (Cu), nickel (Ni), lead (Pb), platinum (Pt), gold (Au), cobalt (Co), lithium (Li), zinc (Zn) And at least one of aluminum (Al) and the like. The metal oxide includes at least one of silver oxide, copper oxide, nickel oxide, lead oxide, platinum oxide, gold oxide, cobalt oxide, lithium oxide, zinc oxide, and aluminum oxide.
步驟S4,請參閱圖5,在所述第二聚醯亞胺導電層22遠離所述聚醯亞胺基材10的每一表面上覆蓋一感光層30。 Step S4, referring to FIG. 5, a photosensitive layer 30 is covered on each surface of the second polyimide conductive layer 22 away from the polyimide substrate 10.
在本實施方式中,所述感光層30為一干膜。 In this embodiment, the photosensitive layer 30 is a dry film.
步驟S5,請參閱圖6,對每一感光層30進行曝光處理。 In step S5, referring to FIG. 6, an exposure process is performed on each photosensitive layer 30.
具體地,先在每一感光層30上分別貼覆線路圖案,然後對其進行紫外光照處理,從而使所述感光層30未被線路圖案覆蓋的區域因被紫外光線照 射而固化(即被曝光),而所述感光層30被線路圖案覆蓋的區域因未被紫外光線照射而沒有被固化(即未被曝光)。 Specifically, a circuit pattern is first covered on each photosensitive layer 30 and then subjected to ultraviolet light treatment, so that areas of the photosensitive layer 30 not covered by the circuit pattern are illuminated by ultraviolet light. It is cured by exposure to radiation (ie, is exposed), and the area of the photosensitive layer 30 covered by the circuit pattern is not cured (ie, is not exposed) because it is not irradiated with ultraviolet light.
步驟S6,請參閱圖7,對曝光後的每一感光層30進行顯影處理,從而在每一感光層30中形成圖形開口31,所述圖形開口31用於暴露形成有所述第一聚醯亞胺導電層21的通孔11以及部分所述第二聚醯亞胺導電層22。 In step S6, referring to FIG. 7, each exposed photosensitive layer 30 is subjected to a development process to form a pattern opening 31 in each photosensitive layer 30. The pattern opening 31 is used for exposing the first polymer layer. The through hole 11 of the imine conductive layer 21 and part of the second polyfluorene imine conductive layer 22.
具體的,將覆蓋有所述感光層30的產品浸泡於顯影液中,每一感光層30未被曝光的區域因與顯影液反應而被移除,從而形成所述圖形開口31。所述顯影液採用濃度為1%的NaCO3溶液。 Specifically, the product covered with the photosensitive layer 30 is immersed in a developing solution, and the unexposed areas of each photosensitive layer 30 are removed due to the reaction with the developing solution to form the pattern opening 31. The developing solution is a 1% NaCO 3 solution.
步驟S7,請參閱圖8,在所述第二聚醯亞胺導電層22所暴露的部分上鍍銅以形成兩導電線路層40,並在形成有所述第一聚醯亞胺導電層21的通孔11中鍍銅以形成電性連接所述兩導電線路層40的導電部41。 Step S7, referring to FIG. 8, copper is plated on the exposed portion of the second polyimide conductive layer 22 to form two conductive circuit layers 40, and the first polyimide conductive layer 21 is formed Copper is plated in the through holes 11 to form a conductive portion 41 electrically connecting the two conductive circuit layers 40.
在本實施方式中,通過化學鍍或電鍍的方式形成所述導電線路層40。 In this embodiment, the conductive circuit layer 40 is formed by electroless plating or electroplating.
步驟S8,請參閱圖9,移除每一感光層30以暴露所述導電線路層40的線路開口42。 In step S8, referring to FIG. 9, each photosensitive layer 30 is removed to expose the circuit openings 42 of the conductive circuit layer 40.
步驟S9,請參閱圖10,蝕刻所述第二聚醯亞胺導電層22與所述線路開口42對應的部分以及所述聚醯亞胺基材10的每一表面與所述線路開口42對應的部分,蝕刻後的所述聚醯亞胺基材10的表面形成與所述線路開口42對應的凹槽12。 Step S9, referring to FIG. 10, etching a portion of the second polyimide conductive layer 22 corresponding to the circuit opening 42 and each surface of the polyimide substrate 10 corresponding to the circuit opening 42 In part, a groove 12 corresponding to the circuit opening 42 is formed on the surface of the polyimide substrate 10 after the etching.
在本實施方式中,採用一鹼性藥水蝕刻所述第二聚醯亞胺導電層22和所述聚醯亞胺基材10。在蝕刻過程中,聚醯亞胺發生開環水解,而後被氧化劑氧化。更具體的,可通過控制氧化劑的含量、反應溫度以及反應時間來控制所述聚醯亞胺基材10的蝕刻程度,即控制所述凹槽12的深度。 In this embodiment, an alkaline chemical is used to etch the second polyimide conductive layer 22 and the polyimide substrate 10. During the etching process, polyimide undergoes ring-opening hydrolysis and is then oxidized by an oxidant. More specifically, the degree of etching of the polyimide substrate 10 can be controlled by controlling the content of the oxidant, the reaction temperature, and the reaction time, that is, the depth of the groove 12 can be controlled.
在另一實施方式中,採用鐳射蝕刻所述第二聚醯亞胺導電層22和所述聚醯亞胺基材10。所述鐳射可為二氧化碳鐳射或紫外鐳射。 In another embodiment, the second polyimide conductive layer 22 and the polyimide substrate 10 are etched by laser. The laser may be a carbon dioxide laser or an ultraviolet laser.
步驟S10,請參閱圖11,在每一導電線路層40遠離所述聚醯亞胺基材10的表面覆蓋一覆蓋膜50,然後壓合所述覆蓋膜50以使其流動而填充至所述凹槽12,從而制得所述柔性電路板100。 In step S10, referring to FIG. 11, a surface of each conductive circuit layer 40 away from the polyimide substrate 10 is covered with a cover film 50, and then the cover film 50 is pressed to flow to fill the cover film 50. The groove 12, so that the flexible circuit board 100 is manufactured.
以上覆銅基板100的製作過程為全加成法,通過在聚醯亞胺基材10上形成聚醯亞胺導電膜20以使所述聚醯亞胺基材10的表面金屬化,從而提高所述聚醯亞胺基材10與所述導電線路層40之間的結合力,而在蝕刻位於所述 導電線路層40之間的聚醯亞胺導電膜20的過程中(參以上步驟S9),不會對導電線路層40進行蝕刻,這在保證較小的線距的同時可避免側蝕現象產生。再者,所述聚醯亞胺基材10的每一表面與所述線路開口42對應的部分也會被蝕刻而形成凹槽12(參以上步驟S9),從而確保導電線路層40之間的聚醯亞胺導電膜20被蝕刻去除,避免部分殘留造成引發短路風險。 The manufacturing process of the above copper-clad substrate 100 is a full addition method. The polyimide conductive film 20 is formed on the polyimide substrate 10 to metalize the surface of the polyimide substrate 10, thereby improving The bonding force between the polyimide substrate 10 and the conductive circuit layer 40 is located at the etching position. During the process of the polyimide conductive film 20 between the conductive circuit layers 40 (see step S9 above), the conductive circuit layer 40 will not be etched, which can prevent side etching while ensuring a small line distance. . In addition, a portion of each surface of the polyimide substrate 10 corresponding to the circuit opening 42 is also etched to form a groove 12 (see step S9 above), so as to ensure the space between the conductive circuit layers 40. The polyfluorene imide conductive film 20 is removed by etching to avoid the risk of causing a short circuit caused by some residues.
請參閱圖11,本發明一較佳實施方式還提供一種柔性電路板100,其包括一聚醯亞胺基材10。所述聚醯亞胺基材10中開設有貫穿的至少一通孔11。所述聚醯亞胺基材10相對的兩表面均形成有凹槽12。 Please refer to FIG. 11, a preferred embodiment of the present invention further provides a flexible circuit board 100 including a polyimide substrate 10. The polyimide substrate 10 is provided with at least one through hole 11 therethrough. A groove 12 is formed on two opposite surfaces of the polyimide substrate 10.
所述聚醯亞胺基材10相對的兩表面除所述凹槽12之外的部分以及所述通孔11的內壁上形成一聚醯亞胺導電膜20。所述聚醯亞胺導電膜20包括位於所述通孔11的內壁的第一聚醯亞胺導電層21以及除所述第一聚醯亞胺導電層21之外的一第二聚醯亞胺導電層22。 A polyimide conductive film 20 is formed on the opposite surfaces of the polyimide substrate 10 except for the groove 12 and the inner wall of the through hole 11. The polyimide conductive film 20 includes a first polyimide conductive layer 21 located on an inner wall of the through hole 11 and a second polyimide other than the first polyimide conductive layer 21. Imine conductive layer 22.
所述第二聚醯亞胺導電層22遠離所述聚醯亞胺基材10的表面形成有兩導電線路層40。每一導電線路層40具有與所述凹槽12位置對應的線路開口42。其中,形成有所述第一聚醯亞胺導電層21的通孔11中具有導電部41以電性連接所述兩導電線路層40。 Two conductive circuit layers 40 are formed on a surface of the second polyimide conductive layer 22 away from the polyimide substrate 10. Each conductive circuit layer 40 has a circuit opening 42 corresponding to the position of the groove 12. Wherein, the through hole 11 in which the first polyimide conductive layer 21 is formed has a conductive portion 41 to electrically connect the two conductive circuit layers 40.
在每一導電線路層40遠離所述聚醯亞胺基材10的表面覆蓋有一覆蓋膜50,所述覆蓋膜50填充至所述凹槽12。 A cover film 50 is covered on a surface of each conductive circuit layer 40 away from the polyimide substrate 10, and the cover film 50 is filled into the groove 12.
最後需要指出,以上實施例僅用以說明本發明的技術方案而非限制,儘管參照以上較佳實施例對本發明進行了詳細說明,本領域的普通技術人員應當理解,可以對本發明的技術方案進行修改或等同替換都不應脫離本發明技術方案的精神和範圍。 Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solution of the present invention and are not limiting. Although the present invention has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be carried out. Modifications or equivalent replacements should not depart from the spirit and scope of the technical solution of the present invention.
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