TWI531061B - Lateral bipolar junction transistor and fabrication method thereof - Google Patents

Description

Lateral double carrier junction transistor and manufacturing method thereof

The present invention relates to a process for an integrated circuit, and more particularly to a lateral bipolar junction transistor (BJT) and method of fabricating the same.

The transistor is the core component of modern electronic circuits. There are many kinds of transistors, which can be divided into bipolar junction transistors (BJT) and field effect transistors (FETs) according to the working principle. The bipolar junction transistor is formed by combining two reverse-connected pn junctions, having three ends of an emitter (E), a base (base), and a collector (C). element.

One of the main functions of BJT is to be used as a switch, and its main purpose is two. One is to switch components with higher power; the other is digital logic. In addition, BJT can amplify signals, and has good power control, high-speed operation and durability. It is often used to form amplifier circuits, or to drive speakers, motors, etc., and is widely used in aerospace engineering, medical equipment. And applications such as robots.

BJT can also be applied to electrostatic discharge protection circuits. With the new moon of technology Differently, the current BJT's breakdown voltage is insufficient to meet the needs of existing components. For example, in the manufacturing process of components with operating voltages from -VDD to 2.5VDD, the output swing is between -3.5 volts and 8.75 volts, and typical ESD protection components are difficult to meet this specification range. The BJT's breakdown voltage is also only 7.7 volts, so a BJT with a high breakdown voltage is needed.

The present invention provides several lateral bi-carrier junction transistors with high breakdown voltages.

The present invention proposes several lateral bi-carrier junction transistors that can confine current to a small area to have a high breakdown voltage.

The present invention proposes several lateral bi-carrier junction transistors which have a high breakdown voltage and which can disperse the electric field and increase the heat dissipation effect.

The invention provides a method for manufacturing several lateral bipolar junction transistors, which can be compatible with existing processes, and does not require an additional reticle to increase the breakdown voltage.

The invention provides a method for manufacturing several kinds of lateral bipolar junction transistors, which can be compatible with the existing process, and does not need to add an additional mask, but limits the current to a small area to increase the breakdown voltage.

The invention provides a method for manufacturing a plurality of lateral bi-carrier junction transistors, which can be compatible with the existing process, and does not require additional reticle, but enhances the lateral double-carrier junction cell breakdown voltage, and can The electric field is dispersed to increase the heat dissipation effect.

The invention provides a lateral bi-carrier junction transistor, comprising: a substrate, a well region, at least one lightly doped region, a first doped region and a second doped region. The substrate has a first conductivity type. The well region has a second conductivity type located in the substrate. The area is located in the well area. At least one lightly doped region is located in the well region below the region. a first doped region and a second doped region having the first conductivity type, located in the well region on both sides of the region, wherein the first doped region is connected to a cathode; the second doping The zone is connected to the anode. The doping concentration of the at least one lightly doped region is lower than the doping concentration of the first doped region and the second doped region, and lower than the doping concentration of the well region.

According to an embodiment of the invention, the first conductivity type is a P type; and the second conductivity type is an N type.

According to an embodiment of the invention, the first conductivity type is an N type; and the second conductivity type is a P type.

According to an embodiment of the invention, the at least one lightly doped region is the first conductivity type.

According to an embodiment of the invention, the at least one lightly doped region is the second conductivity type.

According to an embodiment of the invention, the at least one lightly doped region is a single doped region.

According to an embodiment of the invention, the at least one lightly doped region is a plurality of doped regions.

According to an embodiment of the present invention, the lateral bipolar junction transistor further includes at least one isolation structure located in the region, the at least one isolation structure being adjacent to the first doped region and Adjacent to the second doped region.

According to an embodiment of the invention, the at least one lightly doped region and the Said at least one isolation structure is in contact.

According to an embodiment of the invention, the at least one lightly doped region is separated from the at least one isolation structure by a distance.

According to an embodiment of the invention, the lateral bipolar junction transistor further includes a first isolation structure and a second isolation structure. The first isolation structure is located in the region adjacent to the first doped region. The second isolation structure is located in the region adjacent to the second doped region.

The invention provides a method for manufacturing a lateral bipolar junction transistor, comprising: forming at least one first well region having a first conductivity type in a substrate. A second well region of the second conductivity type is formed in the substrate. The first well is located in the second well region, and the at least one first well region partially overlaps the second well region, and at least one lightly doped region is formed after compensation by the second well region . Forming a first doped region and a second doped region in the second well region, respectively. The first doped region and the second doped region are respectively located on opposite sides of a region above the lightly doped region. The first doped region is coupled to the cathode and the second doped region is coupled to the anode.

According to an embodiment of the invention, the first conductivity type is a P type; and the second conductivity type is an N type.

According to an embodiment of the invention, the first conductivity type is an N type; and the second conductivity type is a P type.

According to an embodiment of the invention, the at least one lightly doped region is the first conductivity type.

According to an embodiment of the invention, the at least one lightly doped region is of a second conductivity type.

According to an embodiment of the invention, the at least one lightly doped region is a single Doped area.

According to an embodiment of the invention, the at least one lightly doped region is a plurality of Doped area.

According to an embodiment of the invention, the forming the first well region The method further includes forming at least one isolation structure in the region, the at least one isolation structure being adjacent to the first doped region and adjacent to the second doped region.

According to an embodiment of the invention, the at least one lightly doped region and the Said at least one isolation structure is in contact.

According to an embodiment of the invention, the at least one lightly doped region and the The at least one isolation structure is separated by a distance.

According to an embodiment of the invention, the forming the first well region The front portion further includes forming a first isolation structure and a second isolation structure in the region. The first isolation structure is adjacent to the first doped region. The second isolation structure is adjacent to the second doped region.

The lateral bipolar junction transistor of the present invention is transmitted through the cathode and the cathode A lightly doped region is disposed under the region between the doped regions of the poles to increase the breakdown voltage.

The lateral bipolar junction transistor of the present invention is transmitted through the isolation structure Setting a lightly doped region at a distance from it allows the current to be confined to a small area to increase its breakdown voltage.

The lateral bi-carrier junction transistor of the present invention is transmitted through two separate compartments A lightly doped region is disposed under the structure to increase the breakdown voltage and disperse the electric field to increase the heat dissipation effect.

The method for manufacturing the lateral bipolar junction transistor of the present invention can be Some processes are compatible, and no additional mask is needed, which can increase the breakdown voltage.

The method for manufacturing the lateral bipolar junction transistor of the present invention can be Some processes are compatible, and no additional mask is needed, and the current is limited to a small area to increase the breakdown voltage of the lateral bipolar junction transistor.

The method for manufacturing the lateral bipolar junction transistor of the present invention can be Some processes are compatible, and no additional mask is needed, but the breakdown voltage of the lateral double-carrier junction transistor can be improved, and the electric field can be dispersed to increase the heat dissipation effect.

In order to make the above features and advantages of the present invention more apparent, the following is a special The embodiments are described in detail below in conjunction with the drawings.

10‧‧‧Base

20, 30, 226‧‧ ‧ well area

22, 24, 32‧‧‧ doped areas

26, 126‧‧‧ lightly doped area

40‧‧‧Area

50, 52, 62, 64‧‧ ‧ isolation structure

D1, d2, d3, d4‧‧‧ distance

I-I, II-II, III-III, IV-IV‧‧‧ tangent

1 is a top plan view of a lateral bipolar junction transistor in accordance with an embodiment of the present invention.

2A is a cross-sectional view showing one of the lateral bipolar junction transistors of the tangential line I-I of FIG.

2B is a cross-sectional view showing another lateral bipolar junction transistor of the tangent I-I of FIG. 1.

2C is a cross-sectional view showing still another lateral bipolar junction transistor of the tangential line I-I of FIG. 1.

2D is a cross-sectional view showing still another lateral bipolar junction transistor of the tangential line I-I of FIG. 1.

FIG. 3A is a diagram showing still another lateral bipolar junction transistor according to an embodiment of the present invention. Top view.

3B is a top plan view of another lateral bipolar junction transistor in accordance with an embodiment of the present invention.

4A is a schematic cross-sectional view showing a line II-II of FIG. 3A.

4B is a schematic cross-sectional view showing a tangential line III-III of FIG. 3B.

FIG. 5 is a top plan view of a lateral bipolar junction transistor according to an embodiment of the invention.

6A is a cross-sectional view showing one of the lateral bipolar junction transistors of the tangential line IV-IV of FIG. 5.

6B is a cross-sectional view showing another lateral bipolar junction transistor of the tangential line IV-IV of FIG. 5.

6C is a cross-sectional view showing still another lateral bipolar junction transistor of the tangential line IV-IV of FIG. 5.

6D is a cross-sectional view showing still another lateral bipolar junction transistor of the tangential line IV-IV of FIG. 5.

7A is a top plan view showing still another lateral bipolar junction transistor according to an embodiment of the present invention.

7B is a top plan view of another lateral bipolar junction transistor in accordance with an embodiment of the present invention.

8A is a schematic cross-sectional view showing a tangential line V-V of FIG. 7A.

8B is a schematic cross-sectional view showing the line VI-VI of FIG. 7B.

The lateral bipolar junction transistor of the present invention forms a lightly doped region below a region between the two doped regions in addition to forming two doped regions connecting the cathode and the anode in the well region. . The conductivity type of the lightly doped region may be the same as or different from the conductivity type of the well region. A single one, two or more isolation structures may be formed in the region between the two doped regions. The lightly doped regions may be in contact with or separated from one or more of the aforementioned isolation structures. Since the doping concentration of the lightly doped region is lower than the doping concentration of the two doped regions and lower than the doping concentration of the well region, the breakdown voltage of the lateral bipolar junction transistor can be improved. The present invention will be described below by way of several embodiments, however, the lateral bipolar junction transistor of the embodiment of the present invention is not limited thereto.

In the embodiments described below, the first conductivity type of the lateral bipolar junction transistor is, for example, a P type; the second conductivity type is, for example, an N type, as shown in FIGS. 1 to 8B. However, the invention is not limited thereto. In another embodiment, the first conductivity type in the lateral bipolar junction transistor is, for example, an N type; and the second conductivity type is, for example, a P type. The dopant of the P type is, for example, boron or boron trifluoride. The dopant of the N type is, for example, phosphorus or arsenic.

1 is a top plan view of a lateral bipolar junction transistor in accordance with an embodiment of the present invention. 2A is a cross-sectional view showing a lateral bipolar junction transistor of the tangential line I-I of FIG. 1.

Referring to FIGS. 1 and 2A, the lateral bipolar junction transistor includes a substrate 10, a well region 20, doped regions 22, 24, a lightly doped region 26, a well region 30, and a doped region 32.

Substrate 10 can be a semiconductor substrate, such as a germanium substrate. Substrate 10 There is a first conductivity type.

The well region 20 has a second conductivity type located in the substrate 10. Doped region 22, 24 has a first conductivity type and is located in the well region 20.

The doped regions 22, 24 have a first conductivity type, which are electrically connected to the cathode and the anode, respectively. pole. In one embodiment, the doped regions 22 are separated by a region 40 and surround the doped region 24.

There is a single isolation structure 50 in region 40. The isolation structure 50 is, for example Shallow trench isolation structure.

The lightly doped region 26 has a second conductivity type and is located in the isolation structure of the region 40. 50 in the well area 20 below. The doping concentration of the lightly doped region 26 is lower than the doping concentration of the doped region 22 and the doped region 24, and lower than the doping concentration of the well region 20. In the present embodiment, the lightly doped region 26 is a single region and is in contact with the isolation structure 50. However, the embodiments of the present invention are not limited thereto.

The well zone 30 has a first conductivity type located around the well zone 20. In a real In the embodiment, the well region 30 surrounds the well region 20.

Doped region 32 has a first conductivity type and is located in well region 30. In one implementation In the example, the doped region 32 surrounds the doped region 22. The doped region 32 and the doped region 22 may be separated by an isolation structure 52.

2B is a side view of a double-carrier junction transistor of the tangent I-I of FIG. Schematic diagram of the section.

In the embodiment of FIG. 2A above, the lightly doped region 26 is a single region. However, the embodiment of the present invention is not limited thereto, and in another example, as shown in FIG. 2B It can be noted that the isolation structure 50 can have a plurality of lightly doped regions 26 underneath. In an embodiment, the lightly doped regions 26 are juxtaposed below the isolation structure 50. The present embodiment provides a plurality of lightly doped regions 26 under the isolation structure 50 to further increase the breakdown voltage of the junction of the lightly doped regions 26 and the well regions 20.

2B is a cross-sectional view showing another lateral bipolar junction transistor of the tangent I-I of FIG. 1. 2C is a cross-sectional view showing still another lateral bipolar junction transistor of the tangential line I-I of FIG. 1.

In the embodiment of FIG. 2A above, the lightly doped region 26 is in contact with the isolation structure 50. However, the embodiments of the present invention are not limited thereto. In the embodiment of Figures 2C and 2D, the lightly doped regions 26 are separated from the isolation structure 50 by a distance d1 without contact. The distance d1 is, for example, 0.05 μm to 1 μm. Similarly, the lightly doped region 26 can be a single region, as shown in Figure 2C; the lightly doped region 26 can also be a plurality of regions, as shown in Figure 2D. Compared with the case where there is no lightly doped region 26, in this embodiment, the lightly doped region 26 is separated from the isolation structure 50 by a distance d1, so that the channel is made smaller, and the current is limited to a small area to enhance the lateral direction. The breakdown voltage of the bipolar junction transistor.

In the embodiment of Figures 2A-2D described above, a single isolation structure 50 is disposed in region 40. However, the embodiments of the present invention are not limited thereto.

3A and 3B are top views of still another lateral bipolar junction transistor according to an embodiment of the present invention. 4A is a schematic cross-sectional view taken along line II-II of FIG. 3A. 4B is a schematic cross-sectional view showing a tangential line III-III of FIG. 3B.

Referring to Figures 3A and 4A, two separate isolation structures 62 and 64 are provided in region 40 in this embodiment. The isolation structure 62 is in contact with the doped region 22; the isolation junction The structure 64 is in contact with the doped region 24. The region 40 remaining between the isolation structure 62 and the isolation structure 64 is part of the well region 20. The lightly doped region 26 is disposed below the region 40 and is not in contact with the isolation structures 62, 64, but separated by a distance d2. The distance d2 is, for example, 0.05 μm to 1 μm. Similarly, the lightly doped region 26 can be a single region, as shown in Figures 3A and 4A; the lightly doped region 26 can also be a plurality of regions, as shown in Figures 3B and 4B. In this embodiment, the lightly doped region 26 is separated from the isolation structure 50 by a distance d2, which can make the channel smaller and the current is limited to a small area to enhance the lateral direction. The breakdown voltage of the bipolar junction transistor. However, compared to the case of the embodiment of FIGS. 2C and 2D, in the present embodiment, the region 40 remaining between the isolation structure 62 and the isolation structure 64 can disperse the electric field to increase the heat dissipation effect.

In the above embodiments of Figures 2A to 2D and Figures 4A and 4B, the bits The lightly doped region 26 below the region 40 is of the same conductivity type as the well region 20 and has a second conductivity type. However, the embodiment of the present invention is not limited thereto, and the conductivity type of the doped region located under the region 40 may also be different from the well region 20 and have the first conductivity type, as shown in FIG. 5, FIG. 6A to FIG. 6D. 7A, 7B and 8A and 8B.

FIG. 5 is a side view of a bidirectional contact transistor in accordance with an embodiment of the present invention; FIG. Top view. 6A to 6D are cross-sectional views showing one of the lateral bipolar junction transistors of the tangential line IV-IV of Fig. 5, respectively. 7A and 7B are top plan views showing still another lateral bipolar junction transistor according to an embodiment of the present invention. 8A is a schematic cross-sectional view showing a tangential line V-V of FIG. 7A. 8B is a schematic cross-sectional view showing the line VI-VI of FIG. 7B.

Referring to FIG. 5 and FIG. 6A, the area 40 has a single isolation structure 50, And having a lightly doped region 126 under the isolation structure 50. The lightly doped region 126 has a first conductivity type. The doping concentration of the lightly doped region 126 is lower than the doping concentration of the doped regions 22 and 24. In the present embodiment, the lightly doped region 126 is in contact with the isolation structure 50. When the depletion region of the cathode covers the lightly doped region 126, it is punched through, so that the breakdown voltage can be increased.

Please refer to FIG. 5 and FIG. 6B, and the lateral bipolar junction transistor of FIG. 6A. Similarly, there are a plurality of lightly doped regions 126 having a first conductivity type below the isolation structure 50. Since the conductivity type of the lightly doped region 126 is different from that of the well region 20, a plurality of PNPs are connected in series, so that the breakdown voltage of the lightly doped region 126 and the well region 20 can be further increased.

Please refer to FIG. 5, FIG. 6C and FIG. 6D, and the lateral bipolar sub-surface of FIG. 6C is electrically connected. The crystal is similar to the lateral bi-carrier junction transistor of Figure 6A; the lateral bi-carrier junction transistor of Figure 6D is similar to the lateral bi-carrier junction transistor of Figure 6B, but with isolation structure 50 and underneath it The lightly doped regions 126 of the first conductivity type are separated by a distance d3 without being in contact. The distance d3 is, for example, 0.05 μm to 1 μm. Compared with the case where there is no lightly doped region 126, in this embodiment, the lightly doped region 126 is separated from the isolation structure 50 by a distance d3, so that the channel is made smaller, and the current is limited to a small area to increase the breakdown voltage.

Please refer to FIG. 7A, FIG. 7B, FIG. 8A and FIG. 8B, in the middle area of the embodiment. Two separate isolation structures 62 and 64 are provided in the field 40. The isolation structure 62 is in contact with the doped region 22; the isolation structure 64 is in contact with the doped region 24. Between the isolation structure 62 and the isolation structure 64 is a portion of the well region 20. Light doped region 126 having a first conductivity type Below the isolation structures 62, 64 and not in contact with the isolation structures 62, 64, a distance d4 is provided. The distance d4 is, for example, 0.05 μm to 1 μm. Similarly, the lightly doped region 126 can be a single region, as shown in Figures 7A and 8A; the lightly doped region 126 can also be a plurality of regions, as shown in Figures 7B and 8B. Compared with the case where there is no lightly doped region 126 at all, in this embodiment, the lightly doped region 126 is separated from the isolation structure 50 by a distance d4, so that the channel becomes smaller, and the current is limited to a small region to increase the breakdown voltage. . However, compared to the case of the embodiment of FIGS. 6C and 6D, in the present embodiment, the region 40 remaining between the isolation structure 62 and the isolation structure 64 can disperse the electric field to increase the heat dissipation effect.

The lateral bipolar junction transistor of the above embodiment can be combined with the existing process Compatible. The lightly doped region 26 which is the same as the conductivity type of the well region 20 or the lightly doped region 126 which is different from the conductivity type of the well region 20 can be formed by ion implantation, and an additional mask can be omitted. .

Hereinafter, the lateral bi-carrier connection of the present invention will be described with reference to FIGS. 2A and 6A. Surface transistor manufacturing method.

Referring to FIG. 2A, the substrate 10 is formed by ion implantation. The first conductivity type well region 226. Thereafter, a second conductivity type well region 20 is formed in the substrate 10, wherein the well region 226 is located in the well region 20, the well region 226 partially overlaps the well region 20, and the well region 226 is compensated by the well region 20 to form a light blend. Miscellaneous region 26 (Fig. 2A) or lightly doped region 126 (Fig. 6A). When the doping concentration of the well region 226 is lower than the doping concentration of the well region 20, after the two conductivity type different dopants are compensated, a part of the second conductivity type doping of the well region 20 cannot be compensated, and is formed. Lightly doped region with second conductivity type 26. When the doping concentration of the well region 226 is higher than the doping concentration of the well region 20, after the doping of the two conductivity types is compensated, the first conductivity type doping of a portion of the well region 226 is still not compensated, and is formed. A lightly doped region 126 having a first conductivity type.

Thereafter, doped regions 22, 24 are formed in the well region 20, in the substrate 20. A well region 30 is formed, a doped region 32 is formed in the well region 30, an isolation structure 50 is formed in the region 40, and an isolation structure 52 is formed between the doped regions 22 and 32. The doped region 22 is then connected to the cathode, and the doped region 24 is connected to the anode.

The above embodiment is illustrated by forming a single lightly doped region 26, 126. However, if the lateral bipolar junction transistor has a plurality of lightly doped regions 26, 126, as shown in FIGS. 2B, 2D, 6B, and 6D, a plurality of first conductive layers may be formed in the substrate 10 in a manufacturing method similar to the above. The type of well area 226 is reached.

The lightly doped regions 26, 126 of the above embodiment are in contact with the isolation structure 50, However, if the lightly doped regions 26, 126 of the lateral bipolar junction transistor are not in contact with the isolation structure 50, and are separated by a distance d1, d2, d3 or d4, as shown in Figures 2C, 2D, 4A, 4B, 6C. , 6D, 8A, 8B, the well region 226 can be formed by control of ion implantation parameters (eg, energy or dose).

The above isolation structures 50, 52, 62, 64 may be in accordance with known shallow trenches It is formed by the method of structure, and will not be described here.

After simulation experiments, compared to BJT elements without a lightly doped region The breakdown voltage of the lateral bipolar junction transistor of the present invention can be increased from 8.5 volts to 9.2 volts, and thus can be applied to high speed components or complementary MOS transistors.

In summary, the lateral bipolar junction transistor of the present invention increases the breakdown voltage by providing a lightly doped region below the region between the two doped regions. The conductivity type of the lightly doped region may be the same as or different from the conductivity type of the well region. When the conductivity type of the lightly doped region is the same as that of the well region, since the doping concentration is lower than the well region, the resistance value can be increased, the voltage across the gate can be increased, and the collapse voltage of the lateral bipolar junction transistor can be increased. When the conductivity type of the lightly doped region is different from that of the well region, the depletion region of the cathode is broken down when overlying the lightly doped region, thereby increasing the breakdown voltage.

The lightly doped regions may be single or multiple. When the lightly doped regions are plural and the conductivity type is different from the conductivity type of the well region, a plurality of PNPs are connected in series, and thus, the breakdown voltage of the lightly doped region and the well region junction can be further increased.

In addition, the lightly doped region is separated from the isolation structure by a distance, which can limit the current to a small area to increase the breakdown voltage.

Furthermore, when the lightly doped region is disposed under the region between the two isolation structures, in addition to increasing the breakdown voltage, the electric field can be dispersed to increase the heat dissipation effect.

In addition, the method of fabricating the lateral bipolar junction transistor of the present invention can be compatible with existing processes. The lightly doped regions can be formed by ion implantation without the need for additional reticle.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧Base

20, 30, 226‧‧ ‧ well area

22, 24, 32‧‧‧ doped areas

26‧‧‧lightly doped area

40‧‧‧Area

50, 52‧‧‧ isolation structure

Claims (22)

A lateral bi-carrier junction transistor, comprising: a substrate having a first conductivity type; a well region having a second conductivity type located in the substrate; a region located in the well region; at least one a lightly doped region located in the well region below the region; and a first doped region and a second doped region having the first conductivity type, located in the well region on both sides of the region, wherein the The first doped region is connected to a cathode; the second doped region is connected to an anode, wherein a doping concentration of the at least one lightly doped region is lower than a doping concentration of the first doped region and the second doped region And below the doping concentration of the well region. The lateral bipolar junction transistor according to claim 1, wherein the first conductivity type is a P type; and the second conductivity type is an N type. The lateral bipolar junction transistor according to claim 1, wherein the first conductivity type is an N type; and the second conductivity type is a P type. The lateral bipolar junction transistor of claim 1, wherein the at least one lightly doped region is the first conductivity type. The lateral bipolar junction transistor of claim 1, wherein the at least one lightly doped region is the second conductivity type. The lateral bipolar junction transistor of claim 1, wherein the at least one lightly doped region is a single doped region. a lateral bipolar junction transistor as described in claim 1 of the patent application, The at least one lightly doped region is a plurality of doped regions. The lateral bipolar junction transistor according to claim 1, further comprising at least one isolation structure located in the region, the at least one isolation structure being adjacent to the first doped region and the first The two doped regions are adjacent. The lateral bipolar junction transistor of claim 8, wherein the at least one lightly doped region is in contact with the at least one isolation structure. The lateral bipolar junction transistor of claim 8, wherein the at least one lightly doped region is at a distance from the at least one isolation structure. The lateral bipolar junction transistor according to claim 1, further comprising: a first isolation structure located in the region adjacent to the first doped region; and a second isolation structure located at In the region, adjacent to the second doped region. A method for fabricating a lateral bipolar junction transistor includes: forming at least one first well region having a first conductivity type in a substrate; forming a second conductivity type second in the substrate a well area, the first well is located in the second well area, the at least one first well area partially overlaps the second well area, and after the second well area is compensated, at least one lightly doped area is formed; Forming a first doped region and a second doped region respectively in the second well region, the first doped region and the second doped region being respectively located on opposite sides of a region above the lightly doped region; The first doped region is connected to a cathode, and the second doped region is connected to an anode. The lateral bipolar junction transistor as described in claim 12 The manufacturing method, wherein the first conductivity type is a P type; and the second conductivity type is an N type. The method for manufacturing a lateral bipolar junction transistor according to claim 12, wherein the first conductivity type is an N type; and the second conductivity type is a P type. The method of fabricating a lateral bipolar junction transistor according to claim 12, wherein the at least one lightly doped region is the first conductivity type. The method for fabricating a lateral bipolar junction transistor according to claim 12, wherein the at least one lightly doped region is of a second conductivity type. The method of fabricating a lateral bipolar junction transistor according to claim 12, wherein the at least one lightly doped region is a single doped region. The method for fabricating a lateral bipolar junction transistor according to claim 12, wherein the at least one lightly doped region is a plurality of doped regions. The method of manufacturing a lateral bipolar junction transistor according to claim 12, further comprising forming at least one isolation structure in the region before forming the first well region, the at least one isolation structure and The first doped region is adjacent to and adjacent to the second doped region. The method of fabricating a lateral bipolar junction transistor according to claim 19, wherein the at least one lightly doped region is in contact with the at least one isolation structure. The method of fabricating a lateral bipolar junction transistor according to claim 19, wherein the at least one lightly doped region is spaced apart from the at least one isolation structure by a distance. The method of fabricating a lateral bipolar junction transistor according to claim 12, wherein the forming of the first well region further comprises forming in the region: a first isolation structure adjacent to the first doped region; and a second isolation structure adjacent to the second doped region.