[go: up one dir, main page]

TWI528566B - Method and structure of monolithically integrated absolute pressure sensor - Google Patents

Method and structure of monolithically integrated absolute pressure sensor Download PDF

Info

Publication number
TWI528566B
TWI528566B TW103121771A TW103121771A TWI528566B TW I528566 B TWI528566 B TW I528566B TW 103121771 A TW103121771 A TW 103121771A TW 103121771 A TW103121771 A TW 103121771A TW I528566 B TWI528566 B TW I528566B
Authority
TW
Taiwan
Prior art keywords
pressure sensor
cavity
single crystal
region
crystal germanium
Prior art date
Application number
TW103121771A
Other languages
Chinese (zh)
Other versions
TW201511294A (en
Inventor
米岡真吾
安東尼F 弗萊內瑞
Original Assignee
矽立公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/311,034 external-priority patent/US9340414B2/en
Application filed by 矽立公司 filed Critical 矽立公司
Publication of TW201511294A publication Critical patent/TW201511294A/en
Application granted granted Critical
Publication of TWI528566B publication Critical patent/TWI528566B/en

Links

Landscapes

  • Measuring Fluid Pressure (AREA)
  • Pressure Sensors (AREA)

Description

單晶積體絕對壓力感測器的結構及方法 Structure and method of single crystal integrated absolute pressure sensor 相關申請案之交叉參考 Cross-reference to related applications

本申請案出於所有目的主張下列申請中之申請案之優先權利且以引用之方式將該等案併入:2013年6月24日申請之美國臨時申請案第61/838,833號及2014年6月20日申請之美國專利申請案第14/311,034號。本申請案亦出於所有目的以引用之方式將下列申請中之專利申請案併入:2010年3月3日申請之美國專利申請案第12/717,070號、2012年6月12日申請之美國專利申請案第13/494,986號及2009年7月7日申請之美國專利申請案第12/499,027號。 The present application claims the priority of the applications in the following applications for all purposes and incorporates the same by reference: U.S. Provisional Application No. 61/838,833, filed on Jun. 24, 2013, and U.S. Patent Application Serial No. 14/311,034, filed on Jan. 20. The present application is also hereby incorporated by reference in its entirety for all its purposes in the entire application application in the the the the the the the the the the the U.S. Patent Application Serial No. 13/494,986, filed on Jul. 7, 2009.

積體微電子之研究及開發已持續在CMOS及MEMS中產生令人驚訝之進步。CMOS技術已成為積體電路(IC)之主要製造技術。基於微機電系統(MEMS)之感測器可與IC技術結合以實施若干演進中之感測器應用。憑藉積體MEMS-CMOS器件之增大之應用,用於測試此等積體器件之方法及系統已成為保證產品可靠性之關鍵。 The research and development of integrated microelectronics has continued to produce surprising advances in CMOS and MEMS. CMOS technology has become the main manufacturing technology of integrated circuits (ICs). Microelectromechanical systems (MEMS) based sensors can be combined with IC technology to implement several evolving sensor applications. With the increased use of integrated MEMS-CMOS devices, methods and systems for testing such integrated devices have become the key to product reliability.

本發明係關於MEMS(微機電系統)。 The present invention relates to MEMS (Micro Electro Mechanical Systems).

在各種實施例中,本發明提供使用一IC鑄造相容程序之單晶積體絕對壓力感測器之方法及結構。在一實施例中,首先使用一標準IC程序來製造CMOS基板。一壓力感測器之一隔膜係由一單晶矽材料製 成,該材料係轉移至CMOS基板之層。可形成至少一個電容式或壓阻式壓力感測器。本發明提供製造一電容式及壓阻式壓力感測器器件之多個方法。 In various embodiments, the present invention provides methods and structures for a single crystal integrated absolute pressure sensor using an IC casting compatible procedure. In one embodiment, a standard IC program is first used to fabricate a CMOS substrate. One of the pressure sensors is made of a single crystal germanium material. The material is transferred to the layer of the CMOS substrate. At least one capacitive or piezoresistive pressure sensor can be formed. The present invention provides a number of methods of fabricating a capacitive and piezoresistive pressure sensor device.

在一實施例中,本發明提供用於製造一積體MEMS壓力感測器器件之一方法。該方法可包含提供具有一表面區域之一基板部件,及形成上覆該基板之一CMOS IC層,及形成上覆該CMOS IC層之一氧化層。該氧化層之一部分可經移除以形成一空腔區域。一單晶矽晶圓可經接合上覆氧化表面區域以密封該空腔區域。接合程序可包含熔化接合或共熔接合程序。該晶圓可經薄化至一所需厚度且部分可被移除且用金屬材料充填以形成通孔結構。一壓力感測器器件可由該晶圓形成,且可與由該晶圓形成之另一感測器共同製造。該壓力感測器及另一感測器共用一空腔壓力或具有單獨之空腔壓力。 In one embodiment, the present invention provides a method for fabricating an integrative MEMS pressure sensor device. The method can include providing a substrate component having a surface region, forming a CMOS IC layer overlying the substrate, and forming an oxide layer overlying the CMOS IC layer. A portion of the oxide layer can be removed to form a cavity region. A single crystal germanium wafer can be bonded over the oxidized surface region to seal the cavity region. The bonding process can include a fusion bonding or eutectic bonding process. The wafer can be thinned to a desired thickness and partially removed and filled with a metallic material to form a via structure. A pressure sensor device can be formed from the wafer and can be fabricated with another sensor formed from the wafer. The pressure sensor and the other sensor share a cavity pressure or have a separate cavity pressure.

藉由優於習知技術之本發明之實施例實現許多優點。舉例而言,本發明之實施例提供具有與其他感測器器件之結構靈活性之一積體MEMS壓力感測器器件。歸因於在一單一晶片上之MEMS及COMS之單晶積體,可實現該器件之較小晶粒大小及較低寄生電容。另外,該方法提供在不實質上修改習知設備及程序的情況下與習知半導體及MEMS程序技術相容之一程序及系統。取決於該實施例,可實現此等優點之一或多者。將遍及本說明書且更特定言之在下文中更詳細描述此等及其他優點。 Many advantages are realized by embodiments of the invention that are superior to the prior art. For example, embodiments of the present invention provide an integrated MEMS pressure sensor device having structural flexibility with other sensor devices. Due to the monocrystalline body of MEMS and COMS on a single wafer, the smaller grain size and lower parasitic capacitance of the device can be achieved. In addition, the method provides a program and system compatible with conventional semiconductor and MEMS program technologies without substantially modifying conventional devices and programs. Depending on the embodiment, one or more of these advantages can be achieved. These and other advantages are described in more detail below throughout the specification and more particularly hereinafter.

可參考下列實施方式及隨附圖式更充分地瞭解本發明之各種額外目的、特徵或優勢。 Various additional objects, features, or advantages of the invention will be apparent from the description and accompanying drawings.

100‧‧‧積體壓力感測器件 100‧‧‧Integral pressure sensing device

110‧‧‧基板 110‧‧‧Substrate

120‧‧‧CMOS層 120‧‧‧ CMOS layer

121‧‧‧頂部金屬層 121‧‧‧Top metal layer

122‧‧‧接合板 122‧‧‧ joint plate

130‧‧‧氧化層 130‧‧‧Oxide layer

131‧‧‧空腔區域 131‧‧‧Cavity area

140‧‧‧壓力感測器 140‧‧‧pressure sensor

141‧‧‧通孔結構/金屬材料 141‧‧‧through hole structure/metal material

200‧‧‧積體電容式壓力感測器件 200‧‧‧Integral capacitive pressure sensing device

210‧‧‧基板 210‧‧‧Substrate

220‧‧‧CMOS層 220‧‧‧ CMOS layer

221‧‧‧頂部金屬層 221‧‧‧Top metal layer

222‧‧‧接合板 222‧‧‧ joint plate

230‧‧‧氧化層 230‧‧‧ oxide layer

231‧‧‧空腔區域/空腔 231‧‧‧Cavity area/cavity

240‧‧‧壓力感測器 240‧‧‧pressure sensor

241‧‧‧通孔結構/金屬材料 241‧‧‧through hole structure/metal material

250‧‧‧密封層 250‧‧‧ sealing layer

300‧‧‧器件/積體壓力感測器件 300‧‧‧Device/Integrated Pressure Sensing Devices

310‧‧‧基板 310‧‧‧Substrate

320‧‧‧CMOS層 320‧‧‧ CMOS layer

321‧‧‧頂部金屬層 321‧‧‧Top metal layer

322‧‧‧接合板 322‧‧‧ joint plate

330‧‧‧氧化層 330‧‧‧Oxide layer

331‧‧‧空腔區域 331‧‧‧Cavity area

340‧‧‧壓力感測器 340‧‧‧pressure sensor

341‧‧‧通孔結構/金屬充填通孔 341‧‧‧through hole structure/metal filling through hole

350‧‧‧密封層 350‧‧‧ Sealing layer

400‧‧‧積體壓力感測器件 400‧‧‧Integrated pressure sensing device

410‧‧‧基板 410‧‧‧Substrate

420‧‧‧CMOS層 420‧‧‧ CMOS layer

421‧‧‧頂部金屬層 421‧‧‧Top metal layer

422‧‧‧接合板 422‧‧‧ joint plate

431‧‧‧空腔 431‧‧‧ Cavity

432‧‧‧空腔 432‧‧‧ cavity

440‧‧‧壓力感測器 440‧‧‧pressure sensor

441‧‧‧通孔結構 441‧‧‧through hole structure

442‧‧‧另一感測器 442‧‧‧ Another sensor

443‧‧‧錨結構 443‧‧‧ anchor structure

444‧‧‧MEMS蓋 444‧‧‧ MEMS cover

500‧‧‧積體壓力感測器件 500‧‧‧Integrated pressure sensing device

510‧‧‧基板 510‧‧‧Substrate

520‧‧‧CMOS層 520‧‧‧ CMOS layer

521‧‧‧頂部金屬層 521‧‧‧Top metal layer

522‧‧‧接合板 522‧‧‧ joint plate

530‧‧‧氧化層 530‧‧‧Oxide layer

531‧‧‧空腔 531‧‧‧ Cavity

532‧‧‧空腔 532‧‧‧ Cavity

540‧‧‧壓力感測器 540‧‧‧pressure sensor

541‧‧‧通孔結構 541‧‧‧through hole structure

542‧‧‧另一感測器 542‧‧‧Another sensor

543‧‧‧錨結構 543‧‧‧ anchor structure

544‧‧‧MEMS蓋 544‧‧‧ MEMS cover

600‧‧‧積體壓力感測器件 600‧‧‧Integrated pressure sensing device

610‧‧‧基板 610‧‧‧Substrate

620‧‧‧CMOS層 620‧‧‧ CMOS layer

621‧‧‧頂部金屬層 621‧‧‧Top metal layer

622‧‧‧接合板 622‧‧‧ joint plate

630‧‧‧氧化層 630‧‧‧Oxide layer

631‧‧‧空腔 631‧‧‧ Cavity

640‧‧‧壓力感測器 640‧‧‧pressure sensor

641‧‧‧通孔結構 641‧‧‧through hole structure

644‧‧‧蓋 644‧‧‧ Cover

700‧‧‧積體壓力感測器件 700‧‧‧Integrated pressure sensing device

710‧‧‧基板 710‧‧‧Substrate

720‧‧‧CMOS層 720‧‧‧ CMOS layer

721‧‧‧頂部金屬層 721‧‧‧Top metal layer

722‧‧‧接合板 722‧‧‧ joint plate

730‧‧‧氧化層 730‧‧‧Oxide layer

731‧‧‧空腔區域 731‧‧‧Cavity area

740‧‧‧壓力感測器 740‧‧‧pressure sensor

741‧‧‧通孔結構/金屬材料 741‧‧‧through hole structure/metal material

745‧‧‧壓電電阻器 745‧‧‧thin piezoelectric resistor

800‧‧‧積體壓力感測器件 800‧‧‧Integrated pressure sensing device

810‧‧‧基板 810‧‧‧Substrate

820‧‧‧CMOS層 820‧‧‧ CMOS layer

821‧‧‧頂部金屬層 821‧‧‧Top metal layer

822‧‧‧接合板 822‧‧‧ joint plate

830‧‧‧氧化層 830‧‧‧Oxide layer

831‧‧‧空腔 831‧‧‧ cavity

840‧‧‧壓力感測器 840‧‧‧pressure sensor

841‧‧‧通孔結構/接觸 841‧‧‧through hole structure/contact

845‧‧‧壓電電阻器 845‧‧‧thin piezoelectric resistor

901‧‧‧空腔區域 901‧‧‧Cavity area

910‧‧‧CMOS基板 910‧‧‧ CMOS substrate

922‧‧‧接合板 922‧‧‧ joint plate

940‧‧‧隔膜/壓力感測器 940‧‧‧Separator/pressure sensor

944‧‧‧蓋結構/蓋 944‧‧‧Cover structure/cover

960‧‧‧通道 960‧‧‧ channel

961‧‧‧輸入埠 961‧‧‧ Input 埠

1001‧‧‧積體壓力感測器件/器件 1001‧‧‧Integrated pressure sensing devices/devices

1002‧‧‧器件 1002‧‧‧ devices

1010‧‧‧基板 1010‧‧‧Substrate

1020‧‧‧CMOS層 1020‧‧‧ CMOS layer

1021‧‧‧頂部金屬層 1021‧‧‧Top metal layer

1022‧‧‧接合板 1022‧‧‧ joint plate

1030‧‧‧氧化層 1030‧‧‧Oxide layer

1031‧‧‧空腔區域 1031‧‧‧Cavity area

1040‧‧‧壓力感測器 1040‧‧‧pressure sensor

1041‧‧‧通孔結構 1041‧‧‧through hole structure

1044‧‧‧蓋結構 1044‧‧‧ cover structure

1061‧‧‧輸入埠 1061‧‧‧ Input埠

圖1A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 1A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖1B係繪示根據圖1A之實施例之積體壓力感測器器件之一氧化 層之一俯視圖之一簡化圖。 1B illustrates oxidation of one of the integrated body pressure sensor devices according to the embodiment of FIG. 1A. A simplified view of one of the top views of the layer.

圖2A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 2A is a simplified diagram of a cross-sectional view of one of the integrated body pressure sensor devices in accordance with an embodiment of the present invention.

圖2B係繪示根據圖2A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 2B is a simplified diagram of a top view of one of the oxide layers of the integrated body pressure sensor device of the embodiment of FIG. 2A.

圖3A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 3A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖3B係繪示根據圖3A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 3B is a simplified diagram of a top view of an oxide layer of an integrated body pressure sensor device in accordance with the embodiment of FIG. 3A.

圖4A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 4A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖4B係繪示根據圖4A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 4B is a simplified diagram of a top view of an oxide layer of an integrated body pressure sensor device in accordance with the embodiment of FIG. 4A.

圖5A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 5A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖5B係繪示根據圖5A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 5B is a simplified diagram of a top view of one of the oxide layers of the integrated body pressure sensor device of the embodiment of FIG. 5A.

圖6A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 6A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖6B係繪示根據圖6A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 6B is a simplified diagram of a top view of one of the oxide layers of the integrated body pressure sensor device of the embodiment of FIG. 6A.

圖7A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 7A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

圖7B係繪示根據圖7A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 7B is a simplified diagram of a top view of one of the oxide layers of the integrated body pressure sensor device of the embodiment of FIG. 7A.

圖8A係繪示根據本發明之一實施例之一積體壓力感測器器件之 一橫截面視圖之一簡化圖。 8A illustrates an integrated body pressure sensor device in accordance with an embodiment of the present invention. A simplified view of one of the cross-sectional views.

圖8B係繪示根據圖8A之實施例之積體壓力感測器器件之一氧化層之一俯視圖之一簡化圖。 Figure 8B is a simplified diagram of a top view of one of the oxide layers of the integrated body pressure sensor device of the embodiment of Figure 8A.

圖9係繪示根據本發明之一實施例之一積體壓力感測器器件之一透視圖之一簡化圖。 9 is a simplified diagram of a perspective view of one of the integrated body pressure sensor devices in accordance with an embodiment of the present invention.

圖10A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 10A is a simplified diagram of a cross-sectional view of one of the integrated body pressure sensor devices in accordance with an embodiment of the present invention.

圖10B係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。 10B is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention.

本發明係關於MEMS(微機電系統)。更具體言之,本發明之實施例提供用於改良包含慣性感測器及其類似物之積體MEMS器件之方法及結構。 The present invention relates to MEMS (Micro Electro Mechanical Systems). More specifically, embodiments of the present invention provide methods and structures for improving integrated MEMS devices including inertial sensors and the like.

圖1A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖可表示使用熔化接合來製造一積體電容式壓力感測器件之一方法。積體壓力感測器件100包含經積體上覆具有至少一接合板122及至少一頂部金屬層121之一經處理之CMOS基板(上覆基板110之CMOS層120)之一壓力感測器(隔膜)140。壓力感測器140亦可具有耦合至CMOS層120之一或多個通孔結構141。一般技術者將認識到其他變化、修改及替代。 1A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. This figure may represent one method of fabricating an integrated capacitive pressure sensing device using fusion bonding. The integrated body pressure sensing device 100 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 120 overlying the substrate 110) having at least one bonding plate 122 and at least one top metal layer 121 overlying the body. ) 140. Pressure sensor 140 may also have one or more via structures 141 coupled to CMOS layer 120. The general practitioner will recognize other variations, modifications, and alternatives.

如展示,形成一壓力感測器140而上覆包含接合板122及頂部金屬層121之一CMOS基板,其可使用一標準IC程序而製造。在圖案化頂部金屬層後,可沈積且圖案化一氧化層130。上覆頂部金屬層121之氧化層130之至少一區域可經移除以產生一空腔區域131。在一實施例中,氧化層130可係CMOS層120之部分。 As shown, a pressure sensor 140 is formed overlying a CMOS substrate comprising a bond pad 122 and a top metal layer 121 that can be fabricated using a standard IC procedure. After patterning the top metal layer, an oxide layer 130 can be deposited and patterned. At least one region of the oxide layer 130 overlying the top metal layer 121 may be removed to create a cavity region 131. In an embodiment, the oxide layer 130 can be part of the CMOS layer 120.

一單晶矽(SCS)晶圓可在一真空室內與CMOS基板熔化接合,該 真空室可在CMOS層與SCS層之間的空腔區域131中形成一真空。SCS層可經薄化至20至30微米,以形成一壓力感測器140之一隔膜結構。SCS層可經蝕刻以產生小孔,其等可用金屬材料141(例如,TiN及W)充填,以形成在SCS層與CMOS層120之間的電連接。蝕刻程序可包含一電漿蝕刻、化學氣相蝕刻、深反應離子蝕刻(DRIE)或其他類似程序。 A single crystal germanium (SCS) wafer can be melt bonded to a CMOS substrate in a vacuum chamber, The vacuum chamber can form a vacuum in the cavity region 131 between the CMOS layer and the SCS layer. The SCS layer can be thinned to 20 to 30 microns to form a diaphragm structure of a pressure sensor 140. The SCS layer can be etched to create small holes, which can be filled with a metal material 141 (eg, TiN and W) to form an electrical connection between the SCS layer and the CMOS layer 120. The etching process can include a plasma etch, chemical vapor etch, deep reactive ion etch (DRIE) or other similar procedure.

圖1B係繪示根據圖1A之實施例之積體壓力感測器器件之一氧化層130之一俯視圖之一簡化圖。氧化層經展示具有被移除之一實質上圓形區域,其對應於上覆在圖1A中展示之頂部金屬層的區域。 1B is a simplified diagram of a top view of an oxide layer 130 of an integrated body pressure sensor device in accordance with the embodiment of FIG. 1A. The oxide layer is shown with a substantially circular area removed that corresponds to the area overlying the top metal layer shown in Figure 1A.

圖2A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖可表示使用經由薄膜沈積之一密封件來製造一積體電容式壓力感測器件200之一方法。積體壓力感測器件包含經積體上覆具有至少一接合板222及至少一頂部金屬層221之一經處理之CMOS基板(上覆基板210之CMOS層220)之一壓力感測器(隔膜)240。壓力感測器240亦可具有耦合至CMOS層220之一或多個通孔結構241。 2A is a simplified diagram of a cross-sectional view of one of the integrated body pressure sensor devices in accordance with an embodiment of the present invention. This figure may represent one method of fabricating an integrative capacitive pressure sensing device 200 using a seal deposited through a thin film. The integrated body pressure sensing device includes a pressure sensor (diaphragm) overlying a CMOS substrate (the CMOS layer 220 overlying the substrate 210) having at least one bonding plate 222 and at least one top metal layer 221 overlying the integrated body. 240. Pressure sensor 240 can also have one or more via structures 241 coupled to CMOS layer 220.

如展示,形成一壓力感測器240而上覆包含接合板222及頂部金屬層221之一CMOS基板,其可使用一標準IC程序來製造。在圖案化頂部金屬層221後,可沈積且圖案化一氧化層230。上覆頂部金屬層221之氧化層230之至少一區域可經移除以產生一空腔區域231。 As shown, a pressure sensor 240 is formed overlying a CMOS substrate comprising a bond pad 222 and a top metal layer 221 that can be fabricated using a standard IC program. After patterning the top metal layer 221, the oxide layer 230 can be deposited and patterned. At least one region of the oxide layer 230 overlying the top metal layer 221 may be removed to create a cavity region 231.

一單晶矽(SCS)晶圓可在一真空室內與CMOS基板熔化接合,該真空室可在CMOS層與SCS層之間的空腔區域231中形成一真空。SCS層可經薄化至20至30微米,以形成一壓力感測器240之一隔膜結構。SCS層可經蝕刻以產生小孔,其等可用金屬材料241(例如,TiN及W)充填以形成在SCS層與CMOS層220之間的電連接。蝕刻程序可包含一電漿蝕刻、化學氣相蝕刻、深反應離子蝕刻(DRIE)或其他類似程序。 A single crystal germanium (SCS) wafer can be melt bonded to a CMOS substrate in a vacuum chamber that creates a vacuum in the cavity region 231 between the CMOS layer and the SCS layer. The SCS layer can be thinned to 20 to 30 microns to form a diaphragm structure of a pressure sensor 240. The SCS layer can be etched to create small holes, which can be filled with a metal material 241 (eg, TiN and W) to form an electrical connection between the SCS layer and the CMOS layer 220. The etching process can include a plasma etch, chemical vapor etch, deep reactive ion etch (DRIE) or other similar procedure.

緊接著蝕刻程序,打開壓力感測器之空腔231。在一特定實施例中,使用一乾洗程序來移除用於蝕刻程序之一光阻材料。可使用一薄膜沈積程序來密封空腔231,該程序判定在空腔區域231內之空腔壓力。在圖2A中展示密封層250上覆在SCS層中之小孔之一者。沈積程序之壓力及溫度可係小於約1000帕及小於約攝氏350度。薄膜材料可包含PECVD(電漿增強型化學氣相沈積)氮化矽或SiO2或類似物。氮化矽材料可提供一良好之擴散障壁。 Following the etching process, the cavity 231 of the pressure sensor is opened. In a particular embodiment, a dry cleaning process is used to remove one of the photoresist materials used in the etching process. The cavity 231 can be sealed using a thin film deposition process that determines the cavity pressure within the cavity region 231. One of the apertures of the sealing layer 250 overlying the SCS layer is shown in Figure 2A. The pressure and temperature of the deposition procedure can be less than about 1000 Pa and less than about 350 degrees Celsius. The film material may comprise PECVD (plasma enhanced chemical vapor deposition) tantalum nitride or SiO 2 or the like. The tantalum nitride material provides a good diffusion barrier.

圖2B係繪示根據圖2A之實施例之積體壓力感測器器件之一氧化層230之一俯視圖之一簡化圖。氧化層230經展示具有由被移除之一直路徑連接之兩個實質上圓形之區域,該等區域各自對應於上覆頂部金屬層及下伏於密封層之區域(在圖2A中展示)。 2B is a simplified diagram of a top view of one of the oxide layers 230 of the integrated body pressure sensor device of the embodiment of FIG. 2A. The oxide layer 230 is shown to have two substantially circular regions joined by the removed path, each corresponding to an overlying top metal layer and an underlying layer (shown in Figure 2A) .

圖3A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。如在圖2A中展示,此圖繪示使用一薄膜沈積程序來使用密封層350密封器件300之各種部分之另一實施例。積體壓力感測器件300包含經積體上覆具有至少一接合板322及至少一頂部金屬層321之一經處理之CMOS基板(上覆基板310之CMOS層320)之一壓力感測器(隔膜)340。 3A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. As shown in FIG. 2A, this figure illustrates another embodiment of using a thin film deposition process to seal various portions of device 300 using sealing layer 350. The integrated body pressure sensing device 300 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 320 overlying the substrate 310) having at least one bonding plate 322 and at least one top metal layer 321 overlying. ) 340.

在一實施例中,可在壓力感測器340之一部分內形成一或多個通孔結構341。此等通孔結構341或氧化層之各種部分可提供可能的擴散路徑。此等擴散路徑或區域亦可使用先前描述之薄膜沈積程序而密封。此等擴散區域係展示為由上覆SCS層之側、上覆金屬充填通孔341及上覆通向空腔區域331(在圖3A中展示)之開孔之各種密封層密封。 In an embodiment, one or more via structures 341 may be formed in one portion of the pressure sensor 340. These via structures 341 or various portions of the oxide layer can provide a possible diffusion path. These diffusion paths or regions can also be sealed using the previously described thin film deposition procedure. These diffusion regions are shown as being sealed by various seal layers from the side of the overlying SCS layer, the overlying metal fill via 341, and the overlying opening to the cavity region 331 (shown in Figure 3A).

圖3B係繪示根據圖3A之實施例之積體壓力感測器器件之一氧化層330之一俯視圖之一簡化圖。此表示類似於圖2B之一氧化層。 3B is a simplified diagram of a top view of one of the oxide layers 330 of the integrated body pressure sensor device of the embodiment of FIG. 3A. This represents an oxide layer similar to that of Figure 2B.

圖4A係繪示根據本發明之一實施例之一積體壓力感測器器件之 一橫截面視圖之一簡化圖。此圖可表示使用具有一共熔接合之一密封程序來製造一積體電容式壓力感測器件之一方法。積體壓力感測器件400包含經積體上覆具有至少一接合板422及至少一頂部金屬層421之一經處理之CMOS基板(上覆基板410之CMOS層420)之一壓力感測器(隔膜)440。壓力感測器440亦可具有耦合至CMOS層420之一或多個通孔結構441。積體壓力感測器件可與至少另一感測器件整合。 4A illustrates an integrated body pressure sensor device in accordance with an embodiment of the present invention. A simplified view of one of the cross-sectional views. This figure may illustrate one method of fabricating an integrated capacitive pressure sensing device using a sealing procedure with a eutectic bonding. The integrated body pressure sensing device 400 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 420 of the overlying substrate 410) having at least one bonding plate 422 and at least one top metal layer 421 on the integrated body. ) 440. Pressure sensor 440 can also have one or more via structures 441 coupled to CMOS layer 420. The integrated body pressure sensing device can be integrated with at least one other sensing device.

製造方法可包含類似於對圖1A、圖1B、圖2A、圖2B、圖3A及圖3B描述之步驟之步驟。可使用一標準CMOS-MEMS程序。在各種實施例中,可改變設計規則。類似於圖2及圖3,緊接著一Si DRIE蝕刻程序,可打開壓力感測器之空腔431。可在一Al-Ge共熔接合程序期間密封壓力感測器440之空腔431,該程序界定空腔壓力。 The method of manufacture may include steps similar to those described with respect to Figures 1A, 1B, 2A, 2B, 3A, and 3B. A standard CMOS-MEMS program can be used. In various embodiments, the design rules can be changed. Similar to Figures 2 and 3, a cavity 431 of the pressure sensor can be opened following a Si DRIE etch process. The cavity 431 of the pressure sensor 440 can be sealed during an Al-Ge eutectic bonding procedure that defines the cavity pressure.

在圖4A中展示另一感測器442鄰近於壓力感測器440。此另一感測器具有經形成而上覆之一MEMS蓋444。另一感測器442可係一MEMS加速計、陀螺儀、諧振器或其他感測器器件。另一感測器亦可係用於差動量測之一仿真或參考壓力感測器。在各種實施例中,另一感測器可與壓力感測器共同製造且具有一共用空腔或單獨空腔。如展示,感測器442可包含錨結構443。在一實施例中,感測器442可具有處於一經界定之空氣壓力環境中之一空腔432。在一特定實施例中,空腔431及432可具有相同空腔壓力。 Another sensor 442 is shown adjacent to pressure sensor 440 in FIG. 4A. This other sensor has a MEMS cap 444 that is formed overlying. Another sensor 442 can be a MEMS accelerometer, gyroscope, resonator, or other sensor device. Another sensor can also be used for one of the differential measurements or a reference pressure sensor. In various embodiments, another sensor can be fabricated with the pressure sensor and have a common cavity or a separate cavity. As shown, the sensor 442 can include an anchor structure 443. In an embodiment, the sensor 442 can have a cavity 432 in a defined air pressure environment. In a particular embodiment, the cavities 431 and 432 can have the same cavity pressure.

圖4B係繪示根據圖4A之實施例之積體壓力感測器器件之一氧化層430之一俯視圖之一簡化圖。氧化層430經展示具有由一直路徑連接之兩個移除部分(一個實質上係圓形且一個實質上係矩形)。此等區域各自對應於下伏於壓力感測器及其他感測器(在圖4A中展示)之區域。 4B is a simplified diagram of a top view of one of the oxide layers 430 of the integrated body pressure sensor device in accordance with the embodiment of FIG. 4A. Oxide layer 430 is shown to have two removed portions (one substantially circular and one substantially rectangular) joined by a straight path. These regions each correspond to an area underlying the pressure sensor and other sensors (shown in Figure 4A).

圖5A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖繪示製造類似於圖4A之積體壓力感測器件之一積體壓力感測器件之一方法。積體壓力感測器件500包含 經積體上覆具有至少一接合板522及至少一頂部金屬層521之一經處理之CMOS基板(上覆基板510之CMOS層520)之一壓力感測器(隔膜)540。壓力感測器540亦可具有耦合至CMOS層520之一或多個通孔結構541。於此,兩個感測器器件具有單獨之空腔。 5A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. This figure illustrates one method of fabricating an integrated body pressure sensing device similar to the integrated body pressure sensing device of FIG. 4A. The integrated body pressure sensing device 500 includes The integrated body is overlaid with a pressure sensor (diaphragm) 540 having at least one bonding plate 522 and at least one top metal layer 521 processed CMOS substrate (the CMOS layer 520 of the overlying substrate 510). Pressure sensor 540 can also have one or more via structures 541 coupled to CMOS layer 520. Here, the two sensor devices have separate cavities.

在圖5A中展示另一感測器542鄰近於壓力感測器540。此另一感測器具有經形成而上覆之一MEMS蓋544。另一感測器542可係一MEMS加速計、陀螺儀、諧振器或其他感測器器件。另一感測器亦可係用於差動量測之一仿真或參考壓力感測器。在各種實施例中,另一感測器可與壓力感測器共同製造且具有一共用空腔或單獨空腔。如展示,感測器542可包含錨結構543。在一實施例中,感測器542可具有處於一經界定之空氣壓力環境中之一空腔532。在一特定實施例中,空腔531及532可具有相同空腔壓力。 Another sensor 542 is shown adjacent to pressure sensor 540 in FIG. 5A. This other sensor has a MEMS cap 544 formed overlying it. Another sensor 542 can be a MEMS accelerometer, gyroscope, resonator, or other sensor device. Another sensor can also be used for one of the differential measurements or a reference pressure sensor. In various embodiments, another sensor can be fabricated with the pressure sensor and have a common cavity or a separate cavity. As shown, the sensor 542 can include an anchor structure 543. In an embodiment, the sensor 542 can have a cavity 532 in a defined air pressure environment. In a particular embodiment, the cavities 531 and 532 can have the same cavity pressure.

圖5B係繪示根據圖5A之實施例之積體壓力感測器器件之一氧化層530之一俯視圖之一簡化圖。此氧化層530展示兩個單獨之空腔。左側之空腔係類似於對圖1A及圖1B描述之空腔而具有兩個連接之實質上圓形之區域。右側之空腔係一實質上矩形之區域。此等兩個區域各自下伏於壓力感測器540及另一感測器542。 5B is a simplified diagram of a top view of one of the oxide layers 530 of the integrated body pressure sensor device of the embodiment of FIG. 5A. This oxide layer 530 shows two separate cavities. The cavity on the left side is similar to the cavity depicted in Figures 1A and 1B and has two substantially circular regions joined. The cavity on the right side is a substantially rectangular area. These two regions are each underlying the pressure sensor 540 and another sensor 542.

圖6A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖繪示製造類似於圖4A之積體壓力感測器件之一積體壓力感測器件之一方法。於此,展示兩個壓力感測器640,其中另一感測器係用於差動量測之仿真或參考壓力感測器。積體壓力感測器件600包含經積體上覆具有至少一接合板622及至少一頂部金屬層621之一經處理之CMOS基板(上覆基板610之CMOS層620)之一壓力感測器(隔膜)640。壓力感測器640亦可具有耦合至CMOS層620之一或多個通孔結構641。於此,兩個感測器器件具有連接之空腔。並不曝露於周圍環境(封圍於蓋644中)之壓力感測器結構可係對比另 一壓力感測器之參考以抵消無關壓力之溫度及應力之效應。 6A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. This figure illustrates one method of fabricating an integrated body pressure sensing device similar to the integrated body pressure sensing device of FIG. 4A. Here, two pressure sensors 640 are shown, with another sensor being used for the differential measurement simulation or reference pressure sensor. The integrated body pressure sensing device 600 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 620 of the overlying substrate 610) having at least one bonding plate 622 and at least one top metal layer 621 overlying the body. ) 640. Pressure sensor 640 can also have one or more via structures 641 coupled to CMOS layer 620. Here, the two sensor devices have connected cavities. The pressure sensor structure that is not exposed to the surrounding environment (enclosed in the cover 644) can be compared with another A pressure sensor is referenced to counteract the effects of temperature and stress on unrelated pressures.

圖6B係繪示根據圖6A之實施例之積體壓力感測器器件之一氧化層630之一俯視圖之一簡化圖。此氧化層630展示類似於圖1A之空腔區域之兩個空腔區域。兩個區域具有連接之一較大圓形區域及一較小圓形區域。此等圓形區域之各者亦係由一直路徑連接(在圖6B中展示)。 6B is a simplified diagram of a top view of one of the oxide layers 630 of the integrated body pressure sensor device of the embodiment of FIG. 6A. This oxide layer 630 exhibits two cavity regions similar to the cavity region of Figure 1A. The two regions have a larger circular area and a smaller circular area. Each of these circular regions is also connected by a straight path (shown in Figure 6B).

圖7A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖可表示使用具有熔化接合之一密封程序來製造一積體壓阻式感測器件之一方法。積體壓力感測器件700包含經積體上覆具有至少一接合板722及至少一頂部金屬層721之一經處理之CMOS基板(上覆基板710之CMOS層720)之一壓力感測器(隔膜)740。壓力感測器740亦可具有耦合至CMOS層720之一或多個通孔結構741。至少一壓電電阻器745可經形成於積體壓力感測器740之一部分內。一般技術者將認識到其他變化、修改及替代。 7A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. This figure may represent one method of fabricating an integrative piezoresistive sensing device using a sealing procedure with a molten joint. The integrated body pressure sensing device 700 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 720 overlying the substrate 710) having at least one bonding plate 722 and at least one top metal layer 721 overlying the body. ) 740. Pressure sensor 740 can also have one or more via structures 741 coupled to CMOS layer 720. At least one piezoresistor 745 can be formed in a portion of the integrated body pressure sensor 740. The general practitioner will recognize other variations, modifications, and alternatives.

如展示,形成一壓力感測器而上覆包含接合板及頂部金屬層之一CMOS基板,其可使用一標準IC程序來製造。在圖案化頂部金屬層後,.可沈積且圖案化一氧化層730。氧化層730之至少一個區域可經移除,以產生一空腔區域731。 As shown, a pressure sensor is formed overlying a CMOS substrate comprising a bond pad and a top metal layer that can be fabricated using a standard IC program. After patterning the top metal layer, an oxide layer 730 can be deposited and patterned. At least one region of the oxide layer 730 can be removed to create a cavity region 731.

一單晶矽(SCS)晶圓可在一真空室內與CMOS基板熔化接合,該真空室可在CMOS層與SCS層之間的空腔區域731中形成一真空。SCS層可經薄化至20至30微米,以形成一壓力感測器740之一隔膜結構。一離子植入程序可用於形成重度摻雜區域(諸如p型摻雜區域),以提供接觸至金屬區域。另一離子植入程序可用於形成適度摻雜區域,諸如對於壓電電阻器之適度p型摻雜區域。SCS層可經蝕刻以產生小孔,其等可用金屬材料741(例如,TiN及W)充填以形成在SCS層與CMOS層之間的電連接。蝕刻程序可包含一電漿蝕刻、化學氣相蝕 刻、深反應離子蝕刻(DRIE)或其他類似程序。 A single crystal germanium (SCS) wafer can be melt bonded to a CMOS substrate in a vacuum chamber that creates a vacuum in the cavity region 731 between the CMOS layer and the SCS layer. The SCS layer can be thinned to 20 to 30 microns to form a diaphragm structure of a pressure sensor 740. An ion implantation procedure can be used to form heavily doped regions, such as p-type doped regions, to provide contact to the metal regions. Another ion implantation procedure can be used to form a moderately doped region, such as a moderately p-doped region for a piezoresistor. The SCS layer can be etched to create small holes that can be filled with a metal material 741 (eg, TiN and W) to form an electrical connection between the SCS layer and the CMOS layer. The etching process may include a plasma etching, chemical vapor etching Engraved, deep reactive ion etching (DRIE) or other similar procedures.

圖7B係繪示根據圖7A之實施例之積體壓力感測器器件之一氧化層730之一俯視圖之一簡化圖。此處,氧化層730經展示具有被移除之一實質上正方形區域。此區域對應於下伏於在圖7A中展示之壓電電阻器的區域。 7B is a simplified diagram of a top view of one of the oxide layers 730 of the integrated body pressure sensor device in accordance with the embodiment of FIG. 7A. Here, the oxide layer 730 is shown with one of the substantially square regions removed. This area corresponds to the area underlying the piezoresistors shown in Figure 7A.

圖8A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖可表示使用薄膜密封程序來製造一積體壓阻式感測器件之一方法。積體壓力感測器件800包含經積體上覆具有至少一接合板822及至少一頂部金屬層821之一經處理之CMOS基板(上覆基板810之CMOS層820)之一壓力感測器(隔膜)840。壓力感測器840亦可具有耦合至CMOS層820之一或多個通孔結構841。至少一壓電電阻器845可經形成於積體壓力感測器840之一部分內。一般技術者將認識到其他變化、修改及替代。 8A is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. This figure may represent one method of fabricating an integrative piezoresistive sensing device using a film sealing process. The integrated body pressure sensing device 800 includes a pressure sensor (separator) overlying a CMOS substrate (the CMOS layer 820 of the overlying substrate 810) having at least one bonding plate 822 and at least one top metal layer 821 overlying the body. ) 840. Pressure sensor 840 can also have one or more via structures 841 coupled to CMOS layer 820. At least one piezoresistor 845 can be formed in a portion of the integrated body pressure sensor 840. The general practitioner will recognize other variations, modifications, and alternatives.

此處,製造方法併入對圖7A及圖2A描述之步驟。程序係類似於對圖7A描述直到MEMS矽晶圓或SCS層之蝕刻的程序。一離子植入程序可用於形成一重度p型摻雜區域,且另一離子植入程序可用於形成一適度p型摻雜區域。SCS層可經蝕刻以形成小孔,其等之一些可由TiN及W沈積充填,以形成至金屬層之接觸841。 Here, the manufacturing method incorporates the steps described with respect to FIGS. 7A and 2A. The procedure is similar to the procedure described in Figure 7A for etching up to the MEMS wafer or SCS layer. An ion implantation procedure can be used to form a heavily p-doped region, and another ion implantation procedure can be used to form a moderately p-doped region. The SCS layer can be etched to form small holes, some of which can be deposited by TiN and W deposition to form contacts 841 to the metal layer.

緊接著蝕刻程序,打開壓力感測器之空腔831。在一特定實施例中,一乾洗程序用於移除用於蝕刻程序之一光阻材料。可使用一薄膜沈積程序來密封空腔831,該程序判定在空腔區域內之空腔壓力。沈積程序之壓力及溫度可係小於約1000帕及小於約攝氏350度。薄膜材料可包含PECVD(電漿增強型化學氣相蝕刻)氮化矽或SiO2或類似物。氮化矽材料可提供一良好之擴散障壁。 Following the etching process, the cavity 831 of the pressure sensor is opened. In a particular embodiment, a dry cleaning process is used to remove one of the photoresist materials used in the etching process. The cavity 831 can be sealed using a thin film deposition process that determines the cavity pressure within the cavity region. The pressure and temperature of the deposition procedure can be less than about 1000 Pa and less than about 350 degrees Celsius. The film material may comprise PECVD (plasma enhanced chemical vapor etch) tantalum nitride or SiO2 or the like. The tantalum nitride material provides a good diffusion barrier.

圖8B係繪示根據圖8A之實施例之積體壓力感測器器件之一氧化層830之一俯視圖之一簡化圖。氧化層830經展示具有被移除之一實質 上正方形區域及被移除之一實質上圓形區域。此等區域由一直路徑連接。此等區域各自對應於下伏於壓電電阻器及密封層之區域。 Figure 8B is a simplified diagram of a top view of one of the oxide layers 830 of the integrated body pressure sensor device of the embodiment of Figure 8A. Oxide layer 830 is shown to have one of the removed essence The upper square area and one of the substantially circular areas removed. These areas are connected by a straight path. Each of these regions corresponds to a region underlying the piezoresistor and the sealing layer.

圖9係繪示根據本發明之一實施例之一積體壓力感測器器件900之一透視圖之一簡化圖。如展示,具有至少一個通道960之一蓋結構944可經形成而上覆壓力感測器940或感測器組合。至少一個通道960可係一隔離輸入通道,其可具有在蓋結構944之一部分內之一輸入埠961及在蓋結構944內連接至空腔區域901之空腔埠。在一實施例中,具有通道之蓋944可保護壓力感測器之膜片或隔膜940使之在一封裝裝配期間免受機械損害。如先前在圖1A中描述,可藉由薄化上覆具有接合板922之一CMOS基板910之一單晶矽晶圓而形成此膜片或隔膜940。當然,存在其他變化、修改及替代。 9 is a simplified diagram of a perspective view of one of the integrated body pressure sensor devices 900 in accordance with an embodiment of the present invention. As shown, one of the cover structures 944 having at least one channel 960 can be formed to overlie the pressure sensor 940 or sensor combination. At least one of the channels 960 can be an isolated input channel that can have one of the input ports 961 in one of the cover structures 944 and a cavity port that is coupled to the cavity region 901 within the cover structure 944. In an embodiment, the cover 944 with a channel protects the diaphragm or diaphragm 940 of the pressure sensor from mechanical damage during assembly of the package. As previously described in FIG. 1A, the diaphragm or diaphragm 940 can be formed by thinning a single crystal germanium wafer overlying one of the CMOS substrates 910 having the bond pads 922. Of course, there are other changes, modifications, and alternatives.

圖10A係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。此圖可表示在圖9中展示之器件之一橫截面視圖。積體壓力感測器件1001包含經積體封圍於一蓋結構1044中且上覆具有至少一接合板1022及至少一頂部金屬層1021之一經處理之CMOS基板(上覆基板1010之CMOS層1020)之一壓力感測器(隔膜)1040。壓力感測器1040亦可具有耦合至CMOS層1020之一或多個通孔結構1041。 10A is a simplified diagram of a cross-sectional view of one of the integrated body pressure sensor devices in accordance with an embodiment of the present invention. This figure may represent a cross-sectional view of one of the devices shown in FIG. The integrated body pressure sensing device 1001 includes an CMOS substrate (the CMOS layer 1020 overlying the substrate 1010) that is encapsulated in a cover structure 1044 and overlaid with at least one bonding plate 1022 and at least one top metal layer 1021. A pressure sensor (diaphragm) 1040. Pressure sensor 1040 can also have one or more via structures 1041 coupled to CMOS layer 1020.

在一特定實施例中,器件1001可包含在蓋結構1044中之一輸入埠1061,其展示至類似於在圖9中之通道960之一通道(由虛線展示)之入口。在一實施例中,具有通道之蓋944可保護壓力感測器之膜片或隔膜940使之在一封裝裝配期間免受機械損害。此通道可同時經蝕刻為壓力感測器之室。在一特定實施例中,如在圖10A中展示,將側向形成輸入埠。一般技術者將認識到其他變化、修改及替代。 In a particular embodiment, device 1001 can include one of input ports 1061 in cover structure 1044 that is shown to be similar to the entrance of one of the channels 960 (shown by dashed lines) in FIG. In an embodiment, the cover 944 with a channel protects the diaphragm or diaphragm 940 of the pressure sensor from mechanical damage during assembly of the package. This channel can be simultaneously etched into the chamber of the pressure sensor. In a particular embodiment, as shown in Figure 10A, the input turns are formed laterally. The general practitioner will recognize other variations, modifications, and alternatives.

如展示,形成一壓力感測器1040而上覆包含接合板1022及頂部金屬層1021及氧化層1030之一CMOS基板,其可使用一標準IC程序而 製造。於此,氧化層係初始CMOS層1020之部分且經展示在接合板1022上方。上覆頂部金屬層1021之氧化層1030之至少一區域可經移除以產生一空腔區域1031。 As shown, a pressure sensor 1040 is formed overlying the CMOS substrate including the bonding pad 1022 and the top metal layer 1021 and the oxide layer 1030, which can be used with a standard IC program. Manufacturing. Here, the oxide layer is part of the initial CMOS layer 1020 and is shown over the bond pad 1022. At least one region of the oxide layer 1030 overlying the top metal layer 1021 can be removed to create a cavity region 1031.

圖10B係繪示根據本發明之一實施例之一積體壓力感測器器件之一橫截面視圖之一簡化圖。器件1002係與圖10A之器件1001相同但不具有蓋結構1044。 10B is a simplified diagram of one cross-sectional view of an integrated body pressure sensor device in accordance with an embodiment of the present invention. Device 1002 is identical to device 1001 of Figure 10A but does not have a cover structure 1044.

亦應理解本文描述之實例及實施例僅係為繪示性之目的,且根據該等實例及實施例之各種修改及改變將被建議給熟習此項技術者且將包含於此申請案之精神及範圍及隨附申請專利範圍之範疇內。 It should be understood that the examples and embodiments described herein are for illustrative purposes only, and that various modifications and changes in accordance with the examples and embodiments will be suggested to those skilled in the art and And the scope and scope of the patent application.

100‧‧‧積體壓力感測器件 100‧‧‧Integral pressure sensing device

110‧‧‧基板 110‧‧‧Substrate

120‧‧‧CMOS層 120‧‧‧ CMOS layer

121‧‧‧頂部金屬層 121‧‧‧Top metal layer

122‧‧‧接合板 122‧‧‧ joint plate

130‧‧‧氧化層 130‧‧‧Oxide layer

131‧‧‧空腔區域 131‧‧‧Cavity area

140‧‧‧壓力感測器 140‧‧‧pressure sensor

141‧‧‧通孔結構/金屬材料 141‧‧‧through hole structure/metal material

Claims (14)

一種用於製造一積體壓力感測器件之方法,該方法包括:提供具有一表面區域之一基板部件;形成上覆該表面區域之一CMOS IC層,該CMOS IC層具有一CMOS表面區域;形成上覆該CMOS表面區域之一氧化層,該氧化層具有一氧化表面區域;移除該氧化層之至少一部分,以形成至少一第一空腔區域;接合上覆該氧化表面區域之一單晶矽晶圓,以密封該第一空腔區域;將該單晶矽晶圓薄化至一所需厚度;移除該單晶矽晶圓及該氧化物層之至少一部分,以形成至該CMOS IC層之至少一個連接路徑;及在該至少一個連接路徑內沈積一金屬材料,以形成至少一個通孔結構。 A method for fabricating an integrated pressure sensing device, the method comprising: providing a substrate member having a surface region; forming a CMOS IC layer overlying the surface region, the CMOS IC layer having a CMOS surface region; Forming an oxide layer overlying the CMOS surface region, the oxide layer having an oxidized surface region; removing at least a portion of the oxide layer to form at least a first cavity region; bonding a top surface of the oxidized surface region Wafer wafer to seal the first cavity region; thin the single crystal germanium wafer to a desired thickness; remove the single crystal germanium wafer and at least a portion of the oxide layer to form At least one connection path of the CMOS IC layer; and depositing a metal material in the at least one connection path to form at least one via structure. 如請求項1之方法,其中該單晶矽晶圓之該接合包含一熔化接合程序或一共熔接合程序,其中該單晶矽晶圓之該接合係在形成在該空腔區域中之一真空之一真空室中執行。 The method of claim 1, wherein the bonding of the single crystal germanium wafer comprises a fusion bonding process or a eutectic bonding process, wherein the bonding of the single crystal germanium wafer is in a vacuum formed in the cavity region Executed in one of the vacuum chambers. 如請求項1之方法,進一步包括移除該單晶矽晶圓之至少一部分以形成一空腔路徑;及形成上覆該單晶矽晶圓之一薄膜材料;其中該薄膜材料實質上密封該空腔路徑;其中該薄膜材料實質上密封該積體壓力感測器件之至少一擴散路徑;其中該薄膜材料包括一PECVD氮化矽或一SiO2材料;及 其中經由具有小於1000帕之一壓力及小於攝氏350度之一溫度之一沈積程序來形成該薄膜材料。 The method of claim 1, further comprising removing at least a portion of the single crystal germanium wafer to form a cavity path; and forming a thin film material overlying the single crystal germanium wafer; wherein the thin film material substantially seals the void a film path; wherein the film material substantially seals at least one diffusion path of the integrated body pressure sensing device; wherein the film material comprises a PECVD tantalum nitride or a SiO 2 material; and wherein the film has a pressure of less than 1000 Pa and A deposition procedure is performed at one of temperatures less than one of 350 degrees Celsius to form the film material. 如請求項1之方法,其中該所需厚度係約20至30微米。 The method of claim 1, wherein the desired thickness is about 20 to 30 microns. 如請求項1之方法,進一步包括由該單晶矽晶圓之一第一部分形成一壓力感測器及由該單晶矽晶圓之一第二部分形成另一感測器;形成上覆該另一感測器之一蓋結構,該蓋結構具有一蓋空腔區域;其中該蓋結構之該形成包含一共熔接合程序,以實質上密封該空腔路徑;其中該由該第二部分來形成該另一感測器形成一空腔路徑,該蓋空腔區域係經由該空腔路徑連接至該空腔區域;其中該蓋空腔區域與該空腔區域經分離。 The method of claim 1, further comprising forming a pressure sensor from the first portion of the single crystal germanium wafer and forming another sensor from the second portion of the single crystal germanium wafer; forming the overlying layer a cover structure of another sensor, the cover structure having a cover cavity region; wherein the forming of the cover structure includes a eutectic bonding process to substantially seal the cavity path; wherein the second portion is Forming the other sensor forms a cavity path through which the lid cavity region is coupled to the cavity region; wherein the lid cavity region is separated from the cavity region. 如請求項5之方法,其中該蓋結構包括具有一輸入埠之至少一個隔離輸入通道,該隔離輸入通道經組態以保護該壓力感測器免於機械損害。 The method of claim 5, wherein the cover structure comprises at least one isolated input channel having an input port configured to protect the pressure sensor from mechanical damage. 如請求項5之方法,其中該另一感測器包括一加速計、一陀螺感測器、一諧振器、一磁場感測器、一壓力感測器或一參考壓力感測器。 The method of claim 5, wherein the other sensor comprises an accelerometer, a gyro sensor, a resonator, a magnetic field sensor, a pressure sensor or a reference pressure sensor. 如請求項5之方法,其中該壓力感測器包括一電容式感測壓力感測器或一壓阻式感測壓力感測器。 The method of claim 5, wherein the pressure sensor comprises a capacitive sensing pressure sensor or a piezoresistive sensing pressure sensor. 如請求項1之方法,進一步包括一第一離子植入程序,以在該單晶矽晶圓之一第一部分內形成一重度p型摻雜區域;及一第二離子植入程序,以在該單晶矽晶圓之一第二部分內形成一適度p型摻雜區域。 The method of claim 1, further comprising a first ion implantation process to form a heavily p-doped region in a first portion of the single crystal germanium wafer; and a second ion implantation process to A moderately p-doped region is formed in a second portion of the single crystal germanium wafer. 如請求項1之方法,進一步包括在該單晶矽晶圓之一部分內形成至少一個壓電電阻器,該至少一個壓電電阻器經電耦合至該至少一個通孔結構。 The method of claim 1, further comprising forming at least one piezoresistor in a portion of the single crystal germanium wafer, the at least one piezoresistor being electrically coupled to the at least one via structure. 如請求項1之方法,其中該金屬材料包括TiN及W材料。 The method of claim 1, wherein the metallic material comprises TiN and W materials. 如請求項1之方法,進一步包括移除該單晶矽晶圓之一第二部分以曝露耦合至該第一空腔區域之一空腔路徑,該單晶矽晶圓被移除之該第二部分位於經密封之該第一空腔區域外部。 The method of claim 1, further comprising removing a second portion of the single crystal germanium wafer to expose a cavity path coupled to the first cavity region, the second single crystal germanium wafer being removed A portion is located outside of the sealed first cavity region. 如請求項1之方法,進一步包括移除該氧化層之一第二部分,以形成一第二空腔區域及一路徑,該路徑連接該第一空腔區域及該第二空腔區域,該第二空腔區域位於經密封之該第一空腔區域外部。 The method of claim 1, further comprising removing a second portion of the oxide layer to form a second cavity region and a path connecting the first cavity region and the second cavity region, The second cavity region is located outside of the sealed first cavity region. 如請求項13之方法,進一步包括移除位於該第二空腔區域上方之該單晶矽晶圓之一第二部分以曝露耦合至該第一空腔區域之一空腔路徑,該單晶矽晶圓被移除之該第二部分位於經密封之該第一空腔區域外部。 The method of claim 13, further comprising removing a second portion of the single crystal germanium wafer over the second cavity region to expose a cavity path coupled to the first cavity region, the single crystal germanium The second portion of the wafer that is removed is located outside of the sealed first cavity region.
TW103121771A 2013-06-24 2014-06-24 Method and structure of monolithically integrated absolute pressure sensor TWI528566B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201361838833P 2013-06-24 2013-06-24
US14/311,034 US9340414B2 (en) 2009-07-07 2014-06-20 Method and structure of monolithically integrated absolute pressure sensor

Publications (2)

Publication Number Publication Date
TW201511294A TW201511294A (en) 2015-03-16
TWI528566B true TWI528566B (en) 2016-04-01

Family

ID=53186840

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103121771A TWI528566B (en) 2013-06-24 2014-06-24 Method and structure of monolithically integrated absolute pressure sensor

Country Status (1)

Country Link
TW (1) TWI528566B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11186481B2 (en) * 2017-11-30 2021-11-30 Taiwan Semiconductor Manufacturing Company, Ltd. Sensor device and manufacturing method thereof

Also Published As

Publication number Publication date
TW201511294A (en) 2015-03-16

Similar Documents

Publication Publication Date Title
TWI533438B (en) Semiconductor device, semiconductor structure, and method of forming semiconductor structure
US9340414B2 (en) Method and structure of monolithically integrated absolute pressure sensor
US9981841B2 (en) MEMS integrated pressure sensor and microphone devices and methods of forming same
US9452920B2 (en) Microelectromechanical system device with internal direct electric coupling
CN105874312B (en) Inertia and pressure sensor on a single chip
US9452924B2 (en) MEMS devices and fabrication methods thereof
JP5913564B2 (en) Electrodes defined by out-of-plane spacers
US8802473B1 (en) MEMS integrated pressure sensor devices having isotropic cavities and methods of forming same
US9908771B2 (en) Inertial and pressure sensors on single chip
US8952465B2 (en) MEMS devices, packaged MEMS devices, and methods of manufacture thereof
US9450109B2 (en) MEMS devices and fabrication methods thereof
TW201524891A (en) Pressure sensor
TWI634069B (en) Hybrid integrated component and process for its production
WO2015036657A1 (en) Wafer level encapsulation structure, fabrication methods and viable engineered substrate concept
TWI652728B (en) Epi-poly etch stop for out of plane spacer defined electrode
TWI528566B (en) Method and structure of monolithically integrated absolute pressure sensor
TWI876889B (en) Micro-electro-mechanical system package and fabrication method thereof
TWI850094B (en) Micro-electro-mechanical system package and fabrication method thereof