TWI507095B - Wiring board and method of manufacturing the same - Google Patents
Wiring board and method of manufacturing the same Download PDFInfo
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- TWI507095B TWI507095B TW102130629A TW102130629A TWI507095B TW I507095 B TWI507095 B TW I507095B TW 102130629 A TW102130629 A TW 102130629A TW 102130629 A TW102130629 A TW 102130629A TW I507095 B TWI507095 B TW I507095B
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- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000010410 layer Substances 0.000 claims description 115
- 239000012792 core layer Substances 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 40
- 238000003825 pressing Methods 0.000 claims description 14
- 238000005520 cutting process Methods 0.000 claims description 5
- 230000000747 cardiac effect Effects 0.000 claims 1
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 12
- 238000009713 electroplating Methods 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 229910002092 carbon dioxide Inorganic materials 0.000 description 6
- 238000001459 lithography Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003698 laser cutting Methods 0.000 description 3
- 239000001569 carbon dioxide Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 101000921339 Dickeya chrysanthemi Cys-loop ligand-gated ion channel Proteins 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
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Description
本發明是有關於一種線路板與其製作方法,且特別是有關於一種多層線路板與其製作方法。The present invention relates to a circuit board and a method of fabricating the same, and more particularly to a multilayer circuit board and a method of fabricating the same.
近年來,為了增加印刷電路板(printed circuit board,PCB)的應用,現已有許多技術是朝向將印刷電路路板製作為多層板結構,例如是全層互連高密度連結板(Every Layer Interconnection,ELIC)。多層板結構的製作方式是將由銅皮(copper foil)與膠片(prepreg,pp)所組成的增層結構反覆堆疊並壓合於核心層(core layer)上,用以增加印刷電路板的內部的佈線空間,並利用電鍍製程在導電孔中填充導電材料來導通各層。由於多層板結構的目的便是希望壓合多層板才來增加佈線空間,因此各層之間的連接關係便顯得重要。換言之,為了確保各層的線路能互相導通,在製作過程中的對位方法便顯得相當重要。In recent years, in order to increase the application of printed circuit boards (PCBs), many technologies have been developed to make printed circuit boards into multi-layer board structures, such as full-layer interconnect high-density link boards (Every Layer Interconnection). , ELIC). The multi-layer board structure is formed by repeatedly stacking and bonding a build-up structure composed of a copper foil and a film (prepreg, pp) onto a core layer for increasing the inside of the printed circuit board. The wiring space is filled with a conductive material in the conductive holes to conduct the layers by an electroplating process. Since the purpose of the multi-layer board structure is to laminate the multi-layer board to increase the wiring space, the connection relationship between the layers is important. In other words, in order to ensure that the lines of each layer can be electrically connected to each other, the alignment method in the manufacturing process is very important.
以往的印刷電路板多是在壓合多層的增層結構後以X光 (X-ray)加工在增層結構上形成對位用的通孔(via)。此種作法在層數較高的多層板結構中會產生較大的偏移量。因此,為了確保良率,接墊與導電孔的側邊之間的距離須大於70微米(micrometer,μm)以上。另外,也有作法是預先在核心板的通孔上製作同心圓式的定位墊(pad)。此種作法可以避免上述利用X光加工所產生的偏移量,但在後續壓合多層的增層結構後,受到板材漲縮影響,定位墊與通孔無法隨著板材漲縮而調整位置,進而產生偏移。因此,為了確保良率,接墊與導電孔的側邊之間的距離須大於50微米以上。除了上述的對位方法之外,在一般的積體電路基板(integrated circuit substrate,IC substrate)的製程中,其利用雷射光束(laser beam)將基板的兩表面切銷加工而形成對位用的通孔,但上述作法不易應用在多層結構的印刷電路板中。In the past, most printed circuit boards were X-rays after laminating multiple layers of build-up structures. (X-ray) processing forms vias for alignment on the build-up structure. This practice produces a large offset in a multi-layer board structure with a higher number of layers. Therefore, in order to ensure the yield, the distance between the pads and the sides of the conductive holes must be greater than 70 micrometers (μm). In addition, it is also possible to make a concentric circular positioning pad on the through hole of the core board in advance. This method can avoid the above-mentioned offset caused by X-ray processing, but after subsequent pressing of the multi-layered build-up structure, it is affected by the plate shrinkage and shrinkage, and the positioning pad and the through hole cannot be adjusted as the plate is stretched and contracted. This in turn creates an offset. Therefore, in order to ensure the yield, the distance between the pads and the sides of the conductive holes must be greater than 50 microns. In addition to the above-described alignment method, in a general integrated circuit substrate (IC substrate) process, a laser beam is used to cut both surfaces of the substrate to form a alignment. Through holes, but the above method is not easy to apply in a printed circuit board of a multilayer structure.
本發明提供一種線路板的製作方法,可提高線路板的對位精準度。The invention provides a method for manufacturing a circuit board, which can improve the alignment accuracy of the circuit board.
本發明提供一種線路板,具有良好的對位精準度。The invention provides a circuit board with good alignment accuracy.
本發明的線路板的製作方法包括下列步驟。提供一核心層,其中核心層的一第一表面上形成有一第一核心線路及至少一第一定位環。壓合一第一增層線路結構於第一表面上,並且覆蓋第一核心線路與第一定位環,其中第一增層線路結構包括一第一導電層以及一第一介電層,而第一介電層位於第一導電層與第一 核心線路之間。移除對應於第一定位環的部份第一增層線路結構,以暴露出第一定位環。藉由第一定位環作為定位點而形成一第一導電孔於第一增層線路結構上,其中第一導電孔貫穿第一增層線路結構,並且對應於第一核心線路的一第一接墊。The manufacturing method of the wiring board of the present invention includes the following steps. A core layer is provided, wherein a first core line and at least one first positioning ring are formed on a first surface of the core layer. Pressing a first build-up line structure on the first surface and covering the first core line and the first positioning ring, wherein the first build-up line structure comprises a first conductive layer and a first dielectric layer, and a dielectric layer is located on the first conductive layer and the first Between the core lines. A portion of the first build-up line structure corresponding to the first locating ring is removed to expose the first locating ring. Forming a first conductive via on the first build-up line structure by using the first positioning ring as a positioning point, wherein the first conductive via penetrates the first build-up line structure and corresponds to a first connection of the first core line pad.
在本發明的一實施例中,在上述的提供核心層的步驟 中,核心層的一第二表面上形成有一第二核心線路及至少一第二定位環,第二表面相對於第一表面,且第二定位環對應於第一定位環。In an embodiment of the invention, the step of providing the core layer in the above A second core line and at least one second positioning ring are formed on a second surface of the core layer, the second surface is opposite to the first surface, and the second positioning ring corresponds to the first positioning ring.
在本發明的一實施例中,上述的線路板的製作方法更包 括下列步驟。在提供核心層的步驟之後,壓合一第二增層線路結構於第二表面上,並且覆蓋第二核心線路與第二定位環,其中第二增層線路結構包括一第二導電層以及一第二介電層,而第二介電層位於第二導電層與第二核心線路之間。移除對應於第二定位環的部份第二增層線路結構,以暴露出第二定位環。藉由第二定位環作為定位點而形成一第二導電孔於第二增層線路結構上,其中第二導電孔貫穿第二增層線路結構,並且對應於第二核心線路的一第二接墊。In an embodiment of the invention, the method for fabricating the above circuit board is further included The following steps are included. After the step of providing the core layer, pressing a second build-up line structure on the second surface and covering the second core line and the second positioning ring, wherein the second build-up line structure comprises a second conductive layer and a The second dielectric layer is between the second conductive layer and the second core line. A portion of the second build-up line structure corresponding to the second locating ring is removed to expose the second locating ring. Forming a second conductive via on the second build-up line structure by using the second positioning ring as the positioning point, wherein the second conductive via penetrates the second build-up line structure and corresponds to a second connection of the second core line pad.
在本發明的一實施例中,上述的移除對應於第一定位環 的部份第一增層線路結構的步驟包括藉由一雷射光束切削(skiving)部份第一增層線路結構,而移除對應於第二定位環的部份第二增層線路結構的步驟包括藉由一雷射光束切削部份第二增層線路結構。In an embodiment of the invention, the removing corresponds to the first positioning ring. The step of the first first build-up line structure includes skiving a portion of the first build-up line structure by a laser beam, and removing a portion of the second build-up line structure corresponding to the second set ring The step includes cutting a portion of the second build-up line structure by a laser beam.
在本發明的一實施例中,上述的雷射光束包括二氧化碳 雷射(CO2 laser)。In an embodiment of the invention, the laser beam comprises carbon dioxide Laser (CO2 laser).
本發明的線路板包括一核心層、一第一核心線路、至少 一第一定位環、一第一增層線路結構以及一第一導電孔。核心層具有一第一表面。第一核心線路配置於第一表面上。第一定位環配置於第一表面上,並位於第一核心線路的一側。第一增層線路結構配置於第一表面上。第一增層線路結構覆蓋第一核心線路,並且暴露出第一定位環,其中第一增層線路結構包括一第一導電層以及一第一介電層,而第一介電層位於第一導電層與第一核心線路之間。第一導電孔配置於第一增層線路結構上,其中第一導電孔貫穿第一增層線路結構,並且對應於第一核心線路的一第一接墊。The circuit board of the present invention comprises a core layer, a first core line, and at least a first positioning ring, a first build-up line structure and a first conductive hole. The core layer has a first surface. The first core line is disposed on the first surface. The first positioning ring is disposed on the first surface and located at one side of the first core line. The first build-up line structure is disposed on the first surface. The first build-up line structure covers the first core line and exposes the first positioning ring, wherein the first build-up line structure includes a first conductive layer and a first dielectric layer, and the first dielectric layer is located at the first Between the conductive layer and the first core line. The first conductive via is disposed on the first build-up line structure, wherein the first conductive via extends through the first build-up trace structure and corresponds to a first pad of the first core trace.
在本發明的一實施例中,上述的線路板更包括一第二核 心線路以及至少一第二定位環。第二核心線路配置於核心層的一第二表面上,而第二表面相對於第一表面。第二定位環配置於第二表面上,並位於第二核心線路的一側,且第二定位環對應於第一定位環。In an embodiment of the invention, the circuit board further includes a second core a heart line and at least one second positioning ring. The second core line is disposed on a second surface of the core layer, and the second surface is opposite to the first surface. The second positioning ring is disposed on the second surface and located on one side of the second core line, and the second positioning ring corresponds to the first positioning ring.
在本發明的一實施例中,上述的線路板更包括一第二增 層線路結構以及一第二導電孔。第二增層線路結構配置於第二表面上。第二增層線路結構覆蓋第二核心線路,並且暴露出第二定位環,其中第二增層線路結構包括一第二導電層以及一第二介電層,而第二介電層位於第二導電層與第二核心線路之間。第二導 電孔配置於第二增層線路結構上,其中第二導電孔貫穿第二增層線路結構,並且對應於第二核心線路的一第二接墊。In an embodiment of the invention, the circuit board further includes a second increase a layer line structure and a second conductive hole. The second build-up line structure is disposed on the second surface. The second build-up line structure covers the second core line and exposes the second positioning ring, wherein the second build-up line structure includes a second conductive layer and a second dielectric layer, and the second dielectric layer is located at the second Between the conductive layer and the second core line. Second guide The electrical aperture is disposed on the second build-up line structure, wherein the second conductive via extends through the second build-up line structure and corresponds to a second pad of the second core line.
在本發明的一實施例中,上述的第一接墊的邊長大於第一導電孔的孔徑,且第一接墊的一側邊與第一導電孔的對應的一側邊之間的距離介於30微米(micrometer,μm)至35微米之間,第二接墊的邊長大於第二導電孔的孔徑,且第二接墊的一側邊與第二導電孔的對應的一側邊之間的距離介於30微米至35微米之間。In an embodiment of the invention, the side length of the first pad is larger than the aperture of the first conductive hole, and the distance between one side of the first pad and the corresponding side of the first conductive hole Between 30 micrometers (μm) and 35 micrometers, the side length of the second pad is larger than the aperture of the second conductive hole, and one side of the second pad and the corresponding side of the second conductive hole The distance between 30 microns and 35 microns.
在本發明的一實施例中,上述的第一定位環與第二定位環分別具有一內徑,且內徑的尺寸大於1.5毫米(millimeter,mm)。In an embodiment of the invention, the first positioning ring and the second positioning ring respectively have an inner diameter, and the inner diameter has a size greater than 1.5 millimeters (mm).
基於上述,由於本發明的線路板的製作方法在核心層上形成第一定位環,並可以在壓合第一增層線路結構於第一表面上之後,移除部份第一增層線路結構而暴露出第一定位環,以藉由第一定位環作為定位點而在第一增層線路結構上形成第一導電孔。因此,本發明的線路板的製作方法可以重複上述動作來壓合更多的第一增層線路結構,並藉由同樣的第一定位環作為定位點而在各第一增層線路結構上形成第一導電孔,以避免在不同層間進行加工時對位產生偏移。據此,本發明的線路板的製作方法可提高線路板的對位精準度,以使線路板具有良好的對位精準度。Based on the above, since the manufacturing method of the circuit board of the present invention forms the first positioning ring on the core layer, and after pressing the first build-up line structure on the first surface, the part of the first build-up line structure is removed. The first positioning ring is exposed to form a first conductive hole on the first build-up line structure by using the first positioning ring as a positioning point. Therefore, the method for fabricating the circuit board of the present invention can repeat the above actions to press more of the first build-up line structure, and form the first build-up line structure by using the same first positioning ring as the anchor point. The first conductive hole prevents the alignment from shifting when processing between different layers. Accordingly, the method for fabricating the circuit board of the present invention can improve the alignment accuracy of the circuit board, so that the circuit board has good alignment accuracy.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.
100‧‧‧線路板100‧‧‧ circuit board
110‧‧‧核心層110‧‧‧ core layer
120‧‧‧第一核心線路120‧‧‧First core line
122‧‧‧第一接墊122‧‧‧First mat
124‧‧‧第一連接線124‧‧‧First cable
130‧‧‧第一定位環130‧‧‧First positioning ring
140‧‧‧第二核心線路140‧‧‧second core line
142‧‧‧第二接墊142‧‧‧second mat
150‧‧‧第二定位環150‧‧‧Second positioning ring
160‧‧‧第一增層線路結構160‧‧‧First build-up line structure
162‧‧‧第一導電層162‧‧‧First conductive layer
164‧‧‧第一介電層164‧‧‧First dielectric layer
170‧‧‧第二增層線路結構170‧‧‧Second layered line structure
172‧‧‧第二導電層172‧‧‧Second conductive layer
174‧‧‧第二介電層174‧‧‧Second dielectric layer
180‧‧‧第一導電孔180‧‧‧first conductive hole
190‧‧‧第二導電孔190‧‧‧Second conductive hole
d1、d2‧‧‧距離D1, d2‧‧‧ distance
r‧‧‧內徑r‧‧‧Inner diameter
R‧‧‧外徑R‧‧‧ outside diameter
S1‧‧‧第一表面S1‧‧‧ first surface
S2‧‧‧第二表面S2‧‧‧ second surface
圖1A至圖1D是本發明一實施例的線路板的製作方法的剖面流程示意圖。1A to 1D are schematic cross-sectional views showing a method of fabricating a circuit board according to an embodiment of the present invention.
圖2是圖1的核心層的示意圖。2 is a schematic diagram of the core layer of FIG. 1.
圖1A至圖1D是本發明一實施例的線路板的製作方法的剖面流程示意圖。在本實施例中,線路板100(繪示於圖1D)的製作方法包括下列步驟。以下將依序藉由圖1A至圖1D搭配文字說明線路板100的製作方法。1A to 1D are schematic cross-sectional views showing a method of fabricating a circuit board according to an embodiment of the present invention. In the present embodiment, the manufacturing method of the circuit board 100 (shown in FIG. 1D) includes the following steps. Hereinafter, a method of fabricating the circuit board 100 will be described with reference to FIG. 1A to FIG.
首先,請參考圖1A,在本實施例中,提供一核心層110,其中核心層110的第一表面S1上形成有第一核心線路120及至少一第一定位環130。核心層110例如是基板或核心介電層。核心層110可先藉由鑽孔或雷射等機械加工製程進行前處理。未繪示的一導電層藉由電鍍製程(plating process)而形成於核心層110的第一表面S1上,並藉由微影製程(photolithography process)而圖案化,以形成第一核心線路120及第一定位環130。第一核心線路120包括第一接墊122與第一連接線124,第一接墊122與第一連接線124互相電性連接。第一定位環130位在第一核心線路120的一側,並與第一核心線路120以同樣的製程製作。First, referring to FIG. 1A, in the embodiment, a core layer 110 is provided, wherein the first core line 120 and the at least one first positioning ring 130 are formed on the first surface S1 of the core layer 110. The core layer 110 is, for example, a substrate or a core dielectric layer. The core layer 110 can be pre-processed by a machining process such as drilling or laser. A conductive layer (not shown) is formed on the first surface S1 of the core layer 110 by a plating process, and patterned by a photolithography process to form the first core line 120 and The first positioning ring 130. The first core line 120 includes a first pad 122 and a first connecting line 124. The first pad 122 and the first connecting line 124 are electrically connected to each other. The first positioning ring 130 is located on one side of the first core line 120 and is fabricated in the same process as the first core line 120.
同樣地,請參考圖1A,在本實施例中,在上述的提供核 心層110的步驟中,核心層110的第二表面S2上也形成有第二核心線路140及第二定位環150,其中第二表面S2相對於第一表面S1,且第二定位環150對應於第一定位環130。未繪示的另一導電層藉由電鍍製程而形成於核心層110的第二表面S2上,並藉由微影製程而圖案化,以形成第二核心線路140及第二定位環150。第二核心線路140包括第二接墊142與第二連接線(未繪示),第二接墊142與第二連接線互相電性連接。第二定位環150位在第二核心線路140的一側,並與第二核心線路140以同樣的製程製作。Similarly, please refer to FIG. 1A. In this embodiment, the core is provided in the above. In the step of the core layer 110, the second core line 140 and the second positioning ring 150 are also formed on the second surface S2 of the core layer 110, wherein the second surface S2 is opposite to the first surface S1, and the second positioning ring 150 corresponds to In the first positioning ring 130. Another conductive layer, not shown, is formed on the second surface S2 of the core layer 110 by an electroplating process and patterned by a lithography process to form the second core line 140 and the second positioning ring 150. The second core line 140 includes a second pad 142 and a second connecting line (not shown), and the second pad 142 and the second connecting line are electrically connected to each other. The second positioning ring 150 is located on one side of the second core line 140 and is fabricated in the same process as the second core line 140.
接著,請參考圖1B,在本實施例中,在上述的提供核心 層110的步驟之後,壓合第一增層線路結構160於第一表面S1上,並且覆蓋第一核心線路120與第一定位環130,其中第一增層線路結構160包括第一導電層162以及第一介電層164,而第一介電層164位於第一導電層162與第一核心線路120之間。在本實施例中,第一導電層162例如是不透明的銅皮(copper foil),而第一介電層164的材質例如是膠片(prepreg,pp)。第一介電層164位於第一導電層162與第一核心線路120之間,以使第一導電層162與第一核心線路120電性絕緣。Next, please refer to FIG. 1B. In the embodiment, the core is provided above. After the step of layer 110, the first build-up line structure 160 is pressed onto the first surface S1 and covers the first core line 120 and the first positioning ring 130, wherein the first build-up line structure 160 includes the first conductive layer 162. And a first dielectric layer 164, and the first dielectric layer 164 is located between the first conductive layer 162 and the first core line 120. In the present embodiment, the first conductive layer 162 is, for example, an opaque copper foil, and the material of the first dielectric layer 164 is, for example, a film (prepreg, pp). The first dielectric layer 164 is located between the first conductive layer 162 and the first core line 120 to electrically insulate the first conductive layer 162 from the first core line 120.
同樣地,請參考圖1B,在本實施例中,在上述的提供核 心層110的步驟之後,壓合第二增層線路結構170於第二表面S2上,並且覆蓋第二核心線路140與第二定位環150,其中第二增層線路結構170包括第二導電層172以及第二介電層174,而第二介電層174位於第二導電層172與第二核心線路140之間。在本實 施例中,第二導電層172例如是不透明的銅皮,而第二介電層174的材質例如是膠片。第二介電層174位於第二導電層172與第二核心線路140之間,以使第二導電層172與第二核心線路140電性絕緣。此外,在本實施例中,壓合第一增層線路結構160於第一表面S1上的步驟與壓合第二增層線路結構170於第二表面S2上的步驟可以藉由同一製程同時製作。然而,在其他實施例中,壓合第一增層線路結構160的步驟與壓合第二增層線路結構170的步驟也可以分開製作,或者僅製作第一增層線路結構160而省略壓合第二增層線路結構170,本發明不以上述為限制。Similarly, please refer to FIG. 1B. In this embodiment, the core is provided in the above. After the step of the core layer 110, the second build-up line structure 170 is pressed onto the second surface S2 and covers the second core line 140 and the second positioning ring 150, wherein the second build-up line structure 170 includes the second conductive layer The second dielectric layer 174 is located between the second conductive layer 172 and the second core line 140. In this reality In the embodiment, the second conductive layer 172 is, for example, an opaque copper skin, and the material of the second dielectric layer 174 is, for example, a film. The second dielectric layer 174 is located between the second conductive layer 172 and the second core line 140 to electrically insulate the second conductive layer 172 from the second core line 140. In addition, in this embodiment, the step of pressing the first build-up line structure 160 on the first surface S1 and the step of pressing the second build-up line structure 170 on the second surface S2 can be simultaneously performed by the same process. . However, in other embodiments, the step of pressing the first build-up line structure 160 and the step of pressing the second build-up line structure 170 may also be made separately, or only the first build-up line structure 160 may be fabricated and the press-fit omitted. The second build-up line structure 170, the present invention is not limited by the above.
接著,請參考圖1C,在本實施例中,在上述的壓合第一 增層線路結構160於第一表面S1上的步驟之後,移除對應於第一定位環130的部份第一增層線路結構160,以暴露出第一定位環130。具體而言,由於覆蓋在第一定位環130上的第一增層線路結構160的第一導電層162為不透明的銅皮,使得在後續製程中作為定位點的第一定位環130無法從第一增層線路結構160外側辨識或讀取。因此,在本實施例中,在壓合第一增層線路結構160之後,移除對應於第一定位環130的部份第一增層線路結構160,例如是藉由雷射光束(laser beam)切削(skiving)部份第一增層線路結構160,以暴露出第一定位環130。在本實施例中,上述的雷射光束例如是二氧化碳雷射(CO2 laser),而雷射光束的參數可以依據實際需求(例如是作為第一導電層162的銅皮與作為第一介電層164的膠片的厚度)調整。Next, referring to FIG. 1C, in the embodiment, the first pressing in the above After the step of the build-up line structure 160 on the first surface S1, a portion of the first build-up line structure 160 corresponding to the first locating ring 130 is removed to expose the first locating ring 130. Specifically, since the first conductive layer 162 of the first build-up line structure 160 covering the first positioning ring 130 is an opaque copper skin, the first positioning ring 130 serving as an anchor point in the subsequent process cannot be An add-on line structure 160 is externally identified or read. Therefore, in the present embodiment, after the first build-up line structure 160 is pressed, a portion of the first build-up line structure 160 corresponding to the first positioning ring 130 is removed, for example, by a laser beam. A portion of the first build-up line structure 160 is skiving to expose the first locating ring 130. In this embodiment, the laser beam is, for example, a CO2 laser, and the parameters of the laser beam may be according to actual needs (for example, the copper skin as the first conductive layer 162 and the first dielectric layer). 164 film thickness) adjustment.
此外,在本實施例中,藉由CO2雷射切削製程來移除對 應於第一定位環130的部份第一增層線路結構160的步驟包括藉由一定位孔(未繪示)作為定位點而移除對應於第一定位環130的部份第一增層線路結構160。定位孔位於核心層110上,例如是事先在核心層110的前處理製程中利用X光(X-ray)加工而形成的貫穿核心層110的通孔,且定位孔未被第一增層線路結構160覆蓋,例如是位於核心層110的角落等不影響線路佈局之處。據此,雷射光束可以藉由定位孔而精準地對位至對應於第一定位環130的部份第一增層線路結構160。In addition, in this embodiment, the pair is removed by the CO2 laser cutting process. The step of the portion of the first build-up line structure 160 of the first positioning ring 130 includes removing a portion of the first build-up layer corresponding to the first positioning ring 130 by using a positioning hole (not shown) as a positioning point. Line structure 160. The positioning hole is located on the core layer 110, for example, a through hole penetrating through the core layer 110 formed by X-ray processing in the pre-processing process of the core layer 110, and the positioning hole is not the first build-up line. The structure 160 is covered, for example, at a corner of the core layer 110, etc., where the layout of the line is not affected. Accordingly, the laser beam can be accurately aligned by the positioning holes to a portion of the first build-up line structure 160 corresponding to the first positioning ring 130.
同樣地,請參考圖1C,在本實施例中,在上述的壓合第 二增層線路結構170於第二表面S2上之後,移除對應於第二定位環150的部份第二增層線路結構170,以暴露出第二定位環150。 移除對應於第二定位環150的部份第二增層線路結構170的步驟例如是藉由雷射光束切削部份第二增層線路結構170,其中雷射光束例如是二氧化碳雷射,且移除對應於第二定位環150的部份第二增層線路結構170的步驟包括藉由上述的定位孔作為定位點而移除對應於第二定位環150的部份第二增層線路結構170。據此,由於第一定位環130與第二定位環150可以分別藉由CO2雷射切削製程而暴露,且第一定位環130與第二定位環150互相對應,故本實施例可以藉由互相對應但互相不接觸的第一定位環130與第二定位環150取代以往的通孔式的定位孔,並在後續製程中以第一定位環130與第二定位環150作為定位點,使得本實施例所 完成的線路板100(繪示於圖1D)具有良好的精準度。Similarly, please refer to FIG. 1C. In this embodiment, in the above-mentioned pressing After the second build-up line structure 170 is on the second surface S2, a portion of the second build-up line structure 170 corresponding to the second positioning ring 150 is removed to expose the second positioning ring 150. The step of removing a portion of the second build-up line structure 170 corresponding to the second positioning ring 150 is, for example, cutting a portion of the second build-up line structure 170 by a laser beam, wherein the laser beam is, for example, a carbon dioxide laser, and The step of removing a portion of the second build-up line structure 170 corresponding to the second positioning ring 150 includes removing a portion of the second build-up line structure corresponding to the second positioning ring 150 by using the positioning hole as the positioning point. 170. Accordingly, since the first positioning ring 130 and the second positioning ring 150 can be respectively exposed by the CO2 laser cutting process, and the first positioning ring 130 and the second positioning ring 150 correspond to each other, the embodiment can be mutually The first positioning ring 130 and the second positioning ring 150 corresponding to each other but not in contact with each other replace the conventional through-hole positioning holes, and the first positioning ring 130 and the second positioning ring 150 are used as positioning points in the subsequent process, so that Example The completed circuit board 100 (shown in Figure 1D) has good precision.
接著,請參考圖1D,在本實施例中,在上述的移除對應於第一定位環130的部份第一增層線路結構160的步驟之後,藉由第一定位環130作為定位點而形成第一導電孔180於第一增層線路結構160上,其中第一導電孔180貫穿第一增層線路結構160,並且對應於第一核心線路120的第一接墊122。由於第一定位環130在上一步驟時經由雷射切削製程而暴露,故可被讀取裝置(例如是電荷耦合裝置(charge coupled device,CCD))讀取,以作為定位點。此外,形成第一導電孔180於第一增層線路結構160上的步驟例如是藉由雷射光束切削對應於第一接墊122的部份第一增層線路結構160,並暴露出第一接墊122。Next, referring to FIG. 1D, in the embodiment, after the step of removing a portion of the first build-up line structure 160 corresponding to the first positioning ring 130, the first positioning ring 130 is used as the positioning point. A first conductive via 180 is formed on the first build-up trace structure 160, wherein the first conductive via 180 extends through the first build-up trace structure 160 and corresponds to the first pad 122 of the first core trace 120. Since the first positioning ring 130 is exposed through the laser cutting process in the previous step, it can be read by a reading device (for example, a charge coupled device (CCD)) as a positioning point. In addition, the step of forming the first conductive via 180 on the first build-up line structure 160 is, for example, cutting a portion of the first build-up line structure 160 corresponding to the first pad 122 by a laser beam, and exposing the first Pad 122.
同樣地,請參考圖1D,在本實施例中,在上述的移除對 應於第二定位環150的部份第二增層線路結構170的步驟之後,藉由第二定位環150作為定位點而形成第二導電孔190於第二增層線路結構170上,其中第二導電孔190貫穿第二增層線路結構170,並且對應於第二核心線路140的第二接墊142。第二定位環150也可以被讀取裝置讀取,以作為定位點,且形成第二導電孔190於第二增層線路結構170上的步驟例如是藉由雷射光束切削對應於第二接墊142的部份第二增層線路結構170,並暴露出第二接墊142。至此,以初步完成本實施例的線路板100。Similarly, please refer to FIG. 1D. In this embodiment, the above pair is removed. After the step of the portion of the second build-up line structure 170 of the second positioning ring 150, the second conductive hole 190 is formed on the second build-up line structure 170 by using the second positioning ring 150 as a positioning point, wherein The two conductive holes 190 extend through the second build-up line structure 170 and correspond to the second pads 142 of the second core line 140. The second positioning ring 150 can also be read by the reading device as a positioning point, and the step of forming the second conductive hole 190 on the second build-up line structure 170 is, for example, by laser beam cutting corresponding to the second connection. A portion of the second build-up line structure 170 of the pad 142 exposes the second pad 142. So far, the circuit board 100 of the present embodiment is initially completed.
此外,在本實施例中,在上述的形成第一導電孔180於 第一增層線路結構160上的步驟之後,還可以再次藉由電鍍製程 形成一未繪示的導電層於第一增層線路結構160上,且導電層填充於第一導電孔180內。接著,再藉由第一定位環130作為定位點,利用微影製程圖案化上述的導電層,以形成一第一線路層與另一第一定位環(未繪示),其中第一線路層通過第一導電孔180連接第一核心線路120,而第一定位環對應於前述的位於第一表面S1上的第一定位環130。之後,可再重複上述的壓合增層線路結構以及移除對應於定位環的增層線路結構而暴露定位環的步驟,並藉由定位環作為定位點而形成導電孔於增層線路結構上並暴露線路層的接墊,進而再度藉由電鍍製程形成導電層,並使導電層藉由導電孔連通線路層的接墊。In addition, in the embodiment, the first conductive via 180 is formed in the above manner. After the step on the first build-up line structure 160, the electroplating process can again be performed An unillustrated conductive layer is formed on the first build-up wiring structure 160, and the conductive layer is filled in the first conductive via 180. Then, the conductive layer is patterned by the lithography process by using the first positioning ring 130 as a positioning point to form a first circuit layer and another first positioning ring (not shown), wherein the first circuit layer The first core line 120 is connected through the first conductive hole 180, and the first positioning ring corresponds to the aforementioned first positioning ring 130 on the first surface S1. Thereafter, the step of pressing the build-up line structure and removing the build-up line structure corresponding to the positioning ring to expose the positioning ring may be repeated, and the conductive ring is formed on the build-up line structure by using the positioning ring as a positioning point. And exposing the pads of the circuit layer, and then forming a conductive layer by an electroplating process, and connecting the conductive layer to the pads of the circuit layer through the conductive holes.
同樣地,在上述的形成第二導電孔190於第二增層線路 結構170上的步驟之後,也可再次藉由電鍍製程形成一未繪示的導電層於第二增層線路結構170上,且導電層填充於第二導電孔190內。接著,再藉由第二定位環150作為定位點,利用微影製程圖案化上述的導電層,以形成一第二線路層與另一第二定位環(未繪示),其中第二線路層通過第二導電孔190連接第二核心線路140,而第二定位環對應於前述的位於第二表面S2上的第二定位環150。之後,可再重複上述的壓合增層線路結構以及移除對應於定位環的增層線路結構而暴露定位環的步驟,並藉由定位環作為定位點而形成導電孔於增層線路結構上並暴露線路層的接墊,進而再度藉由電鍍製程形成導電層,並使導電層藉由導電孔連通線路層的接墊。Similarly, the second conductive via 190 is formed on the second build-up line in the above manner. After the step on the structure 170, an unillustrated conductive layer may be formed on the second build-up wiring structure 170 by an electroplating process, and the conductive layer is filled in the second conductive via 190. Then, the conductive layer is patterned by the lithography process by using the second positioning ring 150 as a positioning point to form a second circuit layer and another second positioning ring (not shown), wherein the second circuit layer The second core line 140 is connected through the second conductive hole 190, and the second positioning ring corresponds to the aforementioned second positioning ring 150 on the second surface S2. Thereafter, the step of pressing the build-up line structure and removing the build-up line structure corresponding to the positioning ring to expose the positioning ring may be repeated, and the conductive ring is formed on the build-up line structure by using the positioning ring as a positioning point. And exposing the pads of the circuit layer, and then forming a conductive layer by an electroplating process, and connecting the conductive layer to the pads of the circuit layer through the conductive holes.
由此可知,對於核心層110的第一表面S1與第二表面S2 所進行的製程(例如是形成第一導電孔180與第二導電孔190、在後續製程中電鍍導電層並藉由微影製程圖案化導電層,或繼續壓合更多的增層線路結構並形成導電孔),可分別以第一定位環130與第二定位環150進行定位,其中第一定位環130與第二定位環150互相對應,且可在核心層110的第一表面S1與第二表面S2上分別讀取。據此,藉由分別以第一定位環130與第二定位環150進行定位的設計,本實施例的線路板100的製作方法可以壓合多層的增層線路結構,並藉由第一定位環130與第二定位環150進行定位,而不受線路板100的厚度的限制,進而可以減少以往藉由X光加工形成的定位孔對位不良而造成後續的導電孔或接墊產生偏移的情形。It can be seen that for the first surface S1 and the second surface S2 of the core layer 110 The process performed (for example, forming the first conductive via 180 and the second conductive via 190, plating the conductive layer in a subsequent process and patterning the conductive layer by a lithography process, or continuing to press more of the build-up wiring structure and The first positioning ring 130 and the second positioning ring 150 are respectively corresponding to each other, and the first surface S1 and the first surface of the core layer 110 can be positioned. The two surfaces S2 are read separately. Accordingly, by the design of positioning the first positioning ring 130 and the second positioning ring 150 respectively, the manufacturing method of the circuit board 100 of the present embodiment can press the multi-layered layered wiring structure and the first positioning ring The positioning of the second positioning ring 150 is not limited by the thickness of the circuit board 100, thereby reducing the misalignment of the positioning holes formed by X-ray processing and causing the subsequent conductive holes or pads to be offset. situation.
請參考圖1D,在本實施例中,經由上述的製作方法所形成的線路板100包括核心層110、第一核心線路120、第一定位環130、第二核心線路140、第二定位環150、第一增層線路結構160、第二增層線路結構170、第一導電孔180以及第二導電孔190。核心層110具有第一表面S1與第二表面S2,而第二表面S2相對於第一表面S1。第一核心線路120配置於第一表面S1上,並包括第一接墊122與第一連接線124。第一定位環130配置於第一表面S1上,並位於第一核心線路120的一側。相對地,第二核心線路140配置於核心層110的第二表面S2上,並包括第二接墊142與第二連接線(未繪示)。第二定位環150配置於第二表面S2上, 並位於第二核心線路140的一側,且第二定位環150對應於第一定位環130。Referring to FIG. 1D , in the embodiment, the circuit board 100 formed by the above manufacturing method includes a core layer 110 , a first core line 120 , a first positioning ring 130 , a second core line 140 , and a second positioning ring 150 . a first build-up line structure 160, a second build-up line structure 170, a first conductive via 180, and a second conductive via 190. The core layer 110 has a first surface S1 and a second surface S2, and the second surface S2 is opposite to the first surface S1. The first core line 120 is disposed on the first surface S1 and includes a first pad 122 and a first connecting line 124. The first positioning ring 130 is disposed on the first surface S1 and located at one side of the first core line 120. In contrast, the second core line 140 is disposed on the second surface S2 of the core layer 110 and includes a second pad 142 and a second connecting line (not shown). The second positioning ring 150 is disposed on the second surface S2. And located on one side of the second core line 140, and the second positioning ring 150 corresponds to the first positioning ring 130.
在本實施例中,第一增層線路結構160配置於第一表面上S1,而第二增層線路結構170配置於第二表面S2上。第一增層線路結構160覆蓋第一核心線路120,並且暴露出第一定位環130,其中第一增層線路結構160包括第一導電層162以及第一介電層164,而第一介電層164位於第一導電層162與第一核心線路120之間。第一導電層162例如是銅皮,而第一介電層164例如是膠片,其相關內容可參考前述,在此不多加贅述。第一導電孔180配置於第一增層線路結構160上,其中第一導電孔180貫穿第一增層線路結構160,並且對應於第一核心線路120的第一接墊122。相對地,第二增層線路結構170覆蓋第二核心線路140,並且暴露出第二定位環150,其中第二增層線路結構170包括第二導電層172以及第二介電層174,而第二介電層174位於第二導電層172與第二核心線路140之間。第二導電孔190配置於第二增層線路結構170上,其中第二導電孔190貫穿第二增層線路結構170,並且對應於第二核心線路140的第二接墊142。In this embodiment, the first build-up line structure 160 is disposed on the first surface S1, and the second build-up line structure 170 is disposed on the second surface S2. The first build-up line structure 160 covers the first core line 120 and exposes the first positioning ring 130, wherein the first build-up line structure 160 includes a first conductive layer 162 and a first dielectric layer 164, and the first dielectric Layer 164 is between first conductive layer 162 and first core line 120. The first conductive layer 162 is, for example, a copper foil, and the first dielectric layer 164 is, for example, a film. For related content, reference may be made to the foregoing, and no further details are provided herein. The first conductive vias 180 are disposed on the first build-up line structure 160 , wherein the first conductive vias 180 extend through the first build-up trace structure 160 and correspond to the first pads 122 of the first core traces 120 . In contrast, the second build-up line structure 170 covers the second core line 140 and exposes the second positioning ring 150, wherein the second build-up line structure 170 includes the second conductive layer 172 and the second dielectric layer 174, and The second dielectric layer 174 is located between the second conductive layer 172 and the second core line 140. The second conductive via 190 is disposed on the second build-up line structure 170 , wherein the second conductive via 190 extends through the second build-up trace structure 170 and corresponds to the second pad 142 of the second core trace 140 .
圖2是圖1的核心層的示意圖。請參考圖1D與圖2,在本實施例中,位在核心層110的第一表面S1上的第一定位環130的數量為四個,分別位在第一表面S1的四個角落,其中圖2僅是用來說明上述的配置關係的示意圖,其所繪示的核心層110與第一定位環130的比例並不代表實際比例。在本實施例中,第一定 位環130具有內徑r與外徑R,其中內徑r的尺寸大於1.5毫米,而外徑R的尺寸可以為6毫米。據此,當線路板100在形成第一導電孔180之後藉由電鍍製程而形成線路層時,可以避免電鍍製程中所使用的導電材料填入第一定位環130內而影響後續的對位的精準度。同樣地,雖然圖2僅繪示核心層110的第一表面S1與第一定位環130,但由於位於第二表面S2的第二定位環150對應於第一定位環130,故同樣也具有上述第一定位環130所具有的特徵。在其他實施例中,線路板100可依據實際需求調整第一定位環130與第二定位環150的位置與數量,本發明並不以此為限制。2 is a schematic diagram of the core layer of FIG. 1. Referring to FIG. 1D and FIG. 2, in the embodiment, the number of the first positioning rings 130 located on the first surface S1 of the core layer 110 is four, respectively located at four corners of the first surface S1, wherein FIG. 2 is only a schematic diagram for explaining the above configuration relationship, and the ratio of the core layer 110 to the first positioning ring 130 is not representative of the actual ratio. In this embodiment, the first setting The bit ring 130 has an inner diameter r and an outer diameter R, wherein the inner diameter r has a size greater than 1.5 mm and the outer diameter R has a size of 6 mm. Accordingly, when the circuit board 100 forms a wiring layer by the electroplating process after the first conductive via 180 is formed, the conductive material used in the electroplating process can be prevented from being filled into the first positioning ring 130 to affect the subsequent alignment. Precision. Similarly, although FIG. 2 only shows the first surface S1 of the core layer 110 and the first positioning ring 130, since the second positioning ring 150 located on the second surface S2 corresponds to the first positioning ring 130, the same also has the above. The features of the first positioning ring 130. In other embodiments, the circuit board 100 can adjust the positions and numbers of the first positioning ring 130 and the second positioning ring 150 according to actual needs, and the invention is not limited thereto.
由於本實施例利用第一定位環130與第二定位環150進 行定位的設計具有良好的對位精準度,故在本實施例中,對應於第一導電孔180與第二導電孔190的第一接墊122與第二接墊142的單邊尺寸(此處將單邊尺寸定義為第一接墊122或第二接墊142的側邊相對於第一導電孔180或第二導電孔190的對應的側邊的距離)的需求較小。具體而言,在本實施例中,第一接墊122的邊長大於第一導電孔180的孔徑,且第一接墊122的一側邊與第一導電孔180的對應的一側邊之間的距離d1(標示於圖1D)介於30微米至35微米之間。同樣地,第二接墊142的邊長大於第二導電孔190的孔徑,且第二接墊142的一側邊與第二導電孔190的對應的一側邊之間的距離d2介於30微米至35微米之間。換言之,由於本實施例的線路板100的製作方法具有良好的精準度,對位偏移量較少,故即使配置尺寸較小的接墊,也不會因此而產生對 位偏移而使導電孔與接墊無法連接的狀況。Because the first positioning ring 130 and the second positioning ring 150 are used in this embodiment. The row positioning design has a good alignment accuracy, so in the embodiment, the first pad 122 and the second pad 142 of the first conductive via 180 and the second conductive via 190 have a single-sided size (this The requirement that the one-sided dimension is defined as the distance between the side of the first pad 122 or the second pad 142 relative to the corresponding side of the first conductive via 180 or the second conductive via 190 is small. Specifically, in the embodiment, the side length of the first pad 122 is larger than the aperture of the first conductive hole 180, and one side of the first pad 122 and the corresponding side of the first conductive hole 180 The distance d1 (shown in Figure 1D) is between 30 microns and 35 microns. Similarly, the side length of the second pad 142 is greater than the aperture of the second conductive hole 190, and the distance d2 between the side of the second pad 142 and the corresponding side of the second conductive hole 190 is between 30. Micron to between 35 microns. In other words, since the manufacturing method of the circuit board 100 of the present embodiment has good precision and the offset of the alignment is small, even if a pad having a small size is disposed, the pair will not be generated. The bit is offset to make the conductive hole and the pad unconnectable.
綜上所述,由於本發明的線路板的製作方法在核心層上 形成第一定位環,並可以在壓合第一增層線路結構於第一表面上之後,移除部份第一增層線路結構而暴露出第一定位環,以藉由第一定位環作為定位點而在第一增層線路結構上形成第一導電孔。因此,本發明的線路板的製作方法可以重複上述動作來壓合更多的第一增層線路結構,並藉由第一定位環作為定位點而在各第一增層線路結構上形成第一導電孔,以避免在不同層間進行加工時對位產生偏移。同樣地,核心層的另一表面上也可以形成有對應於第一定位環的第二定位環,並藉由第二定位環提供上述的定位功能,使得本發明的線路板可以在核心層的兩表面各自具有定位點,以分別壓合更多增層線路結構。此外,本發明的定位環可以與核心線路同時製作,不需增加額外的製程。據此,本發明的線路板的製作方法可提高線路板的對位精準度,以使線路板具有良好的對位精準度。In summary, since the circuit board of the present invention is fabricated on the core layer Forming a first positioning ring, and after pressing the first build-up line structure on the first surface, removing a portion of the first build-up line structure to expose the first positioning ring to be used as the first positioning ring The first conductive hole is formed on the first build-up line structure by positioning the point. Therefore, the method for fabricating the circuit board of the present invention can repeat the above actions to press more of the first build-up line structure, and form the first on each of the first build-up line structures by using the first positioning ring as an anchor point. Conductive holes to avoid misalignment when machining between different layers. Similarly, a second positioning ring corresponding to the first positioning ring may be formed on the other surface of the core layer, and the positioning function is provided by the second positioning ring, so that the circuit board of the present invention can be in the core layer. The two surfaces each have an anchor point to press more of the build-up line structure. In addition, the positioning ring of the present invention can be fabricated simultaneously with the core circuit without adding additional processes. Accordingly, the method for fabricating the circuit board of the present invention can improve the alignment accuracy of the circuit board, so that the circuit board has good alignment accuracy.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
100‧‧‧線路板100‧‧‧ circuit board
110‧‧‧核心層110‧‧‧ core layer
120‧‧‧第一核心線路120‧‧‧First core line
122‧‧‧第一接墊122‧‧‧First mat
124‧‧‧第一連接線124‧‧‧First cable
130‧‧‧第一定位環130‧‧‧First positioning ring
140‧‧‧第二核心線路140‧‧‧second core line
142‧‧‧第二接墊142‧‧‧second mat
150‧‧‧第二定位環150‧‧‧Second positioning ring
160‧‧‧第一增層線路結構160‧‧‧First build-up line structure
162‧‧‧第一導電層162‧‧‧First conductive layer
164‧‧‧第一介電層164‧‧‧First dielectric layer
170‧‧‧第二增層線路結構170‧‧‧Second layered line structure
172‧‧‧第二導電層172‧‧‧Second conductive layer
174‧‧‧第二介電層174‧‧‧Second dielectric layer
180‧‧‧第一導電孔180‧‧‧first conductive hole
190‧‧‧第二導電孔190‧‧‧Second conductive hole
d1、d2‧‧‧距離D1, d2‧‧‧ distance
S1‧‧‧第一表面S1‧‧‧ first surface
S2‧‧‧第二表面S2‧‧‧ second surface
Claims (11)
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