TWI422002B - Copper wire bondable package structure and manufacturing method thereof - Google Patents

Description

Copper wire bondable package structure and manufacturing method thereof

The present invention relates to a package structure of a semiconductor device and a method of fabricating the same, and more particularly to a copper wire bondable dicing DFN package structure and a method of fabricating the same.

There is a conventional DFN (Dual Flat No-lead) package comprising a first stage and a second stage electrically isolated from each other on a lead frame for carrying two different FET chips or carrying one FET The wafer and an IC control wafer; further comprising a plurality of pins extending to opposite sides of the lead frame for connection to external components.

Some of the pins are separated from the first and second stage and are not electrically connected; the electrical connection between the electrodes on the wafer and the pins is often achieved by the bonding of the connecting leads. Alternatively, the wafer electrodes on one stage are electrically connected to the other stage, and also by the bonding of the connection leads.

It is now common to use copper wire bonds as electrical connections in semiconductor packages. However, since the above-mentioned dicing DFN package is connected to the first and second stage sheets only by using the bottom paste before the package is completed, the strength of the lead frame is insufficient to support bonding with the copper wire as the connection lead.

At this time, if the copper wire is used, the wire strength is too large, causing the first and second stage to vibrate, and the copper wire is not properly bonded to the electrode on the wafer, which affects the reliability of the semiconductor component. It also reduces production efficiency.

In view of the above problems in the prior art, the main object of the present invention is to provide a copper wire bondable package structure and a manufacturing method thereof, and to improve the strength of the lead frame by improving the manufacturing method of the cut DFN package to support Copper wire bonding is carried out to improve product quality and production efficiency.

In order to achieve the above object, the technical means of the present invention is to provide a copper wire bondable package structure, comprising: a lead frame provided with a plurality of carrier stages, and a plurality of pins extending outside the package structure, and a plurality of reinforcing ribs connecting adjacent ones of the stages; at least one reinforcing rib is connected between each pair of adjacent stages; a plurality of semiconductor wafers are correspondingly disposed on the plurality of stages; between the wafers, or between the wafers Between the pins, or between the wafer and the stage, an electrical connection is made by copper bonding.

The copper wire-bonded package structure further comprises a molding body, so that the plurality of wafer stages and the plurality of wafers carried thereon are encapsulated inside the molding body and cover the top surface of the reinforcing rib; and the wafer carrier is not connected to the wafer The bottom surface and the plurality of pins are exposed outside the bottom surface of the molding body.

The ribs are removed after the plastic package is packaged, so that adjacent slide stages are electrically isolated from each other.

The rib has a height lower than the height of the adjacent stage to which it is attached; the bottom of the rib is on the same plane as the bottom of the stage.

Some of the leads on the lead frame are led out by the plurality of stages; the bottom surface of the wafer is fixedly connected to the top surface of the stage, and a plurality of bottom electrodes disposed on the wafer are electrically connected to the stage, and the leads are electrically connected The foot is connected to an external component.

Other pins on the lead frame are separated from the plurality of stages and are not electrically connected; a plurality of top electrodes disposed on the chip are electrically connected to the pins by copper wires Sexually connected and connected to external components through these pins.

A method for fabricating a copper wire bondable package structure comprises the following steps: Step 1: forming a plurality of reinforcing ribs on the lead frame connecting adjacent carrier stages; at least one reinforcing rib is formed between adjacent carrier stages; Step 2: the semiconductor wafer is correspondingly connected to the stage; between the wafers, or between the wafer and the pins, or between the wafer and the stage is electrically connected by a copper wire; step 3, packaging the wafer and Bonding the lead frame of the copper wire; the plastic encapsulation material covers the top of the wafer, the stage, and the top surface of the rib, and solidifies to form a plastic body; the bottom surface of the stage, the bottom surface of the rib and a plurality of pins are exposed In the plastic sealing body; step 4, cutting and removing the reinforcing ribs from the bottom surface of the package structure, forming gaps between adjacent carrier stages, thereby achieving electrical isolation of adjacent carrier stages.

The ribs described in step 1 are formed at a corresponding position between adjacent stage stages by semi-etching the upper half of the lead frame.

In step 2, the bottom surface of the wafer is fixedly connected to the top surface of the stage, and a plurality of bottom electrodes of the wafer are electrically connected to the stage, and are connected to external components through a plurality of pins led by the plurality of stages. .

The step 2 further includes electrically connecting a plurality of pins separated from the plurality of stages and electrically connected to the plurality of top electrodes of the wafer by copper bonding.

Compared with the prior art, the copper wire bondable package structure and the manufacturing method thereof provided by the present invention have the advantages that the present invention forms and loads through a semi-corrosive lead frame. The integrated sheet is used to connect at least one reinforcing rib of the adjacent stage; it can effectively enhance the overall strength of the lead frame before the package is completed. Therefore, the strength of the lead frame is sufficient to support the use of copper wire bonding between the wafers, between the wafer and the stage, and between the wafer and the pins, thereby effectively improving product quality and production efficiency.

10‧‧‧ lead frame

11‧‧‧First stage

12‧‧‧Second stage

20‧‧‧ stiffeners

31‧‧‧High-end gate pin

32‧‧‧High-end source pin

33‧‧‧High-end bungee pin

34‧‧‧Low-end gate pin

35‧‧‧Low-end source pin

36‧‧‧Low-end bungee pin

41‧‧‧High-end MOSFET chip

42‧‧‧Low-end MOSFET chip

50‧‧‧ copper wire

60‧‧‧plastic body

61‧‧‧The upper half of the gap between the first and second stage

62‧‧‧The lower half of the gap between the first and second stage

411, 421‧‧‧ top gate

411, 421‧‧‧ top source

1 to 4 are plan views of steps of a method for fabricating a copper wire bondable package structure of the present invention; FIGS. 5 to 8 are diagrams showing a copper wire bondable package structure of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a side cross-sectional view of the lead frame of the present invention; FIG. 2 is a plan view of the wafer patch and the copper wire of the present invention; FIG. FIG. 4 is a top cross-sectional view taken along the line BB in FIG. 7 after the package of the present invention is packaged; FIG. 4 is a cross-sectional view taken along the line BB in FIG. 8 after the rib is removed to form a finished package of the present invention; 1 is a side cross-sectional view in the AA direction; FIG. 6 is a side cross-sectional view taken along line AA of FIG. 2; FIG. 7 is a side cross-sectional view taken along line AA of FIG. 3; 4 is a side cross-sectional view in the AA direction.

The invention will be described in detail below by way of preferred embodiments with reference to the accompanying drawings.

The package structure and manufacturing method provided by the invention can be applied to all semiconductor wafers, including FET wafers, IC control wafers and the like. In each of the specifics provided below In the detailed description of the embodiments, various advantages and advantageous effects of the present invention will be described in detail by taking a MOSFET wafer as an example. It should be noted, however, that the specific description and examples are not intended to limit the scope of the invention.

Please refer to FIG. 3 , FIG. 4 , FIG. 7 and FIG. 8 . As shown in the figure, the copper wire bondable package of the present invention is a cut DFN package, which comprises a lead frame disposed on the lead frame. 10, the first stage 11 and the second stage 12 respectively carrying 2 MOSFET chips, and a plurality of pins extending to opposite sides of the lead frame 10; further comprising a molding body 60, which will be first and second The stage and the high-end and low-side MOSFET chips are packaged inside, and the bottom surfaces of the first and second stage, and the plurality of pins are exposed outside the bottom surface of the molding body 60.

Referring to FIG. 1 and FIG. 5, as shown in the figure, the biggest difference from the conventional package structure is that in order to improve the overall strength of the lead frame 10, a plurality of spaced ribs 20 are arranged on the lead frame 10 to connect the first First, the second stage. A plurality of reinforcing ribs 20 are formed at a corresponding position between the first and second stage by semi-etching the upper half of the lead frame 10; that is, the plurality of reinforcing ribs 20 are only connected upward from the bottom surface of the package. The first and second stage, the upper surface of the plurality of reinforcing ribs 20 is lower than the upper surfaces of the first and second stage. The rib 20 is cut away from the bottom of the package after the package is completed, so that the first stage 11 and the second stage 12 are electrically isolated from each other.

Please refer to Figure 2 and Figure 6. As shown in the figure, the two MOSFET chips on the first and second stages can be two N-type or two P-type MOSFET chips; one of them is a high-side MOSFET. The wafer 41 and the other are low side MOSFET wafers 42. Both the high side and low side MOSFET wafers have a bottom drain (not shown), top sources 412, 422, and top gates 411, 421.

Correspondingly, the lead frame 10 is provided with a plurality of pins separated from the first and second stage and electrically connected, including a high-end source pin 32, a high-side gate pin 31, and a low-end source pin. 35 and a low-side gate pin 34; and a plurality of pins from the first and second stage disposed on the lead frame 10, including a high-end drain pin 33 and a low-side drain pin 36.

The high-side gate pin 31, the high-side source pin 32, and the low-side drain pin 36 are located on the same side of the lead frame 10; the high-side drain pin 33, the low-side gate pin 34, and the low-end source The pole pin 35 is located on the opposite side of the lead frame 10 from the above.

The high-side MOSFET wafer 41 is bonded to the first stage 11 such that the bottom drain is electrically connected to the first stage 11, and is connected to the external component through the high-end drain pin 33; and the top source 412 The top gate 411 is electrically connected to the high side source pin 32 and the high side gate pin 31 through a plurality of copper wires 50.

Similarly, the low-side MOSFET wafer 42 is bonded to the second stage 12 such that the bottom drain is electrically connected to the second stage 12, and is led out through the low-side drain pin 36; The pole 422 and the top gate 421 are connected by a plurality of copper wires 50, and are electrically connected to the low-end source pin 35 and the low-side gate pin 34, respectively.

The top source 412 of the high-side MOSFET wafer 41 is also bonded to the second stage 12 via a copper wire 50, that is, the top source 412 of the high-side MOSFET wafer 41 is electrically connected to the bottom drain of the low-side MOSFET wafer 42.

Referring to Figures 7 and 8, as shown, the molding body 60 is covered downwardly to the top surface of the rib 20 during packaging to form an upper portion 61 of the gap between the first and second stage. The molded body portion; after the rib 20 is cut and removed, the molded body portion of the upper half portion 61 remains, and the lower half portion 62 of the gap between the first and second stage is utilized. The electrical isolation of the first and second stage is realized.

Please refer to FIGS. 1 to 4 and 5 to 8 . As shown in the figure, the method for manufacturing the copper wire bondable package includes the following steps:

Step 1, forming at least one reinforcing rib 20 connecting the first and second stage of the lead frame 10;

Specifically, the first stage stage 11 and the second stage 12 are formed on the lead frame 10 of the DFN package, and are connected or disconnected from the first stage 11 or the second stage 12. A plurality of pins, in particular, at least one reinforcing rib 20 connected between the first and second stage stages are also formed.

At a corresponding position between the first and second stage, the ribs 20 are formed by semi-etching the upper half of the lead frame 10.

a high-side gate pin 31 separated from the first stage 11, a high-side source pin 32, and a low-side drain pin 36 drawn from the second stage 12 on the same side of the lead frame 10; The opposite side of the lead frame 10 is formed with a high-end drain pin 33 drawn from the first stage 11, and a low-side gate pin 34 separated from the second stage 12, and a low-end source. Pole pin 35.

Step 2, wafer patch and copper wire 50-key connection;

Step 2.1: The high-side MOSFET wafer 41 is bonded to the first stage 11 such that the bottom drain thereof is electrically connected to the first stage 11 and is led out through the low-side drain pin 36; and the top source thereof The 412 and the top gate 411 are connected by a plurality of copper wires 50 to be electrically connected to the high side source pin 32 and the high side gate pin 31, respectively.

Step 2.2, the low-end MOSFET wafer 42 is bonded to the second stage 12 to the bottom thereof. The drain is electrically connected to the second stage 12, and is led out through the low-side drain pin 36; and the top source 422 and the top gate 421 are connected by a plurality of copper wires 50, respectively, and the low-end source The leg 35 and the low side gate pin 34 form an electrical connection.

Step 2.3: The top source of the high-side MOSFET wafer 41 is bonded to the second stage 12 via the copper wire 50, that is, the top source 412 of the high-side MOSFET wafer 41 is electrically connected to the bottom drain of the low-side MOSFET wafer 42. .

Step 3, packaging the lead frame 10 with the wafer and the copper wire 50;

The plastic encapsulation material covers the high-end and low-end MOSFET wafers, the tops of the first and second stage stages, and the top surface of the ribs 20 are cured to form the molding body 60. At this time, the bottom surface of the first and second stage, the bottom surface of the rib 20, and the plurality of pins are exposed outside the bottom surface of the molding body 60.

Step 4, cutting and removing the reinforcing rib 20;

Starting from the bottom surface of the package, the rib 20 is cut and removed, and a gap 62 is formed between the first and second stage to electrically isolate the first and second stage.

So far, the fabrication process of cutting the DFN package is completed.

In addition to encapsulating two MOSFET wafers as in the above embodiments, the present invention may also package a MOSFET wafer and an IC control wafer, respectively, carried by the first and second carrier stages, or two other identical or different wafers.

Since the present invention forms a semi-etched lead frame, at least one reinforcing rib for connecting the first and second stage stages is integrally formed with the first and second stage stages; the lead wire can be effectively strengthened before the package is completed. The overall strength of the frame. Thus, the strength of the lead frame is sufficient to support between wafers, between wafers and carriers, and between wafers and pins. Copper wire bonding is used to improve product quality and production efficiency.

While the present invention has been described in detail by the preferred embodiments, it should be understood that Various modifications and alterations of the present invention will be apparent to those of ordinary skill in the art. Therefore, the scope of the invention should be limited by the scope of the appended claims.

11‧‧‧First stage

12‧‧‧Second stage

20‧‧‧ stiffeners

31‧‧‧High-end gate pin

32‧‧‧High-end source pin

33‧‧‧High-end bungee pin

34‧‧‧Low-end gate pin

35‧‧‧Low-end source pin

36‧‧‧Low-end bungee pin

41‧‧‧High-end MOSFET chip

42‧‧‧Low-end MOSFET chip

50‧‧‧ copper wire

60‧‧‧plastic body

411, 421‧‧‧ top gate

412, 422‧‧‧ top source

Claims (9)

A copper wire bondable package structure comprising: a lead frame provided with a plurality of carrier stages, and a plurality of pins extending outside the package structure, and a plurality of reinforcing ribs connected to the adjacent ones a lining, the bottom surface of the rib is on the same plane as the bottom surface of the slab; at least one rib is connected between each pair of adjacent slabs; and a plurality of semiconductor wafers are correspondingly disposed on the plurality of stages Between the semiconductor wafers, or between the semiconductor wafer and the pins, or between the semiconductor wafer and the stage, an electrical connection is formed by a copper wire bond; a single plastic body enables the a plurality of wafer stages and the plurality of semiconductor wafers carried therein are encapsulated inside the molding body and covering the top surface of the reinforcing rib; the bottom surface of the wafer stage is not connected to the bottom surface of the semiconductor wafer, and the plurality of pins are exposed thereto Outside the bottom of the molded body. The copper wire bondable package structure according to claim 1, wherein the reinforcing ribs are removed after the plastic package is packaged, so that adjacent ones of the slide stages are electrically isolated from each other. The copper wire bondable package structure of claim 1 or 2, wherein the height of the rib is lower than the height of the adjacent stage to which it is attached. The copper wire bondable package structure of claim 1, wherein some of the pins on the lead frame are led out by the plurality of stages; a bottom surface of the semiconductor wafer and the carrier The top surface of the table is fixedly connected to set the semiconductor wafer A plurality of bottom electrodes are electrically connected to the stage and connected to the external components through the pins. The copper wire bondable package structure of claim 4, wherein the other pins on the lead frame are separated from the plurality of stages and are not electrically connected; the semiconductor wafer is provided A plurality of top electrodes are electrically connected to the pins through the copper wires, and are connected to the external components through the pins. A method for fabricating a copper wire bondable package structure, comprising the following steps: Step 1: forming a plurality of reinforcing ribs on a lead frame connecting adjacent carrier stages, the bottom surface of the reinforcing ribs and the bottom surface of the carrier Forming at least one of the reinforcing ribs adjacent to the stage; step 2, a semiconductor wafer correspondingly connected to the stage; between the semiconductor wafers, or between the semiconductor wafer and the pins Or the semiconductor wafer and the carrier are electrically connected by a copper wire bonding; in step 3, the lead frame of the semiconductor wafer and the bonding copper wire is packaged; and the plastic packaging material covers the semiconductor wafer The top of the stage, and the top surface of the rib, and solidified to form a single plastic body; the bottom surface of the stage, the bottom surface of the rib and the plurality of pins are exposed to the outside of the plastic package; 4. Cutting and removing the reinforcing ribs from the bottom surface of the package structure, and forming a gap between adjacent ones of the stages to realize electrical isolation of the adjacent stages. The method for fabricating a copper wire bondable package structure according to claim 6, wherein the reinforcing ribs described in step 1 are at corresponding positions between adjacent ones of the slides. Semi-etched the upper half of the lead frame. The method for fabricating a copper wire bondable package structure according to claim 6, wherein the step 2 further comprises: the bottom surface of the semiconductor wafer and the top of the carrier stage. The surface is fixedly connected such that a plurality of bottom electrodes of the semiconductor wafer are electrically connected to the stage, and are connected to external components through the plurality of pins led out by the plurality of stages. The method for fabricating a copper wire bondable package structure according to claim 8 , wherein the step 2 further comprises: the plurality of pins separated from the plurality of stages and electrically connected to the plurality of stages; A plurality of top electrodes of the semiconductor wafer are electrically connected by the copper wire bonds.