TWI475925B - Field emitting display panel - Google Patents

Description

Field emission display panel

The present invention relates to a display panel, and more particularly to a field emission type display panel.

In general, the field emission type display panel is mainly used in an ultra-high vacuum environment (less than 10 ^-6 Torr) to make an electron emitter on the cathode, and utilizes a high aspect ratio (high) in the electron emission end. The microstructure of the aspect ratio helps the electrons overcome the work function of the cathode and leave the cathode. In addition, in the field emission display panel, if the phosphor powder is coated on the anode, and the high electric field between the cathode and the anode causes electrons to be led out from the electron emission end of the cathode, the electric field directly attacks the anode. Fluorescent powder, which emits visible light.

A problem faced by current field emission display panels is that the uniformity of the luminance of the display panel is insufficient. In other words, in the conventional field emission display panel, the current of the electron emission end of the partial region is significantly different from the current of the electron emission end of the other region, so that the uniformity of the illumination brightness of the entire display panel is not good.

The present invention provides a field emission type display panel which can improve the problem that the uniformity of the luminance of the conventional field emission type display panel is insufficient.

The present invention provides a field emission type display panel including a substrate, a first resistance element, a first conductive pattern, an electron emission element, a second resistance element, a second conductive pattern, and a conductive layer. The substrate has at least a display area and a non-display area, and the display area includes at least a first sub-pixel area and a second sub-pixel area. The first resistive element is disposed in the first sub-pixel region and the second sub-pixel region, wherein a resistance value of the first resistive element in the first sub-pixel region is different from a first resistor in the second sub-pixel region The resistance value of the component. The first conductive pattern connects one end of the first resistive element in the first sub-pixel region and one end of the first resistive element in the second sub-pixel region. The electron emitting element is disposed in the first sub-pixel region and the second sub-pixel region, and connects the other end of the first resistive element in the first sub-pixel region and the first resistive element in the second sub-pixel region The other end. The second resistive element is disposed in the first sub-pixel region and the second sub-pixel region, wherein a resistance value of the second resistive element in the first sub-pixel region is different from a second resistor in the second sub-pixel region The resistance value of the component. The second conductive pattern connects one end of the second resistive element in the first sub-pixel region and one end of the second resistive element in the second sub-pixel region. The conductive layer connects the other end of the second resistive element in the first sub-pixel region and the other end of the second resistive element in the second sub-pixel region, wherein the conductive layer surrounds and floats on the electron-emitting element.

The invention further provides a field emission display panel comprising a substrate, a first conductive layer, a resistive material layer, an insulating layer, an electron emitting element and a second conductive layer. The substrate includes at least a display area and a non-display area. The first conductive layer is disposed in the display region, and the first conductive layer includes a first electrode line and a first electrode electrically connected to the first electrode line. A layer of resistive material is on the first conductive layer in the display area. The insulating layer covers the resistive material layer in the display area, and the insulating layer has a first opening and a second opening, the first opening exposing a portion of the resistive material layer above the first electrode, and the second opening is exposed A portion of the resistive material layer above the first electrode line. The electron emitting element is disposed on the layer of resistive material exposed by the first opening. The second conductive layer is disposed on the insulating layer and the second opening, wherein the second conductive layer includes a second electrode line and a second electrode electrically connected to the second electrode line, and the second electrode has a third opening to expose The electron emitting element, and the second electrode line and the first electrode line define at least a first sub-pixel area and a second sub-pixel area.

Based on the above, the first sub-pixel region and the second sub-pixel region of the field emission display panel are respectively provided with a first resistance element and a second resistance element. In particular, the resistance value of the first resistive element in the first sub-pixel region is different from the resistance value of the first resistive element in the second sub-pixel region, and the second resistive element in the first sub-pixel region The resistance value is different from the resistance value of the second resistance element in the second sub-pixel region. The arrangement of the first resistive element and the second resistive element described above can reduce the difference in current generated by the electron-emitting elements in the first sub-pixel region and the second sub-pixel region of the field emission display panel, thereby improving field emission. The uniformity of the brightness of the display panel.

The above described features and advantages of the present invention will be more apparent from the following description.

1 is a top plan view of a field emission display panel in accordance with an embodiment of the present invention. Referring to FIG. 1, the field emission display panel of this embodiment includes a substrate 100. According to the embodiment, the material of the substrate 100 may be glass, quartz, polymer, or an opaque/reflective material (for example, a conductive material, a metal, a wafer, a ceramic, or other applicable materials), or other materials. Applicable materials. The substrate 100 has at least a display area A and a non-display area B, and the non-display area B is surrounded around the display area A. In addition, there are a plurality of sub-pixel regions arranged in an array in the display area A. Only the first sub-pixel area P1 and the second sub-pixel area P2 are illustrated in FIG. 1 for detailed description. The first sub-pixel area P1 and the second sub-pixel area P2 are respectively illustrated at the edge and the center of the display area A, but the present invention is not limited thereto. According to other embodiments, the first sub-pixel area P1 and the second sub-pixel area P2 may also be located at the edge of the display area A, or both located near the center of the display area A.

The structure in the first sub-pixel area P1 will be described in detail below. 2A is an equivalent circuit diagram of a first sub-pixel area of the field emission display panel of FIG. 1. 2B is a top plan view of a first sub-pixel area of the field emission display panel of FIG. 1. Fig. 2C is a schematic cross-sectional view taken along line I-I' and II-II' of Fig. 2B.

Referring to FIG. 2A, FIG. 2B and FIG. 2C, the first sub-pixel region P1 includes a first conductive layer 102, a resistive material layer 103, an insulating layer 104, an electron-emitting element 110-1, and a second conductive layer. 106.

The first conductive layer 102 includes a first electrode line 102b-1 and a first electrode 102a-1 electrically connected to the first electrode line 102b-1. Here, the first electrode 102a-1 of the first conductive layer 102 may be referred to as a first conductive pattern, and the first electrode line 102b-1 of the first conductive layer 102 may be referred to as a second conductive pattern. Therefore, in the present embodiment, the first conductive pattern (first electrode 102a-1) and the second conductive pattern (first electrode line) 102b-1 are composed of the same film layer (first conductive layer) 102, but The invention is not limited thereto. According to other embodiments, the first conductive pattern (first electrode 102a-1) and the second conductive pattern (first electrode line) 102b-1 may also be composed of different film layers. The first conductive layer 102 is generally made of a metal material based on conductivity considerations. However, the present invention is not limited thereto, and other conductive materials may be used for the first conductive layer 102 according to other embodiments. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or other suitable materials), or stacked layers of metallic materials and other electrically conductive materials.

The resistive material layer 103 is on the first conductive layer 102. According to the present embodiment, the resistive material layer 103 includes tantalum, amorphous tantalum, crystalline tantalum, telluride, diamond-like carbon (DLC), tantalum carbide, amorphous carbon, ceramic material (for example: cermet (cermet) ) or other materials having the same properties), semiconductor oxides, semiconductor nitrides, metal oxides, metal nitrides, metal oxynitrides, porous materials, or other suitable resistive materials, or materials Any two combinations. The resistive material layer 103 is above the first conductive pattern (first electrode 102a-1) as the first resistive element Ra-1, and one end of the first resistive element Ra-1 is connected to the first conductive pattern 102a-1. The resistive material layer 103 is the second resistive element Rb-1 above the second conductive pattern (first electrode line) 102b-1, and one end of the second resistive element Rb-1 is connected to the second conductive pattern 102b-1. In addition, when the first resistive element Ra-1 and the second resistive element Rb-1 are projected onto the substrate 100, the first resistive element Ra-1 does not overlap with the second resistive element Rb-1.

The insulating layer 104 covers the resistive material layer 103, and the insulating layer 104 has a first opening Oa-1 and a second opening Ob-1. The first opening Oa-1 exposes a portion of the resistive material layer 103 above the first electrode (first conductive pattern) 102a-1, and the second opening Ob-1 is exposed at the first electrode line (second conductive A portion of the resistive material layer 103 above the pattern 102b-1.

The electron-emitting element 110-1 is disposed on the resistive material layer 103 exposed by the first opening Oa-1 of the insulating layer 104. Therefore, the electron-emitting element 110-1 is connected to the other end of the first resistive element Ra-1 in the first sub-pixel region P1. The electron-emitting element 110-1 may be a cone of a metal material, an electron-emitting end of a carbon nanotube, or an electron-emitting end of another type of tip discharge, or a combination of the above two types of emitters. The present invention is not limited to the number of electron-emitting elements 110-1 provided in the first sub-pixel area P1. In other words, the number of electron-emitting elements 110-1 provided in the first sub-pixel area P1 can be more than the number shown in the drawing. Furthermore, the present invention is also not limited to the region in which the electron-emitting element 110-1 provided in the first sub-pixel region P1 exists as only one electron-emitting region. In other words, a plurality of electron-emitting regions can be disposed in the first sub-pixel region P1.

The second conductive layer 106 is disposed on the insulating layer 104 and filled in the second opening Ob-1. According to the present embodiment, the second conductive layer 106 more contacts the surface of the resistive material layer 103 located in the second opening Ob-1. In addition, the second conductive layer 106 surrounds and floats on the electron-emitting element 110-1. In other words, the second conductive layer 106 surrounds the electron emitting element 110-1 and is not connected to the electron emitting element 110-1.

According to the embodiment, the second conductive layer 106 includes a second electrode line 106b-1 and a second electrode 106a-1 electrically connected to the second electrode line 106b-1. The second electrode 106a-1 of the second conductive layer 106 has a third opening Oc-1 to expose the electron-emitting element 110-1, and the second electrode line 106b-1 of the second conductive layer 106 is connected to the first sub-pixel area. The other end of the second resistive element Rb-1 in P1. In addition, the insulating layer 104 is located under the second conductive layer 106 and does not shield the electron-emitting element 110-1. Moreover, the second conductive layer 106 is located above the first resistive element Ra-1, the second resistive element Rb-1, the first conductive pattern 102a-1 and the second conductive pattern 102b-1. The second conductive layer 106 is generally made of a metal material based on conductivity considerations. However, the present invention is not limited thereto, and other conductive materials may be used for the second conductive layer 106 according to other embodiments. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or other suitable materials), or stacked layers of metallic materials and other electrically conductive materials.

According to this embodiment, the extending direction of the second electrode line 106b-1 is not parallel to the extending direction of the first electrode line 102b-1, and preferably, the extending direction of the second electrode line 106b-1 and the first electrode line The extension direction of 102b-1 is vertical. Therefore, the second electrode line 106b-1 and the first electrode line 102b-1 define the first sub-pixel area P1. In addition, in this embodiment, the second opening Ob-1 in the first sub-pixel area P1 is located at the intersection of the first electrode line 102b-1 and the second electrode line 106b-1.

In the embodiment of FIG. 2B, the first conductive layer 102 in the first sub-pixel region P1 includes the first electrode line 102b-1 and the first electrode 102a-1. However, the invention is not limited thereto. According to other embodiments, as shown in FIG. 2D, the first conductive layer 102 in the first sub-pixel region P1 is composed of 102b-1 and 102c-1 except for the first electrode 102a-1. Composition. The junction of the first electrode line 102c-1 and the first electrode 102a-1 has a gap to separate the first electrode line 102c-1 from the first electrode 102a-1. The second opening Ob-1 exposing the second resistance element Rb-1 is correspondingly disposed at the intersection of the first electrode line 102c-1 and the second electrode line 106b-1. Here, the first electrode line 102c-1 and the first electrode line 102b-1 may be connected to the corresponding voltages Va-1, Vb-1, respectively, and the voltages Va-1, Vb-1 may be the same or different.

In the first sub-pixel region P1 of the embodiment, as shown in FIG. 2A, when the external circuit gives the voltage V1 of the first sub-pixel region P1, the first sub-picture is entered after being consumed by the resistor Ro-1 of the external line. The voltage value of the prime region P1 is Vg-1, and the voltage Vg-1 and the voltage HV1 will drive the electron-emitting element 110-1 to generate a discharge.

Next, the structure in the second sub-pixel area P2 of the field emission display panel of the present embodiment will be described in detail. 3A is an equivalent circuit diagram of a second sub-pixel region of the field emission display panel of FIG. 1. 3B is a top plan view of a second sub-pixel area of the field emission display panel of FIG. 1. Fig. 3C is a schematic cross-sectional view taken along line I-I' and II-II' of Fig. 3B.

Referring to FIG. 3A, FIG. 3B and FIG. 3C, the first sub-pixel region P2 includes a first conductive layer 102, a resistive material layer 103, an insulating layer 104, an electron-emitting element 110-2, and a second conductive layer. 106.

The first conductive layer 102 includes a first electrode line 102b-2 and a first electrode 102a-2 electrically connected to the first electrode line 102b-2. Here, the first electrode 102a-2 of the first conductive layer 102 may be referred to as a first conductive pattern, and the first electrode line 102b-2 of the first conductive layer 102 may be referred to as a second conductive pattern. Therefore, in the present embodiment, the first conductive pattern (first electrode 102a-2) and the second conductive pattern (first electrode line) 102b-2 are composed of the same film layer (first conductive layer) 102.

Similarly, the resistive material layer 103 of the second sub-pixel region P2 is located on the first conductive layer 102. The resistive material layer 103 is above the first conductive pattern (first electrode 102a-2) as the first resistive element Ra-2, and one end of the first resistive element Ra-2 is connected to the first conductive pattern 102a-2. The resistive material layer 103 is above the second conductive pattern (first electrode line) 102b-2 as the second resistive element Rb-2, and one end of the second resistive element Rb-21 is connected to the second conductive pattern 102b-2. In addition, when the first resistive element Ra-2 and the second resistive element Rb-2 are projected onto the substrate 100, the first resistive element Ra-2 does not overlap with the second resistive element Rb-2.

It is worth mentioning that, in the field emission display panel, the resistance value of the first resistance element Ra-1 in the first sub-pixel region P1 is different from the first resistance element Ra of P2 in the second sub-pixel region. -2 resistance value. Moreover, the resistance value of the second resistance element Rb-1 in the first sub-pixel area P1 is different from the resistance value of the second resistance element Rb-2 in the second sub-pixel area P2.

The insulating layer 104 covers the resistive material layer 103, and the insulating layer 104 has a first opening Oa-2 and a second opening Ob-2. The first opening Oa-2 exposes a portion of the resistive material layer 103 located above the first electrode (first conductive pattern) 102a-2, and the second opening Ob-2 is exposed at the first electrode line (second conductive A portion of the resistive material layer 103 over the pattern 102b-2.

It is worth mentioning that, according to an embodiment, the area of the first opening Oa-1 in the first sub-pixel area P1 projected onto the substrate 100 is substantially different from the first opening Oa in the second sub-pixel area P2. -2 is projected onto the area of the substrate 100. However, the present invention is not limited thereto. In other embodiments, the first opening Oa-1 in the first sub-pixel area P1 is projected onto the area of the substrate 100 and the first opening Oa in the second sub-pixel area P2. The area projected by -2 to the substrate 100 is equivalent. In addition, according to an embodiment, the area of the second opening Ob-1 in the first sub-pixel area P1 projected onto the substrate 110 is substantially different from the second opening Ob-2 in the second sub-pixel area P2. The area of the substrate 100. However, the present invention is not limited thereto. In other embodiments, the area of the second opening Ob-1 in the first sub-pixel area P1 projected onto the substrate 110 may also be the second opening in the second sub-pixel area P2. The area of the Ob-2 projection to the substrate 100 is equivalent.

The electron-emitting element 110-2 is disposed on the resistive material layer 103 exposed by the first opening Oa-2 of the insulating layer 104. Therefore, the electron-emitting element 110-2 is connected to the other end of the first resistance element Ra-2 in the second sub-pixel region P2. The electron-emitting element 110-2 may be a cone of a metal material, an electron-emitting end of a carbon nanotube, or an electron-emitting end of other types of tip discharges, or a combination of the above two types of emitters. The present invention is not limited to the number of electron-emitting elements 110-2 provided in the second sub-pixel region P2. In other words, the number of electron-emitting elements 110-2 provided in the second sub-pixel area P2 can be more than the number shown in the drawing. Furthermore, the present invention is also not limited to the region in which the electron-emitting element 110-1 provided in the first sub-pixel region P1 exists as only one electron-emitting region. In other words, a plurality of electron-emitting regions can be disposed in the first sub-pixel region P1. In addition, the second conductive layer 106 surrounds and floats on the electron-emitting element 110-2. In other words, the second conductive layer 106 surrounds the electron emitting element 110-2 and is not connected to the electron emitting element 110-2.

It is worth mentioning that the area of the electron-emitting element 110-1 in the first sub-pixel region P1 is substantially different from the area of the electron-emitting element 110-2 in the second sub-pixel region P2. However, the present invention is not limited thereto, and according to other embodiments, the area of the electron-emitting element 110-1 in the first sub-pixel region P1 is substantially the area of the electron-emitting element 110-2 in the second sub-pixel region P2. quite.

The second conductive layer 106 is disposed on the insulating layer 104 and filled in the second opening Ob-2. According to the present embodiment, the second conductive layer 106 more contacts the surface of the resistive material layer 103 located in the second opening Ob-2. The second conductive layer 106 includes a second electrode line 106b-2 and a second electrode 106a-2 electrically connected to the second electrode line 106b-2. The second electrode 106a-2 of the second conductive layer 106 has a third opening Oc-2 to expose the electron emitting element 110-2, and the second electrode line 106b-2 of the second conductive layer 106 is connected to the second sub-pixel area The other end of the second resistive element Rb-2 in P2. In addition, the insulating layer 104 is located under the second conductive layer 106 and does not shield the electron-emitting element 110-2. Moreover, the second conductive layer 106 is located above the first resistive element Ra-2, the second resistive element Rb-2, the first conductive pattern 102a-2 and the second conductive pattern 102b-2.

According to this embodiment, the extending direction of the second electrode line 106b-2 is not parallel to the extending direction of the first electrode line 102b-2, and preferably, the extending direction of the second electrode line 106b-2 and the first electrode line The extension direction of 102b-2 is vertical. Therefore, the second electrode line 106b-2 and the first electrode line 102b-2 define the second sub-pixel area P2. In addition, in this embodiment, the second opening Ob-2 in the second sub-pixel region P2 is located at the intersection of the first electrode line 102b-2 and the second electrode line 106b-2.

In the embodiment of FIG. 3B, the first conductive layer 102 in the second sub-pixel region P2 includes the first electrode line 102b-2 and the first electrode 102a-2. However, the invention is not limited thereto. According to other embodiments, as shown in FIG. 3D, the first conductive layer 102 in the second sub-pixel region P2 includes, in addition to the first electrode 102a-2, the first electrode line is 102b-2 and 102c-2. Composition. The junction of the first electrode line 102c-2 and the first electrode 102a-2 has a gap to separate the first electrode line 102c-2 from the first electrode 102a-2. The second opening Ob-2 exposing the second resistance element Rb-2 is correspondingly disposed at the intersection of the first electrode line 102c-2 and the second electrode line 106b-2. Here, the first electrode line 102c-2 and the first electrode line may be connected to the corresponding voltages Va-2, Vb-2 by 102b-2, respectively, and the voltages Va-2, Vb-2 may be the same or different.

In the second sub-pixel area P2 of the embodiment, as shown in FIG. 3A, when the external circuit gives the voltage V2 of the second sub-pixel area P2, it is consumed by the resistance Ro-2 of the external line and then enters the second sub-picture. The voltage value of the prime region P2 is Vg-2, and the voltage Vg-2 and the voltage HV2 will drive the electron-emitting element 110-2 to generate a discharge.

As described above, in the field emission display panel of the embodiment, the first sub-pixel region P1 has the first resistive element Ra-1 and the second resistive element Rb-1, and the second sub-pixel region P2 There is a first resistance element Ra-2 and a second resistance element Rb-2. In particular, the resistance value of the first resistive element Ra-1 in the first sub-pixel region P1 is different from the resistance value of the first resistive element Ra-2 of P2 in the second sub-pixel region. Moreover, the resistance value of the second resistance element Rb-1 in the first sub-pixel area P1 is different from the resistance value of the second resistance element Rb-2 in the second sub-pixel area P2. Therefore, when the voltage Vg-1 transmitted by the second conductive layer 106 is supplied to the electron-emitting element 110-1 via the second resistive element Rb-1 of the first sub-pixel region P1, the current is transmitted to the second conductive layer 106. The voltage Vg-2 is substantially the same as the current given to the electron-emitting element 110-2 via the second resistive element Rb-2 of the second sub-pixel region P2.

In other words, in the present embodiment, by providing the first resistive element and the second resistive element in each sub-pixel region of the field emission display panel, the electron emitters of all the sub-pixel regions of the field emission display panel can be made. The difference in current is reduced, thereby improving the uniformity of the luminance of the field emission type display panel.

It should be noted that, in the above embodiment, the number and shape of the first opening Oa-1, the second opening Ob-1, and the third opening Oc-1 are not limited to those described in the embodiment, for example, the first opening The number of each of Oa-1/Oa-2, the second opening Ob-1/Ob-2, and the third opening Oc-1/Oc-2 may be at least one or more. The respective shapes of the first opening Oa-1/Oa-2, the second opening Ob-1/Ob-2, and the third opening Oc-1/Oc-2 include a circle, a rectangle, a triangle, a diamond, and a pentagon , hexagonal, star, flower, curved, polygonal, zigzag, gear shaped, or other suitable shape, or a combination of any two of the above. Further, the respective sizes of the first opening Oa-1/Oa-2, the second opening Ob-1/Ob-2, and the third opening Oc-1/Oc-2 are not limited.

An example and a comparative example are listed below to illustrate that the provision of the first resistive element and the second resistive element in each sub-pixel area of the field emission display panel can indeed improve the uniformity of the luminance of the field emission type display panel.

Instance

In the field emission display panel of this example, a first resistance element and a second resistance element are disposed in each sub-pixel area, wherein the structure of the sub-pixel area of the field emission display panel of this example is as shown in FIG. 2A- 2C or as shown in Figures 3A-3C. In addition, in this example, the voltage applied to each sub-pixel region by the external circuit is about 35 V, and the resistance value of the external circuit is about 3 KΩ, and the first conductive layer 102 (the first electrode and the first electrode line) is given about 0V. When the three sub-pixel regions (sub-pixel regions 1, 2, 3) of the field emission display panel of this example are electrically measured, the results as shown in Table 1 can be obtained.

Comparative example

In the field emission type display panel of this comparative example, only the first resistance element is provided in each sub-pixel area, and the second resistance element is not provided. Further, in this comparative example, the voltage applied to each sub-pixel area by the external circuit was about 30 V, the resistance value of the external circuit was about 3 K?, and the cathode was given about 0 V. When the three sub-pixel regions (sub-pixel regions 1, 2, 3) of the field emission display panel of this example are electrically measured, the results as shown in Table 2 can be obtained.

It can be seen from the above examples that when the first resistive element and the second resistive element are disposed in each of the sub-pixel regions in the field emission display panel, the current (IRa) of the electron-emitting element of the field emission display panel can be made. The uniformity is as high as about 72.8%. If only the first resistive element is disposed in each of the sub-pixel regions in the field emission type display panel, the uniformity of the current (IRa) of the electron-emitting element of the field emission type display panel is only about 66.7%. Therefore, the present invention provides that the first resistive element and the second resistive element in each of the sub-pixel regions of the field emission type display panel can achieve improved brightness uniformity of the field emission type display panel.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧Substrate

A‧‧‧ display area

B‧‧‧Non-display area

P1‧‧‧The first sub-pixel area

P2‧‧‧Second sub-pixel area

Ra-1‧‧‧First resistance element

Rb-1‧‧‧second resistance element

R0-1‧‧‧ resistance

Va-1, Vb-1, V1, Vg-1, HV1‧‧‧ voltage

110-1‧‧‧Electronic emission components

102‧‧‧First conductive layer

102a-1, 102a-2‧‧‧ first electrode (first conductive pattern)

102b-1, 102b-2, 102c-1, 102c-2‧‧‧ first electrode line (second conductive pattern)

103‧‧‧resistive material layer

104‧‧‧Insulation

106‧‧‧Second conductive layer

106a-1, 106a-2‧‧‧ second electrode

106b-1, 106b-2‧‧‧second electrode line

Oa-1, Oa-2‧‧‧ first opening

Ob-1, Ob-2‧‧‧ second opening

Oc-1, Oc-2‧‧‧ third opening

1 is a top plan view of a field emission display panel in accordance with an embodiment of the present invention.

2A is an equivalent circuit diagram of a first sub-pixel area of the field emission display panel of FIG. 1.

2B is a top plan view of a first sub-pixel area of the field emission display panel of FIG. 1.

Fig. 2C is a schematic cross-sectional view taken along line I-I' and II-II' of Fig. 2B.

2D is a top plan view of a first sub-pixel area of a field emission display panel in accordance with another embodiment.

3A is an equivalent circuit diagram of a second sub-pixel region of the field emission display panel of FIG. 1.

3B is a top plan view of a second sub-pixel area of the field emission display panel of FIG. 1.

Fig. 3C is a schematic cross-sectional view taken along line I-I' and II-II' of Fig. 3B.

3D is a top plan view of a second sub-pixel region of a field emission display panel in accordance with another embodiment.

P1‧‧‧The first sub-pixel area

Ra-1‧‧‧First resistance element

Rb-1‧‧‧second resistance element

Ro-1‧‧‧ resistance

Va-1, Vb-1, V1, Vg-1, HV1‧‧‧ voltage

110-1‧‧‧Electronic emission components

Claims (16)

A field emission display panel includes: a substrate having at least one display area and a non-display area, and the display area includes at least a first sub-pixel area and a second sub-pixel area; a first resistive element And being disposed in the first sub-pixel region and the second sub-pixel region, wherein a resistance value of the first resistance element in the first sub-pixel region is different from the second sub-pixel region a resistance value of the first resistive element; a first conductive pattern connecting one end of the first resistive element in the first sub-pixel region and one end of the first resistive element in the second sub-pixel region; An electron emitting component is disposed in the first sub-pixel region and the second sub-pixel region, and is connected to the other end of the first resistive element in the first sub-pixel region and the second sub-pixel region The other end of the first resistive element; a second resistive element disposed in the first sub-pixel region and the second sub-pixel region, wherein the second resistor in the first sub-pixel region The resistance value of the element is different from the resistance value of the second resistance element in the second sub-pixel region; a second guide a pattern connecting one end of the second resistive element in the first sub-pixel region and one end of the second resistive element in the second sub-pixel region; and a conductive layer connecting the first sub-pixel region The other end of the second resistive element and the other end of the second resistive element in the second sub-pixel region, wherein the conductive layer surrounds and floats to the electron-emitting element. The panel of claim 1, wherein the first resistive element and the second resistive element comprise a layer of resistive material. The panel of claim 1, wherein the first conductive pattern and the second conductive pattern are formed by the same film layer. The panel of claim 1, wherein the conductive layer is located above the first resistive element, the second resistive element, the first conductive pattern and the second conductive pattern. The panel of claim 1, further comprising an insulating layer under the conductive layer and not shielding the electron emitting element. The panel of claim 1, wherein the first resistive element and the second resistive element are not projected with the second resistive element when the first resistive element and the second resistive element are projected onto the substrate. The panel according to claim 1, wherein the voltage transmitted by the conductive layer and the voltage transmitted to the electron-emitting element via the second resistive element of the first sub-pixel region and the voltage transmitted by the conductive layer are via the first The second resistive element of the two sub-pixel regions gives substantially the same current to the electron-emitting element. The panel of claim 1, wherein a resistance ratio of the first resistive element to the second resistive element in each of the sub-pixel regions is the same. A field emission type display panel includes: a substrate including at least one display area and a non-display area; a first conductive layer disposed in the display area, and the first conductive layer includes a first electrode line and The first electrode line is electrically connected to one of the first electrodes a layer of a resistive material on the first conductive layer in the display region; an insulating layer covering the layer of resistive material in the display region, the insulating layer having a first opening and a second Opening, the first opening exposing a portion of the resistive material layer above the first electrode, the second opening exposing a portion of the resistive material layer above the first electrode line; an electron emitting element, And disposed on the insulating material layer exposed by the first opening; a second conductive layer disposed on the insulating layer and the second opening, wherein the second conductive layer comprises a second electrode line and The second electrode line is electrically connected to one of the second electrodes, and the second electrode has a third opening to expose the electron emitting element, and the second electrode line and the first electrode line define at least a first The sub-pixel area and a second sub-pixel area. The panel of claim 9, wherein an area of the second opening in the first sub-pixel area projected to the substrate is substantially different from a second opening in the second sub-pixel area projected to the The area of the substrate. The panel of claim 9, wherein the second conductive layer contacts a surface of the layer of resistive material located in the second opening. The panel of claim 9, wherein the second opening in the first sub-pixel region is located at a cross between the first electrode line and the second electrode line. The panel of claim 9, wherein the second opening in the second sub-pixel region is located at a cross between the first electrode line and the second electrode line. The panel of claim 9, wherein the junction of the first electrode line and the first electrode has a gap such that the first electrode line is separated from the first electrode. The panel of claim 9, wherein an area of the first opening in the first sub-pixel area projected to the substrate is substantially different from a projection of the first opening in the second sub-pixel area to The area of the substrate. The panel of claim 9, wherein the electron-emitting element area in the first sub-pixel area is substantially different from the area of the electron-emitting element in the second sub-pixel area.