TWI463585B - Semiconductor packaging method and structure thereof - Google Patents

Description

Semiconductor packaging method and structure thereof

The present invention relates to a semiconductor packaging method, and more particularly to a semiconductor packaging method capable of preventing copper ions from being released.

At present, the volume of electronic products is becoming thinner and lighter, so the relative internal circuit layout must be more and more developed toward fine pitch, but the fine pitch between circuits is likely to cause a short circuit.

The main purpose of the present invention is to provide a semiconductor package method, comprising: providing a substrate having an upper surface and a plurality of connection pads disposed on the upper surface, each of the connection pads having a first bonding surface; The flip chip is combined with a wafer on the substrate, the wafer has an active surface and a plurality of copper-containing bumps disposed on the active surface, the active surface facing the upper surface of the substrate and the copper-containing bumps are directly Bonding the connection pads, each of the copper-containing bumps has a second bonding surface and a ring wall; and forming an anti-free colloid between the substrate and the wafer, the anti-free glue system having a plurality of anti-free materials The anti-free materials cover the ring walls of the copper-containing bumps. Since the anti-free material has the anti-free material coating the copper-containing bumps, when the copper ions in the copper-containing bumps are free, the anti-free materials can instantly capture the free particles. Copper ions occur to prevent short circuits.

Referring to FIGS. 1A to 1C, which are a preferred embodiment of the present invention, a semiconductor package method includes the following steps: First, referring to FIG. 1A, a substrate 110 having an upper surface 111 is provided. And a plurality of connection pads 112 disposed on the upper surface 111. Each of the connection pads 112 has a first bonding surface 113 and a sidewall 114. In this embodiment, the first bonding surface 113 of each of the connection pads 112 The first region 113a and the second region 113b located outside the first region 113a; then, referring to FIG. 1B, the wafer 120 is bonded to the substrate 110, and the wafer 120 has an active surface 121 and a plurality of copper-containing bumps 122 disposed on the active surface 121, each of the copper-containing bumps 122 having a second bonding surface 122a and a ring wall 122b facing the upper surface 111 of the substrate 110 and The copper-containing bumps 122 are directly bonded to the connection pads 112. In this embodiment, the copper-containing bumps 122 are selected from one of copper/nickel or copper/nickel/gold. Each of the first regions 113a of the first joint surface 113 of each of the connection pads 112 corresponds to The second bonding surface 122a of each of the copper-containing bumps 122, and each of the first bonding surface 113 and each of the second bonding surfaces 122a are coplanar; finally, please refer to FIG. 1C to form an anti-free colloid 130. Between the substrate 110 and the wafer 120, in the embodiment, the anti-free colloid 130 is further extended on one side 123 of the wafer 120, and the anti-free colloid 130 has a plurality of anti-free materials 131. The anti-free material 131 covers the ring walls 122b of the copper-containing bumps 122 and the sidewalls 114 of the connecting pads 112. Preferably, the anti-free materials 131 cover the first portions. The second regions 113b of the bonding surface 113 are formed to form a semiconductor package structure 100. The materials of the anti-free materials 131 are organic solder resists, and the material of the organic solder resist is selected from an imidazole compound or an imidazole derivative. In one embodiment, the imidazole derivative may be one of phenyl bis-triazole, phenylimidazole, substituted phenylimidazole or aromatic hydroxyimidazole or a mixture thereof, and the imidazole compound may be Phenyl bis-triazole, phenylimidazole, alternative phenyl One of imidazole or aromatic hydroxyimidazole or a mixture thereof.
Since the anti-free material 131 of the anti-free colloid 130 covers the copper-containing bumps 122, when the copper ions in the copper-containing bumps 122 are free, the anti-free materials 131 are Instantly capture free copper ions to prevent short circuits.
Next, referring to FIG. 1C, a semiconductor package structure 100 according to a preferred embodiment of the present invention includes a substrate 110, a wafer 120, and an anti-free colloid 130 having an upper surface 111. And a plurality of connection pads 112 disposed on the upper surface 111, each of the connection pads 112 has a first bonding surface 113 and a sidewall 114, and the first bonding surface 113 of each of the connection pads 112 has a first The substrate 113a and the second region 113b located outside the first region 113a are bonded to the substrate 110. The wafer 120 has an active surface 121 and a plurality of copper bumps disposed on the active surface 121. In the block 122, the active surface 121 faces the upper surface 111 of the substrate 110, and the copper-containing bumps 122 are directly bonded to the connecting pads 112. Each of the copper-containing bumps 122 has a second bonding surface 122a. Each of the first regions 113a of the first bonding surface 113 of each of the connection pads 112 corresponds to the second bonding surface 122a of each of the copper-containing bumps 122, and each of the first bonding surfaces 113 And each of the second joint surfaces 122a is coplanar, the anti-tour The anti-free colloid 130 is formed on the side surface 123 of the wafer 120, and the anti-free colloid 130 is formed on the side surface 123 of the wafer 120. The anti-free colloid 130 has a plurality of anti-free materials 131. The anti-free material 131 covers the ring walls 122b of the copper-containing bumps 122 and the sidewalls 114 of the connection pads 112, and the anti-free material 131 further covers the connection pads 112. The second regions 113b of the first bonding surfaces 113.
The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are within the scope of the present invention. .

100. . . Semiconductor package structure

110. . . Substrate

111. . . Upper surface

112. . . Connection pad

113. . . First joint surface

113a. . . First district

113b. . . Second district

114. . . Side wall

120. . . Wafer

121. . . Active surface

122. . . Copper bump

122a. . . Second joint surface

122b. . . Ring wall

123. . . side

130. . . Anti-free colloid

131. . . Anti-free material

1A to 1C are schematic cross-sectional views showing a semiconductor package method in accordance with a preferred embodiment of the present invention.

100. . . Semiconductor package structure

110. . . Substrate

111. . . Upper surface

113. . . First joint surface

113a. . . First district

113b. . . Second district

114. . . Side wall

120. . . Wafer

121. . . Active surface

122. . . Copper bump

122a. . . Second joint surface

122b. . . Ring wall

123. . . side

130. . . Anti-free colloid

131. . . Anti-free material

Claims (18)

A semiconductor packaging method comprising at least:
Providing a substrate having an upper surface and a plurality of connecting pads disposed on the upper surface, each of the connecting pads having a first bonding surface;
The flip chip is combined with a wafer on the substrate, the wafer has an active surface and a plurality of copper-containing bumps disposed on the active surface, the active surface facing the upper surface of the substrate and the copper-containing bumps are directly Bonding the connection pads, each of the copper-containing bumps has a second bonding surface and a ring wall; and forming an anti-free colloid between the substrate and the wafer, the anti-free glue system having a plurality of anti-free materials The anti-free materials cover the ring walls of the copper-containing bumps. The semiconductor package method of claim 1, wherein each of the first bonding surface and each of the second bonding surfaces are coplanar. The semiconductor package method of claim 1, wherein each of the connection pads has a sidewall, and the anti-free materials cover the sidewalls. The semiconductor package method of claim 1, wherein the first bonding surface of each of the connection pads has a first region and a second region outside the first region, each of the first regions corresponding to And the second bonding surface of each of the copper-containing bumps. The semiconductor package method of claim 4, wherein the anti-free materials cover the second regions of the first bonding surfaces. The semiconductor packaging method according to claim 1, wherein the materials of the anti-free materials are organic flux-preserving agents. The semiconductor encapsulation method of claim 6, wherein the material of the organic soldering flux is selected from one of an imidazole compound or an imidazole derivative. The semiconductor encapsulation method according to claim 7, wherein the imidazole derivative is one of phenyl bis-triazole, phenylimidazole, substituted phenylimidazole or aromatic hydroxy imidazole or a mixture thereof. The imidazole compound may be one of phenyl bis-triazole, phenylimidazole, substituted phenylimidazole or aromatic hydroxy imidazole or a mixture thereof. The semiconductor package method of claim 1, wherein the material of the copper bumps is selected from one of copper/nickel or copper/nickel/gold. A semiconductor package structure comprising at least:
a substrate having an upper surface and a plurality of connecting pads disposed on the upper surface, each of the connecting pads having a first bonding surface;
a wafer bonded to the substrate, the wafer having an active surface and a plurality of copper bumps disposed on the active surface, the active surface facing the upper surface of the substrate and the copper-containing bumps The block is directly bonded to the connection pads, each of the copper-containing bumps has a second bonding surface and a ring wall; and an anti-free gel is formed between the substrate and the wafer, the anti-free glue system The utility model has a plurality of anti-free materials, and the anti-free materials cover the ring walls of the copper-containing bumps. The semiconductor package structure of claim 10, wherein each of the first bonding surfaces and each of the second bonding surfaces are coplanar. The semiconductor package structure of claim 10, wherein each of the connection pads has a sidewall, and the anti-free materials cover the sidewalls. The semiconductor package structure of claim 10, wherein the first bonding surface of each of the connection pads has a first region and a second region outside the first region, each of the first regions corresponding to And the second bonding surface of each of the copper-containing bumps. The semiconductor package structure of claim 13, wherein the anti-free materials cover the second regions of the first bonding surfaces. The semiconductor package structure according to claim 10, wherein the materials of the anti-free materials are organic solder resists. The semiconductor package structure according to claim 15, wherein the material of the organic soldering flux is selected from one of an imidazole compound or an imidazole derivative. The semiconductor package structure according to claim 16, wherein the imidazole derivative is one of phenyl bis-triazole, phenylimidazole, substituted phenylimidazole or aromatic hydroxyimidazole or a mixture thereof. The imidazole compound may be one of phenyl bis-triazole, phenylimidazole, substituted phenylimidazole or aromatic hydroxy imidazole or a mixture thereof. The semiconductor package structure of claim 10, wherein the material of the copper-containing bumps is selected from one of copper/nickel or copper/nickel/gold.