TWI453443B - Data analysis method - Google Patents
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Description
本發明係與數位資料處理有關,更詳而言之是指一種資料解析方法。The present invention relates to digital data processing, and more particularly to a data analysis method.
隨著數位科技的進步,如記憶卡、電子晶片、液晶螢幕(LCD)之影像處理晶片、以及互補性氧化金屬半導體(Complementary Metal-Oxide Semiconductor,CMOS)等使用數位訊號傳輸或儲存資料之電子裝置日漸普及。With the advancement of digital technology, such as memory cards, electronic chips, image processing chips for liquid crystal displays (LCDs), and complementary metal-oxide semiconductors (CMOS), electronic devices that transmit or store data using digital signals Increasing popularity.
當研發人員在研發與檢測具有上述電子裝置時,通常會利用邏輯分析儀來擷取輸入至該電子裝置、或該電子裝置所輸出之數位訊號,並透過於一顯示裝置上顯示之方式供研發人員分析與檢測上述所擷取之數位訊號是否正常,藉以判定上述電子產品之設計是否正常。When the R&D personnel develops and detects the above-mentioned electronic device, the logic analyzer is usually used to capture the digital signal input to the electronic device or the electronic device, and is displayed on a display device for development. The personnel analyzes and detects whether the digital signal captured above is normal, thereby determining whether the design of the electronic product is normal.
而市售之邏輯分析儀在擷取數位資料,並將其轉譯顯示於顯示裝置上後,大多係直接以橫軸位移之波型圖、或是以波型圖解譯對應之資料數列來顯示所擷取之數位資料。The commercially available logic analyzer captures the digital data and displays it on the display device. Most of the data is displayed directly on the horizontal axis, or in the data series corresponding to the waveform. Digital data taken.
然而,當研發人員利用邏輯分析儀在擷取數位資料,轉譯成資料數列後,仍須自行查詢對應待測物之通訊協定的轉譯規範,才能明白所解譯出的資料數列所代表之意義,才可判定電子產品數位資料處理之設計是否正常。However, when a researcher uses a logic analyzer to retrieve digital data and translate it into a data series, it is still necessary to query the translation specifications of the communication protocol corresponding to the object to be tested, so as to understand the meaning of the decoded data series. It can be judged whether the design of digital data processing of electronic products is normal.
而眾所皆知的是,隨著科技的進步,各種電子產品所需處 理之數位資料量越來越龐大,使得所顯示資料數列將會變的繁多與複雜,而此種解析方式不僅會造成研發人員檢測之困難度增加,而可能有誤判之情形發生外,且亦會造成檢測時間之延宕,進而造成研發效率低落。And as everyone knows, with the advancement of technology, various electronic products are needed. The amount of digital data is getting larger and larger, which makes the displayed data series more complicated and complicated. This kind of analysis will not only increase the difficulty of R&D personnel detection, but also may lead to misjudgment. It will cause delay in detection time, which will result in low efficiency of research and development.
有鑑於此,本發明之主要目的在於提供一種資料解析方法,可於檢測時自動地解析資料數列,並顯示資料數列所代表之意義。In view of this, the main object of the present invention is to provide a data analysis method, which can automatically parse a data sequence at the time of detection and display the meaning represented by the data series.
緣以達成上述目的,本發明所提供資料解析方法用以於一邏輯分析儀擷取寫入一待測物或自該待測物讀取之資料時,解析該邏輯分析儀所擷取之資料,且該資料包含有複數個封包;該資料解析方法包含下列步驟:A.建立一資料庫,且該資料庫中包含有複數組資料數列、以及複數組分別對應該資料數列之意義信息;其中,所述之資料數列是指透過對應該待測物的通訊協定之解碼手段,對所擷取之資料進行解碼後取得之數列;所述之意義信息是指各種數列於該待測物的通訊協定之規範中,所分別對應代表之意義;B.選擇對應該持測物之通訊協定的解碼手段;C.利用該邏輯分析儀擷取至少一寫入該待測物或自該待測物讀取之資料中的至少一封包; D.以步驟B所選擇之該解碼手段,解譯步驟C所擷取之該封包,以取得一資料數列;E.搜尋步驟A所建立之該資料庫,選擇該資料庫中對應步驟D得到之該資料數列的意義信息;F.顯示步驟E選擇之意義信息,於一顯示裝置上。In order to achieve the above object, the data analysis method provided by the present invention is used to parse the data acquired by the logic analyzer when a logic analyzer reads data to be read or read from the object to be tested. And the data includes a plurality of packets; the data parsing method comprises the following steps: A. Establishing a database, and the database includes a plurality of data arrays and a complex array corresponding to the meaning of the data series; The data series refers to a sequence obtained by decoding the captured data through a decoding means of a communication protocol corresponding to the object to be tested; the meaning information refers to various serials of communication in the object to be tested In the specification of the agreement, the meaning of the representative is respectively; B. selecting the decoding means corresponding to the communication protocol of the test object; C. using the logic analyzer to draw at least one of the object to be tested or from the object to be tested At least one packet in the read data; D. The decoding method selected in step B is used to interpret the packet captured in step C to obtain a data sequence; E. searching the database established in step A, and selecting corresponding step D in the database. The meaning information of the data series; F. The meaning information of the step E selection is displayed on a display device.
藉此,透過上述之設計,便可於檢測時自動地解析資料數列,並顯示資料數列所代表之意義,進而提升研發人員檢測之速度與效率。In this way, through the above design, the data series can be automatically analyzed at the time of detection, and the meaning represented by the data series can be displayed, thereby improving the speed and efficiency of the detection by the research and development personnel.
為能更清楚地說明本發明,茲舉較佳實施例並配合圖示詳細說明如後。In order that the present invention may be more clearly described, the preferred embodiments are illustrated in the accompanying drawings.
本發明用以在一測試系統檢測一待測物時,解析檢測時之各個資料,且該資料包含有複數個封包。請參閱圖1,該測試系統包含有一電腦10以及一邏輯分析儀20,該電腦10透過一傳輸介面12(如USB、SATA等)與該待測物30連接,而該邏輯分析儀20則連接該電腦10與該傳輸介面12。另外,於本實施例中,該待測物30為一記憶卡。請參閱圖2與圖3,本發明較佳實施例之資料解析方法包含有下列步驟:於檢測之前,先建立並儲存一資料庫於該電腦10中,且該資料庫中包含有複數組資料數列、以及複數組分別對應該資料數列之意義信息。其中,所述之資料數列50是指透過對應 該待測物30的通訊協定之解碼手段對所擷取之資料進行解碼後取得之數列(如圖3標號50處之數列),且上述之數列中包含有複數段數據51(如0X0D、0XB368、0X000、0X77等數據);所述之意義信息40是指資料數列50於該待測物30的通訊協定之規範中所對應代表之意義。詳而言之,該待測物30的通訊協定之規範中,對於資料數列50中之各種數據51的內容對應解釋有不同的意義名稱41與意義內容42。舉例而言,意義名稱41可能是起始(Start)、停止(Stop)、CMD指令、連接(Host)、或CRC偵錯狀態(CRC STATUS)等名稱,而意義內容42則依不同的意義名稱而會有所不同內容,如:在CRC偵錯狀態(CRC STATUS)的意義名稱下,就可能有代表不正確(Wrong)之101、代表正確(Right)之010、以及表示故障(Error)之111等不同的內容。The invention is used for parsing each data during the detection when a test system detects a test object, and the data includes a plurality of packets. Referring to FIG. 1, the test system includes a computer 10 and a logic analyzer 20. The computer 10 is connected to the object to be tested 30 through a transmission interface 12 (such as USB, SATA, etc.), and the logic analyzer 20 is connected. The computer 10 is connected to the transmission interface 12. In addition, in this embodiment, the object to be tested 30 is a memory card. Referring to FIG. 2 and FIG. 3, the data parsing method of the preferred embodiment of the present invention includes the following steps: before detecting, a database is created and stored in the computer 10, and the database includes complex array data. The sequence and the complex array correspond to the meaning information of the data series. Wherein, the data series 50 refers to the corresponding correspondence The decoding means of the communication protocol of the object to be tested 30 obtains the sequence obtained by decoding the captured data (as shown in the numeral 50 of FIG. 3), and the above-mentioned series includes the plurality of pieces of data 51 (eg, 0X0D, 0XB368). , 0X000, 0X77, etc.); the meaning information 40 refers to the meaning of the representative of the data sequence 50 in the specification of the communication protocol of the object 30 to be tested. In detail, in the specification of the communication protocol of the object to be tested 30, the contents of the various data 51 in the data series 50 are interpreted to have different meaning names 41 and meaning contents 42. For example, the meaning name 41 may be a name such as Start, Stop, CMD, Host, or CRC STATUS, and the meaning content 42 is in a different meaning name. There will be different contents, such as: under the meaning of CRC STATUS, there may be 101 representing incorrect (Wrong), 010 representing correct (Right), and indicating fault (Error). 111 and other different content.
而開始進行檢測時,先選擇對應該待測物30之通訊協定的解碼手段。一般來說,該通訊協定係存放於電腦10中對應該待測物30之動態連結資料庫(Dynamic Link Library,DLL)中,且該動態連結資料庫係採用靜態連結(statically linked)至微軟基礎類別庫(Microsoft Foundation Classes,MFC)之動態連結資料庫。藉此,便可透過選擇對應之動態連結資料庫來取得其通訊協定之解碼手段。When the detection is started, the decoding means of the communication protocol corresponding to the object to be tested 30 is selected first. Generally, the communication protocol is stored in the dynamic link library (DLL) of the computer 10 corresponding to the object to be tested 30, and the dynamic link database is statically linked to the Microsoft base. A dynamic link repository for the Microsoft Foundation Classes (MFC). In this way, the decoding means of the communication protocol can be obtained by selecting the corresponding dynamic link database.
而後,利用該邏輯分析儀擷取自該電腦10寫入該待測物30、或該電腦10自該待測物30讀取之數個封包至該邏輯分析 儀20之記憶體(圖未示)中,並以所選擇之該解碼手段解譯所擷取之各個該封包,得到複數組資料數列50。Then, the logic analyzer is used to retrieve the number of packets from the computer 10 to be written into the object to be tested 30 or read by the computer 10 from the object to be tested 30 to the logic analysis. In the memory (not shown) of the instrument 20, each of the captured packets is interpreted by the selected decoding means to obtain a complex array data sequence 50.
取得資料數列50後,搜尋儲存於電腦中之該資料庫,並選擇前述所得之各個該資料數列50對應之意義信息40,換言之,即是選擇各資料數列50中的各段數據51,分別所代表的意義名稱41與意義內容42。After obtaining the data sequence 50, searching for the database stored in the computer, and selecting the meaning information 40 corresponding to each of the data series 50 obtained in the foregoing, in other words, selecting each piece of data 51 in each data series 50, respectively The meaning name 41 and the meaning content 42 of the representative.
最後,依據該些封包被擷取之順序,依序排列顯示解譯所得之該資料數列50、分析所得之意義信息40、以及各封包於該記憶體中之起始位址60於一顯示裝置上。於本實施例中,該顯示裝置為該電腦10之螢幕,當然,在實際實施上,亦可是顯示於外接之另一顯示裝置。Finally, according to the order in which the packets are captured, the data sequence 50 obtained by the interpretation, the meaning information 40 obtained by the analysis, and the start address 60 of each packet in the memory are sequentially arranged on a display device. on. In the embodiment, the display device is a screen of the computer 10. Of course, in actual implementation, the display device may be displayed on another external display device.
之後更可再重複執行擷取封包後之步驟,直至檢測停止,如此一來,便可藉以透過不間斷之擷取、解譯、選取與顯示,而可完整解析整個檢測過程並顯示於該顯示裝置上。After that, the steps of capturing the packet can be repeated until the detection stops, so that the entire detection process can be completely analyzed and displayed on the display through uninterrupted capture, interpretation, selection and display. On the device.
另外,為使進行檢測之研發人員能快速地進行資料檢測,資料內容除可以數據方式顯示外,亦可直接用文字方式顯示出來。舉例而言,請參閱圖4之圈選處,於本實施例之該待測物30的通訊協定之規範中,意義名稱CRC偵錯狀態(CRC STATUS)下,對應有三種代表不同狀態內容之意義內容:101、010以及111,其中,101代表錯誤(Wrong);010代表正確(Right);111表示故障(Error)。如此一來,當資料數列50中的數據51解釋之意義名稱為:CRC偵錯狀態(CRC STATUS)以 及意義內容為:010時,表示CRC偵錯結果為正確,便可以用代表正確(Right)的文字,取代原先之010數據來顯示於該顯示裝置上,藉以使研發人員能更加快速地對資料檢測之內容進行解析。In addition, in order to enable the R&D personnel to perform the detection of the data quickly, the data content can be displayed in the form of data, or directly displayed in text form. For example, referring to the circle selection of FIG. 4, in the specification of the communication protocol of the object to be tested 30 in this embodiment, under the meaning name CRC error detection status (CRC STATUS), there are three corresponding contents representing different states. Meaning content: 101, 010 and 111, where 101 represents the error (Wrong); 010 represents the correct (Right); 111 represents the fault (Error). In this way, when the data 51 in the data sequence 50 is interpreted, the meaning name is: CRC STATUS (CRC STATUS) And the meaning content is: 010, when the CRC detection result is correct, the text representing the correct (Right) can be used instead of the original 010 data to be displayed on the display device, so that the researcher can more quickly access the data. The content of the detection is analyzed.
藉此,透過上述之設計,研發人員便可不需再查詢對應該待測物之通訊協定的轉譯規範,直接於該顯示裝置上即可即時地查看資料數列所代表之意義,進而大幅地提升研發人員檢測之速度與效率。最後,以上所述僅為本發明較佳可行實施例而已,舉凡應用本發明說明書及申請專利範圍所為之等效方法變化,理應包含在本發明之專利範圍內。In this way, through the above design, the R&D personnel can view the translation specifications of the communication protocol corresponding to the object to be tested without searching for the meaning of the data series directly on the display device, thereby greatly improving the research and development. Speed and efficiency of personnel testing. In the meantime, the above description is only for the preferred embodiments of the present invention, and the equivalent method variations of the present invention and the scope of the patent application are intended to be included in the scope of the present invention.
10‧‧‧電腦10‧‧‧ computer
12‧‧‧傳輸介面12‧‧‧Transport interface
20‧‧‧邏輯分析儀20‧‧‧Logic Analyzer
30‧‧‧待測物30‧‧‧Test object
40‧‧‧意義信息40‧‧‧ Meaning information
41‧‧‧意義名稱41‧‧‧ Meaning name
42‧‧‧意義內容42‧‧‧ Meaning content
50‧‧‧資料數列50‧‧‧ data series
51‧‧‧數據51‧‧‧ data
60‧‧‧起始位址60‧‧‧ starting address
圖1為使用本發明解析方法之測試系統架構圖;圖2為本發明解析方法之流程圖;圖3與圖4為使用本發明解析方法後之顯示畫面。1 is a structural diagram of a test system using the analysis method of the present invention; FIG. 2 is a flow chart of the analysis method of the present invention; and FIG. 3 and FIG. 4 are display screens after using the analysis method of the present invention.
Claims (6)
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5761465A (en) * | 1996-03-29 | 1998-06-02 | Cirrus Logic, Inc. | System for coupling asynchronous data path to field check circuit of synchronous data path when the asynchronous data path communicating data in synchronous format |
| CN100456734C (en) * | 2003-03-13 | 2009-01-28 | 马维尔国际贸易有限公司 | System structure with multiport memory, device, system and use method thereof |
| US20090113092A1 (en) * | 2007-10-25 | 2009-04-30 | Universal Scientific Industrial Co.,Ltd. | Signal converter for debugging that expands fifo capacity |
| TW200921399A (en) * | 2007-11-09 | 2009-05-16 | Zeroplus Technology Co Ltd | Method of a single-step logic analyzer processing multi-step trigger by using software |
| TW201209582A (en) * | 2010-08-19 | 2012-03-01 | Zeroplus Technology Co Ltd | Electronic measurement device and its serial-to-parallel data sequence processing method |
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- 2012-12-28 TW TW101151100A patent/TWI453443B/en not_active IP Right Cessation
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5761465A (en) * | 1996-03-29 | 1998-06-02 | Cirrus Logic, Inc. | System for coupling asynchronous data path to field check circuit of synchronous data path when the asynchronous data path communicating data in synchronous format |
| CN100456734C (en) * | 2003-03-13 | 2009-01-28 | 马维尔国际贸易有限公司 | System structure with multiport memory, device, system and use method thereof |
| US8335878B2 (en) * | 2003-03-13 | 2012-12-18 | Marvell World Trade Ltd. | Multiport memory architecture, devices and systems including the same, and methods of using the same |
| US20090113092A1 (en) * | 2007-10-25 | 2009-04-30 | Universal Scientific Industrial Co.,Ltd. | Signal converter for debugging that expands fifo capacity |
| TW200921399A (en) * | 2007-11-09 | 2009-05-16 | Zeroplus Technology Co Ltd | Method of a single-step logic analyzer processing multi-step trigger by using software |
| TW201209582A (en) * | 2010-08-19 | 2012-03-01 | Zeroplus Technology Co Ltd | Electronic measurement device and its serial-to-parallel data sequence processing method |
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