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TWI339785B - Multimode, uniform-latency clock generation circuit - Google Patents

Multimode, uniform-latency clock generation circuit

Info

Publication number
TWI339785B
TWI339785B TW096111475A TW96111475A TWI339785B TW I339785 B TWI339785 B TW I339785B TW 096111475 A TW096111475 A TW 096111475A TW 96111475 A TW96111475 A TW 96111475A TW I339785 B TWI339785 B TW I339785B
Authority
TW
Taiwan
Prior art keywords
multimode
uniform
generation circuit
clock generation
latency clock
Prior art date
Application number
TW096111475A
Other languages
English (en)
Other versions
TW200807218A (en
Inventor
Fadi Adel Hamdan
Jeffrey Herbert Fischer
Iii William James Goodall
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of TW200807218A publication Critical patent/TW200807218A/zh
Application granted granted Critical
Publication of TWI339785B publication Critical patent/TWI339785B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Pulse Circuits (AREA)
TW096111475A 2006-03-31 2007-03-30 Multimode, uniform-latency clock generation circuit TWI339785B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/394,557 US7301384B2 (en) 2006-03-31 2006-03-31 Multimode, uniform-latency clock generation circuit

Publications (2)

Publication Number Publication Date
TW200807218A TW200807218A (en) 2008-02-01
TWI339785B true TWI339785B (en) 2011-04-01

Family

ID=38370452

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096111475A TWI339785B (en) 2006-03-31 2007-03-30 Multimode, uniform-latency clock generation circuit

Country Status (7)

Country Link
US (1) US7301384B2 (zh)
EP (1) EP2005276B1 (zh)
JP (1) JP4927937B2 (zh)
KR (1) KR100986534B1 (zh)
CN (1) CN101495937B (zh)
TW (1) TWI339785B (zh)
WO (1) WO2007115173A2 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI793961B (zh) * 2020-01-14 2023-02-21 新唐科技股份有限公司 安全積體電路及其方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7395411B2 (en) * 2005-03-14 2008-07-01 Sony Computer Entertainment Inc. Methods and apparatus for improving processing performance by controlling latch points
CN101841324A (zh) * 2010-06-02 2010-09-22 四川和芯微电子股份有限公司 具有自动复位功能的移位分频器
CN102122922B (zh) * 2011-02-22 2014-05-21 雷良军 多模功率放大器及相应的移动通信设备
CN102394605A (zh) * 2011-11-23 2012-03-28 湖南南车时代电动汽车股份有限公司 一种igbt试验用脉冲发生方法及装置
CN104780594B (zh) * 2013-12-10 2019-05-14 马维尔国际有限公司 一种通信方法和装置以及用户设备
CN114764118A (zh) * 2021-01-14 2022-07-19 深圳比特微电子科技有限公司 测试电路、测试方法和包括测试电路的计算系统

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
US4851711A (en) * 1988-02-02 1989-07-25 International Business Machines Corporation Asymmetrical clock chopper delay circuit
EP0632384A1 (en) * 1993-06-30 1995-01-04 International Business Machines Corporation High speed and programmable array clock generator circuit for abist semiconductor memory chips
JPH07152454A (ja) * 1993-11-30 1995-06-16 Toshiba Corp 情報処理装置
DE29620919U1 (de) * 1996-12-02 1998-01-15 Siemens AG, 80333 München Schaltungsanordnung zur genauen Erfassung eines aus getakteten elektrischen Eingangsgrößen abgeleiteten Gleichstromes
JPH11122097A (ja) * 1997-10-15 1999-04-30 Toshiba Corp クロック分周回路及び論理回路装置
JP2000293504A (ja) * 1999-04-07 2000-10-20 Nec Corp 半導体装置
JP2001016079A (ja) * 1999-06-30 2001-01-19 Toshiba Lsi System Support Kk チョッパ型電圧比較回路
US7146517B2 (en) * 2002-05-02 2006-12-05 Cray, Inc. Clock pulse shaver with selective enable pulse width
JP2004213571A (ja) * 2003-01-08 2004-07-29 Sony Corp クロック制御装置、マイクロプロセッサ、電子機器及びクロック制御方法、並びにクロック制御プログラム
KR100546320B1 (ko) * 2003-02-27 2006-01-26 삼성전자주식회사 클럭 트리 합성 장치 및 방법
CN1328850C (zh) * 2003-05-19 2007-07-25 旺宏电子股份有限公司 巢状斩波电路及斩断模拟输入信号以供取样的方法
KR100499387B1 (ko) 2003-06-04 2005-07-04 엘지전자 주식회사 클럭신호의 지연을 이용한 클럭신호 위상변화 검출 장치및 방법
JP4242787B2 (ja) * 2004-01-20 2009-03-25 富士通株式会社 情報処理装置
US6850460B1 (en) * 2004-05-12 2005-02-01 International Business Machines Corporation High performance programmable array local clock generator
US7042672B2 (en) * 2004-09-30 2006-05-09 Agere Systems Inc. Velocity controlled disk drive head retraction with reduced audible noise

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI793961B (zh) * 2020-01-14 2023-02-21 新唐科技股份有限公司 安全積體電路及其方法

Also Published As

Publication number Publication date
US7301384B2 (en) 2007-11-27
US20070229134A1 (en) 2007-10-04
EP2005276B1 (en) 2019-07-17
EP2005276A2 (en) 2008-12-24
WO2007115173A2 (en) 2007-10-11
CN101495937A (zh) 2009-07-29
JP2009532779A (ja) 2009-09-10
TW200807218A (en) 2008-02-01
WO2007115173A3 (en) 2008-09-04
CN101495937B (zh) 2013-11-13
KR20080108330A (ko) 2008-12-12
JP4927937B2 (ja) 2012-05-09
KR100986534B1 (ko) 2010-10-07

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees