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TWI329352B
TWI329352B TW095150099A TW95150099A TWI329352B TW I329352 B TWI329352 B TW I329352B TW 095150099 A TW095150099 A TW 095150099A TW 95150099 A TW95150099 A TW 95150099A TW I329352 B TWI329352 B TW I329352B
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TW
Taiwan
Prior art keywords
photosensitive
wafer
glass substrate
layer
light
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Application number
TW095150099A
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Chinese (zh)
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TW200828529A (en
Inventor
Chien Hung Liu
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Xintec Inc
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Priority to TW095150099A priority Critical patent/TW200828529A/en
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Publication of TWI329352B publication Critical patent/TWI329352B/zh

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    • H10W72/012

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  • Solid State Image Pick-Up Elements (AREA)

Description

1329352 ' 九、發明說明: 【發明所屬之技術領域】 本發明係有關一種感光式晶片封裝構造及其製造方 法,尤旨一種可增加光線穿透率,以提高解析度之感光式 晶片封裝構造及其製造方法。 【先前技術】 隨著影音多媒體的盛行,數位影像設備相繼推出,器 • 關鍵核心零組件影像感測器的地位也日益重要。影像感測 杰主要負責將光的影像訊號轉換成電的訊號,而依感測元 件的類型通常可分為電荷耦合元件(Charge coupled Device ’簡稱CCD)影像感測器以及互補式金氧半導體 • (Complementary Metal Oxide Semiconductor,簡稱 CMOS) • 影像感測器等等。其中,由於互補式金氧半導體影像感測 裔具有低價位、低耗電量、晝素可隨機讀取以及高整合度 等優點,因此目前多被應用在拍照手機以及網路攝影機 ⑩ (webcam)等較為平價的產品中。 而笫十三圖係為習知影像感測器的剖面示意圖,該影 像感測器8 0之感光晶片8 1係配置在基底8 2中,其中 感光晶片8 1例如是由基底8 2中多數個具有p-n接面 (p-n junction)之光二極體(photo diode)所構成。更詳細 地說’感光晶片8 1通常是由基底8 2中的η型摻雜區、p 型摻雜區以及η型摻雜區與ρ型摻雜區之間自然形成之ρ_η 接面所構成。 内連線層(interconnection layer) 8 4係配置在基 5 2 ϋ ’且其中包含有許多金屬内連線以及位於這些金 間的介電層(圖中未標示),這些金屬内連線適 谁二二曰曰片8 1所接收到的訊號傳輸至電路板8 5 ’以 师里。而彩色濾光片8 6係以陣列排列方 =在内連線層84±,並對應至基底82中的感光晶 L 且母一彩色濾光片8 6上方均覆蓋有用以聚集光 、=微透鏡8 7,而微透鏡8 7之上方則配置有玻璃基板 ,並藉由支撐物8 9而與内連線層8 4連接。 外界光線9 1係經由微透鏡8 7以及彩色滤光片8 6 而入射至内連線層8 4卜進而被感光晶片δ i所接收。 ^此’内連線層8 4中的金屬内連線之佈局必須避開感光 曰曰片8 1的上方,以避免作為金屬内連線的金屬層(圖中未 標示)反射光線而降低感光晶片8丄所感測到光線強度,所 以製程上較為繁雜。 私此外,内連線層8 4中的介電層(圖中未標示)亦會阻 擋部份的入射光線(亦即吸收或反射光線),而使光線強度 在内連線層8 4中逐漸衰減,進而導致感光晶片8 i所感 測到光線強度不足。 【發明内容】 有鑑於此’本發明之主要目的即在提供一種可增加光 線牙透率,以提高解析度之感光式晶片封裝構造及其製造 方法。 貫施時,該晶圓一側利用接合層建構有感光晶片,該 感光晶片上方則設有彩色濾光陣列,另有—設有堰牆之玻 1329352 ' 璃基板,該玻璃基板並覆蓋於彩色濾光陣列上方,同時利 • 用玻璃基板與彩色濾光陣列形成一適當間隙,藉由建構於 曰曰圓上方之感光晶片直接接收光線,可增加光線之穿透率。 【實施方式】 ^ 本發明之特點,可參閱本案圖式及實施例之詳細 說明而獲得清楚地瞭解。 本發明「感光式晶片封裝構造及其製造方法」,該感光 春 式B曰片封裝構造1〇其基本結構組成如第一圖所示,其至 少包含有: —晶圓1,係設有第一、二表面11、12,其第一 表面1 1藉由設有接合層2與數個感光晶片3結合。 數個感光晶片3,各感光晶片3間具有間隔3 1,藉 • 由接合層2設置於晶圓1之第一表面11上,其各感光 晶片3上方分別設有彩色濾光陣列4。 彩色濾光陣列4,係利用接合層2分別設置於各感光 φ 晶片3上方。 玻璃基板5,其玻璃基板5 —側係設有複數堰牆5 1並藉由该堰牆5 1設置於各感光晶片3之間隔3 1處 上方,並使玻璃基板5與彩色濾光陣列4形成一適當間 隙,其中該堰牆5 1係為光阻材料(例如防焊綠漆)。 力而晶圓1之第二表面1 2依序建構有基板6 i、第一 絕緣層6 2、導電層6 3,以及最外圍的第二絕緣層6 4 與电路接腳6 5,各電路接腳6 5係穿過第二絕緣層6 4 與導電層6 3接觸,再透過導電層6 3構成晶圓工與電路 7 接腳6 5之間的電性聯 造ίο與印刷電路板聯結的=為°亥感先式晶片封裝構 蝴光線構:增: = = = = ;圓二:減 攝=裝;高該解析度以及具心素之=於 第二二流程係如 合層2上建構有複二ΐ片面^㈣合層2 ’並於接 晶片3間具有間隔^曰片3,如弟二圖所示,各感光 4 上利用接合層2設置彩色嶋列 示 有堪牆51之玻璃基板5,如第四圖所 玻璃基板5—側係設有複數堰牆51。 ^將該玻璃基板5覆蓋於彩色壚光陣列4上方, 五圖所不,且各堰牆5丄俦执 堪牆5 1使Λ 間隔3 1處’並利用該 隙。· 土板5舁彩色濾光陣列4形成一適當間 崎光:、片基步Γ如第六圖所示,係於晶圓1相對應於 钬九日日片3之苐二表面1 ο过丄&人 1,該基板6 1亦可以為破心質:層2黏者有-基板6 其板I弟建構步驟如第七圖(Α)'⑻所示,係於 =6 1上塗佈有絕緣材料6 2工 6二可以為光阻劑或樹脂,並且施以適當6:二 後’再利料光顯影方式於基板61之特^^形成第一 οι 絕緣層6 2。 第二缘第;二割步驟如第八圖所示,係於基板6 i異於 :彖2處形成有第—道凹溝7工,該第一道凹溝 7 1的冰度係以接觸到堪牆5 1或伸人堰牆5工。 層塗圖所示,係在第-絕緣層62底 6丄:iJ導電層63的金屬材料,且該導電層 〇 d係乙伸至弟一迢凹溝7丄表面。 声6 Γ的第广H層建構如第十圖⑴、⑻所示,係在導電 層fs 3的底層塗佈絕緣材料以形成第二絕緣層6 4,此第 同樣為光阻劑或樹脂,並且利用曝光、顯二 道6 4 1广構有用以供導電層6 3與電路接腳接續的通 h、設置電路接腳如第十—圖所示,於通道 接腳65,其電路接腳6 5係穿過第二絕緣心 =6 5之間的電性聯結,並可做為該感光 ': 仏與印刷電路板聯結的焊點。 7表構 !,第二次切割步驟如第十二圖所示,於第一 =形成有伸入玻璃基板5之第二道凹溝,以 二片3分離,使每一個感光式晶片封裝構造1 0成為二 正勺個體;當然,感光式晶片封裝構造χ Q單 ^ 此步驟同樣可省去。 展守 本項= 技㈣點巳揭示如上,然而熟悉 本宰創I 發明之揭示而作各種不背離 Ί乍精狀㈣及修#。因此,本發明之保護範圍應 1329352 不限於實施例所揭示者,而應包括各種不背離本發明之替 換及修飾,並為以下之申請專利範圍所涵蓋。 【圖式簡單說明】 、 第一圖係為本發明中感光式晶片封裝構造結構剖視圖。 第二圖係為本發明中晶圓設置感光晶片之加工步驟示意 圖。 第三圖係為本發明中感光晶片設置彩色遽光陣列之加工步 驟示意圖。 第四圖係為本發明中玻璃基板之結構示意圖。 第五圖係為本發明中玻璃基板覆蓋於彩色濾光陣列之加工 步驟示意圖。 第六圖係為本發明中基板黏著加工步驟示意圖。 第七圖(A)、(B)係為本發明中第一絕緣層建構加工步驟示 意圖。 第八圖係為本發明中第一次切割加工步驟示意圖。 第九圖係為本發明中導電層加工步驟示意圖。 第十圖(A)、(B)係為本發明中第二絕緣層加工步驟示意圖。 第十一圖係為本發明中設置電路接腳加工步驟示意圖。 第十二圖係為本發明中第二次切割加工步驟示意圖。 第十三圖係為習知影像感測器的剖面示意圖。 【主要元件代表符號說明】 10--感光式晶片封裝構造 1329352 11 --第一表面 12 —第二表面 2 ---接合層 3 ---感光晶片 3 1--間隔 4 ---彩色濾光陣列 5 玻璃基板 5 1--堪牆 _ 6 1--基板 6 2--第一絕緣層 6 2 1一絕緣材料 6 3——導電層 6 4--第二絕緣層 641一通道 65--電路接腳 7 1--第一道凹溝 鲁 7 2--第二道凹溝 8 0 —^一影像感測器 8 1--感光晶片 8 2--基底 8 4--内連線層 8 5—一電路板 8 6--彩色濾光片 8 7--微透鏡 8 8--玻璃基板 1329352 8 9--支撑物 9 1 外界光線1329352 ' IX Technical Description The present invention relates to a photosensitive chip package structure and a method of fabricating the same, and a photosensitive chip package structure capable of increasing light transmittance and improving resolution Its manufacturing method. [Prior Art] With the prevalence of audio-visual multimedia, digital imaging devices have been introduced one after another, and the status of key core component image sensors is becoming increasingly important. Image Sensing is mainly responsible for converting optical image signals into electrical signals, and depending on the type of sensing components, it can be generally divided into Charge Coupled Devices (CCD) image sensors and complementary MOS semiconductors. (Complementary Metal Oxide Semiconductor, CMOS for short) • Image sensor and so on. Among them, because the complementary MOS image sensing people have the advantages of low price, low power consumption, random reading of the elements, and high integration, they are currently used in camera phones and webcams 10 (webcam). ) and other relatively cheap products. The thirteenth figure is a schematic cross-sectional view of a conventional image sensor. The photo sensor 80 of the image sensor 80 is disposed in the substrate 82, wherein the photosensitive wafer 81 is, for example, a majority of the substrate 8. A photo diode having a pn junction. In more detail, the photosensitive wafer 8 1 is generally composed of an n-type doped region, a p-type doped region, and a naturally formed ρ_η junction between the n-type doped region and the p-type doped region in the substrate 82. . An interconnecting layer 8 4 is disposed at the base 5 2 ϋ ' and includes a plurality of metal interconnects and a dielectric layer (not shown) between the golds. The signal received by the second and second cymbals 8 1 is transmitted to the circuit board 8 5 'in the division. The color filter 86 is arranged in an array of the inner wiring layer 84±, and corresponds to the photosensitive crystal L in the substrate 82 and the mother color filter 86 is covered to gather light, = micro A lens 87 is disposed above the microlens 8 7 and is connected to the interconnect layer 84 by a support 88. The external light ray 9 is incident on the interconnect layer 8 4 via the microlens 87 and the color filter 86, and is received by the photosensitive wafer δ i . ^ The layout of the metal interconnects in the 'interconnect layer 8 4 must be avoided above the photosensitive cymbal 8 1 to avoid reflection of light as a metal interconnect (not shown) to reduce sensitization The light intensity is sensed by the wafer 8 ,, so the process is complicated. In addition, the dielectric layer (not shown) in the interconnect layer 84 also blocks part of the incident light (ie, absorbs or reflects light), and the light intensity gradually increases in the interconnect layer 84. Attenuation, which in turn causes insufficient light intensity to be sensed by the photosensitive wafer 8 i. SUMMARY OF THE INVENTION In view of the above, it is a primary object of the present invention to provide a photosensitive wafer package structure and a method of fabricating the same that can increase the optical pickup rate to improve the resolution. During the application, a photosensitive wafer is constructed on one side of the wafer by using a bonding layer, a color filter array is disposed above the photosensitive wafer, and a glass substrate 1329352' glass substrate is provided on the wafer, and the glass substrate is covered with color. Above the filter array, a suitable gap is formed between the glass substrate and the color filter array, and the light transmittance is increased by directly receiving the light from the photosensitive wafer constructed above the circle. [Embodiment] The features of the present invention can be clearly understood by referring to the drawings and the detailed description of the embodiments. In the present invention, a photosensitive wafer package structure and a method for fabricating the same, the photosensitive spring B package structure 1 has a basic structural composition as shown in the first figure, and includes at least: a wafer 1 The first and second surfaces 11, 12 are joined to the first surface 11 by a bonding layer 2 and a plurality of photosensitive wafers 3. A plurality of photosensitive wafers 3 each having a space 3 1 between the photosensitive wafers 3 are provided on the first surface 11 of the wafer 1 by the bonding layer 2, and a color filter array 4 is disposed above each of the photosensitive wafers 3. The color filter array 4 is disposed above each of the photosensitive φ wafers 3 by the bonding layer 2. The glass substrate 5 has a plurality of walls 5 1 on the side of the glass substrate 5 and is disposed above the interval 31 of each of the photosensitive wafers 3 by the wall 51, and the glass substrate 5 and the color filter array 4 are disposed. A suitable gap is formed, wherein the crucible wall 51 is a photoresist material (for example, a solder resist green paint). The second surface 12 of the wafer 1 is sequentially constructed with a substrate 6 i , a first insulating layer 6 2 , a conductive layer 63 , and a second outermost insulating layer 64 4 and a circuit pin 6 5 , each circuit The pin 6 5 is in contact with the conductive layer 63 through the second insulating layer 64, and then communicates with the conductive layer 63 to form an electrical connection between the waferr and the circuit 7 pin 65. = = is the first sense of the wafer package structure of the light structure: increase: = = = =; circle two: minus the = installed; high resolution and the heart = in the second two process system such as the layer 2 The upper structure has a complex two-sided surface ^ (four) combined layer 2 ' and has a gap between the connected wafers 3, as shown in the second figure, each photosensitive layer 4 is provided with a color layer on the bonding layer 2, showing a wall 51 The glass substrate 5, as shown in the fourth embodiment, is provided with a plurality of walls 51. The glass substrate 5 is overlaid on the color light-emitting array 4, which is not shown in Fig. 5, and each of the walls 5 is configured to be spaced apart from the wall by 1 ' and to utilize the gap. · The earthen 5 舁 color filter array 4 forms a suitable smear: the base step is as shown in the sixth figure, and the wafer 1 corresponds to the surface of the 钬 日 片 3 3 ο ο ο ο ο & person 1, the substrate 6 1 can also be broken core: layer 2 sticky - substrate 6 its plate I brother construction step as shown in the seventh figure (Α) ' (8), is coated on = 6 1 The insulating material 6 2 can be a photoresist or a resin, and the first insulating layer 6 2 is formed on the substrate 61 by applying a suitable 6:2. The second edge is as shown in the eighth figure, and is formed on the substrate 6 i: a first groove is formed at the 彖 2, and the ice of the first groove 7 1 is contacted. Go to the wall 5 1 or stretch the wall 5 work. As shown in the layer coating, the metal material of the conductive layer 63 is formed on the bottom of the first insulating layer 62, and the conductive layer 〇 d is extended to the surface of the ridge. As shown in the tenth (1) and (8), the insulating layer of the conductive layer fs 3 is coated with an insulating material to form a second insulating layer 64, which is also a photoresist or a resin. And using the exposure, the display circuit is widely used for the conductive layer 63 to connect with the circuit pin, the circuit pin is set as shown in the tenth-figure, at the channel pin 65, the circuit pin 6 5 is an electrical connection between the second insulation core = 65, and can be used as the solder joint of the photosensitive ': 联 connected to the printed circuit board. 7: The second cutting step is as shown in Fig. 12, in the first = formed with a second groove extending into the glass substrate 5, separated by two sheets 3, so that each photosensitive wafer package structure 10 0 becomes a two-piece individual; of course, the photosensitive chip package structure χ Q single ^ This step can also be omitted. This item = skill (4) points to reveal the above, but familiar with the disclosure of this invention, and does not deviate from the fine (4) and repair #. Therefore, the scope of the present invention should be construed as being limited to the scope of the invention, which is not limited by the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS The first drawing is a cross-sectional view showing a structure of a photosensitive wafer package in the present invention. The second figure is a schematic view of the processing steps for arranging a photosensitive wafer on a wafer in the present invention. The third figure is a schematic view of the processing steps of providing a color-lighting array for the photosensitive wafer in the present invention. The fourth figure is a schematic structural view of the glass substrate in the present invention. The fifth figure is a schematic diagram of the processing steps of the glass substrate covering the color filter array in the present invention. The sixth figure is a schematic diagram of the steps of substrate adhesion processing in the present invention. The seventh (A) and (B) are schematic views showing the steps of constructing the first insulating layer in the present invention. The eighth figure is a schematic diagram of the first cutting process step in the present invention. The ninth drawing is a schematic view of the processing steps of the conductive layer in the present invention. The tenth (A) and (B) are schematic views showing the processing steps of the second insulating layer in the present invention. The eleventh figure is a schematic diagram of the steps of processing the circuit pins in the present invention. The twelfth figure is a schematic view of the second cutting process step in the present invention. The thirteenth image is a schematic cross-sectional view of a conventional image sensor. [Description of main component representative symbols] 10--Photosensitive chip package structure 13329352 11 - First surface 12 - Second surface 2 - Bonding layer 3 - Photosensitive wafer 3 1--Interval 4 --- Color filter Light Array 5 Glass Substrate 5 1-- Can Wall _ 6 1--Substrate 6 2--First Insulation Layer 6 2 1 Insulation Material 6 3 - Conductive Layer 6 4--Second Insulation Layer 641 One Channel 65- -circuit pin 7 1--first groove groove 7 2 - second groove 8 0 -^ image sensor 8 1--photosensitive wafer 8 2--base 8 4--interconnect Layer 8 5 - a circuit board 8 6 - color filter 8 7 - microlens 8 8--glass substrate 1332932 8 9 - support 9 1 external light

Claims (1)

1329352 十、申請專利範圍: 1、一種感光式晶片封裝構造.,其至少包含 一晶圓,係設有第一、二表面,1 接合層與數個感光晶片結合; “ λ面猎由設有 數個感光晶片’各感光晶片間具 層設置於晶圓之第—表面上,其 ;接口 彩色濾、光陣列; σ Μ曰曰片上方分別設有 玻璃基板,其玻璃基板一側係設有 由該堰牆設置於各残光s Μ 門 區片回’亚淨曰 與彩色遽光陣列;處上方’並使玻璃基板 ===與電路接腳’各電路接崎過第二 3、如請求項1所述感光式晶片封 色1陣列係利用接合層分別設置於各感光Γ片上方_ 牆係為光=項1所述感光式晶片封裝構造,其中㈣ 阻材所述感光式晶片封裝構造’其㈣ 驟:6、一種感光式晶片封裝之製造方法,係包括下列步 :晶Γ晶圓—側設置接合層’並於接合層上建構有複數感 b'於感光晶片上設置彩色濾光陣列; 131329352 X. Patent application scope: 1. A photosensitive wafer package structure. The method comprises at least one wafer, which is provided with first and second surfaces, and a bonding layer is combined with a plurality of photosensitive wafers; Each of the photosensitive wafers is disposed on the first surface of the wafer, and is connected to the color filter and the light array; the σ Μ曰曰 is respectively provided with a glass substrate, and the glass substrate is provided with a side The wall is placed in each residual light s Μ door area back to the 'Asian 曰 and color 遽 light array; at the top 'and the glass substrate === and the circuit pin' each circuit is connected to the second 3, as requested The photosensitive wafer-encapsulated color array 1 of the first embodiment is disposed on each of the photosensitive cymbals by a bonding layer. The wall-type is a photosensitive wafer package structure of the light=Item 1, wherein (4) the resistive material of the photosensitive wafer package structure [Fourth (4) Step: 6. A method for manufacturing a photosensitive wafer package comprises the steps of: wafer wafer-side setting bonding layer and constructing a complex sense b' on the bonding layer to provide color filtering on the photosensitive wafer Array; 13
TW095150099A 2006-12-29 2006-12-29 Package structure of photosensitive chip and the making method thereof TW200828529A (en)

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TWI329352B true TWI329352B (en) 2010-08-21

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