TW200828529A - Package structure of photosensitive chip and the making method thereof - Google Patents
Package structure of photosensitive chip and the making method thereof Download PDFInfo
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- TW200828529A TW200828529A TW095150099A TW95150099A TW200828529A TW 200828529 A TW200828529 A TW 200828529A TW 095150099 A TW095150099 A TW 095150099A TW 95150099 A TW95150099 A TW 95150099A TW 200828529 A TW200828529 A TW 200828529A
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- Solid State Image Pick-Up Elements (AREA)
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200828529 九、發明說明: 【發明所屬之技術領域】 本,明係有關一種感光式晶片封裝構造及其製造方 /曰μ尤日—種可增加光線穿透率,以提高解析度之感光式 日日片封裝構造及其製造方法。 【先前技術】200828529 IX. Inventive description: [Technical field of invention] This is a photosensitive wafer package structure and its manufacturing method/曰μ尤-species type of photosensitive day that can increase the light transmittance to improve the resolution. Japanese package structure and its manufacturing method. [Prior Art]
Ik著影音多媒體的盛行,數位影像設備相繼推出,器 ,鍵核心零組件影像感測器的地位也日益重要。影像感測 為主要負責將光的影像訊號轉換成電的訊號,而依感測元 件的類型通常可分為電荷耦合元件(Charge c〇upled Device,簡稱CCD)影像感測器以及互補式金氧半導體 (Complementary Metal Oxide Semiconductor,簡稱 CMOS) 影像感測器等等。其中,由於互補式金氧半導體影像感測 器具有低價位、低耗電量、晝素可隨機讀取以及高整合度 等優點,因此目前多被應用在拍照手機以及網路攝影機 (webcam)等較為平價的產品中。 而第十三圖係為習知影像感測器的剖面示意圖,該影 像感測器8 0之感光晶片8 1係配置在基底8 2中,其中 感光晶片8 1例如是由基底8 2中多數個具有p-n接面 (P-n junction)之光二極體(photo diode)所構成。更詳細 地說,感光晶片8 1通常是由基底8 2中的η型摻雜區、p 型摻雜區以及η型摻雜區與ρ型摻雜區之間自然形成之ρ_η 接面所構成。 内連線層(interconnection layer) 8 4係配置在基 5 200828529 底82上,且其中包含有許多金屬内連線以及位於這些金 屬内連線之間的介電層(圖t未標示),這些金屬内連線適 感光aa片8 1所接收到的訊號傳輸至電路板8 $,以 ^行後續之影像處理。而彩色遽光片8 6係以陣列排列方 ^在内連線層84上,並對應至基底82中的感光晶 = 且每一彩色遽光片86上方均覆蓋有用以聚集光 2微透鏡f 7 .,,而微透鏡8 7之上方則配置有玻璃基板 亚猎由支撐物8 9而與内連線層8 4連接。 2界光線9 1係經由微透鏡8 7以及彩色濾、光片8 6 1=3線層84中’進而被感光晶片81所接收。 曰月8 6 "層8 4中的金屬内連線之佈局必須避開感光 二ΛΛ方,以避免作為金屬内連線的金屬層(圖中未 低感光晶片81所感測到光線強度,所 此外’内連線層8 4中的介電層(圖中未 擒部份的人射光線(亦即吸收或反射光線),㈣光線^度 在内連線層8 4中逐漸衰減’進而導致残 、;= 測到光線強度不足。 &先曰曰片8 1所感 【發明内容】 有鐘於此,本發明之主要目的即 線穿透率,以提高解析度之感光式=f-種可增加光 方法。 乂九式日日片封裝構造及其製造 實施時,該晶圓一側利用接合岸速 感光晶片上方則設有彩色濾光陣列:有感光晶片’該 早歹j,另有一設有堰牆之玻 200828529 璃基板,該玻璃基板並覆蓋於彩色濾光陣列上方,同時 用玻璃基板與彩色濾光陣列形成一適當間隙,藉由建^於 晶圓上方之感光晶片直接接收光線,可增加光線之穿透率、。 【實施方式】 圖式及實施例之詳細 本發明之特點,可參閱本案 說明而獲得清楚地瞭解。 、本發明「感光式晶片封裝構造及其製造方法」,該感光 式晶片封裝構造1〇其基本結構組成如第一圖所示,盆 少包含有: 〃 曰曰圓1,係设有弟一、二表面11、12,其第一 表面1 1藉由設有接合層2與數個感光晶片3結合。 數個感光晶片3,各感光晶片3間具有間隔3工,藉 接合層2設置於晶圓i之第一表面丄工上,其各感‘ 晶片3上方分別設有彩色濾光陣列4。 曰彩色濾光陣列4,係利用接合層2分別設置於各感光 晶片3上方。 一 :玻璃基板5,其玻璃基板5—侧係設有複數堰牆5 1,亚藉由該堰牆5 1設置於各感光晶片3之間隔3丄處 ^方,並使玻璃基板5與彩色濾光陣列4形成一適當間 隙其中该堰踏5 1係為光阻材料(例如防焊綠漆)。 ^而曰曰圓1之第二表面1 2依序建構有基板6 1、第一 j層6 2、導電層6 3,以及最外圍的第二絕緣層6 4 2路接腳6 5,各電路接腳6 5係穿過第二絕緣層6 4 /、$兒層6 3接觸,再透過導電層6 3構成晶圓丄與電路 200828529Ik is popular with audio and video multimedia, and digital imaging devices have been introduced one after another. The status of the device and key core component image sensors is also becoming increasingly important. The image sensing is mainly responsible for converting the optical image signal into an electrical signal, and the type of the sensing component can be generally divided into a Charge Coupled Device (CCD) image sensor and a complementary gold oxide. Semiconductor (Complementary Metal Oxide Semiconductor, CMOS for short) image sensor and so on. Among them, because the complementary MOS image sensor has the advantages of low price, low power consumption, random readability and high integration, it is currently used in camera phones and webcams. Wait for more affordable products. The thirteenth figure is a schematic cross-sectional view of a conventional image sensor. The image sensor 80 of the image sensor 80 is disposed in the substrate 82, wherein the photosensitive wafer 81 is, for example, a majority of the substrate 8. A photo diode having a pn junction (Pn junction). In more detail, the photosensitive wafer 81 is generally composed of an n-type doped region, a p-type doped region, and a naturally formed ρ_η junction between the n-type doped region and the p-type doped region in the substrate 82. . An interconnect layer 8 4 is disposed on the base 82 of the base 5 200828529 and includes a plurality of metal interconnects and a dielectric layer between the metal interconnects (not shown). The metal interconnect is adapted to transmit the signal received by the aa chip 8 1 to the circuit board 8 $ to perform subsequent image processing. The color light-emitting film 8 6 is arranged in an array on the inner wiring layer 84, and corresponds to the photosensitive crystal in the substrate 82 = and each color light-emitting sheet 86 is covered with a light to collect the light 2 microlens f 7 . . . , and above the microlens 8 7 , a glass substrate is arranged to be connected to the interconnect layer 8 4 by the support 8 9 . The boundary light 9 1 is received by the photosensitive wafer 81 via the microlens 8 7 and the color filter, the optical film 8 6 1 = the 3-line layer 84. The layout of the metal interconnects in the layer 8 4 "layer 8 4 must avoid the photosensitive bismuth side to avoid the metal layer as the metal interconnect (the light intensity is not detected by the low-sensing wafer 81 in the figure). In addition, the dielectric layer in the interconnect layer 804 (the unmanned portion of the figure emits light (that is, absorbs or reflects light), and (4) the ray gradually decays in the interconnect layer 804, thereby causing Residual,; = Insufficient light intensity is detected. & first smear 8 1 sense [Summary of the invention] In this case, the main purpose of the present invention is the line penetration rate to improve the resolution of the photosensitive type = f-species The optical method can be added. When the 乂 式 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日 日The glass substrate of the 200828529 glass substrate is disposed on the glass substrate and covers the color filter array. At the same time, a suitable gap is formed between the glass substrate and the color filter array, and the light is directly received by the photosensitive wafer built on the wafer. Can increase the penetration rate of light. DETAILED DESCRIPTION OF THE INVENTION The features of the present invention can be clearly understood by referring to the description of the present invention. The "photosensitive wafer package structure and manufacturing method thereof" of the present invention, the photosensitive chip package structure The structure is as shown in the first figure, and the basin contains less than: 〃 曰曰 1 , which is provided with the first and second surfaces 11 and 12 , and the first surface 1 1 is provided with the bonding layer 2 and a plurality of photosensitive wafers 3 combined with a plurality of photosensitive wafers 3, each of the photosensitive wafers 3 has a gap between three, and the bonding layer 2 is disposed on the first surface of the wafer i, and each of the senses is respectively provided with a color filter array above the wafer 3. 4. The color filter array 4 is disposed on each of the photosensitive wafers 3 by using the bonding layer 2. One: the glass substrate 5, the glass substrate 5 is provided with a plurality of walls 5, and the wall is 5 1 is disposed at a distance of 3 各 of each photosensitive wafer 3, and forms a suitable gap between the glass substrate 5 and the color filter array 4, wherein the step 51 is a photoresist material (for example, solder resist green paint). ^ The second surface 1 2 of the circle 1 is sequentially constructed with a substrate 6 1 , first j layer 6 2, conductive layer 63, and the outermost second insulating layer 6 4 2 way pin 6 5, each circuit pin 6 5 through the second insulating layer 6 4 /, $ layer 6 3 contact And through the conductive layer 63 to form the wafer defect and circuit 200828529
If間的電性聯結,並可做為該感光式晶片封裝構 以10興印刷電路板聯結的焊點。 少阻構成^域光元件直接建構於晶圓上,可減 2 、",以增加光線穿透率以及感光效能,而應用於 Ϊ:裝:時可提高該解析度以及具有高晝素之優點。 第一 μ j個感光^晶片封裝構造1㈣封裝流程係如 弟一圖及弟十二圖所示,係依序包括有: 1设置接合層2,並於接 ’如第二圖所示,各感光 a、於晶圓1之第一表面工 合層2上建構有複數感光晶片3 晶片3間具有間隔3 1。 b、於感光晶片 4,如第三圖所示。 3上利用接合層2設置彩色濾光陣列 _ 提供-設麵牆51之玻璃基板5,如第四 不’该玻璃基板5一側係設有複數堰牆5 1。 d、將該玻璃基板5覆蓋於彩色濾、光陣列4上方,如第 五圖所示,且各堰牆5 1係設置於間隔3 1處,並利用該 堰牆5 1使玻璃基板5與彩色濾光陣列4形成—適當間 、、/、基板黏著步驟如第六圖所*,係於晶圓1相對應於 感光晶片3之第二表面1 2藉由接合層2黏著有-基板6 1,該基板6 1亦可以為玻璃材質。 土 卜第一絕緣層建構步驟如第七圖(A)、(B)所示,係於 基板6 1上塗佈有絕緣材料6 2 1,於實施時,絕緣材料 6 2 1可以為光阻劑或樹脂,並且施以適當的平坦化處理 後,再利料絲影方式於基板6丨之特定位置形成 200828529 絕緣層6 2。 第一 第八輸,係於基板6 1異於 7! ΛΛ、Γ 處成有第—道凹溝7 1,該第-道m、、兽 、冰度係以接觸到堰牆5丄或伸人/ h、導電層建構如第劣同a - y 層塗佈-層做為封裝導電;不的:二第-絕緣層6 2底 讓延伸至第一道:溝B =金屬材料’且該導電層 声6 層建構如第十圖(A)、⑻所示,係在導電 緣材料以形成第二絕緣層64,:第 等加工方式建構有用以:;=:;:利用曝光、顯影 道641。 、6 3,、电路接腳接續的通 盥導電声6 3偏Πί Ρ6 5係穿過第二絕緣層6 4 /、冷电層b 3接觸,再透過導電 ◦斗 接腳6 5之間的電性聯結,並可 與電路 造與印刷電路板聯結的烊點。…1光式晶片封裝構 1、第二次切割步驟如第十二圖所示,於… 1處形成有伸入玻璃基板5之第二道凹溝7遏凹溝7 光晶片3分離,使每一個感光式晶片封;感 整的個體;當然,感光式晶片封裝構造軍0 =完 此步驟同樣可省去。 早獨封4時, 本發明之技術内容及技術特點巳揭示如上, 本項技術之人士仍可能基於本發明之揭示而作久二无、心 本案創作精神之㈣及料。因此,本發㈣護】= 200828529 不限於實施例所揭示者,而應包括各種不背離本發明之替 換及修飾,並為以下之申請專利範圍所涵蓋。 【圖式簡單說明】 第一圖係為本發明中感光式晶片封裝構造結構剖視圖。 弟^一^圖係為本發明中晶圓設置感光晶片之加工步驟不意 圖。 第三圖係為本發明中感光晶片設置彩色濾光陣列之加工步 驟示意圖。 第四圖係為本發明中玻璃基板之結構示意圖。 第五圖係為本發明中玻璃基板覆蓋於彩色濾光陣列之加工 步驟示意圖。 第六圖係為本發明中基板黏著加工步驟示意圖。 第七圖(A)、(B)係為本發明中第一絕緣層建構加工步驟示 意圖。 第八圖係為本發明中第一次切割加工步驟示意圖。 第九圖係為本發明中導電層加工步驟示意圖。 第十圖(A)、(B)係為本發明中第二絕緣層加工步驟示意圖。 第十一圖係為本發明中設置電路接腳加工步驟示意圖。 第十二圖係為本發明中第二次切割加工步驟示意圖。 第十三圖係為習知影像感測器的剖面示意圖。 【主要元件代表符號說明】 10 感光式晶片封裝構造 1 晶圓 10 200828529 1 1 第一表面 1 2--第二表面 2 ---接合層 3 感光晶片 3 1 間隔 4 彩色濾光陣列 5 玻璃基板 5 1--堰牆 6 1 基板 6 2——第一絕緣層 6 2 1一絕緣材料 6 3——導電層 64——第二絕緣層 6 4 1 一通道 6 5——電路接腳 71 第一道凹溝 7 2--第二道凹溝 8 0 影像感測器 8 1 感光晶片 8 2 基底 8 4--内連線層 8 5--電路板 8 6--彩色滤光片 8 7 微透鏡 8 8--玻璃基板 11 200828529 •89--支撐物 9 1--外界光線The electrical connection between If can be used as the solder joint of the photosensitive chip package. The low-resistance constituting the optical component is directly constructed on the wafer, and can be reduced by 2, " to increase the light transmittance and the light-sensing performance, and is applied to the Ϊ: loading: the resolution can be improved and the high-quality advantage. The first μ j photosensitive chip package structure 1 (four) package process is shown in the figure of the brother and the figure 12, and includes the following steps: 1Set the bonding layer 2, and connect it as shown in the second figure, Photosensitive a, a plurality of photosensitive wafers 3 are formed on the first surface working layer 2 of the wafer 1 and have a spacing 31 between the wafers 3. b. On the photosensitive wafer 4, as shown in the third figure. The color filter array is provided by the bonding layer 2, and the glass substrate 5 of the surface wall 51 is provided, and the glass substrate 5 is provided with a plurality of walls 5 1 on the side of the glass substrate 5. d. The glass substrate 5 is covered on the color filter and the light array 4, as shown in FIG. 5, and each of the walls 5 1 is disposed at the interval 31, and the glass substrate 5 is made by using the wall 51. The color filter array 4 is formed, and the substrate adhesion step is as shown in FIG. 6 , and the wafer 1 is bonded to the second surface 1 of the photosensitive wafer 3 by the bonding layer 2 - the substrate 6 is adhered 1. The substrate 61 may also be made of glass. The first insulating layer construction step of the soil is as shown in the seventh (A) and (B), and the insulating material 6 2 1 is coated on the substrate 6 1 . In practice, the insulating material 6 2 1 may be a photoresist. After the agent or the resin is applied, a suitable planarization treatment is performed, and a 200828529 insulating layer 62 is formed at a specific position of the substrate 6丨 by a silking method. The first and eighth transmissions are on the substrate 6 1 different from 7! ΛΛ, 处 at the first channel groove 7 1, the first track m, the beast, the ice system is in contact with the 堰 wall 5 丄 or Human / h, the conductive layer is constructed as the same as the a- y layer coating-layer as the package conductive; no: the second-insulation layer 6 2 bottom extends to the first track: groove B = metal material 'and The sound layer 6 layer is constructed as shown in the tenth (A) and (8), and is formed on the conductive edge material to form the second insulating layer 64. The second processing method is useful for::=:;: using exposure and development 641. , 6 3, the circuit pin is connected to the overnight conductive sound 6 3 bias Π 5 6 5 is passed through the second insulating layer 6 4 /, the cold layer b 3 contacts, and then through the conductive bucket pin 6 5 Electrical connection, and can be connected with the circuit to create a printed circuit board. ...1 optical wafer package structure 1, the second cutting step is as shown in Fig. 12, and a second groove 7 extending into the glass substrate 5 is formed at 1 to form a concave groove 7 to separate the optical wafer 3, so that Each photosensitive wafer seal; a sensed individual; of course, the photosensitive chip package construction army 0 = this step can also be omitted. The technical content and technical features of the present invention are disclosed in the foregoing, and the person skilled in the art may still use the disclosure of the present invention to make a long-term and non-existent spirit. Therefore, the present invention is not limited to the embodiments disclosed, but includes various alternatives and modifications without departing from the invention, and is covered by the following claims. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a cross-sectional view showing a structure of a photosensitive wafer package in the present invention. The method of processing the photosensitive wafer of the wafer in the present invention is not intended. The third figure is a schematic view of the processing steps of providing a color filter array for the photosensitive wafer in the present invention. The fourth figure is a schematic structural view of the glass substrate in the present invention. The fifth figure is a schematic diagram of the processing steps of the glass substrate covering the color filter array in the present invention. The sixth figure is a schematic diagram of the steps of substrate adhesion processing in the present invention. The seventh (A) and (B) are schematic views showing the steps of constructing the first insulating layer in the present invention. The eighth figure is a schematic diagram of the first cutting process step in the present invention. The ninth drawing is a schematic view of the processing steps of the conductive layer in the present invention. The tenth (A) and (B) are schematic views showing the processing steps of the second insulating layer in the present invention. The eleventh figure is a schematic diagram of the steps of processing the circuit pins in the present invention. The twelfth figure is a schematic view of the second cutting process step in the present invention. The thirteenth image is a schematic cross-sectional view of a conventional image sensor. [Description of main component representative symbols] 10 Photosensitive chip package structure 1 Wafer 10 200828529 1 1 First surface 1 2--Second surface 2 --- Bonding layer 3 Photosensitive wafer 3 1 Space 4 Color filter array 5 Glass substrate 5 1--堰Wall 6 1 Substrate 6 2 - First insulating layer 6 2 1 Insulating material 6 3 - Conductive layer 64 - Second insulating layer 6 4 1 One channel 6 5 - Circuit pin 71 a groove 7 2--second groove 80 image sensor 8 1 light sensor 8 2 substrate 8 4--internal layer 8 5--circuit board 8 6--color filter 8 7 Microlens 8 8--Glass substrate 11 200828529 • 89--Support 9 1--External light
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