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TWI327235B - Lcd panel and array substrate and the method for forming the array substrate - Google Patents

Lcd panel and array substrate and the method for forming the array substrate Download PDF

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Publication number
TWI327235B
TWI327235B TW96103086A TW96103086A TWI327235B TW I327235 B TWI327235 B TW I327235B TW 96103086 A TW96103086 A TW 96103086A TW 96103086 A TW96103086 A TW 96103086A TW I327235 B TWI327235 B TW I327235B
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array substrate
block
substrate
color
layer
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TW96103086A
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Chinese (zh)
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TW200831959A (en
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Chi Hua Sheng
Wei Chih Lien
Su Hung Huang
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Au Optronics Corp
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Description

1327235 • 九、發明說明: . 【發明所屬之技術領域】 本發明係關於一種陣列基板,特別是關於一種具有色 阻且應用於顯示面板的陣列基板之結構。 - 【先前技術】 - 隨著顯示科技的進步’與傳統的CRT顯示器相比,薄 φ 膜電晶體液晶顯示器(thin film transistor liquid crystal display,TFT-LCD)由於具有輕、薄、低輻射以及 體積小而不佔空間的優勢,目前已經成為顯示器市場的主 力產品,為因應液晶顯示產品的快速發展,液晶面板廠商 的產業競爭日增。 彩色濾光片(color filter,CF)是液晶顯示器中,最 重要的零組件之一’主要功能是使液晶顯示器能產生彩色 的晝面。請參照圖一 A,圖中顯示了彩色濾光片i的上視 Φ 圖,其主要元件包括了一黑色矩陣11以及黑色矩陣11定 義之隔間内的複數個色阻14。 請參照圖一 B,圖一 B係為圖一 A的剖面視圖。圖中 顯示了彩色濾光片1的基本結構。彩色濾光片丨包括一基 底10、一黑色矩陣12、複數個色阻14及一導電層16。 黑色矩陣12,形成於基底1〇上,且由複數個區塊組 成。色阻14亦形成於基底10.上’並位於兩相鄰之區塊間, 具有紅色(R)、綠色(G)及藍色(B)三種色阻14。其中,液 晶顯示器的色彩呈現,係因為背光之白光通過彩色濾光片 5 1327235 1上的色阻14時’會分別產生紅色、綠色及藍色三種顏色, 並透過這三種顏色的組合,而構成各種色彩。而黑色矩陣 12的功能在於將紅色、綠色及藍色三種顏色色阻14隔開, 並遮住三種顏色的部分光線,避免漏光影響色度,進而提 而對比度。1327235 • IX. Description of the Invention: 1. Field of the Invention The present invention relates to an array substrate, and more particularly to a structure of an array substrate having a color resistance and applied to a display panel. - [Prior Art] - With the advancement of display technology, thin film transistor liquid crystal display (TFT-LCD) has light, thin, low radiation and volume compared with conventional CRT displays. The advantage of being small and not occupying space has become the main product of the display market. In response to the rapid development of liquid crystal display products, the industry competition of LCD panel manufacturers is increasing. A color filter (CF) is one of the most important components in a liquid crystal display. The main function is to enable a liquid crystal display to produce a colored surface. Referring to Figure 1A, there is shown a top view Φ of color filter i, the main components of which include a black matrix 11 and a plurality of color resists 14 in the compartment defined by black matrix 11. Please refer to Figure 1B. Figure 1B is a cross-sectional view of Figure A. The basic structure of the color filter 1 is shown in the figure. The color filter 丨 includes a substrate 10, a black matrix 12, a plurality of color resists 14, and a conductive layer 16. The black matrix 12 is formed on the substrate 1 and is composed of a plurality of blocks. The color resist 14 is also formed on the substrate 10. It is located between two adjacent blocks and has three color resists 14 of red (R), green (G) and blue (B). Among them, the color display of the liquid crystal display is because the white light of the backlight passes through the color resistance 14 on the color filter 5 1327235 1 'will generate three colors of red, green and blue respectively, and through the combination of the three colors, Various colors. The function of the black matrix 12 is to separate the red, green and blue color resistors 14 and cover part of the light of the three colors to prevent the light leakage from affecting the chromaticity, thereby improving the contrast.

二而,由於影像色度的需求不同,廠商必須將三種顏 色的色度做些調整。一般來說,當彩色濾光片1中的色阻 14膜厚不同時,所呈現出來的色度大小也會隨之不同,膜 厚愈高的色阻14 ’其所呈現出來的色度愈高。因此,廢商 會依據需求,使不同顏色的色阻14具有不同的膜厚高度。 例如:欲使顯示晝面偏藍時,彩色濾光片所製作的色阻中, 藍色色阻14之膜厚高度會較紅色色阻14及綠色色阻14 高,而使得各色阻14間具有膜厚斷差。 上述彩色滤光片1之各色色阻間的膜厚高度差異,雖 可符合影像色度的需求,但是卻會触出下列問題了Second, due to the different requirements of image chromaticity, manufacturers must adjust the chromaticity of the three colors. In general, when the color resistance of the color filter 1 in the color filter 1 is different, the chromaticity exhibited will be different, and the higher the film thickness, the higher the color resistance 14' high. Therefore, the waste chambers have different color thicknesses 14 of different colors depending on the requirements. For example, in order to make the display surface bluish, in the color resist produced by the color filter, the film thickness of the blue color resist 14 is higher than the red color resist 14 and the green color resist 14, so that the color resists 14 have The film thickness is broken. The difference in film thickness between the color resists of the color filter 1 described above can meet the requirements of image chromaticity, but it may cause the following problems.

、經過色阻製程後,色阻的膜面常會有牛角㈤湖) 的形成,而導致膜面不均·況。因此,在形成色阻之後, 還會進行-平坦化步驟,對色阻的膜面進行研磨 (Polish),以去除牛角,使色阻膜面平坦化。 但是,由於色阻之間具有膜厚斷差,導致在進行研磨 (P—)時,只能去除膜厚高度較高的色阻之牛角,而益 法去除膜厚高度較㈣色阻之牛角。故此,各色色阻間的 膜厚高度差異’將造成彩㈣以之色_面無法完全平 坦化的問題。 6 1327235 導電#ατωH ί ⑼會形成—層 導電層⑽)。如此一來,當彩色濾光片與薄 基板對組的時候,才會有通電的功能。 ㈤陣列 但是,由於各色色阻間具有膜厚高度的差異,合 導電層不連續驗況。如w— β獅,由於藍^色阻 14的膜厚高度較高,所以在鍍上導電層16的過程中 一側邊無法鍍到導電層16。 负After the color resist process, the film surface of the color resist often has the formation of horns (five) lakes, resulting in uneven film surface. Therefore, after the color resist is formed, a flattening step is performed to polish the film surface of the color resist to remove the horn and flatten the surface of the color resist film. However, due to the film thickness difference between the color resists, when the polishing (P-) is performed, only the horn of the color resistance with a high film thickness can be removed, and the thickness of the film is removed by the method. . Therefore, the difference in film thickness between the color resists of each color will cause the color (4) to be completely flattened. 6 1327235 Conductive #ατωH ί (9) will form a layer of conductive layer (10)). In this way, when the color filter is paired with the thin substrate, the power supply function is obtained. (5) Array However, due to the difference in film thickness between the color resists, the conductive layer is not continuously tested. For example, in the w-β lion, since the film thickness of the blue color resist 14 is high, the conductive layer 16 cannot be plated on one side during the plating of the conductive layer 16. negative

三'在如製程中,會在彩色遽光片上塗佈(c〇ating) 一層配向膜層(如:PI),接著以磨刷(nibbing)的方式進行 配向動作’使得液晶分何朝預定方向傾斜排列。 但是,由於各色色關具有膜厚高度的差異,將使得 配向膜層上的配向不連續’而導致液晶無法糊傾斜轉動。 爰疋,鑑於上述習知技術中所仍然不足之處,對此提 供-實際有效的解決方案,係為當前技術所必需。 【發明内容】 本發明之-目的係在於改善陣列基板上各色阻間膜厚 高度不均的_,贿得所有色阻謂面經過碧(?〇趾) 程序後’得以全面的平坦化。 本發明之另一目的係在於改善陣列基板上各色阻間的 膜厚斷差,使得各色阻的膜厚高度一致,以避免產生導電 層不連續的問題。 +本發明之另-目的係在於改善陣列基板上各色阻間的 膜厚斷差’使得各色_膜厚高度―致,_免配向膜層 7 配向不連續的問題發生。 膜;目的係在於改善陣列基板上各色阻間的 膜各斷差,使聽色_膜厚高度―致,In the process of “three”, in the process, a layer of alignment film (such as PI) is coated on the color film, and then the alignment operation is performed by means of nibbing, so that the liquid crystal is divided into a predetermined direction. Tilted. However, since the respective color colors have a difference in film thickness, the alignment on the alignment film layer is made discontinuous, and the liquid crystal cannot be tilted and rotated. In view of the above-mentioned deficiencies in the prior art, it is necessary to provide a practical and effective solution for the current technology. SUMMARY OF THE INVENTION The object of the present invention is to improve the unevenness of the film thickness between the color resists on the array substrate, and to fully flatten all the color resisting surfaces after the Bi (toe) process. Another object of the present invention is to improve the film thickness difference between the color resists on the array substrate so that the film thicknesses of the respective color resists are uniform in height to avoid the problem that the conductive layer is discontinuous. The other object of the present invention is to improve the film thickness difference between the respective color resists on the array substrate so that the problem of the misalignment of the respective layers of the film thickness is caused. Membrane; the purpose is to improve the film gap between the color resists on the array substrate, so that the color of the sensation_film thickness is high,

面板的製織率。 ^aaiI7F 本發明提供—種陣列基板,此陣列基板的結構包括一 基底:-黑色矩陣及複數個色阻。黑色矩陣,形成於基底 上,係由複數個區塊組成,且部份區塊之兩端具有不同的 厚度。複數個色阻,設置於基底上,且每—色卿成於兩 相鄰之區塊間’並分職蓋上述兩相龍塊之至少一端。 其中,每一區塊之兩端分別被不同之色阻所覆蓋。 本發明提供一種陣列基板的製造方法,步驟如下所 述:提供一基底。形成一黑色矩陣於基底上表面,黑色矩 陣係由複數個區塊組成,其中,部份區塊之兩端具有不同 的厚度。形成複數個色阻於基底上’每一色阻係形成於兩 相鄰之區塊間,且分別覆蓋上述兩相鄰區塊之至少—端, 其中每一區塊之兩端分別被不同之色阻所覆蓋。 關於本發明之優點與精神,以及更詳細的實施方式可 以藉由以下的實施方式以及所附圖式得到進一步的瞭解。 【實施方式】 清參照圖二A至圖二E,其係為本發明之陣列基板的 製造方法示意圖。請參照圖二A,首先提供一基底2〇,並 塗佈或沉積一材料層22a於基底20上方。其中,此材料層 22a的材料係由Cr、CrO、Ni等金屬或金屬化合物、樹脂、 1327235 暗色有機材料及原料(Pigment)所組成的族群中選出,材料 層22a的用途係用以遮住不同顏色的部分光線,避免漏光 影響色度,進而提尚對比度。在較佳實施例中,上述樹脂 及原料(Pigment)係為黑色較佳。 接著,將材料層22a圖案化而形成一矩陣於基底2〇 上,在本實施例中,矩陣以黑色矩陣舉例表示,此黑色矩The weaving rate of the panel. ^aaiI7F The present invention provides an array substrate having a structure comprising a substrate: a black matrix and a plurality of color resists. The black matrix, formed on the substrate, is composed of a plurality of blocks, and the ends of the partial blocks have different thicknesses. A plurality of color resists are disposed on the substrate, and each color is formed between two adjacent blocks ‘and at least one end of the two-phase dragon block is divided. Wherein, both ends of each block are respectively covered by different color resists. The present invention provides a method of fabricating an array substrate, the steps of which are as follows: a substrate is provided. A black matrix is formed on the upper surface of the substrate, and the black matrix is composed of a plurality of blocks, wherein the ends of the partial blocks have different thicknesses. Forming a plurality of color resists on the substrate. 'Each color resist is formed between two adjacent blocks, and respectively covering at least one end of the two adjacent blocks, wherein each end of each block is respectively colored Coverage is blocked. The advantages and spirit of the present invention, as well as the more detailed embodiments, may be further understood by the following embodiments and the accompanying drawings. [Embodiment] Referring to Figures 2A to 2E, a schematic view of a method of manufacturing an array substrate of the present invention is shown. Referring to Figure 2A, a substrate 2 is first provided and a layer of material 22a is applied or deposited over the substrate 20. The material of the material layer 22a is selected from the group consisting of metal or metal compound such as Cr, CrO, Ni, resin, 1327235 dark organic material and Pigment, and the material layer 22a is used to cover different materials. Part of the light of the color, to avoid light leakage affecting the chromaticity, and thus to improve the contrast. In a preferred embodiment, the resin and the pigment are preferably black. Next, the material layer 22a is patterned to form a matrix on the substrate 2A. In this embodiment, the matrix is represented by a black matrix, which is a black moment.

陣係由複數個區塊組成,製作過程請參照圖二B。如圖二BThe array is composed of a plurality of blocks, and the production process is shown in Figure 2B. Figure 2B

所示,塗佈一光阻層62於該材料層22a上表面,接著利用 一光罩64對材料層22a進行微影蝕刻程序,以形成複數個 區塊22。 其中’此光罩64係為半色調光罩(half_t〇ne贴狄) 或夕灰階光罩(multi-tonemask)。由於上述兩類光罩具有 不同透光率的透光區,使得聰刻出來的部分區塊之兩端 具有不同的厚度。 一在一較佳實施例中,光罩64具有第一透光區㈣、第 二透光區64b及第三透光區64c三種透光區。透光率由小 至大依序為第-透光區64a、第二透光區_及第三透光 區64c。曝光顯影後第一透米區6知所對應的材料層孤 全被钱刻、’第二透光區64b所對應的材料層孤被^分钱 刻’第三透光區64c所對應的材料層22a亦被部分餘刻或 不蝕刻,若為部分蝕刻,則被餘刻程度較輕微。 U此,本實_之_22具有_狀與 種型態,如圖二C所示。相鄰之第二透光區64b盘第^ ,區64c所對應形成的區塊22之兩端具有不同的厚卢,: 為階梯狀。而兩端皆與第—透光區64a相鄰之第三透^ 9 64c所對應形成的d塊22,則為均—厚度的矩形方塊狀區 塊22。 凊參照圖二D,形成黑色矩陣之後,接著形成複數個 色阻24於基底20上,上述色阻24包括紅色色阻(r)24、 綠色色阻(G)24及藍色色阻⑻24三種色阻,依序形成於基 底2G上。 每一色阻24係形成於兩相鄰之區塊22間,且分別覆 蓋上述兩相鄰區塊22之至少一端,其中每一區塊22之兩 端分別被不同之色阻24所覆蓋。 在本發明實施例中,被同一色阻24所覆蓋之相鄰區塊 22之兩端具有相等的厚度。如圖二D所示,紅色色阻 (R)24、綠色色阻⑹24與藍色色阻⑻24所覆蓋之相鄰區 塊22之兩端具有相等的厚度。 值得注意的是,若在色度要偏藍之情況下,及膜厚高 度要-致的需求下’藍色色阻⑻24所覆蓋之相鄰區塊四 之兩端具有較低的厚度。藉此’三種色阻24膜厚高度不但 相等,而且形成於陣列基板之藍色色阻⑻24具有比紅色 色阻(R)24、綠色色阻(g)24更大的體積,亦即此陣列基板 所能呈現的色度係為偏藍。 當然,亦可根據色度要偏紅或偏綠等其他需求,來調 整特定顏色色阻24所覆蓋之相_塊22之兩端的厚度大 小,以保持三種顏色色阻24之膜厚高度的均等。 也就疋說’根據色度需求,不同顏色之色阻Μ具有不 同的體積。當所有色阻24 _厚高度轉時,體積愈大的 1327235 色阻24所覆蓋之相鄰區塊22之兩端具有愈低的膜厚高度β 因此,本發明主要係利用半色調光罩(half-tone mask) 或多灰階光罩(multi-t〇ne mask)製造出膜厚高度不同的 區塊22,藉此控制各色阻24的膜厚高度。 一般來說,本發明實施例中,上述區塊22之厚度為1 至1.5微米。紅色色阻(R)24、綠色色阻(G)24與藍色色阻 (B)24之厚度係為1微米至2. 5微米。 凊繼續參照圖二E,當形成複數個色阻24於基底20 上之後,形成一導電層26於黑色矩陣22及色阻24上,其 中上述導電層26舉例為IT0透明導電層。接著,在cell 製程中’會在導電層26上塗佈(coating)—層配向膜層, 例如PI膜層,並進行後續的配向及組裝程序。 本發明之陣列基板可為一種彩色濾光片,係可應用於 色阻形成於主動元件陣列基板的對向基板上,及色阻形成 於主動元件陣列上方(c〇l〇r filter on array, C0A)兩種 液晶顯示面板型態。 請參照圖三’圖三係為色阻形成於主動元件陣列基板 的對向基板上之液晶顯示面板示意圖。此液晶顯示面板包 括一主動元件陣列基板、一陣列基板以及設置於主動元件 陣列基板與陣列基板之間的液晶層38。 陣列基板,設置於主動元件陣列基板之上方,陣列基 板之構造即與前述之構造相同,包括一第一基底2〇,一黑 色矩陣及複數個色阻24。 黑色矩陣形成於第一基底20上,且黑色矩陣係由複數 11 1327235 組成’其中部分區塊22之兩端具有不同的厚产。 =數個色阻24,設置於第-基底2Q上,且每—色阻- 相鄰之區塊22間,並分難蓋上述兩 $ 二端:其中每一區塊22之兩端分別被不同之色: 此外,陣列基板更包括一第—導電層26及_配向膜 曰 依序形成於黑色矩陣及色阻24上表面。 、As shown, a photoresist layer 62 is applied over the upper surface of the material layer 22a, and then the material layer 22a is subjected to a photolithographic etching process using a mask 64 to form a plurality of blocks 22. Wherein the reticle 64 is a halftone mask or a multi-tone mask. Since the above two types of reticle have light-transmitting regions of different light transmittances, the two ends of the slanted portion have different thicknesses. In a preferred embodiment, the reticle 64 has three light transmissive regions: a first light transmissive region (4), a second light transmissive region 64b, and a third light transmissive region 64c. The light transmittance is, from small to large, the first light-transmitting region 64a, the second light-transmitting region _, and the third light-transmitting region 64c. After the exposure and development, the first transmissive region 6 knows that the corresponding material layer is completely engraved, and the material layer corresponding to the second transparent region 64b is singularly engraved. The material corresponding to the third transparent region 64c Layer 22a is also partially or not etched, and if partially etched, it is less severe. U, this _22 has a _ shape and a species, as shown in Figure 2C. The two adjacent light-transmissive regions 64b of the second and second regions 64c have different thicknesses at both ends of the block 22, which are stepped. The d block 22 corresponding to the third through-hole 9 64c adjacent to the first light-transmitting region 64a is a rectangular-shaped block 22 of uniform thickness. Referring to FIG. 2D, after forming a black matrix, a plurality of color resistors 24 are formed on the substrate 20. The color resists 24 include red color resist (r) 24, green color resist (G) 24, and blue color resist (8) 24 colors. The resistance is sequentially formed on the substrate 2G. Each color resist 24 is formed between two adjacent blocks 22 and covers at least one end of the two adjacent blocks 22, wherein each end of each block 22 is covered by a different color resist 24. In the embodiment of the present invention, both ends of the adjacent block 22 covered by the same color resist 24 have equal thicknesses. As shown in Fig. 2D, the red color resist (R) 24, the green color resist (6) 24 and the adjacent blocks 22 covered by the blue color resist (8) 24 have equal thicknesses. It is worth noting that if the chromaticity is to be bluish, and the film thickness is high, the thickness of the adjacent block 4 covered by the blue color resist (8) 24 has a lower thickness. Therefore, the thickness of the three color resists 24 is not equal, and the blue color resist (8) 24 formed on the array substrate has a larger volume than the red color resist (R) 24 and the green color resist (g) 24, that is, the array substrate. The chromaticity that can be presented is bluish. Of course, the thickness of both ends of the phase block 22 covered by the specific color resist 24 can be adjusted according to other requirements such as redness or greenishness of the chromaticity, so as to maintain the equal film thickness of the three color resists 24. . In other words, according to the color requirement, the color resistance of different colors has different volumes. When all the color resists 24 _ thick height, the larger the volume of the 1327235 color resist 24, the lower end of the adjacent block 22 has a lower film thickness height β. Therefore, the present invention mainly utilizes a halftone mask ( A half-tone mask or a multi-tray mask produces a block 22 having a different film thickness, thereby controlling the film thickness of each color resist 24. Generally, in the embodiment of the present invention, the block 22 has a thickness of 1 to 1.5 μm. 5微米。 The red color resistance (R) 24, the green color resistance (G) 24 and the blue color resistance (B) 24 thickness is from 1 micron to 2. 5 microns. Continuing to refer to FIG. 2E, after forming a plurality of color resists 24 on the substrate 20, a conductive layer 26 is formed on the black matrix 22 and the color resist 24, wherein the conductive layer 26 is exemplified as an IT0 transparent conductive layer. Next, a layer-aligned film layer, such as a PI film layer, is applied to the conductive layer 26 in the cell process, and subsequent alignment and assembly procedures are performed. The array substrate of the present invention can be a color filter, which can be applied to the opposite substrate of the active device array substrate, and the color resistance is formed on the active device array (c〇l〇r filter on array, C0A) Two types of liquid crystal display panels. Referring to FIG. 3', FIG. 3 is a schematic diagram of a liquid crystal display panel formed on the opposite substrate of the active device array substrate. The liquid crystal display panel includes an active device array substrate, an array substrate, and a liquid crystal layer 38 disposed between the active device array substrate and the array substrate. The array substrate is disposed above the active device array substrate. The array substrate is constructed in the same manner as the foregoing structure, and includes a first substrate 2, a black matrix and a plurality of color resistors 24. The black matrix is formed on the first substrate 20, and the black matrix is composed of a plurality of 11 1327235' wherein the ends of the partial blocks 22 have different thicknesses. = a plurality of color resists 24, disposed on the first substrate 2Q, and each color resist - adjacent to the block 22, and difficult to cover the two $ two ends: wherein each block 22 is respectively Different colors: In addition, the array substrate further includes a first conductive layer 26 and an aligning film 曰 sequentially formed on the upper surface of the black matrix and the color resistor 24. ,

主動元件陣列基板包括—第:基底3Q,—主動 列32,設置於第二基底3〇上。一第二導電 早 配向膜層37依序形成於主動耕_ 32上。 主動元件陣列32舉例係為薄膜電晶體陣列。 a 請參照圖四,圖四係為色阻形成於主動元件陣列上方 (color fiiter on array,⑽之液晶顯示面板示意圖。 此液晶顯示面板之特徵在於,在陣列基板中具有_主動元 件陣列形成於基底的上方,_g_位於色阻與黑色矩陣之下方。 m 如圖四所示,此液晶顯示面板包括一陣列基板、一對 向基板50及一液晶層58。其中,對向基板5〇係與陣列基 板對向設置,液晶層58則設置於陣列基板與對向基板 之間。 陣列基板,包括一第一基底40,一主動元件陣列48、 一黑色矩陣及複數個色阻44。 主動元件陣列48形成於第一基底40上,主動元件陣 列48舉例係為薄臈電晶體陣列。黑色矩陣形成於第—基底 40上,且黑色矩陣係由複數個區塊犯組成,其令部分區 塊42之兩端具有不同的厚度,如圖四所示。複數個色阻 12 1327235 44 ’設置於第-基底4G上’且每—色阻从形成於兩相鄰 之,塊42間’並分別覆蓋上述兩相鄰區塊似之一端,其 中每一區塊42之兩端分別被不同之色阻44所覆蓋。此外, 陣列基板更包括-第-導電層46與主動元件48連接、一 平:L·層49形成於黑色矩陣及複數個色阻44上,及一第一 配向膜層47形成於平坦層49上。 而對向基板50則包括-第二基底5(n、以及依序形成 於第-基底501上之-第二導電層5Q2及一第二配向膜層 503。 、 在較佳實施例中,以上所述之第一基底2〇、4〇及第二 基底30、501皆為透明絕緣基底。第一導電層%、奶及第 二導電層36、502皆為ITO透明導電層。第一配向膜層27、 47及第二配向膜層37、503皆為pi膜層。 在上述實施例中’係利用半色調光罩·(___ mask) 來形成兩端膜厚高度不同的階梯狀區塊22,以控制色阻24 膜厚。然*,亦可其他技術手段來形成兩端膜厚高度 不同的區塊22。 請參照圖五A,可利用半色調光罩(half_t〇ne mask) 或多灰階光罩(multi-tone mask)的設計,使部分區塊22 的一端係具有一斜邊(bevel edge)。 請參照圖五B,在形成黑色矩陣於基底2〇上表面的過 程中,先塗佈或沉積一次材料層,並藉由第一種光罩進行 微影蝕刻程序,來形成一第一次區塊221於基底20上表 面。接著,再塗佈一次材料層,並藉由第二種光罩進行微 13 1327235 影蝕刻程序,來形成一第二次區塊222於第一次區塊 L表面。 其中,上述第二次區塊222之大小係小於第一次區塊 221之大小,故兩端膜厚高度不同的區塊以亦即由第〜次 ,塊221與第二次區塊222所組成,在較佳實施例中,此 區塊22亦為階梯狀。而兩端膜厚高度均等的區塊22則可 根據上述兩種光罩的透光區設計,選擇性地與第一次區魂 221或第二次區塊222 —起形成。 ,一般來說,上述第一次區塊221之厚度為丨微米至3 微米’區塊22之厚度為1· 1微米至1. 5微未。 睛參照圖五C,在另-實施例中,兩端膜厚高度不同 的區塊22除了第一次區塊221與第二次區塊烈2之外,更 可包括一第三次區塊223。請同時參照圖五β,形成第二次 區塊222之後’再塗佈一次材料層,並藉由第三種光罩進 行微影蝕刻程序,來形成第三次區塊223於第一次區塊221 之上表面。 其中,上述第三次區塊223之大小係小於第一次區塊 221之大小,故兩端膜厚高度不同的區塊以亦即由第—次 區塊221、第二次區塊222及第三次區塊223所組成,在 較佳實施财,此區塊22亦為_狀。而兩賴厚高度均 等的區塊⑽彳可_上述三種鮮騎光區設計,選擇性 地與第-次區塊22卜第二次區塊222或第三次區塊挪 一起形成。 兩端膜厚高度不同的區塊22,除了可以用來降低膜厚 14 1327235 高度較高的色阻24高度之外,亦可用來增加膜厚高度較低 的色阻24高度。請參照圖五D,在本實施例中,原本紅色 色阻(R)24與綠色色阻(G)24的膜厚高度皆高於藍色色阻 (B)24(紅色色阻(R)24與綠色色阻(g)24之體積較大)。因 此,為使藍色色阻(B)24的膜厚高度與紅色色阻(幻24及綠 色色阻(G)24 —致,故使藍色色阻(B)24所覆蓋之相鄰區塊 22之兩端具有較高的厚度,以提高藍色色阻(B)24的膜厚 面度。 此實施例中,兩端膜厚高度不同的區塊22係為一種階 梯狀區塊22,可利用半色調光罩(half_t〇ne贴纯)來形 成。或者,亦可依序形成第一次區塊221與第二次區塊222 來形成。 使各色阻膜厚高度一致的方法,除了利用兩端膜厚高 度不同的區塊來調整之外,亦可搭配使用一調整層29,此 調整層29形成於色阻與基底之間,可用來墊高色阻24的 膜厚。 請參照圖五E至圖五G,分別顯示了調整層29在陣列 基板中的位置型態。 請參照圖五E,調整層29形成於膜厚高度需增加之色 阻24與基底20之間,並位於相鄰之區塊22間。如圖所示, 原本藍色色阻(B)24之膜厚高度大於紅色色阻⑻24及綠 色色阻(G)24之膜厚高度,但在紅色色阻與綠色色阻 (G)24下方增加了調整層四之後,便能使所有色阻高产均 等,且不影響原本之色度。 15 請參照圖五F,調整層29形成於膜厚高度需增加之色 阻24與基底20之間,且其兩端接觸到相鄰之區塊22。如 圖所示,原本藍色色阻⑻24謂厚高度大於紅色色阻 (R)24及綠色色阻(G)24之膜厚高度,但在紅色色阻(R)24 -、’·’彔色色阻(G)24下方增加了調整層29之後,便能使所有 色阻高度均等,且不影響原本之色度。 »月參知、圖五G,調整層29形成於膜厚高度需增加之色 阻24與基底20之間’且區塊22至少有部份覆蓋到調整層 29,也就是說,部分區塊22係位於調整層29之上。如圖 所示’原本藍色色阻⑻24及綠色色阻⑹24之膜厚高度大 於紅色色阻⑻24之膜厚*度’但在紅色色阻⑻與其相 鄰之區塊22下方增加了調整層29之後,便能使所有色阻 高度均等,且不影響原本之色度。 值得注意的是’職層29之材料係可為氧化銦錫、氧 化銦鋅、Ti〇2、GZO、ZaO或ZNO。在圖五e與圖五f兩實 施例中’調整層29與區塊22的先後形成順序並無限制; 而在圖五F之實施例中,由於部份的區塊22位於調整層 29上方,故必須先形成調整層29後,才接著形成區塊&曰。 综上所述,本發明之技術手段可有效地調整陣列基板 上各色阻之膜厚高度,故具有下列優點: :、改善陣列絲上各色賴麟高度不均的問題, 以使得所有色阻之膜面經過研磨(p〇Hsh)程序後,得以全面 的平坦化。 二、改善陣列基板上各色阻間的膜厚斷差,使得各色 丄327235 阻的膜厚高度一致,以避免產生導電層不連續的問題。 二、改善陣列基板上各色阻間的膜厚斷差,使彳寻各色 阻的膜厚高度一致’以避免配向膜層配向不連續的問題發 生。 一 四、於改善陣列基板上各色阻間的膜厚斷差,使得各 色阻的膜厚尚度一致,以提升液晶顯示面板的製程良率。 本發明雖以較佳實例闡明如上,然其並非用以限定本 發明精神與發明實體僅止於上述實施例爾。對熟悉此項技 術者,當可輕易了解並利用其它元件或方式來產生相同的 功效。是以’在不脫離本發明之精神與範圍内所作之修改, 均應包含在下述之申請專利範圍内。 【圖式簡單說明】 藉由以下詳細之描述結合所附圖示,將可輕易的了解 上述内容及此項發明之諸多優點,其中: 圖一A係為彩色濾光片之上視圖; 圖一B係為彩色濾光片之剖面視圖; _圖—A至圖二E係為本發明之陣列基板的製造方法 示意圖; =圖二係為本發明液晶顯示面板之第一實施例禾意 圖四係為本發明液晶顯示面板之第二實施例系意 17 1327235 圖五A係為本發明陣列基板之第一變化例; 圖五B係為本發明陣列基板之第二變化例; 圖五C係為本發明陣列基板之第三變化例; 圖五D係為本發明陣列基板之第四變化例; 圖五E係為本發明陣列基板之第五變化例; 圖五F係為本發明陣列基板之第六變化例;及 圖五G係為本發明陣列基板之第七變化例。The active device array substrate includes a first substrate 3Q, and an active column 32 disposed on the second substrate 3. A second conductive early alignment layer 37 is sequentially formed on the active tiller 32. The active device array 32 is exemplified by a thin film transistor array. a Referring to FIG. 4, FIG. 4 is a schematic diagram of a liquid crystal display panel formed by a color fiiter on array (10). The liquid crystal display panel is characterized in that an array of active elements is formed in the array substrate. Above the substrate, _g_ is located below the color resistance and the black matrix. m As shown in FIG. 4, the liquid crystal display panel includes an array substrate, a pair of substrates 50, and a liquid crystal layer 58. Opposite the array substrate, the liquid crystal layer 58 is disposed between the array substrate and the opposite substrate. The array substrate includes a first substrate 40, an active device array 48, a black matrix and a plurality of color resists 44. The array 48 is formed on the first substrate 40, and the active device array 48 is exemplified by a thin germanium transistor array. The black matrix is formed on the first substrate 40, and the black matrix is composed of a plurality of blocks, which make a partial block. 42 has different thicknesses at both ends, as shown in Fig. 4. A plurality of color resists 12 1327235 44 ' are disposed on the first substrate 4G and each color resist is formed between two adjacent blocks 42 The two adjacent blocks are respectively covered by one of the two adjacent blocks, wherein the two ends of each block 42 are respectively covered by different color resists 44. In addition, the array substrate further includes a -first conductive layer 46 connected to the active element 48, and a flat The L layer 49 is formed on the black matrix and the plurality of color resists 44, and a first alignment film layer 47 is formed on the flat layer 49. The opposite substrate 50 includes a second substrate 5 (n, and sequentially). a second conductive layer 5Q2 and a second alignment film layer 503 formed on the first substrate 501. In a preferred embodiment, the first substrate 2, 4 and the second substrate 30, 501 are described above. All of them are transparent insulating substrates. The first conductive layer %, the milk and the second conductive layers 36, 502 are all ITO transparent conductive layers. The first alignment film layers 27, 47 and the second alignment film layers 37, 503 are all pi film layers. In the above embodiment, a half-tone mask (___ mask) is used to form a stepped block 22 having different film thicknesses at both ends to control the film thickness of the color resist 24. However, other technical means may be used. A block 22 having different film thicknesses at both ends is formed. Referring to FIG. 5A, a halftone mask can be used (half_t〇ne mask) Or a multi-tone mask design such that one end of the partial block 22 has a bevel edge. Referring to Figure 5B, the process of forming a black matrix on the upper surface of the substrate 2 First, a material layer is first coated or deposited, and a first photomask etching process is performed to form a first sub-block 221 on the upper surface of the substrate 20. Then, a material layer is coated again, and A second sub-block 222 is formed on the surface of the first sub-block L by performing a micro 13 1327235 shadow etching process by a second mask. The size of the second sub-block 222 is smaller than the size of the first sub-block 221, so that the blocks with different film thicknesses at both ends are, that is, by the second time, the block 221 and the second block 222. Composition, in the preferred embodiment, the block 22 is also stepped. The block 22 having the equal thickness of the two ends can be selectively formed together with the first sub-soul 221 or the second sub-block 222 according to the light-transmitting area design of the two types of reticle. 5微米不。 The thickness of the first block 221 is 丨 micron to 3 microns. Referring to FIG. 5C, in another embodiment, the block 22 having different film thicknesses at both ends may include a third block in addition to the first block 221 and the second block. 223. Referring to FIG. 5β at the same time, after forming the second sub-block 222, the material layer is re-coated, and the lithography etching process is performed by the third photomask to form the third sub-block 223 in the first sub-region. The upper surface of block 221 . The size of the third sub-block 223 is smaller than the size of the first sub-block 221, so that the blocks with different film thicknesses at both ends are, that is, the first sub-block 221 and the second sub-block 222. The third block 223 is composed, and in the preferred implementation, the block 22 is also in the shape of a _. The two blocks of equal height and thickness (10) can be formed by the above-mentioned three kinds of fresh riding zones, selectively formed together with the first block 22, the second block 222 or the third block. The block 22 having different film thicknesses at both ends can be used to reduce the height of the color resist 24 of the film thickness 14 1327235, and can also be used to increase the height of the color resist 24 having a lower film thickness. Referring to FIG. 5D, in the embodiment, the film thicknesses of the original red color resist (R) 24 and the green color resist (G) 24 are higher than the blue color resistance (B) 24 (red color resistance (R) 24 Larger with the green color resistance (g) 24). Therefore, in order to make the film thickness of the blue color resist (B) 24 and the red color resist (magic 24 and green color resist (G) 24, the adjacent block 22 covered by the blue color resist (B) 24 is made. The two ends have a higher thickness to increase the film thickness of the blue color resist (B) 24. In this embodiment, the block 22 having different film thicknesses at both ends is a stepped block 22, which can be utilized. A halftone mask (half_t〇ne paste) is formed. Alternatively, the first sub-block 221 and the second sub-block 222 may be formed in sequence. The method for making the thickness of each color resist film uniform is not limited to In addition to the adjustment of the block with different thickness of the end film, an adjustment layer 29 may be used in combination, and the adjustment layer 29 is formed between the color resistance and the substrate, and can be used to increase the film thickness of the color resistance 24. Please refer to FIG. E to Fig. 5G, respectively, showing the positional pattern of the adjustment layer 29 in the array substrate. Referring to Fig. 5E, the adjustment layer 29 is formed between the color resistance 24 and the substrate 20 to be increased in film thickness, and is located at the phase The adjacent block is 22. As shown in the figure, the film thickness of the original blue color resistance (B) 24 is greater than the red color resistance (8) 24 and the green color resistance (G) 24 Thickness, but after adding the adjustment layer 4 under the red color resistance and the green color resistance (G) 24, all the color resistances can be equalized without affecting the original chromaticity. 15 Refer to Figure 5F to adjust the layer. 29 is formed between the color resist 24 and the substrate 20 whose film thickness is increased, and both ends of which are in contact with the adjacent block 22. As shown, the original blue color resist (8) 24 is thicker than the red color resist (R). ) 24 and green color resistance (G) 24 film thickness, but after the red color resistance (R) 24 -, '·' 色 color resistance (G) 24 added adjustment layer 29, can make all color resistance The height is equal and does not affect the original chromaticity. » The monthly reference, Figure 5G, the adjustment layer 29 is formed between the color resistance 24 and the substrate 20 where the film thickness needs to be increased, and the block 22 is at least partially covered. The layer 29 is adjusted, that is, the partial block 22 is located above the adjustment layer 29. As shown, the film thickness of the original blue color resist (8) 24 and the green color resist (6) 24 is greater than the film thickness of the red color resist (8) 24 * degree ' However, after the red color resist (8) and the adjacent layer 22 are added below the adjustment layer 29, all the color resists can be made equal. It does not affect the original chromaticity. It is worth noting that the material of the 'layer 29 may be indium tin oxide, indium zinc oxide, Ti 〇 2, GZO, ZaO or ZNO. In the two embodiments of Fig. 5e and Fig. 5f The order in which the adjustment layer 29 and the block 22 are formed is not limited; in the embodiment of FIG. 5F, since some of the blocks 22 are located above the adjustment layer 29, the adjustment layer 29 must be formed before proceeding. Forming the block & 曰. In summary, the technical means of the present invention can effectively adjust the film thickness of each color resist on the array substrate, thereby having the following advantages: : improving the problem of uneven height of each color on the array wire In order to make all the color resist film surfaces pass the grinding (p〇Hsh) program, it can be fully flattened. Second, improve the film thickness difference between the color resists on the array substrate, so that the film thickness of each color 丄 327235 is uniform, to avoid the problem of discontinuity of the conductive layer. Second, the film thickness difference between the color resists on the array substrate is improved, so that the film thicknesses of the respective color resists are consistently uniform to avoid the problem of discontinuous alignment of the alignment film layer. 14. Improving the film thickness difference between the color resists on the array substrate, so that the film thickness of each color resist is consistent, so as to improve the process yield of the liquid crystal display panel. The present invention has been described above by way of a preferred embodiment, and is not intended to limit the spirit of the invention and the inventive subject matter. For those skilled in the art, other components or means can be easily understood and utilized to produce the same effect. Modifications made within the spirit and scope of the invention are intended to be included within the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The above and other advantages of the invention will be readily understood by the following detailed description in conjunction with the accompanying drawings in which: Figure 1A is a top view of a color filter; B is a cross-sectional view of a color filter; _FIG—A to FIG. 2E are schematic views showing a manufacturing method of the array substrate of the present invention; FIG. 2 is a first embodiment of the liquid crystal display panel of the present invention. The second embodiment of the liquid crystal display panel of the present invention is a system 17 1327235. FIG. 5A is a first variation of the array substrate of the present invention; FIG. 5B is a second variation of the array substrate of the present invention; The third variation of the array substrate of the present invention; FIG. 5D is a fourth variation of the array substrate of the present invention; FIG. 5E is a fifth variation of the array substrate of the present invention; FIG. A sixth variation; and FIG. 5G is a seventh variation of the array substrate of the present invention.

【主要元件符號說明】 1 : 彩色濾光片 11 :黑色矩陣 14 :色阻 20 :基底、第一基底 22 :區塊 222 :第二次區塊 24 :色阻 27 :配向膜層、、第一配向膜層 30 :第二基底 36 :第二導電層 40 :第一基底 44 :色阻 47 :第一配向膜層 50 :對向基板 502 :第二配向膜層[Description of main component symbols] 1 : Color filter 11 : Black matrix 14 : Color resistance 20 : Substrate, first substrate 22 : Block 222 : Second block 24 : Color resist 27 : Alignment film layer, An alignment film layer 30: a second substrate 36: a second conductive layer 40: a first substrate 44: a color resist 47: a first alignment film layer 50: a counter substrate 502: a second alignment film layer

10 :基底 12 :區塊 16 :導電層 22a :材料層 221 :第一次區塊 223 :第三次區塊 26:導電層、第一導電層 29 :調整層 32 :主動元件陣列 37 :第二配向膜層 42 :區塊 46 :第一導電層 49 :平坦層 501 :第二導電層 58 :液晶層 1810: substrate 12: block 16: conductive layer 22a: material layer 221: first sub-block 223: third sub-block 26: conductive layer, first conductive layer 29: adjustment layer 32: active device array 37: Two alignment film layer 42 : block 46 : first conductive layer 49 : flat layer 501 : second conductive layer 58 : liquid crystal layer 18

Claims (1)

1327235 十、申請專利範圍: 1. 一種陣列基板,包括: 一基底; -矩陣,形該基底上,該矩陣係由複數舰塊 且部份該區塊之兩端具有不同的厚卢.以及 乂 端 複數個色m,設置麟基底上,鸡:該色_成於 鄰之该區塊間’並分別覆蓋上述兩相鄰該區塊之至少—1327235 X. Patent application scope: 1. An array substrate comprising: a substrate; a matrix, on the substrate, the matrix is composed of a plurality of blocks and some of the blocks have different thicknesses at both ends thereof. a plurality of colors m, set on the base of the lining, the chicken: the color _ is formed between the adjacent blocks and respectively covers at least two of the adjacent blocks 2.如申§青專利範圍第1項所述之陣列基板, 件陣列形成於該基底上。 更包括一主動元 3. 如申請利範圍第1項所述之陣列基板,其中被同一該色 阻所覆蓋之相鄰該區塊之兩該端具有相等的厚度。 4. 如申請專利範圍第1項所述之陣列基板,其中上述部分該 區塊係為階梯(step)狀。 5. 如申請專利範圍第1項所述之陣列基板,其中上述部分該 區塊具有斜邊(bevel edge)。 6. 如申請專利範圍第1項所述之陣列基板,其中上述部分該 區塊之厚度為1至1. 5微米。 7·如申凊專利範圍第1項所述之陣列基板’更包含一導電 層’形成於該矩陣及該些色阻上。 8·如申請專利範圍第7項所述之陣列基板,更包含一配向膜 層,形成於該導電層上。 19 9.如申請專利範圍第i項所述之陣列基板,其中該些色阻係 包括一紅色色阻、一綠色色阻以及一藍色色阻。— 10·如申請專利範圍第9項所述之陣列基板,其中該紅色色 阻之厚度係為1至2. 5微米。 ' ’其中該綠色色 11·如申請專利範圍第9項所述之陣列基板 阻之厚度係為1至2. 5微米。 12·如申請專利範圍第9項所述之陣列基板,其中該藍色色 阻之厚度係為1至2. 5微米。 Λ 13.如申請專利範圍第1項所述之陣列基板,更包含一調整 層’位於該色阻以及該基底之間。 玉 U·如申請專利範圍第13項所述之陣列基板,其中該調整層 之材料係包含氧化銦錫、氧化錮鋅、Ti〇2、GZ〇、Za〇、ΖΝ〇 或上述組合。 Μ.如申睛專利範圍第13項所述之陣列基板,其中該矩陣係 至少部分覆蓋該調整層。 16.如申睛專利範圍第13項所述之陣列基板,其中該矩陣係 與該調整層接觸。 Π.如申請專利範圍第13項所述之陣列基板,其中該矩陣之 部分區塊係位於該調整層上。 18.如申請專利範圍第!項所述之陣列基板,其中每一該區 塊之兩端分別被不同之該色阻所覆蓋。 20 19. 一種液晶顯示面板,包括· 18項中之任—項所述之陣列基板; 對向基板,係與該陣列基板對向設置;以及 一液晶層,設置__基板以及賴向基板之間。 20. —種陣列基板的製造方法,包括: 提供一基底; 形成一矩陣於該基底上表面,該矩陣係由複數個區塊組 /成’其中至少部份該區塊之兩端具有不同的厚度;以及 形成複數個色_絲底上,每—該色_、形麟兩相鄰 之該區塊間’且分別覆蓋上述帥鄰該區之至少一 端。 21·如申請專利範圍第2〇項所述之陣列基板的製造方法,更 包含形成一主動元件陣0於該基底上。 22. 如申請專利範圍第2〇項所述之陣列基板的製造方法,其 中上述形成該矩陣於該基底上表面之步驟,係包括下列步 驟: 塗佈一材料層於該基底上; 塗佈一光阻層於該材料層上表面;及 使用光罩對該材料層進行微影餘刻程序,而形成該些區 塊。 一 23. 如申請專利範圍第22項所述之陣列基板的製造方法,其 中上述之該光罩係為一半色調光罩(half_t〇ne mask),使 部份該區塊之兩端具有不同的厚度。 24. 如申請專利範圍第22項所述之陣列基板的製造方法,其 中上述之該光罩係為一多灰階光罩(multi-tone mask),使 部份該區塊之兩端具有不同的厚度。 25. 如申請專利範圍第2〇項所述之陣列基板的製造方法,其 中上述形成該矩陣於該基底上表面之步驟,係包括下列步 驟· 形成一第一次區塊於該基底上表面;及 形成一第二次區塊於該第一次區塊之上表面,其中上述該 區塊係南該第一次區塊與該第二次區塊所組成。 26. 如申請專利範圍第25項所述之陣列基板的製造方法,其 中該第一次區塊之厚度為丨至13微米。 27. 、如申請專利範圍第25或項所述之陣列基板的製造方 法’其中該區塊之厚度為1.1至丨.5微米。 28·如申請專利範圍第26項所述之陣列基板的製造方法,其 中上述該第二次區塊之大小係小於該第一次區塊之大小。 29. 如申請專利範圍第25項所述之陣列基板的製造方法,其 ^上述形成該第二次區塊之步驟後,更包括形成一第三次 =於該第—次區塊之上表面其中上述該區塊係由該第 一次區塊、該第二次區塊及該第三次區塊所組成。 30. 如申,專利範圍第29項所述之陣列基板的製造方法,其 中上述該第三次區塊之大小係小於該第一次區塊之大小。 31. 如申请專利範圍第19項所述之陣列基板的製造方法其 中該矩陣的材料係由Cr、CrO、Ni、暗色有機材料、樹脂 及原料(Pigment)所組成的族群中選出。 22 32. 如申請專利範圍第20項所述之陣列基板的製造方法,其 中上述形成複數個色阻於該基底上之步驟後,更包括形成 一導電層於該矩陣及該些色阻上。 33. 如申請專利範圍第32項所述之陣列基板的製造方法,其 中上述形成該導電層之步驟後,更包括形成一配向膜層於 該導電層上。 34. —液晶顯示面板,包括: 一陣列基板,包括 一第一基底; 一矩陣,形成於該第一基底上,該矩陣係由複數個區塊 組成,且部分該區塊之兩端具有不同的厚度;以及 複數個色阻,設置於該第一基底上,且每一該色阻形成 於兩相鄰之該,塊間,並分別覆蓋上述兩相鄰該區塊 之一端,其中每一該區塊之兩端分別被不同之該色阻 所覆蓋; 一主動元件陣列基板,相對設置於該陣列基板,包括 一第二基底; 一主動元件陣列’設置於該第二基底上;及 一第一導電層,形成於該主動元件陣列上丨以及 一液晶層,被填充於該主動元件陣列基板及該陣列基板之 間。 35. 如申請專利範圍第34項所述之顯示面板,i 色阻所覆蓋之相鄰該區塊之兩該端具有相等 36,請專利範圍第35項所述之顯示面板,其中該 -有不同的體積’對於膜厚相等之該些色阻,體積愈大的 23 該色阻所覆蓋之相鄰該區塊之兩該端具有愈小的厚度。 37. 如申請專利範圍第34項所述之顯示面板,其中上述部分 之該區塊係為階梯(step)狀。 38. 如申請專利範圍第34項所述之顯示面板,其中上述部分 之該區塊具有斜邊(bevel edge)。 n 39. 如申請專利範圍第34項所述之顯示面板,其中 厚度為1微米至1.5微米。 塊之 40. 如申請專利範圍第34項所述之顯示面板,其中兮 材料係由以心01暗色有機材料、樹脂及原料&amp; ^的 所組成的族群中選出。 41.如申請專利範圍第34項所述之顯示面板,其中 板更包括-第-導電層,職_雖及該些基 該陣列基 42.如申請專利範圍第41項所述之顯示面板,其中 板更包括一配向膜層,形成於該第一導電層上。 242. The array substrate according to claim 1, wherein the array of the members is formed on the substrate. The invention further comprises an active element. The array substrate of claim 1, wherein the two adjacent ends of the block covered by the same color resist have equal thicknesses. 4. The array substrate of claim 1, wherein the portion of the array is stepped. 5. The array substrate of claim 1, wherein the portion of the block has a bevel edge. 5微米。 The thickness of the thickness of the layer is from 1 to 1. 5 microns. 7. The array substrate as described in claim 1 further comprising a conductive layer formed on the matrix and the color resists. 8. The array substrate of claim 7, further comprising an alignment film layer formed on the conductive layer. The array substrate of claim i, wherein the color resists comprise a red color resist, a green color resist, and a blue color resist. 5微米。 The thickness of the red color resist is from 1 to 2. 5 microns. 5微米。 The thickness of the array substrate is 1 to 2. 5 microns. 5微米。 The thickness of the blue color resist is from 1 to 2. 5 microns. 13. The array substrate of claim 1, further comprising an adjustment layer </ RTI> between the color resist and the substrate. The array substrate according to claim 13, wherein the material of the adjustment layer comprises indium tin oxide, antimony zinc oxide, Ti〇2, GZ〇, Za〇, ΖΝ〇 or a combination thereof. The array substrate of claim 13, wherein the matrix at least partially covers the adjustment layer. 16. The array substrate of claim 13, wherein the matrix is in contact with the adjustment layer. The array substrate of claim 13, wherein a portion of the matrix is located on the adjustment layer. 18. If you apply for a patent scope! The array substrate of the item, wherein each of the two ends of the block is covered by a different color resist. A liquid crystal display panel comprising: the array substrate according to any one of the items 18; the opposite substrate is disposed opposite to the array substrate; and a liquid crystal layer, wherein the substrate and the substrate are disposed between. 20. A method of fabricating an array substrate, comprising: providing a substrate; forming a matrix on an upper surface of the substrate, the matrix being composed of a plurality of blocks/in which at least a portion of the blocks have different ends a thickness; and forming a plurality of colors _ silk bottom, each of the color _, the shape of the two adjacent blocks between the blocks and respectively covering at least one end of the region. The method of fabricating an array substrate according to claim 2, further comprising forming an active device array 0 on the substrate. 22. The method of fabricating an array substrate according to claim 2, wherein the step of forming the matrix on the upper surface of the substrate comprises the steps of: coating a material layer on the substrate; coating one The photoresist layer is on the upper surface of the material layer; and the material layer is subjected to a lithography residual process using a photomask to form the blocks. The manufacturing method of the array substrate according to claim 22, wherein the reticle is a half-tone mask, so that some of the blocks have different ends. thickness. 24. The method of fabricating an array substrate according to claim 22, wherein the reticle is a multi-tone mask, so that the two ends of the block are different. thickness of. 25. The method of fabricating an array substrate according to claim 2, wherein the step of forming the matrix on the upper surface of the substrate comprises the steps of: forming a first sub-block on the upper surface of the substrate; And forming a second sub-block on the upper surface of the first sub-block, wherein the block is formed by the first sub-block and the second sub-block. 26. The method of fabricating an array substrate according to claim 25, wherein the first sub-block has a thickness of from 丨 to 13 μm. 27. The method of fabricating an array substrate according to claim 25, wherein the thickness of the block is from 1.1 to 0.5 μm. The method of manufacturing an array substrate according to claim 26, wherein the size of the second sub-block is smaller than the size of the first sub-block. 29. The method of fabricating an array substrate according to claim 25, wherein the step of forming the second sub-block further comprises forming a third time = on the surface of the first sub-block The block is composed of the first block, the second block and the third block. The method for manufacturing an array substrate according to claim 29, wherein the size of the third sub-block is smaller than the size of the first sub-block. 31. The method of fabricating an array substrate according to claim 19, wherein the material of the matrix is selected from the group consisting of Cr, CrO, Ni, dark organic materials, resins, and pigments. The method of fabricating an array substrate according to claim 20, wherein the step of forming a plurality of color resists on the substrate further comprises forming a conductive layer on the matrix and the color resists. 33. The method of fabricating an array substrate according to claim 32, wherein the step of forming the conductive layer further comprises forming an alignment film layer on the conductive layer. 34. A liquid crystal display panel, comprising: an array substrate comprising a first substrate; a matrix formed on the first substrate, the matrix being composed of a plurality of blocks, and a portion of the blocks having different ends a thickness; and a plurality of color resists disposed on the first substrate, and each of the color resists is formed between the two adjacent blocks, and respectively covering one of the two adjacent blocks, wherein each The active device array substrate is oppositely disposed on the array substrate and includes a second substrate; an active device array is disposed on the second substrate; and a The first conductive layer is formed on the active device array and a liquid crystal layer, and is filled between the active device array substrate and the array substrate. 35. The display panel according to claim 34, wherein the two adjacent ends of the block covered by the i color resist have the same 36, and the display panel described in claim 35, wherein the The different volumes 'for the color resists having the same film thickness, the larger the volume 23, the smaller the thickness of the two adjacent ends of the block covered by the color resist. 37. The display panel of claim 34, wherein the portion of the portion is stepped. 38. The display panel of claim 34, wherein the block of the portion has a bevel edge. The display panel of claim 34, wherein the thickness is from 1 micrometer to 1.5 micrometers. 40. The display panel of claim 34, wherein the bismuth material is selected from the group consisting of a dark organic material, a resin, and a raw material &amp; The display panel of claim 34, wherein the panel further comprises a --conducting layer, and the display panel is as described in claim 41, The board further includes an alignment film layer formed on the first conductive layer. twenty four
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