1.320297 九、發明說明： 【發明所屬之技術領域】 本發明涉及一種印刷電路板(printed Circuit Board，以下簡稱pcb)傳輸 線的佈線結構’特別是一種可在高速訊號佈線中提升差分對訊號完整性的 PCB傳輸線的佈線結構。 【先前技術】1.320297 IX. Description of the Invention: [Technical Field] The present invention relates to a printed circuit board (hereinafter referred to as pcb) transmission line wiring structure', in particular, a method for improving differential signal integrity in high-speed signal wiring The wiring structure of the PCB transmission line. [Prior Art]
隨著積體電路輸出開關速度的提高以及PCB的佈線密度的增加，訊號 完整性已經成爲高速數位PCB設計必須關心的問題之一。元器件和pCB的 參數、元器件在PCB上的佈局、高速訊號的佈線等因素，都會引起訊號完 整性問題，導致系統工作不穩定，甚至完全不工作。如何在pCB的設計過 程中充分考慮到訊號完整性的因素，並採取有效的控制措施，已經成爲當 今PCB設計業界中的一個熱門課題。對於PCB上的訊號傳輸線來講，保持 訊號完整性最重要是阻抗匹配。傳輸線的特徵阻抗與負載阻抗不匹配時， 訊號到達接收端後有一部分能量將沿著傳輸線反射回去，使訊號波形發生 畸變，甚至出現訊號的過沖和下沖。訊號如果在傳輸線上來回反射，就會 産生往返振盪。影響阻抗匹配的因素有訊號源的架構和輸出阻抗(〇utput im=dance)’走線的特性阻抗，負載端的特性，走線的拓樸(t〇p〇i〇gy)架構等。 目刖在兩速電路設計中，差分訊號（DifferentialSignal)的應用越來越廣泛， 電路中最關鍵的訊號往往都要採用差分結構設計，這是因爲差分號斑普 通的單端訊號相比具有如下優點：a.抗干擾能力強；b.能有效抑制。ENn'; c. 時序，位射。躲PCBi_來說，最敝的還是如何雜在實際走線 中能完全發揮承賴差分喊的—對走線即差分訊號傳輸線的這些優勢， 並同時保證該差分對訊號的完整性。爲確保差分對訊號的完整性，一般要 求差分訊鱗輸線要等長、等距對稱分佈。等長是爲了保證兩個差分訊號 2刻保持相反極性，減少共模分量；等酬主要是爲了保證兩者差分阻抗 一致’減少反射。然而，在實際中卻因爲測試點，貫穿導孔等原因引起傳 輸線上阻抗的不連續，這_抗不連續使傳輸_特徵阻抗與貞載阻抗不 匹配’因而會産生訊號反射。 6As the output switching speed of integrated circuits increases and the wiring density of PCBs increases, signal integrity has become one of the issues that must be addressed in high-speed digital PCB design. Factors such as components and pCB parameters, layout of components on the PCB, and wiring of high-speed signals can cause signal integrity problems, resulting in unstable system operation or even no operation at all. How to fully consider the signal integrity factor and take effective control measures in the design process of pCB has become a hot topic in the PCB design industry. For signal transmission lines on a PCB, the most important thing to maintain signal integrity is impedance matching. When the characteristic impedance of the transmission line does not match the load impedance, a part of the energy will be reflected back along the transmission line after the signal reaches the receiving end, causing the signal waveform to be distorted, and even the overshoot and undershoot of the signal. If the signal is reflected back and forth on the transmission line, a round-trip oscillation will occur. The factors affecting the impedance matching are the architecture of the signal source and the output impedance (〇utput im=dance)' characteristic impedance of the trace, the characteristics of the load end, and the topology of the trace (t〇p〇i〇gy) architecture. It is seen that in the design of two-speed circuits, the application of differential signals is more and more extensive. The most critical signals in the circuit are often designed with differential structure. This is because the differential single-spot signal has the following single-ended signals. Advantages: a. Strong anti-interference ability; b. Effective suppression. ENn'; c. Timing, shot. To hide from PCBi_, the most embarrassing thing is how to make full use of the differential shouting in the actual routing—the advantages of the trace, that is, the differential signal transmission line, and at the same time ensure the integrity of the differential pair signal. In order to ensure the integrity of the differential pair signal, it is generally required that the differential scale transmission line be of equal length and equidistant symmetric distribution. The equal length is to ensure that the two differential signals maintain the opposite polarity and reduce the common mode component. The equal weight is mainly to ensure that the differential impedance of the two is consistent. However, in practice, the impedance of the transmission line is discontinuous due to the test point, through the via hole, etc., which causes the transmission_characteristic impedance to be mismatched with the load impedance, thus causing signal reflection. 6
CST(C〇ninputer Simulation Technology)仿真軟體，對其進行仿真分析，分析 傳輸訊號的反射及串擾嗓音的狀況等，並對接收端訊號進行分析。分析表 明訊號在該對稱性佈線結構差分訊號傳輸線中的反射幅度極大，甚至産生 振鈴和環繞振盪和串擾雜訊等現象。當複數次調節源端訊號上升時間，上 述現象依然嚴重’這種反射和串擾造成的訊號質量問題都很可能帶來時序 的偏移和奈此，造成接收端訊號質量很差。經過複數次仿真分析，這種PCB 傳輸線對稱性佈線結構很難保證所傳輸的差分對訊號的完整性。 【發明内容】 1320297 ，第-騎示，是現有的配置了差分訊號傳輪線的對稱性佈線 ; 一印刷電路板90包括-訊號層3、-接地層5: °—3 僅f其中之—，所述高速差分職傳輸線33 嶋椒犠&1㈣2。雜線1和傳 ^ 1知胁Γ = W1’匕們之間的距離爲M1。俯視印刷電路板90的傳輸 於和傳輸線2 ’如第二圖所示’一導孔6與傳輸線i相連，一導孔7盘傳 ^相連，導孔6與導孔7對_佈於差分議傳輸線33的兩側，且導 。除第二圖中所示出的導孔6和導孔7外還有複數對相 同^孔（圖中未示出）與導孔6和導孔7 一_對排佈於差分訊號傳輸線 、兩側。-般轉，當峨源端购^向對雛結構差分訊號傳輸線發 运兩個等值、極性相反的訊號時，由於傳輸線上有導孔存在，當訊號經過 導孔時因導孔阻抗-般低於傳輸線阻抗而引起傳輸線阻抗不連續，就會有 訊號反射現象發生，造成接收端訊號完整性較差。也可從該印刷電路板9〇 的 IBIS (InpUt/〇utpUt Buffer Information Specification)模型中讀取參數並應 用廷·些參數對該電路板進行建模，然後利用仿真軟體，例如， 鑒於以上内容，本發明提供一種印刷電路板傳輸線的佈線結構，其可 使差分訊號傳輸線阻抗達到最佳匹配，減少訊號反射，從而提升了差分對 訊號的完整性。 本發明的較佳實施例揭露了一種印刷電路板傳輸線的佈線結構，所述 7 1.320297 的印刷電路板包括配置於同一訊號層上的複數高速差分訊號傳輪線及與該 複數南速差分訊號傳輸線相連的複數對導孔(例如測試導孔和因爲其他需要 . 而設計的孔）’且每一高速差分訊號傳輸線爲兩恒定間距、長度一致且訊號 流向相反的傳輸線，每對導孔均非對稱排佈於差分訊號傳輸線的兩側，且 每對導孔之間的水平距離D=(1/2)TV，其中T爲訊號的上升時間，v爲訊 號的傳輸速度。 本發明所提供的印刷電路板傳輸線的佈線結構不僅適用於四層印刷電 路板，還可適用於其他複數層印刷電路板，例如六層、八層以上印刷電路 板。 【實施方式】 胃 如第三圖所示’爲本發明較佳實施例的配置有差分訊號傳輸線的非對 稱性佈線結構的四層印刷電路板的剖視圖。一四層印刷電路板1〇〇包括一 訊號層30、一接地層50、一電源層80和另一訊號層32，且每相鄰兩層之 間均存在介質層40。訊號層30中布有複數高速差分訊號傳輸線，第三圖所 示出的高速差分訊號傳輸線34僅爲其中之一，所述高速差分訊號傳輸線34 包括位於同一訊號層30中的兩恒定間距、長度一致且訊號流向相反的傳輸 線10和傳輸線20。傳輸線1〇和傳輸線2〇的寬度均爲w，它們之間的距 離爲Μ。俯視印刷電路板1〇〇的傳輸線1〇和傳輸線2〇，如第四圖所示一 導孔60與傳輪線10相連’ 一導孔7〇與傳輸線2〇相連導孔6〇與導扎％ % 成對排佈於差分訊號傳輸線34的兩側，且導孔60與導孔70之間的水平距 離爲D，導孔半徑均相等。除第三圖中所示出的導孔6G和導孔70外，還 有複數對相同導孔（圖中未示出）與導孔6〇和導孔7〇 一樣成對排佈於差 分訊號傳輸線34的兩側》 從該四層印刷電路板的IBIS ( Input/〇utput此迁灯如色而如⑽ Specification)模型中讀取該印刷電路板1〇〇中傳輸線的長度寬度、厚度 =及與傳輸軸連導孔辭鮮複數個參數職電路板進行建模並應用仿 ，體’例如CST(Computer Simulation Technology)仿真軟體，對其進行仿 刀析。複數次靖源端喊的上升賴，並在訊號上升時間奴爲某個 值時再複數次調整導孔6〇與導孔7〇之間的水平距離D，並重新爲調整 8 1320297 參數後的_電路板建域型賴其進行仿真分析，分㈣輪職的反射 及串擾噪音的狀況等，並對接收端訊號進行分析比較。當差分訊號傳輸線 * 所連導孔⑽的水平轉D過大時，舰分訊賴輸線雜抗如第五圖所 - 不，該圖中縱軸表示差分訊號傳輸線的阻抗R，橫轴表示導孔與傳輸線中 的訊號發魏之間的水平距離L，在此讎訂，_輸料關起的凹下 部分波段在疊加後完全分開，會造成接收端訊號反射較強。當差分訊號傳 輸f所連導孔之間的水平距離D過小爲〇時，則差分訊號傳輪線的阻抗如 第六圖所示，圖巾兩傳輸料孔引起的凹下部分波段完全重合，如該圖中 f線所示，兩波形疊加後就會引起差分訊號傳輸線阻抗值很小，因此會加 ^ 轉麟触抗秘配程度’導致接《職的完錄更差。在保證兩導 孔距離儘量近，且㈣輸雜抗跡疊加後離抗值不小純—導孔阻抗 值的條，下’複數次調節兩導孔之間的水平距離D，並對其引起的傳輸線 阻抗進行分析。當兩傳輸線阻抗波形圖在訊號上升時間的1/2處疊加時，疊 加後的傳輸線阻抗值既不低於任—導孔$阻抗值，又能保證傳輸線導孔引 起的凹下部分波段不分開，如第七圖所示，在該情況下可知導孔之間的水 ' ^ (1/2)了^其中T為訊號的上升時間，v為訊號的傳輸速度。從 複數:欠調轉孔之_水平麟D進行仿真祕真曲線也可錄計算出反 射訊，最弱的仿真曲線均出現在導孔之間水平距離處。如第八 爲訊號上升時間爲5f)ps時調節導孔水平距離進行仿真所得的反射 ,2號仿真圖’該圖中縱軸爲訊號反射幅度，以電壓U來表示，橫轴爲仿真 圖=t ’從該圖甲可觀察得到反射訊號最弱'訊號完整性最佳的仿真曲線爲 所不出的a曲線。該圖中的b曲線爲導孔之間水平距離爲〇時的反射 =仿真曲線’該曲線可反映出當導孔之間水平距離爲。時職反射幅度 ^八:T爲導孔之間水_離較大時的反射訊號仿真曲*，從該曲線也 二t出當導孔之間水平距離過大時，訊號完整性較差甚至産生訊號振盪 A卞^等。經计算可知第八圖中的3曲線所對應的導孔之間的水平距 1/2倍的訊號上升時間τ與訊號傳輸速度v的乘積。當複數次調 二d升時間進行上述仿真時’可發現均當導孔之間水平距離D爲Μ 〇 ’訊號上升時間T與訊號傳輸速度V的乘積時，訊號反射最弱，訊號完 9 1.320297 整性最佳。由此可知，當印刷電路板傳輸線佈線結構中的差分訊號傳輸線 所經兩導孔之間的水平距離D=(1/2)TV時，阻抗匹配最佳，訊號反射最弱， 從而提升了差分對訊號的完整性。 本發明不僅適用於四層印刷電路板’還可適用於其他複數層印刷電路 板，例如六層、八層以上印刷電路板。 本發明雖以較佳實施例揭露如上，然其並非用以限定本發明。任何熟悉 此項技藝者’在不脫離本發明之精神和範圍内，當可做更動與满飾，因此 本發明之保遵範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】CST (C〇ninputer Simulation Technology) simulation software, simulation analysis, analysis of the transmission signal reflection and crosstalk noise status, and analysis of the receiver signal. The analysis shows that the signal has a large reflection amplitude in the differential signal transmission line of the symmetrical wiring structure, and even causes ringing and surround oscillation and crosstalk noise. When the source signal rise time is adjusted several times, the above phenomenon is still serious. The signal quality problem caused by such reflection and crosstalk is likely to bring about timing offset and the result, and the signal quality of the receiving end is very poor. After multiple simulation analysis, this PCB transmission line symmetrical wiring structure is difficult to guarantee the integrity of the transmitted differential pair signal. SUMMARY OF THE INVENTION 1320297, the first riding, is a conventional symmetric wiring configured with a differential signal transmission line; a printed circuit board 90 includes a signal layer 3, a ground layer 5: ° -3 only f - The high-speed differential service transmission line 33 嶋 犠 犠 & 1 (four) 2. The distance between the miscellaneous line 1 and the transmission ^1 knows the threat = W1' is M1. Looking at the transmission and transmission line 2' of the printed circuit board 90' as shown in the second figure, a guide hole 6 is connected to the transmission line i, a guide hole 7 is connected to the disk, and the guide hole 6 and the guide hole 7 are arranged in a different manner. Both sides of the transmission line 33 are guided. In addition to the via hole 6 and the via hole 7 shown in the second figure, there are a plurality of pairs of the same hole (not shown) and the via hole 6 and the via hole 7 are arranged in a differential signal transmission line, two side. - When the source is purchased, the two signals of the opposite polarity are transmitted to the differential signal transmission line. Since there are guide holes on the transmission line, the impedance of the via hole is normal when the signal passes through the via hole. If the impedance of the transmission line is not continuous below the impedance of the transmission line, signal reflection will occur, resulting in poor signal integrity at the receiving end. It is also possible to read parameters from the IBIS (InpUt/〇utpUt Buffer Information Specification) model of the printed circuit board 9 and apply the parameters to the board, and then use the simulation software, for example, in view of the above, The invention provides a wiring structure of a printed circuit board transmission line, which can optimally match the impedance of the differential signal transmission line and reduce signal reflection, thereby improving the integrity of the differential pair signal. A preferred embodiment of the present invention discloses a wiring structure of a printed circuit board transmission line. The printed circuit board of the 7.320297 includes a plurality of high-speed differential signal transmission lines disposed on the same signal layer and the plurality of south-speed differential signal transmission lines. Connected pairs of vias (such as test vias and wells designed for other needs)' and each high-speed differential signal transmission line is two constant-pitch, uniform length and opposite-direction transmission lines, each pair of vias being asymmetric Arranged on both sides of the differential signal transmission line, and the horizontal distance between each pair of guiding holes is D=(1/2) TV, where T is the rising time of the signal, and v is the transmission speed of the signal. The wiring structure of the printed circuit board transmission line provided by the present invention is applicable not only to a four-layer printed circuit board but also to other multiple-layer printed circuit boards, such as six or more layers of printed circuit boards. [Embodiment] The stomach is a cross-sectional view of a four-layer printed circuit board having a non-symmetric wiring structure in which a differential signal transmission line is disposed, which is a preferred embodiment of the present invention, as shown in the third embodiment. A four-layer printed circuit board 1 includes a signal layer 30, a ground layer 50, a power layer 80, and another signal layer 32, and a dielectric layer 40 is present between each adjacent layer. The signal layer 30 is provided with a plurality of high-speed differential signal transmission lines. The high-speed differential signal transmission line 34 shown in the third figure is only one of them. The high-speed differential signal transmission line 34 includes two constant intervals and lengths in the same signal layer 30. Consistent and signals flow to the opposite transmission line 10 and transmission line 20. The transmission line 1〇 and the transmission line 2〇 are both w and the distance between them is Μ. Looking down at the transmission line 1〇 and the transmission line 2〇 of the printed circuit board, as shown in the fourth figure, a guide hole 60 is connected to the transmission line 10'. A guide hole 7〇 is connected with the transmission line 2〇. % % is arranged in pairs on both sides of the differential signal transmission line 34, and the horizontal distance between the guide hole 60 and the guide hole 70 is D, and the guide hole radii are equal. In addition to the via hole 6G and the via hole 70 shown in the third figure, a plurality of pairs of the same via hole (not shown) are arranged in pairs in the same manner as the via hole 6 〇 and the via hole 7 〇. The two sides of the signal transmission line 34 read the length width and thickness of the transmission line in the printed circuit board 1 from the IBIS (Input/Printing Light) format of the four-layer printed circuit board. And the transmission axis guide hole refractions a number of parameters of the job board to model and apply the imitation, such as CST (Computer Simulation Technology) simulation software, it is simulated. A number of times the Jingyuan end shouted the rise, and adjusted the horizontal distance D between the guide hole 6〇 and the guide hole 7〇 several times when the signal rises to a certain value, and re-adjusts the 8 1320297 parameter. _ The circuit board construction type relies on its simulation analysis, and it divides (4) the situation of reflection and crosstalk noise, and analyzes and compares the signals at the receiving end. When the horizontal rotation D of the pilot hole (10) connected to the differential signal transmission line* is too large, the ship's signal transmission line is as shown in the fifth figure - No. In the figure, the vertical axis represents the impedance R of the differential signal transmission line, and the horizontal axis represents the guide. The horizontal distance L between the hole and the signal in the transmission line is determined. In this case, the concave portion of the _feeding material is completely separated after the superposition, which will cause the signal reflection at the receiving end to be strong. When the horizontal distance D between the conductive holes connected to the differential signal transmission f is too small, the impedance of the differential signal transmission line is as shown in the sixth figure, and the concave portion of the band caused by the two transmission holes of the towel completely coincides. As shown by the f-line in the figure, the superposition of the two waveforms will cause the impedance of the differential signal transmission line to be small, so that the degree of anti-theft will be increased, resulting in a worse end of the job. After ensuring that the distance between the two guiding holes is as close as possible, and (4) the anti-value is not small, the horizontal impedance distance between the two guiding holes is adjusted, and the horizontal distance D between the two guiding holes is adjusted. The transmission line impedance is analyzed. When the impedance waveforms of the two transmission lines are superimposed at 1/2 of the rising time of the signal, the impedance of the superimposed transmission line is not lower than the impedance value of the guide hole, and the band of the concave portion caused by the conduction hole of the transmission line is not separated. As shown in the seventh figure, in this case, the water between the via holes is known to be ' ^ (1/2) ^ where T is the rise time of the signal and v is the transmission speed of the signal. From the complex number: the under-modulation to the horizontal hole, the simulation of the secret curve can also record the inverse signal, and the weakest simulation curves appear at the horizontal distance between the guide holes. For example, the eighth is the reflection of the horizontal distance of the guide hole when the signal rise time is 5f) ps, and the simulation of the 2nd simulation diagram. The vertical axis of the figure is the signal reflection amplitude, which is represented by the voltage U, and the horizontal axis is the simulation diagram = t 'From this figure, we can observe that the simulation curve with the weakest reflection signal is the best, and the simulation curve with the best signal integrity is the a curve. The b curve in the figure is the reflection when the horizontal distance between the guide holes is = = simulation curve ' This curve can reflect the horizontal distance between the guide holes. The amplitude of the reflection of the job is ^8: T is the reflection signal of the water _ between the guide holes. When the horizontal distance between the guide holes is too large, the signal integrity is poor or even the signal is generated. Oscillating A卞^ and so on. It can be calculated that the product of the signal rise time τ and the signal transmission speed v is 1/2 times the horizontal distance between the guide holes corresponding to the 3 curves in the eighth figure. When the above simulation is performed for multiple times of two d liters, it can be found that when the horizontal distance D between the guide holes is the product of the signal rise time T and the signal transmission speed V, the signal reflection is the weakest, and the signal is 9 1.320297 The best in integrity. It can be seen that when the horizontal signal distance between the two via holes of the differential signal transmission line in the printed circuit board transmission line wiring structure is D=(1/2)TV, the impedance matching is optimal, and the signal reflection is the weakest, thereby improving the difference. The integrity of the signal. The present invention is applicable not only to a four-layer printed circuit board but also to other multi-layer printed circuit boards, such as six-layer, eight-layer or more printed circuit boards. The present invention has been described above in terms of preferred embodiments, and is not intended to limit the invention. Any person skilled in the art will be able to make changes and full decorations without departing from the spirit and scope of the invention, and the scope of the invention is defined by the scope of the appended claims. [Simple description of the map]
第一圖爲現有的配置了差分訊號傳輸線的對稱性佈線結構的四層印刷 電路板剖視圖。 第二圖爲第一圖所示四層印刷電路板差分訊號傳輸線的對稱性佈線結 構的俯視圖。 第二圖爲本發明較佳實施例的配置有差分訊號傳輪線的非對稱性佈線 結構的四層印刷電路板剖視圖。 第四圖爲第二圖所示四層印刷電路板差分訊號傳輸線非對稱性佈線結 構的俯視圖。 第五圖爲差分訊號傳輸線所連導孔之間距離過大時的差分訊號傳輸線 阻抗圖。 第六圖爲差分域騎連導孔之間麟爲Q _差分電傳輸線 阻抗圖。The first figure is a cross-sectional view of a conventional four-layer printed circuit board in which a symmetrical wiring structure of a differential signal transmission line is disposed. The second figure is a top view of the symmetrical wiring structure of the four-layer printed circuit board differential signal transmission line shown in the first figure. The second figure is a cross-sectional view of a four-layer printed circuit board having an asymmetric wiring structure with differential signal transmission lines in accordance with a preferred embodiment of the present invention. The fourth figure is a top view of the asymmetric wiring structure of the four-layer printed circuit board differential signal transmission line shown in the second figure. The fifth picture shows the impedance signal of the differential signal transmission line when the distance between the vias connected to the differential signal transmission line is too large. The sixth figure shows the impedance diagram of the Q _ differential electrical transmission line between the differential domain riding guide holes.
第七圖爲差分訊號傳輪線所連導孔之間距離爲1/2倍的訊號上升時間 與傳輸速度乘積時的差分訊號傳輸線阻抗圖。 〜 B 第八圖爲訊號上料間爲50ps時調節導孔距離進行仿真所得的反射訊 號仿真圖。 ° 【主要元件符號說明】 [習知]The seventh figure shows the differential signal transmission line impedance when the signal rise time is 1/2 times the distance between the pilot holes of the differential signal transmission line and the transmission speed. ~ B The eighth figure shows the simulation of the reflected signal obtained by simulating the pilot hole distance when the signal is loaded at 50 ps. ° [Main component symbol description] [Practical]
3，31 傳輸線 訊號層 10 1.3202973,31 transmission line signal layer 10 1.320297
介質層 4 接地層 5 電源層 8 差分訊號傳輸線 33 導孔 6，7 印刷電路板 90 [本發明] 傳輸線 10，20 訊號層 30，32 介質層 40 接地層 50 電源層 80 差分訊號傳輸線 34 導孔 60，70 印刷電路板 100Dielectric layer 4 Ground layer 5 Power layer 8 Differential signal transmission line 33 Guide hole 6, 7 Printed circuit board 90 [Invention] Transmission line 10, 20 Signal layer 30, 32 Dielectric layer 40 Ground layer 50 Power layer 80 Differential signal transmission line 34 Guide hole 60,70 printed circuit board 100
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