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TWI305875B - Run-to-run control method and system for semiconductor manufacturing - Google Patents

Run-to-run control method and system for semiconductor manufacturing Download PDF

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Publication number
TWI305875B
TWI305875B TW94146700A TW94146700A TWI305875B TW I305875 B TWI305875 B TW I305875B TW 94146700 A TW94146700 A TW 94146700A TW 94146700 A TW94146700 A TW 94146700A TW I305875 B TWI305875 B TW I305875B
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Taiwan
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batch
parameters
size
wafer
key
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TW94146700A
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Chinese (zh)
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TW200725207A (en
Inventor
Shih Tsung Hsiao
Chien Chung Chen
Ming Chang Lin
Chia Cheng Hsu
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Powerchip Semiconductor Corp
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Description

、1305875 衾3月0 8日修(¾正替換頁 【發明所屬之技術領域】 本發明係有關於半導體製造方法,且特別有關於一種半導體製造之批 次控制方法與系統。 【先前技術】 餘刻(Etching)是將材料使用化學反應或物理撞擊作用而移除的技術。 银刻技術可以分為「濕姓刻」(Wet Etching )及「乾钱刻」(Dry Etching ) 兩類。在濕蝕刻中是使用化學溶液,經由化學反應以達到蝕刻的目的,而 乾钮刻通常是一種電漿钮刻(plasma etching )。乾钱刻又分為三大類「物 • 理性蝕刻」(包括「濺擊蝕刻(Sputter Etching)」與「離子束蝕刻(I〇n Beam, 1305875 衾 March 8th repair (3⁄4 positive replacement page [Technical Field of the Invention] The present invention relates to a semiconductor manufacturing method, and more particularly to a semiconductor manufacturing batch control method and system. Etching is a technique that removes materials using chemical reactions or physical impacts. Silver engraving techniques can be divided into two categories: Wet Etching and Dry Etching. In the etching, a chemical solution is used, and a chemical reaction is used to achieve the purpose of etching, and the dry button is usually a plasma etching. The dry money is divided into three categories: "material rational etching" (including "splashing" Sputter Etching and I〇n Beam

Etching)」)、「化學性蝕刻:電漿蝕刻(plasmaEtching)」與「物理、 化學複合姓刻(即反應性離子蚀刻(ReactivelonEtcj^ng,簡稱见e)」。 反應性離子侧(RIE)是最為各種反應ϋ廣泛使㈣方法,其結合物 理性的離子轟擊與化學反應的侧。此種方式兼具弁等向性與高姓刻選擇 比等雙重優點,侧驗行主縣鱗反應來達成,轉得高聰比。加 入離子轟擊的作財二:—是將被侧材質表_原子鍵結破壞,以加速 反應速率。二是將再沈積於被钱刻表面的產物或聚合物(⑽卿㈤打掉, 拳錢祕刻表面能再與侧氣體接觸。而非等向性侧的達成 靠 沈積的產物《合物,沈齡侧圖形上,絲_沈積物可為離子 故侧可_進行,而在_上齡,縣受軒縣祕留下來, ^ 了娜嫩減__,腿_編彳,蝴 應用乾絲刻主要須注意_速率,均勻度、選擇比Etching)"), "Chemical etching: plasma etching" and "physical and chemical compounding (ie reactive ion etching (referred to as e)". Reactive ion side (RIE) is The most various reactions are widely used in (4) methods, which combine physical ion bombardment with the side of chemical reactions. This method has the dual advantages of 弁 isotropic and high surname selection, and the lateral inspection of the main county scale reaction is achieved. Turned to Gao Congbi. Adding ion bombardment to the second: - will be destroyed by the side material table _ atomic bond to accelerate the reaction rate. Second, will be redeposited on the surface of the product or polymer ((10) Qing (five) knocked out, the surface of the punching money can be contacted with the side gas. The non-isotropic side is achieved by the deposition of the product "composite, the pattern of the younger side, the silk_sediment can be the side of the ion." Conducted, and in the age of _, the county was left by Xuan County secrets, ^ Na Nen minus __, leg _ editing, butterfly application dry silk engraving mainly pay attention to _ rate, uniformity, selection ratio

Client's Docket No. : PT.AP-527 TT'sDocketNo : 〇532-A4〇585-TW/Finall /Alex Chen/3/7/2006 個指標’難的均勻度意謂著晶_她麵 的-Client's Docket No. : PT.AP-527 TT'sDocketNo : 〇532-A4〇585-TW/Finall /Alex Chen/3/7/2006 Indicators ‘Difficult uniformity means crystal _ her face ——

Client’s Docket No_ ·· ΡΤ.ΑΡ-527 Ι*/1 ,尤其當晶園 3. ..1305875 、—直到12吁’面積越大,均勻度的控制 選擇比疋似w_則速转遮罩或底層侧速率的比值 重要。 通常與氣體種類與比例、電漿或偏屢功率、甚至反應温關传選擇比 侧輪廓—般而言愈接近九十度越佳,除了少數特例,如於 (c〇mactwindowandviah〇le),為了使後續金 A 由或"層洞 (step 〇〇ν6^) ^ 廓可從氣體種類、比例、及·功率來進行。"控制糊輪 ^ =㈣辦侧,錢 ^:先執行顯影製程以將設計好的電路藉由光罩轉㈣晶圓上 元成後,執行顯影後檢視(伽Devel〇pment = 顯影過程_錢異發生。若_,顺箸執行反應性離== 皿),其係用讀據轉印到晶圓上之電路圖像在·上產生直正 電路。侧技術的好壞可蚊電路_鍵尺寸(CritieaiDimensiQn,③)、、'田 而在侧完成後會執行银刻後檢視(她rEtchInspecti〇n,卿以判斷在 H权中疋否錢異發生。然而,在對晶圓執行顯影與蝴製程的過程 中,可能因為任何軟硬體的錯誤使得顯影的過程發生變異,以致於影塑姓 刻的結果’進㈣雜職檢視(AEI)之檢機果。即使聽後檢視(觸 «生任何變異,但也可能因紐刻機台本身的類或侧機台中的反應 至(Chambei·) ID為某拥素所導致之不同產岐能與品質ϋ彡響钱刻後檢 視(ΑΕΙ)之檢視結果。 ▲晶圓製造的過程相當繁複Μ做精密的控制,任何-點微小的狀況皆 可能導致晶_品質不佳或使得整批晶圓報廢。因此,本發明提出了一種 改良之半導體製造的批次控财法_統,翔以補償晶圓製造過程中所 產生的變異,進而提高晶圓的品質與產能。 【發明内容】 基於上述目的,本發明實施例揭露了一種半導體製造之批次控制方Client's Docket No_ ·· ΡΤ.ΑΡ-527 Ι*/1, especially when the crystal garden 3. ..1305875, - until the 12's larger area, the uniformity control choice is faster than the w_ The ratio of the bottom side velocity is important. Usually with gas type and ratio, plasma or partial power, even reaction temperature selection is better than side profile - generally closer to ninety degrees, except for a few special cases, such as (c〇mactwindowandviah〇le), in order to The subsequent gold A or "step 〇〇ν6^^ can be performed from the gas type, ratio, and power. "Control paste wheel ^ = (4) Office side, money ^: Firstly perform the development process to transfer the designed circuit to the wafer by the reticle (four) after the wafer is formed, and perform the post-development inspection (German Devel〇pment = development process _ Money occurs. If _, 箸 箸 反应 反应 箸 = ============================================================= The side technology of the good and bad mosquito circuit _ key size (CritieaiDimensiQn, 3), 'Tian and after the completion of the side will be executed after the silver engraving (she rEtchInspecti〇n, Qing to judge whether the money in the H right. However, in the process of performing development and butterfly processing on the wafer, the development process may be mutated due to any error of the software and hardware, so that the result of the surname is entered into the inspection machine of the (4) miscellaneous inspection (AEI). Even if you listen to the post-view (touch any variation, it may be due to the reaction of the Newcasting machine itself or the side machine to the (Chambei·) ID for a certain breeder's different calving energy and qualityϋ The results of the inspection of the 彡 钱 钱 ▲ 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆 晶圆The present invention proposes an improved batch control method for semiconductor manufacturing, which compensates for variations in the wafer manufacturing process, thereby improving wafer quality and productivity. [Summary of the Invention] invention Example discloses a method of manufacturing a semiconductor batch controlling party

Client's Docket No. : PT.AP-527 TT'sDocketNo : 〇532-A40585-TW / Finall / Alex Chen/ 3/7/2006 , ,1305875 3. oa 法 與複數躲參數計絲伽^D。該批妨彻根_第—_尺寸值 等製程參數至少包括—顯旦^第;"晶圓批量之一製程控制參數,其中該 寸、-權重係數、-顯景^鍵=之關鍵尺寸、一银刻後所得之關鍵尺 根據-實驗峨__==,敵相目標值、 作,勸m2 量執行—製程並同喊彳卜»補償操 :第晶_之-第二咖 製程控制參數的依據/ 31 做為計算對應一第二晶圓批董之一 寸,體=Μ: 機台取得一第-晶圓批量之-第-關鍵尺 之-餘==二 =數計算取得_第,批* 同時執行-變異補:=ΓΓ批量孰行一製程並 一第二關鍵財賴树算轉該第-晶圓批量之 據。該等製程參數至少包括一工乡的依 獻汁、-描魏/關鍵尺寸、一钱刻後所得之關 、 、、—顯影繼尺寸的目標值、-侧驗尺寸的目产 值、根據-實驗設_所得之物及執行物所需之她Γ參值 【實施方式】 為了讓本發明之目的、特徵、及優點能更明顯易懂,下文 施例,並配合所關示第i 第2圖,做詳細之說^本發明說明^ 供不同的貫施例來說明本發明不同實施方式的技術概。其中 二Client's Docket No. : PT.AP-527 TT'sDocketNo : 〇532-A40585-TW / Finall / Alex Chen/ 3/7/2006 , , 1305875 3. oa method and complex hiding parameter meter gamma ^ D. The process parameters such as the root___size value include at least - the display of the wafer; and the process of controlling the parameters of the wafer batch, wherein the inch, the weight coefficient, the display key = the key size The key ruler obtained after a silver engraving is based on - experimental 峨 __ = =, the target value of the enemy phase, the work, persuading the m2 amount to execute - the process and the shouting » » » compensation operation: the first _ _ - the second coffee process control The basis of the parameter / 31 as a calculation corresponds to a second wafer batch of one inch, body = Μ: machine to obtain a first-wafer batch - the first - the key rule - the rest == two = the number of calculations obtained _ , batch * simultaneous execution - mutation complement: = ΓΓ batch execution of a process and a second key financial tree to calculate the basis of the first-wafer batch. The process parameters include at least the servant juice of a township, the Weiwei/key size, the value obtained after the engraving, the target value of the development dimension, the production value of the side inspection dimension, and the experiment. _________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________ DETAILED DESCRIPTION OF THE INVENTION The present invention is described in various embodiments to illustrate the technical aspects of various embodiments of the present invention. Two of them

的各元件植置縣說歡用,麟用本伽。且實 圖I 號之部分重複,麵了簡删,响細㈣㈣聯性圖私 本發明實施_露了 -種轉M造之批讀财法與系統。The various components of the planted county said that the use of joy, Lin with Benga. And the part of the actual figure I is repeated, and the surface is simply deleted, and the sound is fine (4). (4) The joint figure private invention is implemented _ exposed - kind of transfer M made the reading financial method and system.

Client’s Docket No. : PT.AP-527 s Docket No - 0532-A40585-TW / Finail / Alex Chen / 3/7/2006 1305875 CADI)座軸示晶圓在一製程機台中之不同反應室根據顯影後檢視 視(AW㈣後檢視(AEI)所產生之檢視結果,其中横軸絲顯影後檢 (CD)力之關鍵尺寸(CD),縱轴表示侧後檢視(AEI)之關鍵尺寸 於谢料戏絲峰齡勤之反齡A (Chamber-A)職出晶圓的 ϋ。*黑點表示該製程機台之反應室B (Chamber—B)所產出晶圓的檢 ^ 圖上可知,目標尺寸設定為〇126(um),但因為製程管制方法 魏 大部分晶圓在顯影絲刻後的結果無法達到目標尺寸。附件2 值:Γ二ff—製程機台中之不同反應室在完成侧後所產生之侧偏差 〇尹、由表不日期(Date) ’縱軸表示钮刻偏差值(EtchBias)。由圖 綱偏差標準值設定為韻,但因為製程管制方法不良, 分晶圓祕刻後所產生的姓刻偏差值無法達到或很接近朗偏差 ^圖係顯林侧實例之半導難造之減控制魏的架構示意, 100, Λ日1實例之半,製造之批次控㈣統主要包括—批次控制器 1二、'、卩根據目前所取的製程控制參數,利用本發明之數學式計算取 數所據以執行製程控制的最佳化控制參數,並根據所得之最 二工」數進行變異補償。在本發明實施财,製程控制參數包括電壓、 y、=流速等等,但其並非用以限定本發明,任何在製程執行時可取 付之相關參數皆可用以進行製程控制。 當某批晶圓在顯影機台(未顯示)完成顯影製程後,將該抵晶圓傳送 細職输_財_⑼,蝴該關鍵尺 寸值傳达給批次控制器卿。批次控制器则根據該關鍵尺寸 批晶圓的最佳化製程控制參數,然後將計算所得參數值傳送给勉刻機台 120。該批晶圓接著傳送糊機台m職該批晶圓執機 亥齡,並且根據該最佳化製程控制參數進行變異補償。另外,在執行過 私中侧機。Π0會將執仃軸彳製程所需之細控繼數值傳送給批次控Client's Docket No. : PT.AP-527 s Docket No - 0532-A40585-TW / Finail / Alex Chen / 3/7/2006 1305875 CADI) The housing shaft shows the different reaction chambers in a process machine according to the development Inspection results (AW (4) post-view (AEI) results, the horizontal dimension of the CD (CD) force critical dimension (CD), vertical axis indicates the side of the rear view (AEI) key size in thank you The peak of the age-competent A (Chamber-A) is out of the wafer. * The black dot indicates the inspection of the wafer produced by the reaction chamber B (Chamber-B) of the processing machine. It is set to 〇126(um), but because of the process control method, most of the wafers after the development of the wire can not reach the target size. Attachment 2 Value: Γ ff - different reaction chambers in the process machine after the completion side The resulting side deviation 〇 Yin, from the date of the date (Date) 'vertical axis indicates the button offset value (EtchBias). The standard deviation value is set to rhyme, but because of the poor process control method, after the wafer is secretly engraved The resulting deviation of the surname cannot be achieved or is very close to the deviation of the deviation. The structure of the reduction control Wei, 100, the next half of the example, the batch control of the manufacturing (four) system mainly includes - batch controller 1 2, ', 卩 according to the current process control parameters taken, using the present invention The mathematical formula calculates the optimal control parameters for performing process control, and performs variation compensation according to the obtained second-order number. In the implementation of the invention, the process control parameters include voltage, y, = flow rate, and the like. However, it is not intended to limit the invention, and any relevant parameters that can be taken during the execution of the process can be used for process control. When a batch of wafers is developed on a developing machine (not shown), the wafer is rejected. Transfer the fine job to the financial controller (9), the key size value is conveyed to the batch controller. The batch controller optimizes the process control parameters according to the critical size batch wafer, and then transfers the calculated parameter value. The engraving machine 120 is provided. The batch of wafers is then transferred to the paste machine to serve the batch of wafers, and the variation compensation is performed according to the optimized process control parameters. In addition, the private side machine is executed. Π0 will hold The process left foot axis fine control desired value following the transfer to the batch control

Client’s Docket No. : PT.AP-527 TT's Docket No : 0532-A40585-TW / Final / Alex 〇h en/ 12/26/2005 .1305875 制器100 ’使得批次控制器100可做更精確的變異補償。當晶圓麵刻機么 !2〇完成_製程後,將晶圓傳送到姻機台n〇檢視侧後所得之關鍵 尺寸(AEICD),並且將該關鍵尺寸值傳送給批次控制@ ,以做為下 一批晶圓執行變異補償的根據。 · 批次控制器100取得顯影後所得之關鍵尺寸(AmcD)、侧後所得 之關鍵尺寸(AEICD)、執行働丨製賴需之_控觀數健,另外根 據預設之權重係數㈤、顯影關鍵尺寸的目標值(仙仰Ta聊)盘侧 關鍵尺寸的目標值(AmCD Target)以及實驗設計結果(De_如 •―愈祕)140戶斤得之斜率⑷,利用本發日月之數學式計算取得目 前產品批數之晶圓據以執行控制的最佳化製程控制參數。 實驗設計結果(DOE Result) 140係指顯影後所得之關鍵尺寸(aeicd) 與侧後所得之關鍵尺寸(趟CD)相對於製程控制參數的關係。參考附 件3 ’ X軸表示製程參數,γ軸表示顯影後所得之關鍵尺寸⑽肋)與蝕 刻後所得之關鍵尺寸(AEICD),其彼此為反比關係,且可以一直線絲 式Y=aX+b來表示,其中〇;表示該直線方程式的斜率。 最佳化製程控制參數可以一方程式表示,即: • Parameter^ =f、FF\+f(FB\, 其中,表示目前產品批數(t)之製程控制參數,/(册),表示 一前饋函數,/(/^),表示一回饋函數。前饋函數表示為: f{FF)t -^^-ADICD^, a 其中’ 表示顯影關鍵尺寸的目標值’ 表示目前晶圓批 數之顯影後所得的關鍵尺寸,α表示DOE方程式的斜率。 回饋函數表示為:Client's Docket No. : PT.AP-527 TT's Docket No : 0532-A40585-TW / Final / Alex 〇h en/ 12/26/2005 .1305875 Controller 100' allows batch controller 100 to make more precise variations make up. When the wafer is engraved! 2〇 After the process, the wafer is transferred to the critical dimension (AEICD) obtained after the viewing side of the machine, and the key size value is transmitted to the batch control @ As the basis for performing variation compensation for the next batch of wafers. · The batch controller 100 obtains the critical dimension (AmcD) obtained after development, the key dimension obtained after the side (AEICD), and the number of control points required to perform the control, and according to the preset weight coefficient (5), development The target value of the key size (Shengyang Ta chat) target value of the key size of the disk side (AmCD Target) and the experimental design result (De_如•越秘) The slope of the 140 households (4), using the mathematics of the sun and the moon The calculation calculates the optimal process control parameters for the wafers of the current product batch to perform the control. DOE Result 140 refers to the relationship between the critical dimension (aeicd) obtained after development and the critical dimension (趟CD) obtained after the side relative to the process control parameters. Refer to Annex 3 'X-axis for process parameters, γ-axis for key dimensions (10) ribs obtained after development) and critical dimensions (AEICD) for post-etching, which are inversely proportional to each other and can be linearly Y=aX+b Represents, where 〇; represents the slope of the equation of the line. The optimized process control parameters can be expressed in one program, namely: • Parameter^ =f, FF\+f(FB\, where the process control parameter indicating the current product batch (t), / (book), indicates a former The feed function, /(/^), represents a feedback function. The feedforward function is expressed as: f{FF)t -^^-ADICD^, a where 'represents the target value of the development critical size' indicates the current number of wafer lots The critical dimension obtained after development, α represents the slope of the DOE equation. The feedback function is expressed as:

Client’s Docket No· : PT.AP-527 TT^ Docket No : 0532-A40585-TW / Final / Alex Chen / 12/26/2005 9 ί3〇5875 亍伽=表喊參稍算之產雜數,w表示雜魏,礙^表 ::刻,尺寸的目標值,麗U示顯影關鍵尺寸的目標:, 表干=的—】)批晶圓之侧後所得的關鍵尺寸,舰皆肅%) 率,办1批晶圓之顯影後所得的關鍵尺寸,α表示膽方程式的斜 ar_岭核不表示第(Η)批晶圓之触控制參數。 目前^^^㈣綱她彳4,彻取雜式計算出 製赠程控制參數,錢再姆該參_目前執行 ^ /刪。軸_獅導數的流程。 取得顯祕缝繼⑽轉列晶_數魏行製程時所 她雜偷嫩獅,Mtw麵不同批數 =’細CD表示顯影後所得之關鍵尺寸,藏D 二之隨尺寸,控制參她據不_批數所取得之製程Client's Docket No· : PT.AP-527 TT^ Docket No : 0532-A40585-TW / Final / Alex Chen / 12/26/2005 9 ί3〇5875 Sangha = Table shouting a little bit of production, w means Wei Wei, the obstacle ^ table:: engraved, the target value of the size, Li U shows the target of the development of the key size:, the surface of the dry = -]) the key size of the side of the batch of wafers, the ship is all%) rate, The critical dimension obtained after developing a batch of wafers, α indicates that the oblique ar_ridge nucleus of the biliary equation does not indicate the touch control parameters of the first (Η) batch wafer. At present, ^^^(4) is her 彳4, and the formula is calculated by taking the miscellaneous formula. The money is again _ the current implementation ^ / delete. The flow of the axis_lion derivative. After obtaining the secret suture (10), the re-listing of the crystal _ number Wei line process, she misappropriated the lion, Mtw face different batch number = 'fine CD indicates the key size obtained after development, the size of the D D Process not obtained by batch number

如表1所示’目前顯影機台已對六批晶JU完成顯影製程, 已對六批晶®完絲道侧餘而尚錢行帛六道 祕刻σ 根據已知的ADICE雜AHCD值輯取得前五批晶 ’批次控制器 而欲接著計算第六批(㈣晶圓的製程控製參數以對顯影製=== Client's Docket No. : PT.AP-527 TT's Docket No : 0532-A40585-TW / Final / Alex Chen /12/26/2005 J305875 貝假°又參考第四、五批晶圓的製程參數來計算第六批晶圓的製程 控^數’則表示計算之產品批數為2 (η=2)(不以此為限,可視實際狀 考r更夕批曰曰圓來°十异製程控製參數)。預設的银刻關鍵尺寸目標值為 _ (肅CH132),顯影關鍵尺寸目標 u 二〇.126),權重係數為0·3(㈣·3),以及職方程式的斜率為__仏 L如附件3所示)。將上述各項參數代人前述之前饋函數與數,即: 數,即: f(FF)6 /m6 0.132-0.134 ' —-=1 , -0.002 0.3 x 0.134) 2 -0.002 + 19.8 + m (〇. 126-0·132)-((λ -x [(0.3 x (-2)+19.8)+(〇.3 x 0 +18.6)] 1 X (19.2 + 18.6) 2 -0.002 + 18.6 :18.9 ° 如上述計算過程所示’可制第六批最佳化製程控制參數,即: 户£2歷2咖^_/(7^)6+/(邱)6=1 + 18.9 = 19.9 ^參考附件* ’經過變異補償後, 可從圖上看出 第2圖係顯示本發日精例之半導縣狀批次鋪絲的架構示意圖。 利用-第-檢測機台取得一第一晶圓批量之一第一關鍵尺寸(步驟 si),將該第-關鍵尺寸值傳送給一批量控制器(步驟S2),該批量控制 器根據該H鍵尺寸鋪複數餘參數計算轉制轉u批量之 -製程控制參數(步驟S3) ’上述複數製程參數包括顯影後所得之關鍵尺 寸(AEICD)、侧後所得之關鍵尺寸(施⑶)、執行姓刻製程所需之 相關控制變數值後、權重係數(w)、顯影關鍵尺寸的目標值(adicd Target)、蝕刻關鍵尺寸的目標值(AEICDTarge〇以及根據實驗設計結果 (DOE Result)所得之斜率(α )。根據該製程控制參數對該第一晶圓批 量執行一製程並同時執行一變異補償操作(步驟S4),並且利用一第二檢As shown in Table 1, 'the current development machine has completed the development process for the six batches of crystal JU. The six batches of crystals have been completed on the side of the wire and the money is still six. The secret σ is obtained according to the known ADICE hybrid AHCD value. The first five batches of crystal 'batch controllers want to continue to calculate the sixth batch ((four) wafer process control parameters to the development system === Client's Docket No. : PT.AP-527 TT's Docket No : 0532-A40585-TW / Final / Alex Chen /12/26/2005 J305875 Bay False ° Refer to the process parameters of the fourth and fifth batches of wafers to calculate the process control of the sixth batch of wafers, which means that the number of batches of products calculated is 2 ( η=2) (not limited to this, it can be regarded as the actual shape of the test, and the process is controlled by the same method.) The preset silver key size target value is _ (Su CH132), the development key size The target u is 〇.126), the weight coefficient is 0·3 ((4)·3), and the slope of the equation of equation is __仏L as shown in Annex 3). The above parameters are substituted for the aforementioned feedforward function and the number, ie: number, ie: f(FF)6 /m6 0.132-0.134 '--=1, -0.002 0.3 x 0.134) 2 -0.002 + 19.8 + m ( 〇. 126-0·132)-((λ -x [(0.3 x (-2)+19.8)+(〇.3 x 0 +18.6)] 1 X (19.2 + 18.6) 2 -0.002 + 18.6 :18.9 ° As shown in the above calculation process, the sixth batch of optimized process control parameters can be made, namely: household £2 calendar 2 coffee ^_/(7^)6+/(qiu) 6=1 + 18.9 = 19.9 ^Reference Attachment* 'After the variation compensation, it can be seen from the figure that the second figure shows the schematic diagram of the semi-guided batch-type laying of the fine-grained case of the original day. The first-wafer batch is obtained by the -first-detection machine. One of the first critical dimensions (step si), the first key size value is transmitted to a batch controller (step S2), and the batch controller calculates the conversion-to-u batch-process according to the H-key size Control parameters (step S3) 'The above plurality of process parameters include the critical dimension obtained after development (AEICD), the key dimension obtained after the side (Shi (3)), the relevant control variable value required to perform the last name engraving process, and the weight coefficient (w) ),development The target value of the critical dimension (adicd target), the target value of the etch key dimension (AEICDTarge〇, and the slope (α) obtained from the DOE Result. A process is performed on the first wafer in batch according to the process control parameter. And simultaneously performing a variation compensation operation (step S4), and using a second check

Client’s Docket No. : PT_AP-527 TT's Docket No : 0532-A40585-TW/Final/Alex Chen / 12/26/2005 11 1305875 測機台取得該第—晶圓批量之—第二騎尺寸( 關鍵尺寸傳送給該批量控制器 以做為計算對應—第紐將該第二 制參數的依據(步驟S6)。 阳圓抵$之一製程控 本發明實補之轉難造德次㈣方法 製程之相關參數,並《集所得參數計算取得目前t =料同道晶圓 質與產能。 ,進而提高晶圓的品Client's Docket No. : PT_AP-527 TT's Docket No : 0532-A40585-TW/Final/Alex Chen / 12/26/2005 11 1305875 The measuring machine obtains the first-wafer batch - the second ride size (key size transfer The batch controller is used as a basis for calculating the corresponding - the first parameter of the second system (step S6). The positive round is one of the process control of the present invention, and the related parameters of the process of the process are improved. And "acquisition of the parameters obtained to obtain the current t = the same wafer quality and capacity., and thus improve the wafer products.

=她⑽峨·線,财細噴本發明,任 此賴者,林脫離本發明之精神和侧内,當可作各種之更動與 π,因此本個之鋪範圍當視後附之冑請專職贿界定者為準。 【圖式簡單說明】 第1圖係顯示本發明實例之半導體製造之批次控制系統的架構示意圖。 第2圖係顯示本發明實例之半導體製造之批次控制系統的架構示意圖。 【主要元件符號說明】 100〜批次控制器 110〜ADI機台 120〜姓刻機台 130〜ΑΕΙ機台 140〜實驗設計結果= she (10) 峨 线 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The definition of full-time bribes shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the structure of a batch control system for semiconductor manufacturing according to an example of the present invention. Fig. 2 is a block diagram showing the structure of a batch control system for semiconductor manufacturing of an example of the present invention. [Main component symbol description] 100~batch controller 110~ADI machine 120~name machine 130~ΑΕΙ machine 140~ experimental design result

Client’s Docket No. : ΡΤ.ΑΡ-527 TTssDocketNo : 0532-A40585-TW/Final/AlexChen/ 12/26/2005 12Client’s Docket No. : ΡΤ.ΑΡ-527 TTssDocketNo : 0532-A40585-TW/Final/AlexChen/ 12/26/2005 12

Claims (1)

1305875 十、申請專利範圚·· 製造之批次控制方法,包括下物: 將該第-闕鍵尺寸值傳送給一批量控制哭.第一闕鍵尺寸; 該批量mmmm-隨財m 第-晶圓批量之_製程控制參數; 縣备參數汁异取得對應該 根據該製程控制參數對該第一晶圓批 補償操作; 丁 i釭並8½執行一變異 利用-第二檢測機台取得該第—晶圓批量之—第二關 將該第二關鍵尺寸傳逆仏 、,以及 罝之一製程控制參數的依據。 弟一甜η批 2‘如申請專利麵第〗撕述的铸雜造之 等製程參數至少包括—顯料祕制方去其中,該 寸、-權曹祕、_後所得之關鍵尺 ,揚驗尺寸的目標U卿鍵尺寸的目严值以 及根據一實驗設計結果所得之斜率。 ‘值 等製3程如轉2綱賴轉鮮造之批次蝴方法,其中,該 專製t數更包括執行該製程所需之相關控制參值。 4.如申請糊_丨撕述的料體製造之批次蝴枝,該 實驗設計結果所得之斜率係根據直線方程式穩,其中該直線方程式係 表不該顯影後所得之_尺寸與該侧後所得之關鍵尺寸相對於= 制參數的關係。 μ表扭& 5.—種半導體製造之批次控制系統,包括: -批次控制器’其自—第—檢測機台取得—第—晶圓批量之—第一關 鍵尺寸,根據該第一關鍵尺寸值與複數製程參數計算取得對應該第—曰圓 批量之一製程控制參數,根據該製程控制參數對該第—晶圓抵量執行一製 程並同時執行一變異補償操作,以及自一第二檢測機台取得該第—I圓批 Client’s Docket No_ : FLAP-527 TT s Docket No . 0532-A40585-TW / Final / Alex Chen /12/26/2005 13 1305875 星之第—關鍵尺寸以做為計算對應-第二晶si批量之-製程控制參數的 依據。 ,6.如申%專利範圍第5項所述的半導體製造之批次控制线,其中,該 等製程參數至少包括-顯影後所得之關鍵尺寸、一侧後所得之關鍵尺 寸、-權重係數、-顯影關鍵尺寸的目標值、—侧關鍵尺寸的目標值以 及根據一實驗設計結果所得之斜率。 7_如申明專利細弟6項所述的半導體製造之批次控制系統,其中,該 等製程參數更包括執行該製程所需之相關控制參值。 • — &如申請專利範圍第7項所述的半導體製造之批次控制系統,其中,該 貫驗設計結果所得之斜率係根據一直線方程式而得,其中該直線方程式係 表不該顯影制得之騎尺寸與該侧後所得之關鍵尺相對於該製程控 制參數的關係。1305875 X. Applying for a patent 圚·· Manufacturing batch control method, including the following: Transfer the first 阙 key size value to a batch control cry. The first 阙 key size; The batch mmmm-With the m Wafer batch _ process control parameters; county preparation parameters sap different acquisition corresponding to the process control parameters for the first wafer batch compensation operation; Ding 釭 釭 81 81⁄2 implementation of a variation utilization - second detection machine to obtain the first - Wafer Batch - The second pass passes the second critical dimension to the basis of one of the process control parameters. The process parameters of the brother-sweet η batch 2', such as the application of the patent face, the tormentation, etc., include at least the material secret recipe, the key rule of the inch, the right, the _ after the _, the key The size of the target U-key size of the size and the slope obtained from an experimental design result. The _ value equals 3 steps, such as the conversion of 2 classes to the freshly produced batch butterfly method, wherein the dictator's t number also includes the relevant control parameters required to execute the process. 4. If the batch of the material produced by the paste is applied, the slope obtained by the experimental design is stabilized according to the straight line equation, wherein the straight line equation is not the size obtained after the development and the side is The relationship between the resulting critical dimensions and the = parameter. μ Table Twist & 5. A batch control system for semiconductor manufacturing, including: - batch controller 'its own - first - inspection machine acquisition - first - wafer batch - first critical size, according to the A critical dimension value and a plurality of process parameters are calculated to obtain a process control parameter corresponding to the first-turn circle batch, and a process is performed on the first wafer offset according to the process control parameter, and a variation compensation operation is simultaneously performed, and a The second inspection machine obtains the first-round batch of Client's Docket No_ : FLAP-527 TT s Docket No . 0532-A40585-TW / Final / Alex Chen /12/26/2005 13 1305875 The star of the star - the key size as Calculate the basis of the corresponding-second crystal si batch-process control parameters. 6. The batch control line for semiconductor manufacturing according to claim 5, wherein the process parameters include at least a critical dimension obtained after development, a critical dimension obtained after one side, a weighting factor, - the target value of the development critical dimension, the target value of the side critical dimension, and the slope obtained from an experimental design result. 7_ A batch control system for semiconductor manufacturing as described in claim 6, wherein the process parameters further include associated control parameters required to perform the process. • - &<>> The batch control system for semiconductor manufacturing according to claim 7, wherein the slope obtained from the design result is obtained according to a linear equation, wherein the linear equation is not developed. The ride size and the key rule obtained after the side are relative to the process control parameters. Client’s Docket No. : ΡΤ.ΑΡ-527 TT5s Docket No : 0532-A40585-TW/Final/Alex Chen / 12/26/2005Client’s Docket No. : ΡΤ.ΑΡ-527 TT5s Docket No : 0532-A40585-TW/Final/Alex Chen / 12/26/2005
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