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TWI388973B - Electrical package structure - Google Patents

Electrical package structure Download PDF

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Publication number
TWI388973B
TWI388973B TW99109080A TW99109080A TWI388973B TW I388973 B TWI388973 B TW I388973B TW 99109080 A TW99109080 A TW 99109080A TW 99109080 A TW99109080 A TW 99109080A TW I388973 B TWI388973 B TW I388973B
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TW
Taiwan
Prior art keywords
substrate
wafer
heat dissipating
circuit board
printed circuit
Prior art date
Application number
TW99109080A
Other languages
Chinese (zh)
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TW201133209A (en
Inventor
Yi Rong Lee
Kuo Hsiung Hung
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Powertech Technology Inc
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Publication date
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Priority to TW99109080A priority Critical patent/TWI388973B/en
Publication of TW201133209A publication Critical patent/TW201133209A/en
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Publication of TWI388973B publication Critical patent/TWI388973B/en

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Description

電子構裝結構Electronic structure

本發明是關於一種電子構裝結構,尤其是一種設置散熱柱的電子構裝結構。The present invention relates to an electronic package structure, and more particularly to an electronic package structure in which a heat dissipating post is disposed.

請參圖1顯示一種習知技術之電子構裝結構,其中晶片7設置於基板6上,封裝材料8包覆晶片7,而散熱裝置9設置於封裝材料8之上,以達到散熱之效果。1 shows an electronic structure of a prior art, in which a wafer 7 is disposed on a substrate 6, a packaging material 8 covers the wafer 7, and a heat sink 9 is disposed on the packaging material 8 to achieve a heat dissipation effect.

然而,由於使用者對於系統的高速化、多功能化要求,使得半導體元件的構裝密度越來越高,因而其單位體積或面積的發熱密度也隨之增高。因此散熱與縮短構裝結構之高度往往不能兩全其美。However, since the user's high-speed and multi-functional requirements for the system make the mounting density of the semiconductor element higher and higher, the heat generation density per unit volume or area also increases. Therefore, the heat dissipation and the height of the shortened structure are often not the best of both worlds.

因此,如何兼顧電子構裝結構之大小及散熱功能,是目前亟需努力之目標。Therefore, how to balance the size of the electronic structure and the heat dissipation function is an urgent task.

本發明之一目的為降低電子構裝結構之高度,並可有效散熱。One of the objects of the present invention is to reduce the height of the electronic structure and to effectively dissipate heat.

依據本發明之一實施例,一種電子構裝結構,包括一基板、一晶片、一散熱柱、一封裝材料、複數個焊球、一印刷電路板。晶片係設置於基板上並與基板電性連接。散熱柱係貫穿基板設置,其中散熱柱與晶片之下表面接觸並凸出於基板之下表面。封裝材料包覆基板之上表面與晶片。焊球設置於基板之下表面。基板之下表面的焊球係與印刷電路板電性連接,以及凸出於基板下表面之散熱柱係抵住或嵌入於印刷電路板之上表面。According to an embodiment of the invention, an electronic package structure includes a substrate, a wafer, a heat sink, a package material, a plurality of solder balls, and a printed circuit board. The wafer system is disposed on the substrate and electrically connected to the substrate. The heat dissipating post is disposed through the substrate, wherein the heat dissipating post contacts the lower surface of the wafer and protrudes from the lower surface of the substrate. The encapsulating material covers the upper surface of the substrate and the wafer. The solder balls are disposed on the lower surface of the substrate. The solder ball on the lower surface of the substrate is electrically connected to the printed circuit board, and the heat dissipating post protruding from the lower surface of the substrate is pressed against or embedded in the upper surface of the printed circuit board.

本發明上述及其他態樣、特性及優勢可由附圖及實施例之說明而可更加了解。The above and other aspects, features and advantages of the present invention will become more apparent from the description of the appended claims.

請參照圖2,顯示依據本發明一實施例之一電子構裝結構,包括一印刷電路板1、一基板2、一晶片3、一散熱柱5。基板2以設置於其下表面的複數個焊球21與印刷電路板1電性連接。晶片3以黏著層31固定以設置於基板2上並與基板2電性連接。封裝材料4為包覆晶片3與基板2之上表面。Referring to FIG. 2, an electronic structure according to an embodiment of the present invention includes a printed circuit board 1, a substrate 2, a wafer 3, and a heat dissipating post 5. The substrate 2 is electrically connected to the printed circuit board 1 by a plurality of solder balls 21 disposed on the lower surface thereof. The wafer 3 is fixed by the adhesive layer 31 to be disposed on the substrate 2 and electrically connected to the substrate 2 . The encapsulating material 4 covers the upper surface of the wafer 3 and the substrate 2.

其中如圖所示,晶片3可以複數條引線32電性連接至基板2。此外,在另一實施例中,晶片3亦可以複數個焊球電性連接至基板2。As shown in the figure, the wafer 3 can be electrically connected to the substrate 2 by a plurality of leads 32. In addition, in another embodiment, the wafer 3 may also be electrically connected to the substrate 2 by a plurality of solder balls.

其中,散熱柱5為貫穿基板2設置,散熱柱5與晶片3之下表面接觸並凸出於基板2之下表面。相較於圖1所示之先前技術之電子構裝結構,本發明因為可直接與晶片3接觸,因此散熱效果更佳;並且因為本發明不需於封裝材料4之上設置散熱元件,因此可降低電子構裝結構的高度。The heat dissipating post 5 is disposed through the substrate 2, and the heat dissipating post 5 is in contact with the lower surface of the wafer 3 and protrudes from the lower surface of the substrate 2. Compared with the prior art electronic structure shown in FIG. 1, the present invention has better heat dissipation effect because it can directly contact the wafer 3; and because the present invention does not need to provide a heat dissipating component on the package material 4, Reduce the height of the electronic structure.

請參照圖3,在一實施例之中,散熱柱5抵住印刷電路板1之上表面,以達固定的作用。請參照圖4,在又另一實施例之中,散熱柱5嵌入於印刷電路板1之上表面,以使固定的作用為更佳。Referring to FIG. 3, in an embodiment, the heat dissipating post 5 abuts against the upper surface of the printed circuit board 1 to achieve a fixed function. Referring to FIG. 4, in still another embodiment, the heat dissipating post 5 is embedded on the upper surface of the printed circuit board 1 to make the fixing function better.

其中,散熱柱5之材料與一般散熱元件相同,包含但不限於鋁、銅等高導熱係數之金屬。此外,散熱柱5之個數、形狀可視需求彈性設置。請參照圖5,散熱柱5可為2個,然而,亦可更多。散熱柱的形狀亦未受限,其可包含但不限於圓柱、長方柱等。The material of the heat dissipating post 5 is the same as that of a general heat dissipating component, and includes, but is not limited to, a metal having a high thermal conductivity such as aluminum or copper. In addition, the number and shape of the heat dissipation columns 5 can be flexibly set as needed. Referring to FIG. 5, the number of the heat dissipation columns 5 may be two, however, more may be used. The shape of the heat dissipating post is also not limited, and may include, but is not limited to, a cylinder, a rectangular column, and the like.

綜合上述,本發明藉由設置貫穿基板並與晶片連接之散熱柱,使得本發明可降低構裝結構之高度並有效散熱,此外,散熱柱亦可具有加強固定的作用。In summary, the present invention can reduce the height of the structure and effectively dissipate heat by providing a heat dissipation column that penetrates the substrate and is connected to the wafer. In addition, the heat dissipation column can also have a reinforcing and fixing function.

以上所述之實施例僅是為說明本發明之技術思想及特點,其目的在使熟習此項技藝之人士能夠瞭解本發明之內容並據以實施,當不能以之限定本發明之專利範圍,即大凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵蓋在本發明之專利範圍內。The embodiments described above are only intended to illustrate the technical idea and the features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the contents of the present invention and to implement the present invention. That is, the equivalent variations or modifications made by the spirit of the present invention should still be included in the scope of the present invention.

1‧‧‧印刷電路板1‧‧‧Printed circuit board

2‧‧‧基板2‧‧‧Substrate

21‧‧‧焊球21‧‧‧ solder balls

3‧‧‧晶片3‧‧‧ wafer

31‧‧‧黏著層31‧‧‧Adhesive layer

32‧‧‧引線32‧‧‧Leader

4‧‧‧封裝材料4‧‧‧Packaging materials

5‧‧‧散熱柱5‧‧‧ Thermal column

6‧‧‧基板6‧‧‧Substrate

7‧‧‧晶片7‧‧‧ wafer

8‧‧‧封裝材料8‧‧‧Packaging materials

9‧‧‧散熱裝置9‧‧‧heating device

圖1為示意圖顯示習知技術之電子構製結構。BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view showing an electronic construction structure of a prior art.

圖2為示意圖顯示依據本發明一實施例之電子構裝結構。2 is a schematic view showing an electronic structure according to an embodiment of the present invention.

圖3為示意圖顯示依據本發明另一實施例之電子構裝結構。3 is a schematic view showing an electronic structure according to another embodiment of the present invention.

圖4為示意圖顯示依據本發明再一實施例之電子構裝結構。4 is a schematic view showing an electronic structure according to still another embodiment of the present invention.

圖5為示意圖顯示依據本發明又一實施例之電子構裝結構。FIG. 5 is a schematic view showing an electronic structure according to still another embodiment of the present invention.

1...印刷電路板1. . . A printed circuit board

2...基板2. . . Substrate

21...焊球twenty one. . . Solder ball

3...晶片3. . . Wafer

31...黏著層31. . . Adhesive layer

32...引線32. . . lead

4...封裝材料4. . . Packaging material

5...散熱柱5. . . Heat sink

Claims (6)

一種電子構裝結構,包含:一基板;一晶片,係設置於該基板上並與該基板電性連接;一散熱柱,係貫穿該基板設置,其中該散熱柱與該晶片之下表面接觸並凸出於該基板之下表面;一封裝材料,係包覆該基板之上表面與該晶片;複數個焊球,係設置於該基板之下表面;以及一印刷電路板,其中該基板之下表面的該些焊球係與該印刷電路板電性連接,以及凸出於該基板下表面之該散熱柱係抵住或嵌入於該印刷電路板之上表面。 An electronic structure comprising: a substrate; a wafer disposed on the substrate and electrically connected to the substrate; a heat dissipating post disposed through the substrate, wherein the heat dissipating post is in contact with the lower surface of the wafer Projecting a lower surface of the substrate; a packaging material covering the upper surface of the substrate and the wafer; a plurality of solder balls disposed on a lower surface of the substrate; and a printed circuit board, wherein the substrate is under the substrate The solder balls of the surface are electrically connected to the printed circuit board, and the heat dissipating post protruding from the lower surface of the substrate is pressed against or embedded in the upper surface of the printed circuit board. 如請求項1所述之電子構裝結構,更包含一黏著層,用以將該晶片固定於該基板上。 The electronic package structure of claim 1 further comprising an adhesive layer for fixing the wafer to the substrate. 如請求項1所述之電子構裝結構,更包含複數條引線,用以電性連接該晶片與該基板。 The electronic component structure of claim 1 further comprising a plurality of leads for electrically connecting the wafer to the substrate. 如請求項1所述之電子構裝結構,更包含複數個焊球,用以電性連接該晶片與該基板。 The electronic component structure of claim 1, further comprising a plurality of solder balls for electrically connecting the wafer to the substrate. 如請求項1所述之電子構裝結構,其中凸出於該基板下表面之該散熱柱係抵住該印刷電路板之上表面。 The electronic component structure of claim 1, wherein the heat dissipating post protruding from the lower surface of the substrate is against the upper surface of the printed circuit board. 如請求項1所述之電子構裝結構,其中凸出於該基板下表面之該散熱柱係嵌入於該印刷電路板之上表面。 The electronic component structure of claim 1, wherein the heat dissipating post protruding from the lower surface of the substrate is embedded in an upper surface of the printed circuit board.
TW99109080A 2010-03-26 2010-03-26 Electrical package structure TWI388973B (en)

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TWI388973B true TWI388973B (en) 2013-03-11

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