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TWI358092B - Method for making thin film transistor - Google Patents

Method for making thin film transistor Download PDF

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TWI358092B
TWI358092B TW97119104A TW97119104A TWI358092B TW I358092 B TWI358092 B TW I358092B TW 97119104 A TW97119104 A TW 97119104A TW 97119104 A TW97119104 A TW 97119104A TW I358092 B TWI358092 B TW I358092B
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carbon nanotube
layer
thin film
film transistor
source
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TW97119104A
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Chinese (zh)
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TW200949954A (en
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Kai-Li Jiang
Qun-Qing Li
Shou-Shan Fan
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Hon Hai Prec Ind Co Ltd
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100年.11·月23日梭正替^頁 1358092 六、發明說明: 【發明所屬之技術領域】 [0001]本發明涉及一種薄膜電晶體的製備方法,尤其涉及一種 基於奈米碳管的薄膜電晶體的製備方法。 【先前技術】 _2]薄膜電晶體(Thin F i lm Transi stor,TFT )係現代 微電子技術中的一種關鍵性電子元件,目前已經被廣泛 的應用於平板顯示器等領域。薄膜電晶體主要包括閘極 、絕緣層、半導體層 '源極和汲極◊其中,源極和没極 間隔設置並與半導體層電連接,閘極通過絕緣層與半導 體層及源極和汲極間隔絕緣設置。所述半導體層位於所 述源極和汲極之間的區域形成一通道區域。薄膜電晶體 中的閘極、源極、汲極均由導電材料構成,該導電材料 一般爲金屬或合金。當於閘極上施加一電壓時,與閘極 通過絕緣層間隔設置的半導體層中的通道區域會積累載 子’當載子積累到一定程度,與半導體層電連接的源極 / 没極之間將導通,從而有電流從源極流向沒極。於實際 應用中’對薄膜電晶體的要求係希望得到較大的開關電 流比。影響上述開關電流比的因素除薄膜電晶體的製備 工藝外’薄膜電晶體半導體層中半導體材料的載子移動 率爲影響開關電流比的最重要的影響因素之一。 [〇〇〇3]先前技術中’薄膜電晶體中形成半導體層的材料爲非晶 矽、多晶矽或有機半導體聚合物等(R. E. I.100 years.11.23月23日梭正替^页1358092 VI. Description of the invention: [Technical field of invention] [0001] The present invention relates to a method for preparing a thin film transistor, and more particularly to a film based on a carbon nanotube A method of preparing a crystal. [Prior Art] _2] Thin Film Silicon Transistor (TFT) is a key electronic component in modern microelectronics technology and has been widely used in flat panel displays and other fields. The thin film transistor mainly comprises a gate, an insulating layer, a semiconductor layer 'source and a drain ◊, wherein the source and the gate are spaced apart from each other and electrically connected to the semiconductor layer, and the gate passes through the insulating layer and the semiconductor layer and the source and the drain Space insulation setting. The semiconductor layer is located in a region between the source and the drain to form a channel region. The gate, source and drain of the thin film transistor are each composed of a conductive material, which is typically a metal or an alloy. When a voltage is applied to the gate, the channel region in the semiconductor layer spaced apart from the gate through the insulating layer accumulates between the carrier's when the carrier accumulates to a certain extent and the source/drain is electrically connected to the semiconductor layer. It will conduct, so that current flows from the source to the pole. In practical applications, the requirement for thin film transistors is expected to result in a larger switching current ratio. Factors affecting the above-mentioned switching current ratio Except for the preparation process of the thin film transistor, the carrier mobility of the semiconductor material in the thin film transistor semiconductor layer is one of the most important factors affecting the switching current ratio. [〇〇〇3] In the prior art, a material for forming a semiconductor layer in a thin film transistor is an amorphous germanium, a polycrystalline germanium or an organic semiconductor polymer (R. E. I.

Schropp, B. Stannowski, J. K. Rath, New challenges in thin film transistor research, 097119104 表單编號A0101 第4頁/共29頁 1003436459-0 1358092 100年.11.月23曰梭正§«頁Schropp, B. Stannowski, J. K. Rath, New challenges in thin film transistor research, 097119104 Form No. A0101 Page 4 of 29 1003436459-0 1358092 100 years. 11. Month 23 曰 Shuttle §«

Journal of Non-Crystalline Solids, 299-302, 1 304-1310 (2002))。以非晶矽作爲半導體層的非晶矽 薄膜電晶體的製備技術較爲成熟,但於非晶矽薄膜電晶 體中,由於半導體層中通常含有大量的懸挂鍵,使得載 子的遷移率很低,從而導致薄膜電晶體的響應速度較慢 。以多晶矽作爲半導體層的薄膜電晶體相對於以非晶矽 作爲半導體層的薄膜電晶體,具有較高的載子移動率, 故響應速度也較快。但多晶矽薄膜電晶體低溫製備成本 較高,方法較複雜,大面積製備困難,且多晶矽薄膜電 晶體的關態電流較大。相較於上述傳統的無機薄膜電晶 體,採用有機半導體做半導體層的有機薄膜電晶體具有 成本低、製備溫度低的優點,且有機薄膜電晶體具有較 高的柔韌性。但由於有機半導體聚合物於常溫下多爲跳 躍式傳導,表現出較高的電阻率、較低的載子移動率, 使得有機薄膜電晶體的響應速度較慢。 [0004] 奈米碳管具有優異的力學及電學性能。並且,隨著奈米 碳管螺旋方式的變化,奈米碳管可呈現出金屬性或半導 體性。半導體性的奈米碳管具有較高的載子移動率(一 般可達1 000〜1 500cm2V_1s_1),係製備電晶體的理想材 料。先前技術中已有報道採用半導體性奈米碳管-形成奈 米碳管層作爲薄膜電晶體的半導體層。上述採用奈米碳 管層作爲半導體層的薄膜電晶體的製備方法主要包括以 下步驟:將奈米碳管粉末分散於有機溶劑中;通過喷墨 打印的方法將奈米碳管與有機溶劑的混合液打印於絕緣 基板上,待有機溶劑揮發後,於絕緣基板的預定位置上 097119104 表單編號A0101 第5頁/共29頁 1003436459-0 1358092 100年.11月左日梭正替Θ百 形成一奈米碳管層;通過沈積及蝕刻金屬薄膜的方法於 奈米碳管層上形成源極及汲極;於奈米碳管層上沈積一 層氮化矽形成一絕緣層;及於絕緣層上沈積一金屬薄膜 形成閘極。然而,於上述方法中,奈米碳管需要通過有 機溶劑進行分散,奈米碳管易團聚,且分散所用的有機 溶劑易殘留於奈米碳管層中,影響薄膜電晶體的性能。 另外,通過有機溶劑結合的奈米碳管層的結構鬆散,柔 韌性差,不利於製備柔性的薄膜電晶體。Journal of Non-Crystalline Solids, 299-302, 1 304-1310 (2002)). The preparation technique of the amorphous germanium thin film transistor with amorphous germanium as the semiconductor layer is relatively mature, but in the amorphous germanium thin film transistor, since the semiconductor layer usually contains a large number of dangling bonds, the mobility of the carrier is low. , resulting in a slower response of the thin film transistor. A thin film transistor in which polycrystalline germanium is used as a semiconductor layer has a high carrier mobility with respect to a thin film transistor in which amorphous germanium is used as a semiconductor layer, so that the response speed is also fast. However, the low-temperature preparation of polycrystalline germanium thin film transistors is relatively high, the method is complicated, the preparation of large-area thin films is difficult, and the off-state current of polycrystalline germanium thin film transistors is large. Compared with the above-mentioned conventional inorganic thin film transistor, the organic thin film transistor using an organic semiconductor as a semiconductor layer has the advantages of low cost and low preparation temperature, and the organic thin film transistor has high flexibility. However, since the organic semiconductor polymer is mostly jump-conducting at normal temperature, it exhibits high resistivity and low carrier mobility, making the response speed of the organic thin film transistor slow. [0004] Nano carbon tubes have excellent mechanical and electrical properties. Moreover, the carbon nanotubes may exhibit metallic or semi-conducting properties as the nanocarbon tube spirals. Semiconducting carbon nanotubes have a high carrier mobility (typically up to 1 000~1 500 cm2V_1s_1) and are ideal for the preparation of transistors. It has been reported in the prior art to use a semiconducting carbon nanotube-forming carbon nanotube layer as a semiconductor layer of a thin film transistor. The preparation method of the above-mentioned thin film transistor using the carbon nanotube layer as the semiconductor layer mainly comprises the following steps: dispersing the carbon nanotube powder in an organic solvent; mixing the carbon nanotube with the organic solvent by inkjet printing The liquid is printed on the insulating substrate, and after the organic solvent is volatilized, on the predetermined position of the insulating substrate, 097119104, Form No. A0101, Page 5 of 29, 1003436459-0 1358092, 100. November, Zuo Risuo is a substitute for the Θ a carbon nanotube layer; forming a source and a drain on the carbon nanotube layer by depositing and etching a metal thin film; depositing a layer of tantalum nitride on the carbon nanotube layer to form an insulating layer; and depositing on the insulating layer A metal film forms a gate. However, in the above method, the carbon nanotubes need to be dispersed by an organic solvent, the carbon nanotubes are easily agglomerated, and the organic solvent used for dispersion tends to remain in the carbon nanotube layer, affecting the performance of the thin film transistor. In addition, the carbon nanotube layer bonded by the organic solvent has a loose structure and poor flexibility, which is disadvantageous for preparing a flexible thin film transistor.

[0005] 有鑒於此,提供一種方法簡單、適於低成本大量生産的 薄膜電晶體的製備方法實為必要。 【發明内容】 [0006] 一種薄膜電晶體的製備方法,包括以下步驟:提供一生 長基底;於生長基底表面均勻形成一催化劑層;將形成 有催化劑層的生長基底於保護氣體環境下加熱,通入碳 源氣體及載氣,控制載氣與碳源氣的體積比約爲100:1至 100:10,於生長基底表面生長一單壁奈米碳管層;間隔 形成一源極及一汲極,並使該源極及汲極與所述奈米碳 管層電連接;於所述奈米碳管層表面形成一絕緣層;及 於所述絕緣層表面形成一閘極,得到一薄膜電晶體。 [0007] 相較於先前技術,本技術方案實施例提供的採用直接生 長的無序生長的奈米碳管層作爲半導體層的薄膜電晶體 的製備方法具有以下優點:其一,本技術方案通過直接 生長純淨的單壁半導體性奈米碳管層作爲薄膜電晶體的 半導體層,這種半導體層的形成方法比先前技術中的喷 墨打印法形成薄膜電晶體半導體層的方法簡單,無需經 097119104 表單编號Α0101 第6頁/共29頁 1003436459-0 1358092In view of the above, it is necessary to provide a method for preparing a thin film transistor which is simple in method and suitable for mass production at low cost. SUMMARY OF THE INVENTION [0006] A method for preparing a thin film transistor includes the steps of: providing a growth substrate; forming a catalyst layer uniformly on the surface of the growth substrate; heating the growth substrate on which the catalyst layer is formed in a protective gas atmosphere, The carbon source gas and the carrier gas are controlled to control the volume ratio of the carrier gas to the carbon source gas to be about 100:1 to 100:10, and a single-walled carbon nanotube layer is grown on the surface of the growth substrate; the source and the source are formed at intervals. a pole, and electrically connecting the source and the drain to the carbon nanotube layer; forming an insulating layer on the surface of the carbon nanotube layer; and forming a gate on the surface of the insulating layer to obtain a film Transistor. [0007] Compared with the prior art, the method for preparing a thin film transistor using a directly grown disordered carbon nanotube layer as a semiconductor layer provided by the embodiments of the present technical solution has the following advantages: First, the technical solution is adopted. Directly growing a pure single-walled semiconducting carbon nanotube layer as a semiconductor layer of a thin film transistor, the method of forming such a semiconductor layer is simpler than the method of forming a thin film transistor semiconductor layer by the inkjet printing method of the prior art, without using 097119104 Form No. 1010101 Page 6 of 29 Page 1003436459-0 1358092

100年.11·月23日核正替換頁 過於有機溶劑中分散奈米碳管的步驟。得到的奈米碳管 薄膜中奈米碳管分佈均勻,且純度較高,可避免先前技 術中形成的奈米碳管層中奈米碳管易團聚,從而分佈不 均,且奈米碳管層中易殘留有機溶劑的問題。其妥,通 過控制碳源氣與保護氣體的比例可控制得到的奈米碳管 的半徑,從而得到半導體性的奈米碳管。半導體性的奈 米碳管具有較高的載子移動率,作爲半導體層可以使薄 膜電晶體具有較大的載子移動率和較快響應速度。其三 ,通過控制生長條件使得到的奈米碳管層中的奈米碳管 無序且相互纏繞,故奈米碳管層具有較好的韌性及機械 强度,故採用該無序排列的奈米碳管層作爲半導體層, 可相應的提高薄膜電晶體及薄膜電晶體陣列的柔韌性。 【實施方式】 [0008] 以下將結合附圖詳細說明本技術方案實施例提供的薄膜 電晶體的製備方法。 [0009] 請參閱圖1及圖2,本技術方案第一實施例提供一種頂閘 • 型薄膜電晶體10的製備方法,主要包括以下步驟: [0010] 步驟一:提供一生長基底110。 [0011] 所述生長基底110爲一耐高溫絕緣基底,其材料不限 '只 要確保其熔點高於所述奈米碳管的生長溫度且絕緣即可 。另外,所述生長基底110的材料也可選用大規模集成電 路中的基板的材料。所述生長基底110形狀不限,可爲方 形、圓形等任何形狀。所述生長基底110的大小尺寸不限 ,具體可根據實際情况而定。所述生長基底110具有一平 整的表面。具體地,該生長基底110可選用P型或N型矽基 097119104 表單編號 A0101 第 7 頁/共 29 頁 1003436459-0 1358092 100年.11·月2.3日修正替㈢頁 底、形成有氧化層的矽基底、透明石英基底、或形成有 氧化層的透明石英基底。本實施例優選爲採用形成有氧 化層的矽基底’上述氧化層可以爲一氧化矽層,上述生 長基底110直徑爲4英寸。 [0012] 步驟二:於生長基底110表面均勻形成一催化劑層。 [0013] 本技術方案中’通過電子束蒸發沈積等物理沈積方法於 上述生長基底110表面均勻沈積一催化劑層《該催化劑層 爲一金屬層。上述催化劑層的材料可選用鐵(Fe)、銘100 years, 11th, 23rd, nuclear replacement page The step of dispersing the carbon nanotubes in an organic solvent. The obtained carbon nanotube film has uniform distribution of carbon nanotubes and high purity, which can avoid the agglomeration of the carbon nanotubes in the carbon nanotube layer formed in the prior art, and thus the distribution is uneven, and the carbon nanotubes are distributed. The problem of residual organic solvents in the layer. By properly controlling the ratio of the carbon source gas to the shielding gas, the radius of the obtained carbon nanotube can be controlled to obtain a semiconducting carbon nanotube. The semiconducting carbon nanotube has a high carrier mobility, and as a semiconductor layer, the thin film transistor has a large carrier mobility and a fast response speed. Thirdly, by controlling the growth conditions, the carbon nanotubes in the obtained carbon nanotube layer are disordered and intertwined, so the carbon nanotube layer has good toughness and mechanical strength, so the disordered arrangement of the naphthalene is adopted. As the semiconductor layer, the carbon nanotube layer can correspondingly improve the flexibility of the thin film transistor and the thin film transistor array. [Embodiment] Hereinafter, a method of preparing a thin film transistor provided by an embodiment of the present technical solution will be described in detail with reference to the accompanying drawings. Referring to FIG. 1 and FIG. 2, a first embodiment of the present invention provides a method for fabricating a top gate type thin film transistor 10, which mainly includes the following steps: [0010] Step 1: A growth substrate 110 is provided. [0011] The growth substrate 110 is a high temperature resistant insulating substrate, and the material thereof is not limited to 'ensure that its melting point is higher than the growth temperature of the carbon nanotubes and insulation. In addition, the material of the growth substrate 110 may also be selected from the material of the substrate in a large-scale integrated circuit. The growth substrate 110 is not limited in shape and may have any shape such as a square shape, a circular shape, or the like. The size of the growth substrate 110 is not limited, and may be determined according to actual conditions. The growth substrate 110 has a flat surface. Specifically, the growth substrate 110 may be selected from P-type or N-type sulfhydryl 097119104. Form No. A0101 Page 7 of 29 1003436459-0 1358092 100 years. 11·Month 2.3 Revisions (3) Bottom, oxide layer formed A germanium substrate, a transparent quartz substrate, or a transparent quartz substrate formed with an oxide layer. This embodiment is preferably a crucible substrate formed with an oxide layer. The oxide layer may be a hafnium oxide layer having a diameter of 4 inches. [0012] Step 2: uniformly forming a catalyst layer on the surface of the growth substrate 110. [0013] In the present technical solution, a catalyst layer is uniformly deposited on the surface of the growth substrate 110 by a physical deposition method such as electron beam evaporation deposition. The catalyst layer is a metal layer. The material of the above catalyst layer can be selected from iron (Fe), Ming

(Co)、鎳(Ni)、鎂(Mg)或他們的合金。催化劑層 的厚度爲幾奈米到幾百奈米。 [0014] 本技術方案選爲採用鐵金屬層作爲催化劑層。具體地, 於上述生長基底110上通過電子束蒸發法沈積一鐵金屬層 。鐵金屬層的厚度爲0. 1〜3奈米。上述超薄催化劑層有利 於單壁奈米碳管的生長。 [0015] 步驟三:將形成有催化劑層的生長基底110置於反應爐中 ,於保護氣體環境下加熱至500〜740 °C,通入載氣與碳 · 源氣體,控制載氣與碳源氣的體積比約爲100:1至 100:10範圍内’生長得到無序的單壁奈米碳管層140, 作爲薄膜電晶體10的半導體層。 [0016] 步驟三具體包括以下步驟:首先,將形成有催化劑層的 生長基底110置於反應爐中;其次,於反應爐中通入保護 氣體並加熱上述形成有催化劑層的生長基底110至 500〜740 °C ;最後,於反應爐中通入碳源氣與載氣反應 約5~30分鐘。其中,碳源氣的流量約爲5〜50seem,優選 097119104 表單编號A0101 第8頁/共29頁 1003436459-0 1358092 100年11月左日按正替换頁 爲20sccm。載氣的減量約爲500sccra。碳源氣可選用乙 炔、乙烯、曱烷、一氧化碳等化學性質較活潑的碳氫化 合物,優選爲乙炔。載氣爲氫氣。保護氣體爲氮氣或惰 性氣體。 [0017] 通過上述步驟三生長的奈米碳管的管壁數與載氣和碳源(Co), nickel (Ni), magnesium (Mg) or their alloys. The thickness of the catalyst layer is from several nanometers to several hundred nanometers. [0014] The technical solution is selected to use an iron metal layer as a catalyst layer. Specifically, an iron metal layer is deposited by electron beam evaporation on the growth substrate 110 described above. 1〜3纳米。 The thickness of the iron metal layer is 0. 1~3 nm. The above ultrathin catalyst layer is advantageous for the growth of single-walled carbon nanotubes. [0015] Step 3: The growth substrate 110 formed with the catalyst layer is placed in a reaction furnace, heated to 500 to 740 ° C under a protective gas atmosphere, and a carrier gas and a carbon source gas are introduced to control the carrier gas and the carbon source. The volume ratio of gas is about 100:1 to 100:10, and a disordered single-walled carbon nanotube layer 140 is grown as a semiconductor layer of the thin film transistor 10. [0016] Step 3 specifically includes the following steps: first, placing the growth substrate 110 formed with the catalyst layer in the reaction furnace; secondly, introducing a shielding gas into the reaction furnace and heating the growth substrate 110 to 500 having the catalyst layer formed thereon ~740 °C; Finally, the carbon source gas is introduced into the reaction furnace to react with the carrier gas for about 5 to 30 minutes. Wherein, the flow rate of the carbon source gas is about 5 to 50 seem, preferably 097119104. Form No. A0101 Page 8 of 29 1003436459-0 1358092 In November of the 100th, the left replacement page is 20sccm. The reduction in carrier gas is approximately 500 sccra. As the carbon source gas, a chemically active hydrocarbon such as acetylene, ethylene, decane or carbon monoxide may be used, and acetylene is preferable. The carrier gas is hydrogen. The shielding gas is nitrogen or an inert gas. [0017] The number of tubes of the carbon nanotubes grown by the above step three and the carrier gas and carbon source

氣的比例相關。通過將上述載氣與碳源氣的體積比控制 於100:1至100:10的範圍内,可以控制生長得到的奈米 碳管層140中的奈米碳管爲單壁奈米碳管,並且,可以控 制該奈米碳管的直徑於0. 5奈米到10奈米之間。本實施例 中生長得到的奈米碳管的直徑爲2奈米。奈米碳管層140 的厚度爲0. 5奈米〜100微米。 [0018] 如圖3所示,該奈米碳管層140包括多個無序並相互纏繞 生長的含有半導體性奈米碳管的奈米碳管層140。通過上 述控制生長條件,該奈米碳管層140中基本不含有雜質, 如無定型碳或殘留的催化劑金屬顆粒等。奈米碳管層140 - ^ 中半導體性奈米碳管的比例占奈米碳管總質量的2/3。The proportion of gas is related. By controlling the volume ratio of the carrier gas to the carbon source gas to be in the range of 100:1 to 100:10, the carbon nanotubes in the grown carbon nanotube layer 140 can be controlled to be single-walled carbon nanotubes. 5纳米之间之间之间之间。 The diameter of the carbon nanotubes between 0.5 nm to 10 nm. The carbon nanotubes grown in this example had a diameter of 2 nm. 5纳米〜100微米。 The thickness of the carbon nanotube layer 140 is 0. 5 nanometers ~ 100 microns. As shown in FIG. 3, the carbon nanotube layer 140 includes a plurality of carbon nanotube layers 140 containing semiconductor carbon nanotubes which are disordered and intertwined and grown. The carbon nanotube layer 140 contains substantially no impurities such as amorphous carbon or residual catalyst metal particles, etc., by controlling the growth conditions as described above. The proportion of semiconducting carbon nanotubes in the carbon nanotube layer 140 - ^ accounts for 2/3 of the total mass of the carbon nanotubes.

[0019] 可以理解,由於上述奈米碳管的生長溫度較高,故,上 述生長基底110的材料必須選用耐高溫的硬性材料,從而 限制了基底材料的選擇。爲使該薄膜電晶體10能够採用 更廣泛的基底材料,尤其爲一柔性基底材料,從而形成 一柔性薄膜電晶體10,於生長奈米碳管層140後可以進一 步通過一轉印步驟,將該奈米碳管層140轉印於柔性基底 [0020] 具體地,該轉印步驟包括以下步驟:首先,提供一絕緣 097119104 表單編號A0101 第9.頁/共29頁 1003436459-0 1358092 [0021] [0022] [0023] 097119104 1100年.11月23日梭正替㈢頁 基底,其次,將該形成有奈米碳管層14〇的生長基底11〇 倒扣於絕緣基底上使奈米碳管層i4〇表面與絕緣基底表面 接觸,從而形成一從上到下依次包括生長基底11〇、奈米 碳管層140及絕緣基底的三層結構;再次,熱壓該三層結 構,最後,移去生長基底110,從而使上述奈米碳管層 140粘附於絕緣基底表面。 該絕緣基底的材料爲一柔性材料,如塑料或樹脂材料等 β本實施例中,該絕緣基底爲一PET薄膜,熱壓的溫声 時間取决於絕緣基底的材料種類。當該絕緣基底的材料 爲一塑料或樹脂時,熱壓溫度爲50〜2〇(rc,熱壓時門爲 5〜30分鐘。由於本實施例生長的無序奈米碳管層丨4〇中 奈米碳管非常純淨,且由於奈米碳管本身的比表面積隹的 常大,故該奈米碳管層14〇本身具有較强的粘性。故 將奈米碳管層14D的生長基底11Q倒扣於絕緣基底上時备 奈米碳管層140能够枯附於絕緣基底表面。通過熟壓步’ ,奈米破管與絕緣基底表面的結合更爲緊密,從而外, 容易地與生長基底110分離。 ° 步驟四:間隔形成一源極151及一汲極152,並使該原 151及汲極152與上述奈米碳管層14〇電連接。 “極 該源極151及汲極152的材料應具有較好的導電性。 具體 地,該源極151及汲極152的材料可以爲金 厶 ' σ 金'、 錫氧化物(ITO)、銻錫氧化物(AT〇)、導電銀膠、 電聚合物及奈米碳管薄膜等導電材料。根據形成源極 及汲極152的材料種類的不同,可以採用不同方法形成^ 源極151及没極152。具體地,當該源極151及及成/亥 表單编號A0101 第1〇頁/共29頁 的 1〇〇3436459-〇 1358092[0019] It can be understood that, because the growth temperature of the above-mentioned carbon nanotubes is relatively high, the material of the above-mentioned growth substrate 110 must be selected from a hard material having high temperature resistance, thereby limiting the selection of the substrate material. In order to enable the thin film transistor 10 to adopt a wider base material, especially a flexible base material, to form a flexible thin film transistor 10, after the carbon nanotube layer 140 is grown, the transfer step can be further performed by a transfer step. The carbon nanotube layer 140 is transferred to the flexible substrate. [0020] Specifically, the transfer step includes the following steps: First, provide an insulation 097119104 Form No. A0101 Page 9. Total 29 Page 1003436459-0 1358092 [0021] 0022] [0023] 097119104 1100. November 23, the shuttle is replaced by a (3) page substrate, and secondly, the growth substrate 11 formed with the carbon nanotube layer 14〇 is folded over the insulating substrate to make the carbon nanotube layer The surface of the i4〇 is in contact with the surface of the insulating substrate to form a three-layer structure including a growth substrate 11〇, a carbon nanotube layer 140 and an insulating substrate from top to bottom; again, the three-layer structure is hot-pressed, and finally, removed. The substrate 110 is grown such that the above-described carbon nanotube layer 140 is adhered to the surface of the insulating substrate. The material of the insulating substrate is a flexible material such as a plastic or a resin material. In the present embodiment, the insulating substrate is a PET film, and the warming time of the hot pressing depends on the material type of the insulating substrate. When the material of the insulating substrate is a plastic or a resin, the hot pressing temperature is 50 to 2 Torr (rc, and the door is 5 to 30 minutes at the time of hot pressing. The disordered carbon nanotube layer 丨 4〇 grown by the present embodiment) The carbon nanotubes are very pure, and because the specific surface area of the carbon nanotubes itself is very large, the carbon nanotube layer 14 has a strong viscosity. Therefore, the growth substrate of the carbon nanotube layer 14D is used. When the 11Q is buckled on the insulating substrate, the carbon nanotube layer 140 can be adhered to the surface of the insulating substrate. By the ripe pressing step, the nano tube is tightly bonded to the surface of the insulating substrate, thereby easily and growing. The substrate 110 is separated. Step 4: A source 151 and a drain 152 are formed at intervals, and the original 151 and the drain 152 are electrically connected to the carbon nanotube layer 14 。. "The source 151 and the drain are extremely The material of 152 should have better conductivity. Specifically, the material of the source 151 and the drain 152 may be gold 厶 ' σ gold ', tin oxide (ITO), antimony tin oxide (AT 〇), and conductive. Conductive materials such as silver paste, electropolymer, and carbon nanotube film. According to the material forming the source and the drain 152 Depending on the type, the source 151 and the gate 152 can be formed by different methods. Specifically, when the source 151 and the _ _ form number A0101 page 1 / page 29 of 1 〇〇 3436459-〇 1358092

[loo^llj 23B 材料爲金屬、合金、ITO或AT〇時,可以通過蒸鍍、濺射 、沈積、掩模及蝕刻等方法形成源極151及汲極152。當 該源極151及汲極152的材料爲導電銀膠、導電聚合物或 奈米碳官薄膜時,可以通過印刷塗附或直接粘附的方法 ,將該導電銀膠或奈米碳管薄膜塗附或粘附於生長基底 110/絕緣基底或奈米碳管層14〇表面,形成源極151及汲 極152。一般地,該源極151及汲極152的厚度爲〇. 5奈米 ~100微米,源極151至汲極152之間的距離爲1〜1〇〇微米 [0024] 本實施例中,該源極151及汲極152材料爲金屬》上述步 驟四其體可通過兩種方式進行。第一種方式具體包括以 下步驟:首先,於上述奈米碳管層140表面均勻塗覆一層 光刻膠;其次’通過曝光及顯影等光刻方法於光刻膠上 形成源極151及汲極152區域’於該源極151及汲極152區 域露出該奈米碳管層140 ;再次,通過真空蒸鍍、磁控截 射或電子束蒸發沈積等沈積方法於上述光刻膠、源極151 及汲·極152區域表面沈積一金屬層,優選爲把、欽或錄金 屬層;最後,通過丙酮等有機溶劑去除光刻膠及其上的 金屬層,即得到形成於奈米碳管層140上的源極151及汲 極152。第二種方式具體包括以下步驟:首先,於奈米碳 管層140表面沈積一金屬層;其次,於^金屬層表面塗覆 一層光刻膠;再次,通過曝光及顯影等光刻方法去除源 極151區域及沒極152區域外的光刻膠;最後,通過電槳 蝕刻等方法去除源極151區域及汲極152區域外的金屬層 ’並以丙酮等有機溶劑去除源極151區域及汲極152區域 097119104. 表單編號A0101 第11 1/共29頁 1003436459-0 1358092 100年.11月23日修正替私百 上的光刻膠,即得到形成於奈米碳管層140上的源極151 及汲極152。本實施例中,該源極151及汲極152的厚度 爲1微米,源極151至汲極152之間的距離爲50微米。[loo^llj 23B When the material is metal, alloy, ITO or AT, the source 151 and the drain 152 can be formed by vapor deposition, sputtering, deposition, masking, and etching. When the material of the source 151 and the drain 152 is a conductive silver paste, a conductive polymer or a nano-carbon film, the conductive silver paste or the carbon nanotube film can be printed or directly adhered. The source 151 and the drain 152 are formed by coating or adhering to the surface of the growth substrate 110 / insulating substrate or the carbon nanotube layer 14 . Generally, the thickness of the source 151 and the drain 152 is 0.5 nm to 100 μm, and the distance between the source 151 and the drain 152 is 1 to 1 μm. [0024] In this embodiment, The source 151 and the drain 152 are made of metal. The above step 4 can be carried out in two ways. The first method specifically includes the following steps: first, uniformly coating a layer of photoresist on the surface of the carbon nanotube layer 140; secondly, forming a source 151 and a drain on the photoresist by photolithography such as exposure and development. The 152 region 'exposes the carbon nanotube layer 140 in the source 151 and the drain 152 region; again, the photoresist, the source 151 is deposited by vacuum evaporation, magnetron sputtering or electron beam evaporation deposition. And depositing a metal layer on the surface of the 152· pole 152 region, preferably a metal layer, or a metal layer; and finally, removing the photoresist and the metal layer thereon by an organic solvent such as acetone, thereby forming a carbon nanotube layer 140. Source 151 and drain 152 on top. The second method specifically includes the following steps: first, depositing a metal layer on the surface of the carbon nanotube layer 140; secondly, coating a surface of the metal layer with a photoresist; again, removing the source by photolithography such as exposure and development The photoresist in the region of the pole 151 and the region outside the gate 152; finally, the metal layer outside the region of the source 151 and the region of the drain 152 is removed by electric pad etching or the like, and the source 151 region and the germanium are removed by an organic solvent such as acetone. Pole 152 area 097119104. Form No. A0101 No. 11 1/29 pages 1003436459-0 1358092 100 years. On November 23rd, the photoresist was modified to obtain the source formed on the carbon nanotube layer 140. 151 and bungee 152. In this embodiment, the source 151 and the drain 152 have a thickness of 1 μm, and the distance between the source 151 and the drain 152 is 50 μm.

[0025] 可以理解,爲了得到具有更好的半導體性的奈米碳管層 140,於形成源極151及汲極152之後,可以進一步包括 一去除奈米碳管層140中的金屬性奈米碳管的步驟。具體 包括以下步驟:首先,提供一外部電源,其次,將外部 電源的正負兩極連接至源極151及汲極152 ;最後,通過 外部電源於源極151及汲極152兩端施加一較大電壓,使 金屬性的奈米碳管發熱並燒蝕,獲得一半導體性的奈米 碳管層140。 [0026] 另外,上述去除奈米碳管層140中金屬性奈米碳管的方法 也可以使用氫電漿、微波、太赫茲(THz)、紅外線(IR )、紫外線(UV)或可見光(Vis)照射該奈米碳管層 140,使金屬性的奈米碳管發熱並燒蝕,獲得一半導體性 的奈米碳管層140。 [0027] 步驟五:於上述奈米碳管層140上形成一絕緣層130。 [0028] 該絕緣層130的材料可以爲氮化矽、氧化矽等硬性材料或 苯並環丁烯(BCB)、聚酯或丙烯酸樹脂等柔性材料。根據 絕緣層130的材料種類的不同,可以採用不同方法形成該 絕緣層130。具體地,當該絕緣層130的材料爲氮化矽或 氧化矽時,可以通過沈積的方法形成絕緣層130。當該絕 緣層130的材料爲苯並環丁烯(BCB)、聚酯或丙烯酸樹脂 時,可以通過印刷塗附的方法形成絕緣層130。一般地, 097119104 表單编號A0101 第12頁/共29頁 1003436459-0 1358092[0025] It can be understood that, in order to obtain the carbon nanotube layer 140 having better semiconductivity, after forming the source 151 and the drain 152, the metal nano-deposited in the carbon nanotube layer 140 may be further included. The steps of the carbon tube. Specifically, the method includes the following steps: first, providing an external power supply, and secondly, connecting the positive and negative poles of the external power source to the source 151 and the drain 152; finally, applying a large voltage across the source 151 and the drain 152 through the external power source. The metallic carbon nanotube is heated and ablated to obtain a semiconducting carbon nanotube layer 140. In addition, the above method of removing the metallic carbon nanotubes in the carbon nanotube layer 140 may also use hydrogen plasma, microwave, terahertz (THz), infrared (IR), ultraviolet (UV) or visible light (Vis). The carbon nanotube layer 140 is irradiated, and the metallic carbon nanotube is heated and ablated to obtain a semiconducting carbon nanotube layer 140. [0027] Step 5: forming an insulating layer 130 on the carbon nanotube layer 140. [0028] The material of the insulating layer 130 may be a hard material such as tantalum nitride or tantalum oxide or a flexible material such as benzocyclobutene (BCB), polyester or acrylic resin. The insulating layer 130 may be formed by different methods depending on the kind of the material of the insulating layer 130. Specifically, when the material of the insulating layer 130 is tantalum nitride or hafnium oxide, the insulating layer 130 may be formed by a deposition method. When the material of the insulating layer 130 is benzocyclobutene (BCB), polyester or acrylic resin, the insulating layer 130 can be formed by a printing coating method. In general, 097119104 Form No. A0101 Page 12 of 29 1003436459-0 1358092

.100年.11月2·3日修正替換頁 該絕緣層130的厚度爲0.5奈米〜100微米。 [0029] 本實施方式中採用電漿化學氣相沈積等沈積方法形成一 氮化矽絕緣層130覆蓋於奈米碳管層140及形成於奈米碳 管層140上的源極151及汲極152表面。絕緣層130的厚度 約爲1微米。 [0030] 可以理解,根據薄膜電晶體10的不同應用,可以採用與 形成源極151及汲極152相似的光刻或蝕刻的方法將所述 源極151及汲極152的一部分暴露於絕緣層130外。 [0031] 步驟六:形成一閘極120於所述絕緣層130表面,得到一 薄膜電晶體10。 [0032] 該閘極120的材料應具有較好的導電性。具體地,該閘極 120的材料可以爲金屬、合金、ΙΤΟ、ΑΤΟ、導電銀膠、 導電聚合物及奈米碳管薄膜等導電材料。該金屬或合金 材料可以爲鋁、銅、鎢、鉬、金或它們的合金。具體地 ,當該閘極120的材料爲金屬、合金、ΙΤ0或ΑΤΟ時,可 以通過蒸鍍、濺射、沈積、掩模及蝕刻等方法形成閘極 120。當該閘極120的材料爲導電銀膠、導電聚合物或奈 米碳管薄膜時,可以通過直接粘附或印刷塗附的方法形 成閘極120。一般地,該閘極120的厚度爲0. 5奈米~100 微米。 [0033] 本技術方案實施例中通過與形成源極151及汲極152相似 的方法於絕緣層130表面且與半導體層相對的位置形成一 導電薄膜作爲閘極120。該閘極120通過絕緣層130與半 導體層電絕緣。本技術方案實施例中,所述閘極120的材 097119104 表單編號 Α0101 第 13 頁/共 29 頁 1003436459-0 1358092 100年11·月23日核正替私頁 料爲鋁,閘極120的厚度約爲1微米。 [0034] 請參閱圖4及圖5,本技術方案第二實施例提供一種底閘 型薄膜電晶體20的製備方法,其與第一實施例中薄膜電 晶體10的製備方法基本相同。主要區別在於,本實施例 中形成的薄膜電晶體20爲一底閘型結構。本技術方案第 二實施例薄膜電晶體20的製備方法包括以下步驟: [0035] [0036] [0037] [0038] [0039] [0040] [0041] 步驟一:提供一生長基底。 步驟二:於生長基底表面均勻形成一催化劑層。 步驟三:將形成有催化劑層的生長基底置於反應爐中, 於保護氣體環境下加熱至500~740 °C,通入載氣與碳源 氣體,控制載氣與碳源氣的體積比約爲100:1至100:10 範圍内,生長得到無序的單壁奈米碳管層240。 步驟四:提供一絕緣基底210。 步驟五:形成一閘極220於所述絕緣基底210表面。 步驟六:形成一絕緣層230覆蓋所述閘極220。 步驟七:轉印該奈米碳管層240至所述絕緣層230表面。.100. November 2, 3, Revision Replacement Page The thickness of the insulating layer 130 is from 0.5 nm to 100 μm. [0029] In the present embodiment, a tantalum nitride insulating layer 130 is formed by a deposition method such as plasma chemical vapor deposition to cover the carbon nanotube layer 140 and the source 151 and the drain formed on the carbon nanotube layer 140. 152 surface. The insulating layer 130 has a thickness of about 1 micrometer. [0030] It can be understood that, depending on the different applications of the thin film transistor 10, a portion of the source 151 and the drain 152 may be exposed to the insulating layer by photolithography or etching similar to the formation of the source 151 and the drain 152. 130 outside. [0031] Step 6: forming a gate 120 on the surface of the insulating layer 130 to obtain a thin film transistor 10. [0032] The material of the gate 120 should have good electrical conductivity. Specifically, the material of the gate 120 may be a conductive material such as a metal, an alloy, a tantalum, a tantalum, a conductive silver paste, a conductive polymer, or a carbon nanotube film. The metal or alloy material may be aluminum, copper, tungsten, molybdenum, gold or alloys thereof. Specifically, when the material of the gate 120 is metal, alloy, ΙΤ0 or ΑΤΟ, the gate 120 may be formed by evaporation, sputtering, deposition, masking, etching, or the like. When the material of the gate 120 is a conductive silver paste, a conductive polymer or a carbon nanotube film, the gate 120 can be formed by direct adhesion or printing. 5纳米至100微米。 Generally, the thickness of the gate 120 is 0. 5 nm ~ 100 microns. In the embodiment of the present invention, a conductive film is formed as the gate 120 on the surface of the insulating layer 130 and at a position opposite to the semiconductor layer by a method similar to the formation of the source electrode 151 and the drain electrode 152. The gate 120 is electrically insulated from the semiconductor layer by an insulating layer 130. In the embodiment of the technical solution, the material of the gate 120 is 097119104, the form number is Α0101, and the third page is 1003436459-0 1358092. On the 11th, 23rd, the nuclear material is aluminum, and the thickness of the gate 120 is It is about 1 micron. Referring to FIG. 4 and FIG. 5, a second embodiment of the present invention provides a method for fabricating a bottom gate type thin film transistor 20, which is substantially the same as the method for preparing the thin film transistor 10 of the first embodiment. The main difference is that the thin film transistor 20 formed in this embodiment is a bottom gate type structure. The second embodiment of the present invention provides a method for preparing a thin film transistor 20 comprising the following steps: [0035] [0040] [0041] Step 1: Providing a growth substrate. Step 2: uniformly forming a catalyst layer on the surface of the growth substrate. Step 3: placing the growth substrate formed with the catalyst layer in a reaction furnace, heating to 500-740 ° C under a protective gas atmosphere, introducing a carrier gas and a carbon source gas, and controlling the volume ratio of the carrier gas to the carbon source gas. In the range of 100:1 to 100:10, a disordered single-walled carbon nanotube layer 240 is grown. Step 4: Provide an insulating substrate 210. Step 5: Form a gate 220 on the surface of the insulating substrate 210. Step 6: Form an insulating layer 230 to cover the gate 220. Step 7: Transfer the carbon nanotube layer 240 to the surface of the insulating layer 230.

[0042] 該轉印步驟具體包括以下步驟:首先,將該形成有奈米 碳管層240的生長基底倒扣於絕緣基底210上使奈米碳管 層240表面與絕緣層230表面接觸,從而形成一從上到下 依次包括生長基底、奈米碳管層240及絕緣基底210的三 層結構;再次,熱壓該三層結構;最後,移去生長基底 ,從而使上述奈米碳管層240粘附於絕緣層表面。 097119104 表單编號A0101 第14頁/共29頁 1003436459-0 1358092 10 0年.11月2 3日核正替換頁 [0043] 當將該形成有奈米碳管層240的生長基底倒扣於絕緣基底 210上時,應確保該奈米碳管層240表面與絕緣層230表 面相貼合,從而使奈米碳管層240粘附於絕緣層230上。 [0044] 步驟八:間隔形成一源極251及一汲極252,並使該源極 251及汲極252與上述奈米碳管層240電連接。 [0045] 所述源極251、汲極252、閘極220及絕緣層230均可採用 與第一實施例相同的方法形成。 [0046] • 請參閱圖6,本技術方案第三實施例提供一種薄膜電晶體 的製備方法,其與第一實施例薄膜電晶體10的製備方法 基本相同。主要區別在於,本實施例於同一絕緣基底上 形成多個薄膜電晶體,從而形成一薄膜電晶體陣列。本 實施例薄膜電晶體的製備方法具體包括以下步驟: [0047] 步驟一:提供一生長基底。 [0048] 步驟二:於生長基底表面均勻衫成至少一裀催化却層。 • [0049] 具體地,當形成多個催化劑層時,先於生長基底表面形 成一大面積的催化劑層,並採用掩模蝕刻或雷射切割等 方法圖案化該催化劑層,從而於需要形成薄膜電晶體的 不同位置形成多個催化劑層。 [0050] 步驟三:將形成有至少一個催化劑層的生長基底置於反 應爐中,於保護氣體環境下加熱至500〜740 °C,通入載 氣及碳源氣體,控制載氣與碳源氣的體積比約爲100:1至 100:10範圍内,於生長基底表面形成多個無序的單壁奈 米碳管層。 097119104 表單編號A0101 第15頁/共29頁 1003436459-0 1358092 100年.11月23日核正替¥頁 [0051] 當於步驟二中形成一個催化劑層時,該催化劑層具有較 大面積。於步驟三於該較大面積的催化劑層上生長奈米 碳管層後,可以進一步採用一雷射切割或掩模蝕刻的方 法處理該奈米碳管層,從而能够獲得多個奈米碳管層形 成於生長基底表面。 [0052] 當於步驟二中形成多個催化劑層時,於步驟三中可以於 多個催化劑層上直接生長出多個奈米碳管層,從而無需 對奈米碳管層進行切割或餘刻。[0042] The transfer step specifically includes the following steps: first, the growth substrate on which the carbon nanotube layer 240 is formed is inverted on the insulating substrate 210 so that the surface of the carbon nanotube layer 240 is in contact with the surface of the insulating layer 230, thereby Forming a three-layer structure including a growth substrate, a carbon nanotube layer 240, and an insulating substrate 210 in order from top to bottom; again, hot pressing the three-layer structure; finally, removing the growth substrate to thereby make the carbon nanotube layer 240 adheres to the surface of the insulating layer. 097119104 Form No. A0101 Page 14 of 29 1003436459-0 1358092 10 0. November 2 3 Nuclear Replacement Page [0043] When the growth substrate formed with the carbon nanotube layer 240 is inverted to the insulation On the substrate 210, it is ensured that the surface of the carbon nanotube layer 240 is adhered to the surface of the insulating layer 230, so that the carbon nanotube layer 240 is adhered to the insulating layer 230. [0044] Step 8: forming a source 251 and a drain 252 at intervals, and electrically connecting the source 251 and the drain 252 to the carbon nanotube layer 240. [0045] The source electrode 251, the drain electrode 252, the gate electrode 220, and the insulating layer 230 may be formed in the same manner as in the first embodiment. [0046] Referring to FIG. 6, a third embodiment of the present technical solution provides a method for preparing a thin film transistor, which is basically the same as the method for preparing the thin film transistor 10 of the first embodiment. The main difference is that this embodiment forms a plurality of thin film transistors on the same insulating substrate to form a thin film transistor array. The method for preparing the thin film transistor of the embodiment specifically includes the following steps: [0047] Step 1: providing a growth substrate. [0048] Step 2: uniformly lining the surface of the growth substrate to form at least one catalyzed layer. [0049] Specifically, when a plurality of catalyst layers are formed, a catalyst layer of a large area is formed prior to the surface of the growth substrate, and the catalyst layer is patterned by mask etching or laser cutting, etc., thereby forming a thin film. A plurality of catalyst layers are formed at different positions of the transistor. [0050] Step 3: placing the growth substrate formed with at least one catalyst layer in a reaction furnace, heating to 500-740 ° C under a protective gas atmosphere, introducing a carrier gas and a carbon source gas, and controlling the carrier gas and the carbon source. The volume ratio of gas is in the range of about 100:1 to 100:10, and a plurality of disordered single-walled carbon nanotube layers are formed on the surface of the growth substrate. 097119104 Form No. A0101 Page 15 of 29 1003436459-0 1358092 100. November 23rd Nuclear Replacement Page [0051] When a catalyst layer is formed in the second step, the catalyst layer has a large area. After the carbon nanotube layer is grown on the large-area catalyst layer in step three, the carbon nanotube layer may be further processed by a laser cutting or mask etching method, thereby obtaining a plurality of carbon nanotube tubes. A layer is formed on the surface of the growth substrate. [0052] When a plurality of catalyst layers are formed in the second step, a plurality of carbon nanotube layers may be directly grown on the plurality of catalyst layers in the third step, thereby eliminating the need to cut or engrave the carbon nanotube layers. .

[0053] 可以理解,與第一實施例薄膜電晶體10的製備方法相似 ,由於多個奈米碳管層具有較大粘性,本實施例可以通 過一轉印步驟,將上述多個奈米碳管層轉印於一柔性的 絕緣基底上,形成多個柔性薄膜電晶體。 [0054] 步驟四:間隔形成多個源極及多個汲極,並使上述每一 奈米碳管層均與一源極及一汲極電連接。[0053] It can be understood that, similar to the preparation method of the thin film transistor 10 of the first embodiment, since the plurality of carbon nanotube layers have a large viscosity, the embodiment can pass the plurality of nanocarbons by a transfer step. The tube layer is transferred onto a flexible insulating substrate to form a plurality of flexible thin film transistors. [0054] Step 4: forming a plurality of sources and a plurality of drains at intervals, and electrically connecting each of the carbon nanotube layers to a source and a drain.

[0055] 與第一實施例薄膜電晶體1 0中源極及汲極的形成方法相 似,本實施例可以先於形成有多個奈米碳管層的整個生 長基底表面沈積一金屬薄膜,再通過蝕刻等方法圖案化 該金屬薄膜,從而於預定位置上一次形成多個源極及多 個汲極。上述源極及汲極的材料也可爲ITO薄膜、ΑΤΟ薄 膜、導電聚合物薄膜、導電銀膠或奈米碳管薄膜。 [0056] 步驟五:於每一奈米碳管層上形成一絕緣層。與第一實 施例薄膜電晶體10中絕緣層的製備方法相似地的,可以 先於整個生長基底的表面沈積一氮化矽薄膜,再通過蝕 刻等方法圖案化該氮化矽薄膜,從而於預定位置上一次 097119104 表單编號Α0101 第,16頁/共29頁 1003436459-0 1358.092 100年.11月h日梭正替換頁 形成多個絕緣層。上述絕緣層的材料也可爲氧化矽等硬 性材料或苯並環丁烯(BCB)、聚酯或丙烯酸樹脂等柔性材 料。 [0057] 步驟六:於每一絕緣層表面形成一閘極,得到一薄膜電 晶體陣列,該薄膜電晶體陣列包括多個薄膜電晶體。 [0058] 可以理解,’通過與第二實施例相似的方法,也可以形成 一薄膜電晶體陣列,其具體包括以下步驟: [0059] • [0060] 步驟一:提供一生長基底。 步驟二:於生長基底表面均勻形成一催化劑層。 [0061] 步驟三:將形成有催化劑層的生長基底置於反應爐中, 於保護氣體環境下加熱至500〜740 °C,通入載氣與碳源 氣體,控制載氣與碳源氣的體積比約爲100:1至100:10 範圍内,生長得到無序的單壁奈米碳管層。 [0062] 步驟四:提供一絕緣基底。 • [0063] 步驟五:形成一多個閘極於所述絕緣基底表面。 [0064] 步驟六:形成至少一絕緣層覆蓋所述多個閘極。 [0065] 步驟七:轉印上述奈米碳管層至所述絕緣層表面,圖案 化該奈米碳管層,從而形成多個奈米碳管層,該多個奈 米碳管層與上述多個閘極通過絕緣層相對並絕緣設置。 [0066] 步驟八:間隔形成多個源極及多個汲極,並使上述每一 奈米碳管層均與一源極及一汲極電連接。 [0067] 本技術方案實施例提供的薄膜電晶體的製備方法具有以 097119104 表單編號A0101 第17頁/共29頁. 1003436459-0 100年.11.月左日按正^頁 下優點.其一,本技術方案通過直接生長純淨的單壁半. V體性奈米碳管層作爲薄膜電晶體的半導體層,這種半 V體層的形成方法比先前技術中的喷墨打印法形成薄膜 電™體半導體層的方法簡單,無需經過於有機溶劑中分 散不米碳督的步驟。得到的奈米碳管薄膜中奈米碳管分 佈均勻,且純度較高’避免了先前技術中形成的奈米碳 B層中奈米碳營易團聚,從而分佈不均且奈米碳管層 中易殘留有機溶劑的問題。其二,通過控制碳源氣與保 "蔓氣體的比例可以控制得到的奈米碳管的半徑,從而得 g 到半導體性的奈米碳管。半導體性的奈米碳管具有較高 的載子移動率,作爲半導體層可以使薄膜電晶體具有較 - 大的栽子移動率和較快響應速度。其三,通過控制生長 條件使得到的奈米碳管層中的奈米碳管無序且相 互纏繞[0055] Similar to the method of forming the source and the drain of the thin film transistor 10 of the first embodiment, in this embodiment, a metal thin film may be deposited on the surface of the entire growth substrate on which the plurality of carbon nanotube layers are formed, and then The metal thin film is patterned by etching or the like to form a plurality of sources and a plurality of drains at a predetermined position. The material of the source and the drain may also be an ITO film, a tantalum film, a conductive polymer film, a conductive silver paste or a carbon nanotube film. [0056] Step 5: forming an insulating layer on each of the carbon nanotube layers. Similar to the method for preparing the insulating layer in the thin film transistor 10 of the first embodiment, a tantalum nitride film may be deposited on the surface of the entire growth substrate, and the tantalum nitride film may be patterned by etching or the like to be predetermined. Position last 097119104 Form No. 1010101 No., 16 pages/Total 29 pages 1003436459-0 1358.092 100 years. November h. Shuttle is replacing the page to form a plurality of insulation layers. The material of the above insulating layer may be a hard material such as cerium oxide or a flexible material such as benzocyclobutene (BCB), polyester or acrylic resin. [0057] Step 6: forming a gate on the surface of each insulating layer to obtain a thin film transistor array including a plurality of thin film transistors. [0058] It will be understood that a thin film transistor array can also be formed by a method similar to that of the second embodiment, which specifically includes the following steps: [0059] Step 1: A growth substrate is provided. Step 2: uniformly forming a catalyst layer on the surface of the growth substrate. [0061] Step 3: The growth substrate formed with the catalyst layer is placed in a reaction furnace, heated to 500-740 ° C under a protective gas atmosphere, and a carrier gas and a carbon source gas are introduced to control the carrier gas and the carbon source gas. In a volume ratio of about 100:1 to 100:10, a disordered single-walled carbon nanotube layer is grown. [0062] Step 4: Providing an insulating substrate. • [0063] Step 5: Forming a plurality of gates on the surface of the insulating substrate. [0064] Step 6: forming at least one insulating layer covering the plurality of gates. [0065] Step 7: transferring the carbon nanotube layer to the surface of the insulating layer, patterning the carbon nanotube layer to form a plurality of carbon nanotube layers, the plurality of carbon nanotube layers and the above The plurality of gates are opposite and insulated by an insulating layer. [0066] Step 8: forming a plurality of sources and a plurality of drains at intervals, and electrically connecting each of the carbon nanotube layers to a source and a drain. [0067] The method for preparing a thin film transistor provided by the embodiment of the present technical solution has the following advantages: 097119104 Form No. A0101 Page 17/Total 29 pages. 1003436459-0 100 years.11. According to the technical solution, a pure single-walled, half-walled, V-shaped carbon nanotube layer is directly used as a semiconductor layer of a thin film transistor, and the method of forming the half-V body layer forms a thin film electricity TM by the inkjet printing method in the prior art. The method of the bulk semiconductor layer is simple, and it is not necessary to carry out the step of dispersing the carbon in the organic solvent. The obtained carbon nanotube film has uniform distribution of carbon nanotubes and high purity, which avoids the agglomeration of nanocarbon camps in the nano-carbon B layer formed in the prior art, and thus the distribution is uneven and the carbon nanotube layer is distributed. The problem of residual organic solvents in the medium. Second, by controlling the ratio of carbon source gas to the ratio of the gas to the gas, the radius of the obtained carbon nanotube can be controlled to obtain a semiconducting carbon nanotube. The semiconducting carbon nanotube has a high carrier mobility, and as the semiconductor layer, the thin film transistor can have a relatively large plant mobility and a fast response speed. Third, by controlling the growth conditions, the carbon nanotubes in the carbon nanotube layer are disordered and intertwined.

,故奈米碳管層具有較好的韌性及機械强度,故採用該 無序排列的奈米碳管層作爲半導體層,可以相應的提高 薄膜電晶體及薄膜電晶體陣列的柔韌性。其四,由於本 實施例所提供的奈米碳管層具有較大粘性,可以粘附於 I 其它基底表面,故,可以採用一轉印步驟將奈米碳管層 轉印到其它基底上,該基底的材料可以選擇不耐高溫的 柔性材料,有利於製備柔性的薄臈電晶體。 [0068] 综上所述,本發明破已符合發明專利之要件,遂依法提 出專利申請。惟,以上所述者僅為本發明之較佳實施例 ,自不能以此限制本案之申請專利範圍。舉凡習知本案 技藝之人士极依本發明之精神所作之等效修飾或變化, 皆應涵蓋於以下申請專利範圍内。 097119104 表單编號A0101 第18頁/共29頁 1003436459-0 1358092 [0069] [0070] [0071] [0072]Therefore, the carbon nanotube layer has good toughness and mechanical strength, so the disordered arrangement of the carbon nanotube layer as the semiconductor layer can correspondingly improve the flexibility of the thin film transistor and the thin film transistor array. Fourth, since the carbon nanotube layer provided in the embodiment has a large viscosity and can adhere to the surface of the other substrate, the transfer process can be used to transfer the carbon nanotube layer to other substrates. The material of the substrate can be selected from a flexible material that is not resistant to high temperatures, and is advantageous for preparing a flexible thin germanium transistor. [0068] In summary, the invention has been in compliance with the requirements of the invention patent, and the patent application is filed according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by those skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. 097119104 Form No. A0101 Page 18 of 29 1003436459-0 1358092 [0069] [0072] [0072]

[0073] [0074] [0075][0075] [0075]

[0076] [0077] [0078] [0079] [0080] [0081] 100年.11.月々日梭正替換頁 【圖式簡單說明】 圖1係本技術方案第一實施例薄膜電晶體的製備方法的流 程圖。 圖2係本技術方案第一實施例薄膜電晶體的製備工藝流程 圖。 圖3係本技術方案第一實施例薄膜電晶體中奈米碳管層的 掃描電鏡照片。 圖4係本技術方案第二實施例薄膜電晶體的製備方法的流 程圖.。 .圖5係本技術方案第二實施例薄膜電晶體的製備工藝流程· 圖。 圖6係本技術方案第三實施例薄膜電晶體的辑備方法的流 程圖。 【主要元件符號說明】 薄膜電晶體:10,20 絕緣基底:110,210 閘極:1 20, 220 絕緣層:130,230 奈米碳管層:140,240 源極:1 51, 2 51 汲極:152,252 097119104 表單编號A0101 第19頁/共29頁 1003436459-0[0078] [0078] [0088] [0081] 100 years. 11. The first day of the film is replaced by a simple description of the drawings. FIG. 1 is a preparation of the film transistor of the first embodiment of the present technical solution. Flow chart of the method. Fig. 2 is a flow chart showing the preparation process of the thin film transistor of the first embodiment of the present technical solution. Fig. 3 is a scanning electron micrograph of a carbon nanotube layer in a thin film transistor of the first embodiment of the present technical solution. Fig. 4 is a flow chart showing a method of preparing a thin film transistor of a second embodiment of the present technical solution. Fig. 5 is a flow chart showing the preparation process of the thin film transistor of the second embodiment of the present technical solution. Fig. 6 is a flow chart showing a method of compiling a thin film transistor of a third embodiment of the present technical solution. [Main component symbol description] Thin film transistor: 10,20 Insulation substrate: 110,210 Gate: 1 20, 220 Insulation: 130,230 Carbon nanotube layer: 140, 240 Source: 1 51, 2 51 汲Pole: 152, 252 097119104 Form No. A0101 Page 19 / Total 29 Page 1003436459-0

Claims (1)

1358092 100年.11 月 23 日核 七、申請專利範圍: 1 . 一種薄膜電晶體的製備方法,包括以下步驟: 提供一生長基底; 於生長基底表面均勻形成一催化劑層; 將形成有催化劑層的生長基底於保護氣體環境下加熱,通 入碳源氣體及載氣,控制載氣與碳源氣的體積比約爲 10(hl至100:10,於生長基底表面生長一單壁奈米碳管 層;1358092 100 years. November 23rd Nuclear VII. Patent application scope: 1. A method for preparing a thin film transistor, comprising the steps of: providing a growth substrate; forming a catalyst layer uniformly on the surface of the growth substrate; forming a catalyst layer The growth substrate is heated in a protective gas atmosphere, and the carbon source gas and the carrier gas are introduced to control the volume ratio of the carrier gas to the carbon source gas to be about 10 (hl to 100:10), and a single-walled carbon nanotube is grown on the surface of the growth substrate. Floor; 間隔形成一源極及一汲極,並使該源極及汲極與所述奈米 碳管層電連接; 於所述奈米碳管層表面形成一絕緣層;及 於所述絕緣層表面形成一閘極,得到一薄膜電晶體。 2. 如申請專利範圍第1項所述的薄膜電晶體的製備方法,其 中,所述奈米碳管爲半導體性奈米碳管,所述奈米碳管的 直徑爲0.5奈米〜10奈米。Forming a source and a drain, and electrically connecting the source and the drain to the carbon nanotube layer; forming an insulating layer on the surface of the carbon nanotube layer; and surface of the insulating layer A gate is formed to obtain a thin film transistor. 2. The method for preparing a thin film transistor according to claim 1, wherein the carbon nanotube is a semiconducting carbon nanotube, and the diameter of the carbon nanotube is 0.5 nm to 10 nm. Meter. 3. 如申請專利範圍第1項所述的薄膜電晶體的製備方法,其 中,所述奈米碳管層中的奈米碳管無序排列並相互纏繞/ 4 .如申請專利範圍第1項所述的薄膜電晶體的製備方法,其 中,所述催化劑層爲一金屬層,催化劑層的材料爲鐵、鈷 、錄、鎂或上述金屬任意組合的合金之一,所述催化劑層 的厚度爲0.1〜3奈米。 5. 如申請專利範圍第1項所述的薄膜電晶體的製備方法,其 中,所述於保護氣體環境下加熱的溫度爲500〜740 °C,通 入碳源氣及載氣後的反應時間爲5〜30分鐘。 6. 如申請專利範圍第5項所述的薄膜電晶體的製備方法,其 097119104 表單编號A0101 第20頁/共29頁 1003436459-0 1358092 100年.11·月23日_正替¥頁 中,所述碳源氣爲乙炔、乙烯、甲烷或一氧化碳,所述載 氣爲氫氣,所述保護氣體爲氮氣或惰性氣體。 7 .如申請專利範圍第1項所述的薄膜電晶體的製備方法,其3. The method for preparing a thin film transistor according to claim 1, wherein the carbon nanotubes in the carbon nanotube layer are disorderly arranged and entangled with each other / 4 as claimed in claim 1 The method for preparing a thin film transistor, wherein the catalyst layer is a metal layer, and the material of the catalyst layer is one of iron, cobalt, magnesium, magnesium or any combination of the above metals, and the thickness of the catalyst layer is 0.1 to 3 nm. 5. The method for preparing a thin film transistor according to claim 1, wherein the heating temperature in the protective gas atmosphere is 500 to 740 ° C, and the reaction time after introducing the carbon source gas and the carrier gas For 5 to 30 minutes. 6. The method for preparing a thin film transistor according to claim 5, which is 097119104, Form No. A0101, Page 20 of 29, 1003436459-0, 1358092, 100.11, Month 23, _for the ¥ page The carbon source gas is acetylene, ethylene, methane or carbon monoxide, the carrier gas is hydrogen, and the shielding gas is nitrogen or an inert gas. 7. The method for preparing a thin film transistor according to claim 1, wherein 中,於生長基底上形成奈米碳管層後,進一步包括一轉印 該奈米碳管層的步驟,該轉印步驟包括:提供一絕緣基底 ;將形成有奈米碳管層的生長基底倒扣於絕緣基底上使奈 米碳管層表面與絕緣基底表面接觸,從而形成一包括生長 基底、奈米碳管層及絕緣基底的三層結構;熱壓該三層結 構;及移去生長基底,從而使所述奈米碳管層粘附於絕緣 基底表面。 8 .如申請專利範圍第7項所述的薄膜電晶體的製備方法,其 中,所述絕緣基底的材料爲塑料或樹脂。 9.如申請專利範圍第1項所述的薄膜電晶體的製備方法,其 中,所述源極及汲極直接形成於上述奈米碳管層上。 10 .如申請專利範圍第1項所述的薄膜電晶體的製備方法,其After forming the carbon nanotube layer on the growth substrate, further comprising the step of transferring the carbon nanotube layer, the transferring step comprising: providing an insulating substrate; and forming a growth substrate having a carbon nanotube layer Folding on the insulating substrate to bring the surface of the carbon nanotube layer into contact with the surface of the insulating substrate, thereby forming a three-layer structure including a growth substrate, a carbon nanotube layer and an insulating substrate; hot pressing the three-layer structure; and removing the growth a substrate such that the carbon nanotube layer adheres to the surface of the insulating substrate. 8. The method of producing a thin film transistor according to claim 7, wherein the insulating substrate is made of a plastic or a resin. 9. The method of producing a thin film transistor according to claim 1, wherein the source and the drain are formed directly on the carbon nanotube layer. 10. The method for preparing a thin film transistor according to claim 1, wherein 中,生長一單壁奈米碳管層後,進一步包括一去除奈米碳 管層中的金屬性奈米碳管的步驟。 11 .如申請專利範圍第10項所述的薄膜電晶體的製備方法,其 中,所述去除奈米碳管薄膜中的金屬性奈米碳管的步驟於 形成所述源極及汲極後進行,具體包括:提供一外部電源 ;將外部電源的正負兩極連接至源極及汲極;及通過外部 電源於源極及汲極兩端施加卜1 000伏電壓,使金屬性的 奈米碳管發熱並燒蝕,獲得一半導體性的奈米碳管層。 12 .如申請專利範圍第1Q項所述的薄膜電晶體的製備方法,其 中,所述去除奈米碳管層中的金屬性奈米碳管的步驟爲通 過氫電漿、微波、太赫茲、紅外線、紫外線或可見光照射 097119104 表單編號A0101 第21頁/共29頁 1003436459-0 1358092 13 . 14 . 15 100年.11月23日修正替換k 該奈米碳管層,使金屬性奈米碳管燒钱。 一種薄膜電晶體的製備方法,包括以下步驟: 提供一生長基底; 於生長基底表面均勻形成一催化劑層; 將形成有催化劑層的生長基底於保護氣體環境下加熱,通 入載氣與碳源氣體,控制載氣與碳源氣的體積比約爲 100:1至100:10,生長得到無序的單壁奈米碳管層; 提供一絕緣基底; 形成一閘極於所述絕緣基底表面; 形成一絕緣層覆蓋所述閘極; 轉印該奈米碳管層至所述絕緣層表面;及 間隔形成一源極及一汲極,並使該源極及汲極與所述奈米 碳管層電連接,得到一薄膜電晶體。 一種薄膜電晶體的製備方法,包括以下步驟: 提供一生長基底; 於生長基底表面均勻形成至少一個催化劑層; 將形成有至少一個催化劑層的生長基底於保護氣體環境下 加熱,通入載氣與碳源氣體反應,控制載氣與碳源氣的體 積比約爲100:1至100:10,形成多個無序的單壁奈米碳 管層; 間隔形成多個源極及多個汲極,並使所述每一奈米碳管層 均與一源極及一汲極電連接; 於每一奈米碳管層上形成一絕緣層;及 於每一絕緣層表面形成一閘極,得到多個薄膜電晶體,形 成一薄膜電晶體陣列。 如申請專利範圍第14項所述的薄膜電晶體的製備方法,其The step of growing a single-walled carbon nanotube layer further includes a step of removing the metallic carbon nanotubes in the carbon nanotube layer. The method for producing a thin film transistor according to claim 10, wherein the step of removing the metallic carbon nanotube in the carbon nanotube film is performed after forming the source and the drain Specifically, the method comprises: providing an external power source; connecting the positive and negative poles of the external power source to the source and the drain; and applying a voltage of 1 000 volts to the source and the drain by an external power source to make the metallic carbon nanotube Fever and ablate to obtain a semiconducting carbon nanotube layer. 12. The method for preparing a thin film transistor according to the above-mentioned claim, wherein the step of removing the metallic carbon nanotube in the carbon nanotube layer is by hydrogen plasma, microwave, terahertz, Infrared, ultraviolet or visible light illumination 097119104 Form No. A0101 Page 21 of 29 1003436459-0 1358092 13 . 14 . 15 100. November 23 Revision Replacement of the carbon nanotube layer to make metallic carbon nanotubes Burn money. A method for preparing a thin film transistor comprises the steps of: providing a growth substrate; forming a catalyst layer uniformly on the surface of the growth substrate; heating the growth substrate formed with the catalyst layer in a protective gas atmosphere, and introducing a carrier gas and a carbon source gas , controlling the volume ratio of the carrier gas to the carbon source gas to be about 100:1 to 100:10, growing a disordered single-walled carbon nanotube layer; providing an insulating substrate; forming a gate on the surface of the insulating substrate; Forming an insulating layer covering the gate; transferring the carbon nanotube layer to the surface of the insulating layer; and spacing to form a source and a drain, and the source and the drain and the nanocarbon The tube layers are electrically connected to obtain a thin film transistor. A method for preparing a thin film transistor, comprising the steps of: providing a growth substrate; forming at least one catalyst layer uniformly on the surface of the growth substrate; heating the growth substrate formed with at least one catalyst layer in a protective gas atmosphere, introducing a carrier gas and The carbon source gas reacts to control the volume ratio of the carrier gas to the carbon source gas to be about 100:1 to 100:10, forming a plurality of disordered single-walled carbon nanotube layers; forming a plurality of sources and a plurality of drains at intervals And each of the carbon nanotube layers is electrically connected to a source and a drain; an insulating layer is formed on each of the carbon nanotube layers; and a gate is formed on the surface of each of the insulating layers, A plurality of thin film transistors are obtained to form a thin film transistor array. a method for preparing a thin film transistor according to claim 14, wherein 097119104 表單編號A0101 第22頁/共29頁 1003436459-0 1358092097119104 Form No. A0101 Page 22 of 29 1003436459-0 1358092 100年.11月2·3日修正替換頁 中,當形成多個催化劑層時,所述形成多個催化劑層的步 驟包括:於生長基底表面形成一大面積催化劑層,及將該 大面積催化劑層通過掩模蝕刻或雷射切割的方法圖案化, 從而形成多個催化劑層。 16 .如申請專利範圍第14項所述的薄膜電晶體的製備方法,其 中,當形成一個催化劑層時,於催化劑層上生長奈米碳管 層後,進一步包括一雷射切割或掩模餘刻該奈米碳管層的 步驟,從而形成多個奈米碳管層。 17 .如申請專利範圍第14項所述的薄膜電晶體的製備方法,其 中,於生長基底上生長奈米碳管層後,進一步包括一轉印 該奈米碳管層的步驟,該轉印步驟包括:提供一絕緣基底 ;將形成有奈米碳管層的生長基底倒扣於絕緣基底上;及 移去生長基底,從而使上述奈米碳管層粘附於絕緣基底表 面。In the 100-year, November 2-3 revision replacement page, when a plurality of catalyst layers are formed, the step of forming a plurality of catalyst layers includes: forming a large-area catalyst layer on the surface of the growth substrate, and the large-area catalyst The layers are patterned by mask etching or laser cutting to form a plurality of catalyst layers. The method for producing a thin film transistor according to claim 14, wherein when a catalyst layer is formed, after the carbon nanotube layer is grown on the catalyst layer, further comprising a laser cutting or masking The step of engraving the carbon nanotube layer forms a plurality of carbon nanotube layers. The method for preparing a thin film transistor according to claim 14, wherein after the carbon nanotube layer is grown on the growth substrate, further comprising a step of transferring the carbon nanotube layer, the transfer The method includes: providing an insulating substrate; folding the growth substrate on which the carbon nanotube layer is formed on the insulating substrate; and removing the growth substrate to adhere the carbon nanotube layer to the surface of the insulating substrate. 1003436459-0 097119104 表單编號Α0101 第23頁/共29頁1003436459-0 097119104 Form NumberΑ0101 Page 23 of 29
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CN102050424B (en) 2009-11-06 2013-11-06 清华大学 Method for preparing carbon nanotube thin film and method for preparing thin film transistor
TWI487033B (en) * 2010-01-05 2015-06-01 Hon Hai Prec Ind Co Ltd Method for making carbon nanotube thin film and thin film transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9067393B2 (en) 2012-10-29 2015-06-30 Industrial Technology Research Institute Method of transferring carbon conductive film

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