TWI340452B - Dual flat non-leaded semiconductor package - Google Patents
Dual flat non-leaded semiconductor packageInfo
- Publication number
- TWI340452B TWI340452B TW094146213A TW94146213A TWI340452B TW I340452 B TWI340452 B TW I340452B TW 094146213 A TW094146213 A TW 094146213A TW 94146213 A TW94146213 A TW 94146213A TW I340452 B TWI340452 B TW I340452B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor package
- flat non
- dual flat
- leaded semiconductor
- leaded
- Prior art date
Links
Classifications
-
- H10W70/481—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H10W72/075—
-
- H10W72/07554—
-
- H10W72/536—
-
- H10W72/5363—
-
- H10W72/5449—
-
- H10W72/547—
-
- H10W72/5473—
-
- H10W72/5475—
-
- H10W72/5522—
-
- H10W72/5525—
-
- H10W90/756—
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/029,653 US20060145312A1 (en) | 2005-01-05 | 2005-01-05 | Dual flat non-leaded semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200639994A TW200639994A (en) | 2006-11-16 |
| TWI340452B true TWI340452B (en) | 2011-04-11 |
Family
ID=36639465
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094146213A TWI340452B (en) | 2005-01-05 | 2005-12-23 | Dual flat non-leaded semiconductor package |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20060145312A1 (en) |
| CN (1) | CN101091247B (en) |
| TW (1) | TWI340452B (en) |
| WO (1) | WO2006074312A2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7898092B2 (en) * | 2007-11-21 | 2011-03-01 | Alpha & Omega Semiconductor, | Stacked-die package for battery power management |
| US7884454B2 (en) | 2005-01-05 | 2011-02-08 | Alpha & Omega Semiconductor, Ltd | Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package |
| US8618674B2 (en) * | 2008-09-25 | 2013-12-31 | Infineon Technologies Ag | Semiconductor device including a sintered insulation material |
| US8373257B2 (en) * | 2008-09-25 | 2013-02-12 | Alpha & Omega Semiconductor Incorporated | Top exposed clip with window array |
| US8164199B2 (en) * | 2009-07-31 | 2012-04-24 | Alpha and Omega Semiconductor Incorporation | Multi-die package |
| US9257375B2 (en) | 2009-07-31 | 2016-02-09 | Alpha and Omega Semiconductor Inc. | Multi-die semiconductor package |
| US9431327B2 (en) | 2014-05-30 | 2016-08-30 | Delta Electronics, Inc. | Semiconductor device |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940007757Y1 (en) * | 1991-11-14 | 1994-10-24 | 금성일렉트론 주식회사 | Semiconductor package |
| US5530284A (en) * | 1995-03-06 | 1996-06-25 | Motorola, Inc. | Semiconductor leadframe structure compatible with differing bond wire materials |
| JPH09312367A (en) * | 1996-05-23 | 1997-12-02 | Mitsubishi Electric Corp | High frequency semiconductor device |
| DE69832359T2 (en) * | 1997-07-19 | 2006-08-03 | Koninklijke Philips Electronics N.V. | SEMICONDUCTOR DEVICE ARRANGEMENT AND CIRCUITS |
| US6249041B1 (en) * | 1998-06-02 | 2001-06-19 | Siliconix Incorporated | IC chip package with directly connected leads |
| JP3539549B2 (en) * | 1999-09-20 | 2004-07-07 | シャープ株式会社 | Semiconductor device |
| JP2002217416A (en) * | 2001-01-16 | 2002-08-02 | Hitachi Ltd | Semiconductor device |
| US6593622B2 (en) * | 2001-05-02 | 2003-07-15 | International Rectifier Corporation | Power mosfet with integrated drivers in a common package |
| US7088074B2 (en) * | 2002-01-02 | 2006-08-08 | International Business Machines Corporation | System level device for battery and integrated circuit integration |
| US7183616B2 (en) * | 2002-03-31 | 2007-02-27 | Alpha & Omega Semiconductor, Ltd. | High speed switching MOSFETS using multi-parallel die packages with/without special leadframes |
| US6841852B2 (en) * | 2002-07-02 | 2005-01-11 | Leeshawn Luo | Integrated circuit package for semiconductor devices with improved electric resistance and inductance |
| US6777800B2 (en) * | 2002-09-30 | 2004-08-17 | Fairchild Semiconductor Corporation | Semiconductor die package including drain clip |
| US7215012B2 (en) * | 2003-01-03 | 2007-05-08 | Gem Services, Inc. | Space-efficient package for laterally conducting device |
| JP4115882B2 (en) * | 2003-05-14 | 2008-07-09 | 株式会社ルネサステクノロジ | Semiconductor device |
| JP3789443B2 (en) * | 2003-09-01 | 2006-06-21 | Necエレクトロニクス株式会社 | Resin-sealed semiconductor device |
| US7250672B2 (en) * | 2003-11-13 | 2007-07-31 | International Rectifier Corporation | Dual semiconductor die package with reverse lead form |
| US7898092B2 (en) * | 2007-11-21 | 2011-03-01 | Alpha & Omega Semiconductor, | Stacked-die package for battery power management |
| US7612439B2 (en) * | 2005-12-22 | 2009-11-03 | Alpha And Omega Semiconductor Limited | Semiconductor package having improved thermal performance |
| US7511361B2 (en) * | 2005-01-05 | 2009-03-31 | Xiaotian Zhang | DFN semiconductor package having reduced electrical resistance |
| US7884454B2 (en) * | 2005-01-05 | 2011-02-08 | Alpha & Omega Semiconductor, Ltd | Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package |
| US7838977B2 (en) * | 2005-09-07 | 2010-11-23 | Alpha & Omega Semiconductor, Ltd. | Packages for electronic devices implemented with laminated board with a top and a bottom patterned metal layers |
| US7776746B2 (en) * | 2007-02-28 | 2010-08-17 | Alpha And Omega Semiconductor Incorporated | Method and apparatus for ultra thin wafer backside processing |
| US20080242052A1 (en) * | 2007-03-30 | 2008-10-02 | Tao Feng | Method of forming ultra thin chips of power devices |
| US8048775B2 (en) * | 2007-07-20 | 2011-11-01 | Alpha And Omega Semiconductor Incorporated | Process of forming ultra thin wafers having an edge support ring |
-
2005
- 2005-01-05 US US11/029,653 patent/US20060145312A1/en not_active Abandoned
- 2005-12-23 TW TW094146213A patent/TWI340452B/en active
-
2006
- 2006-01-05 CN CN200680001453XA patent/CN101091247B/en not_active Expired - Lifetime
- 2006-01-05 WO PCT/US2006/000356 patent/WO2006074312A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| US20060145312A1 (en) | 2006-07-06 |
| CN101091247B (en) | 2010-07-14 |
| WO2006074312A2 (en) | 2006-07-13 |
| TW200639994A (en) | 2006-11-16 |
| WO2006074312A3 (en) | 2006-11-09 |
| CN101091247A (en) | 2007-12-19 |
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