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TWI299550B - Structure of wire bonding over semiconductor chip - Google Patents

Structure of wire bonding over semiconductor chip Download PDF

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Publication number
TWI299550B
TWI299550B TW091121967A TW91121967A TWI299550B TW I299550 B TWI299550 B TW I299550B TW 091121967 A TW091121967 A TW 091121967A TW 91121967 A TW91121967 A TW 91121967A TW I299550 B TWI299550 B TW I299550B
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TW
Taiwan
Prior art keywords
layer
wire
wafer
metal
opening
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Application number
TW091121967A
Other languages
Chinese (zh)
Inventor
Jin Yuan Lee
Ying Chih Chen
Original Assignee
Megica Corp
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Publication date
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Priority to TW091121967A priority Critical patent/TWI299550B/en
Application granted granted Critical
Publication of TWI299550B publication Critical patent/TWI299550B/en

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    • H10W72/90
    • H10W72/536
    • H10W72/59

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  • Wire Bonding (AREA)

Description

MEG 02-008TW-R 【發明所屬之技術領域】 本發月是有關於-種晶片’且特別是有關於—種可以在晶片之主動元 件上所對應的打線刻進行減錄的晶片。 【先前技術】 〜在現今:資訊爆炸的社會,電子產品遍佈於日常生活中,無論在食衣住 丁月樂方φ ’都會㈣積體電路元件所組成誠品。隨著電子科技不斷地 貝進功此性更複雜、更人性化的產品推陳出新,而一般電子產品係藉由 至夕aa片來控制其電子產品的作動,_般可以利肋線(_—_ 、方式覆曰曰(flip-chlp,f/C)的方式、軟片自動s貼合(tape—aut〇mated bonding ’ TAB)的方^,使晶#與—基板鱗雜雜連接。 “ 就打線製程而言,打線機台比如利用高週波振動及加壓的方式,使導 線190的端邛192和打線墊片136之表面結構重組,以接合導線19〇與 打線墊片136,導線190之端部192並因壓力及高週波振動加熱會聚集成球 狀的樣式’而形成如第i圖所示的樣式,其缘示習知適用於打線製程的晶 片之剖面示意圖。 φ 请參照第1圖,晶片110具有一基底120、一線路結構層130及一保護 層140 ’基底120具有-表面122,可以區分為一主動區124及一非主動區 126,並且基底120 S具有多個主動元件128,比如是電晶體(transist〇r), 形成在基底120之表面122的主動區124上。線路結構層130係形成在基 底120之表面122上,線路結構層130係由一介電結構體132及一金屬微 線路結構體134所構咸,金屬微線路結構體134係交錯於介電結構體132 5MEG 02-008TW-R [Technical Field of the Invention] This month is related to a type of wafer and, in particular, to a wafer which can be subtracted from the line marking corresponding to the active element of the wafer. [Prior Art] ~ In today's society: the information explosion society, electronic products are all over the daily life, whether in the food and clothing Ding Yue Le Fang φ ‘ will (4) integrated circuit components constitute Eslite. With the continuous advancement of electronic technology, the products with more complex and more humanized products are introduced, and the general electronic products control the operation of their electronic products by means of the a-day aa film, _ can be used for ribs (___ The method of overlaying (flip-chlp, f/C), and the method of tape-aut〇mated bonding 'TAB', so that the crystal # is connected to the substrate scale. In the process, the wire splicing machine reassembles the surface structure of the wire 190 and the wire shims 136 by means of high-frequency vibration and pressure, for example, to join the wire 19 and the wire shims 136, the ends of the wires 190. The portion 192 is heated and aggregated into a spherical pattern by pressure and high-frequency vibration to form a pattern as shown in Fig. i, which shows a schematic cross-sectional view of a wafer suitable for the wire bonding process. φ Please refer to Fig. 1, The wafer 110 has a substrate 120, a circuit structure layer 130, and a protective layer 140. The substrate 120 has a surface 122, which can be divided into an active region 124 and an inactive region 126, and the substrate 120S has a plurality of active components 128. Such as a transistor (transist〇r), shape On the active region 124 of the surface 122 of the substrate 120. The circuit structure layer 130 is formed on the surface 122 of the substrate 120. The circuit structure layer 130 is formed by a dielectric structure 132 and a metal micro-circuit structure 134. The metal microcircuit structure 134 is staggered to the dielectric structure 132 5

7, 17 λ MEG 02-008TW-R 中i;l查結森體132上,並且金屬微線路結構體⑼會與主 動元件128電性連接。保護層140係位在線路結構層13〇上並且保護層 140具有至少-開口 142,會暴露出線路結構層咖之金屬微線路結構體 134 ’此暴露於外之金屬微線路結構體134即稱為打線塾片136,而藉由打 線的方武可以使導線19〇之端部192與暴露於保護層⑽之開口 142外之 打線墊片136接合。 由於在將導線190之端部192打到暴露於保護層14〇之開口 142外的 打線墊片136上時,會強烈地震動晶片m,因此在打線處下方走不能配置 有主動7G件128以避免备導線190之端部192打到暴露於保護層14〇之開 口 142外的打線塾片136上時’將主動元件128破壞,故打線墊片136必 須要位在對應於基底120之非主動區126上’如此晶片11〇的基底12〇之 表面122便必須特別形成非主動區而增加晶片UQ的尺寸。另外當晶片 110受到打線製程而產生的強烈震動時,亦有可能會破壞晶片11〇的介電結 構體132 ’使得介電結構體132產生裂痕。另外,由於保護層14Q的開口 H2製作得很大,而打線墊片136係為大區域地與導線19〇之善192電性 連接,因此必須將用以解線190之端部192連接之打線塾片136製作甚 大的尺寸’故位在保護層140下之金屬微線路結構體134的線路佈局空間 受到侷限。 【發明内容】 本發明的目献在提供-種“製造方法,可明加絲紐層下之 金屬微線路結構_線路佈局減⑼尺寸,時齡打線製程的 震動對保護層或介電結構體產生裂痕的機會。7, 17 λ MEG 02-008TW-R i; l is found on the body 132, and the metal micro-circuit structure (9) is electrically connected to the active element 128. The protective layer 140 is fastened on the circuit structure layer 13 and the protective layer 140 has at least an opening 142, which exposes the metal microcircuit structure 134 of the circuit structure layer. The exposed metal microcircuit structure 134 is called In order to thread the cymbal 136, the end portion 192 of the wire 19 can be engaged with the wire spacer 136 exposed outside the opening 142 of the protective layer (10) by wire bonding. Since the wafer m is strongly vibrated when the end portion 192 of the wire 190 is applied to the wire bonding pad 136 exposed to the opening 142 of the protective layer 14, the active 7G member 128 cannot be disposed below the wire bonding to avoid When the end portion 192 of the backup wire 190 hits the wire 塾 136 exposed outside the opening 142 of the protective layer 14 ', the active component 128 is broken, so the wire spacer 136 must be positioned in the inactive region corresponding to the substrate 120. The surface 122 of the substrate 12 of the wafer 11 must be specifically formed into an inactive region to increase the size of the wafer UQ. In addition, when the wafer 110 is subjected to strong vibration caused by the wire bonding process, it is also possible to damage the dielectric structure 132' of the wafer 11 such that the dielectric structure 132 is cracked. In addition, since the opening H2 of the protective layer 14Q is made large, and the wire bonding pad 136 is electrically connected to the wire 19 of the wire 19 in a large area, the wire 192 for connecting the end portion 192 of the wire 190 must be connected. The slab 136 is made of a large size 'the layout space of the metal micro-circuit structure 134 under the protective layer 140 is limited. SUMMARY OF THE INVENTION The object of the present invention is to provide a "manufacturing method, the metal micro-circuit structure under the wire bonding layer _ line layout minus (9) size, the vibration of the age-old wire bonding process to the protective layer or the dielectric structure The chance of a crack.

12995紙月,,修h 賴Μ MEG 02-008TW-R 在敘述本發明之If,先對空間介詞的用法做界定,所謂空間介詞,,上” 係指兩物之空間關係係為可接觸或不可接觸均可。舉例而言,A物在B物上, 其所表達的意思係為A物可以直接配置在b物上,A物有與B物接觸;或者 A物係配置在b物上的空間中,a物沒有與b物接觸。 為達成本發明之上述和其他目的,提出一種晶片,適用於藉由一打線 製程使至少一導線與晶片電性連接,晶片至少包括一基底、一線路結構層 及至少一打線墊片。基底具有多個主動元件,係位在基底之一表面上。線 路結構層係位在基底上,線路結構層包括一介電結構體及一金屬微線路結 構體,金屬微線路結構體係交錯於介電結構體中,並且金屬微線路結構體 與主動元件電性連接。打線墊片係配置在位於主動元件上之線路結構層 上,而打線墊片與線路結構層之金屬微線路結構體電性連接,而導線係接 合在打線塾片上。而打線墊片的厚度比如介於1微米到5微米之間。 依照本發明的較佳實施例,晶片還包括一保護層,配置在線路結構層 上,保護層具有至少一開口,暴露出線路結構層之金屬微線路結構體,打 線墊片係至少透過開口與金屬微線路結構體電性連接,其中在製作完保護 層之後,才製作打線墊片,而開口的最大孔徑比如介於〇·5微米至4〇微米 之間。 另外,打線墊片包括至少一軟質金屬層,而軟質金屬層佔接點打線墊 片之體積至少-半,其中軟質金屬層的硬度係小於謂V,而軟質金屬層的 材質可以是金、銅、鉛或該等金屬之合金等。 此外’根據本發明的較佳實施例,晶片亦可包括一軟性介電材質及一12995 paper month,, repair h Lai Μ MEG 02-008TW-R In describing the If of the present invention, the use of spatial prepositions is first defined. The so-called spatial prepositions, "up" means that the spatial relationship between the two objects is accessible or For example, A is on B, and it is expressed as A can be directly disposed on b, A can be in contact with B; or A can be placed on b In order to achieve the above and other objects of the present invention, a wafer is provided for electrically connecting at least one wire to a wafer by a wire bonding process, the wafer including at least one substrate and one a circuit structure layer and at least one wire spacer. The substrate has a plurality of active components, which are located on one surface of the substrate. The circuit structure layer is on the substrate, and the circuit structure layer comprises a dielectric structure and a metal microcircuit structure. The metal microcircuit structure system is interleaved in the dielectric structure, and the metal microcircuit structure is electrically connected to the active component. The wire spacer is disposed on the circuit structure layer on the active component, and the wire gasket and the wire The metal microcircuit structure of the layer is electrically connected, and the wire is bonded to the wire tab. The thickness of the wire spacer is, for example, between 1 micrometer and 5 micrometers. According to a preferred embodiment of the present invention, the wafer further includes a protective layer disposed on the circuit structure layer, the protective layer having at least one opening exposing the metal micro-circuit structure of the circuit structure layer, wherein the wire bonding pad is electrically connected to the metal micro-circuit structure through at least the opening, wherein After the protective layer is completed, the wire spacer is formed, and the maximum aperture of the opening is, for example, between 微米·5 μm and 4 μm. In addition, the wire spacer includes at least one soft metal layer, and the soft metal layer occupies the contact line. The volume of the gasket is at least -half, wherein the hardness of the soft metal layer is less than the V, and the material of the soft metal layer may be gold, copper, lead or an alloy of the metals, etc. Further, in accordance with a preferred embodiment of the present invention The wafer may also include a soft dielectric material and a

MEG 02-008TW-R 引線’軟性介電材質係配置在線路結構層上,而打線刻係配置在位於主 動件上之軟齡電材質上,;丨線至少貫綠齡騎質赌打線墊片與 _接。射雜齡電材質比如絲酿亞胺。 、、不上所述’本發明之晶片,由於打線墊片下具有軟性介電材質,或打 線塾片具有軟質金屬層的配置,因此在將導線之端部打到打線塾片上時, 可以緩衝_打㈣成震動晶片的織,如此魏之端部便可以打到 置在正位触動元件上方的打絲壯,如此基底之細便可以減少預 卜動區的面積故可以增加主動元件配置在基底之表面上的密度,進 而降低晶片的尺寸。另外,由於打線墊片下具有軟性介電材質,或打線墊 片具有軟質金屬層的配置,因此在將導線之端部打到打線墊壯時,可以 緩衝因為打線製程造成震動晶片的程度,故可以避免晶片的保護層或介電 結構體產生裂痕的情形。再者,由於保護層_口可以製作得很小,因此 金屬微線路結構體僅需小區域地與打線墊片或引線雛連接,而可以縮減 用以與接點打、線墊片或引線連接之金屬微線路結構體的尺寸,故可以增加 位在保護層下之金屬微線路結構體的線路佈局空 間。 為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂,下文特舉 一較佳實施例,並配合所附圖式,作詳細說明。 【實施方式】 第2圖繪示依照本發明第一較佳實施例之一種可以進行打線製程的晶 片之剖面放大示意圖。晶片210具有一基底220、一線路結構層230、一保 護層240及至少一打線墊片250,基底220具有多個主動元件228 ,比如是MEG 02-008TW-R lead wire 'soft dielectric material is placed on the circuit structure layer, and the wire drawing system is arranged on the soft-aged electric material on the active part; the 丨 line is at least the green age riding gambling line gasket Connected with _. A hybrid ageing material such as silky imine. The wafer of the present invention may be buffered by a soft dielectric material under the wire bonding pad or a soft metal layer of the wire bonding pad, so that when the end of the wire is hit onto the wire bonding piece, _ hit (four) into the vibration of the wafer, so that the end of the Wei can hit the top of the positive touch element, the fineness of the base can reduce the area of the pre-sweep area, so the active component can be placed on the base The density on the surface, which in turn reduces the size of the wafer. In addition, since the wire gasket has a soft dielectric material, or the wire gasket has a soft metal layer configuration, when the end of the wire is hit to the wire pad, the degree of vibration of the wafer due to the wire bonding process can be buffered. It is possible to avoid the occurrence of cracks in the protective layer or the dielectric structure of the wafer. Moreover, since the protective layer _ port can be made small, the metal micro-circuit structure only needs to be connected to the wire bonding pad or the lead wire in a small area, and can be reduced for connection with the contact, wire gasket or lead wire. The size of the metal microcircuit structure can increase the layout space of the metal microcircuit structure under the protective layer. The above and other objects, features, and advantages of the present invention will be apparent from [Embodiment] FIG. 2 is a schematic enlarged cross-sectional view showing a wafer which can be subjected to a wire bonding process according to a first preferred embodiment of the present invention. The wafer 210 has a substrate 220, a circuit structure layer 230, a protective layer 240 and at least one wire spacer 250. The substrate 220 has a plurality of active components 228, such as

MEG 02-008TW-R 1299:; 5¾月曰修(X)正替換頁 ------| y . 1 7 ......_ ------- 金屬氧化半導體(Metal Oxide Semiconductor,MOS)或電晶體(transistor) 等,係形成在基底220之一表面222上。線路結構層230係形成在基底220 之表面222上,線路結構層230係由一介電結構體232及一金屬微線路結 構體234所構成,金屬微線路結構體234係交錯於介電結構體232中,並 且還形成在介電結構體232上,並且金屬微線路結構體234會與主動元件 228電性連接。保護層240係位在線路結構層230上,並且保護層240具有 至少一開口 242,會暴露出線路結構層230之金屬微線路結構體234,而開 口 242的最大孔彳f係介於〇· 5微米至40微米之間。 在製作完保護層240之後,還會製作打線墊片250在位於主動元件228 上方的保護層240上及暴露於保護層240之開口 242外的金屬微線路結構 體234上,打線墊片250的厚度t比如是介於1微米到5微米之間,此打 線墊片250打線墊片的表面金屬材質係為金,在本實施例中,打線墊片250 係直接正位於開口 242上,並且暴露於外。打線墊片250包括一黏著層252 及至少一軟質金屬層(未繪示),此軟質金屬層之厚度大於1微米,而黏著 層252係位在保護層240上、開口 242的側壁上及暴露於保護層240之開 口 242外的金屬微線路結構體234上,並且至少一軟質金屬層係位在黏著 層252上’軟質金屬層的材質比如是銅、金或鉛合金等,在較佳的情況下, 軟質金屬層的硬度係小於8〇Hv,而黏著層252的材質比如是鈦、鉻、鈦僞 合金及鈥氮化合物等。打線墊片250比如可以是下列數種結構,第一種結 構係由黏著層252、銅層、鎳層及金層所構成,黏著層252係位於打線墊片 25 0的底層,用以使打線墊片25〇能夠固定在晶片21〇的表面,而銅層係MEG 02-008TW-R 1299:; 53⁄4月曰修(X)正换页------| y . 1 7 ...... _ ------- Metal Oxide Semiconductor (Metal Oxide A semiconductor, a MOS, or a transistor is formed on one surface 222 of the substrate 220. The circuit structure layer 230 is formed on the surface 222 of the substrate 220. The circuit structure layer 230 is composed of a dielectric structure 232 and a metal micro-circuit structure 234. The metal micro-circuit structure 234 is interlaced with the dielectric structure. 232, and also formed on the dielectric structure 232, and the metal micro-circuit structure 234 is electrically connected to the active device 228. The protective layer 240 is fastened on the circuit structure layer 230, and the protective layer 240 has at least one opening 242, which exposes the metal micro-circuit structure 234 of the circuit structure layer 230, and the maximum aperture 彳 of the opening 242 is between Between 5 microns and 40 microns. After the protective layer 240 is formed, the wire spacer 250 is also formed on the protective layer 240 above the active device 228 and on the metal micro-circuit structure 234 exposed outside the opening 242 of the protective layer 240. The thickness t is, for example, between 1 micrometer and 5 micrometers. The surface metal material of the wire spacer 250 wire gasket is gold. In the embodiment, the wire gasket 250 is directly located on the opening 242 and exposed. Outside. The wire spacer 250 includes an adhesive layer 252 and at least one soft metal layer (not shown) having a thickness greater than 1 micrometer, and the adhesive layer 252 is fastened on the protective layer 240, the sidewall of the opening 242, and exposed. The metal microcircuit structure 234 outside the opening 242 of the protective layer 240, and at least one soft metal layer is tied to the adhesive layer 252. The material of the soft metal layer is, for example, copper, gold or lead alloy. In the case, the hardness of the soft metal layer is less than 8 〇 Hv, and the material of the adhesive layer 252 is, for example, titanium, chromium, titanium pseudo-alloy, and niobium nitrogen compound. The wire spacer 250 may be, for example, the following structures. The first structure is composed of an adhesive layer 252, a copper layer, a nickel layer and a gold layer, and the adhesive layer 252 is located on the bottom layer of the wire spacer 25 0 for wire bonding. The spacer 25 can be fixed on the surface of the wafer 21, and the copper layer

MEG 02-008TW-R 位在黏著層252上’鎳層係位在銅層上,金層係位在鎳層上,第二種結構 係由黏著層252、銅層及金層所構成,黏著層252係位於打線墊片25〇的底 層,用以使打線墊片250能夠固定在晶片21〇的表面,而鋪係位在黏著 層252上,金層係位在銅層上,第三種結構係由黏著層脱、錯合金層及金 曰所構成’黏著層252係位於打線墊&gt;;250的底層,用以使打線墊片250 能夠固定在晶片210的表面,而錯合金層係位在黏著層脱上金層係位 在鉛合金層上。在上述之三種打線墊片咖中,銅層、金層及錯合金層的 結構均為軟質金屬層’因此#受麟力時’可以有讀度的職而緩衝 外力對晶片21G所造成的衝擊’其中在較佳的情況下軟f金屬層所加總 的厚度要大於1微米。而藉由打線的方武可以使-導線290之-端部292 與打線墊片250之金層接合。 在上述的結構中,由於打線墊片25()具有軟質金屬層,因此在將導線 290之端部292打到打線墊片25〇上時,可以緩衝因為打線製程造成震動晶 片210的程度’如此導線29〇之端部2犯便可以打到配置在正位於主動元 件228上方的打線塾片250上,如此基底220之表面222便可以減少預留 非主動區的面積’故可以增加主動元件⑽配置在基底22〇之表面⑽上 的途度進而降低曰曰片21〇的尺寸。另外,由於打線塾# 25〇具有軟質金 屬層’因此在將導線290之端部2犯打到打線墊片25〇上時,可以緩衝因 為打線製程造成震動晶片210的程度,故可以避免晶片21Q祕護層24〇 或介電結構體232產生裂痕。另外,由於保護層240的開口 242可以製作 侍很小’因此金屬微線路結構體辦僅需小區域地與打線墊片25q電性連 I2&quot;5熟4 7日修¥正替換頁MEG 02-008TW-R is located on the adhesive layer 252. The nickel layer is on the copper layer, the gold layer is on the nickel layer, and the second structure is composed of the adhesive layer 252, the copper layer and the gold layer. The layer 252 is located on the bottom layer of the wire bonding pad 25〇, so that the wire bonding pad 250 can be fixed on the surface of the wafer 21〇, and the laying layer is on the adhesive layer 252, and the gold layer is on the copper layer, the third type. The structure is composed of an adhesive layer, a faulty alloy layer and a metal crucible. The adhesive layer 252 is located on the bottom layer of the wire pad </ RTI> 250, so that the wire spacer 250 can be fixed on the surface of the wafer 210, and the alloy layer is The gold layer is removed from the adhesive layer on the lead alloy layer. In the above three types of wire gaskets, the structure of the copper layer, the gold layer and the wrong alloy layer are all soft metal layers. Therefore, the impact of the external force on the wafer 21G can be affected by the reading force. 'In the preferred case, the total thickness of the soft f metal layer is greater than 1 micron. The wire 290's end 292 can be joined to the gold layer of the wire spacer 250 by wire bonding. In the above structure, since the wire bonding pad 25 () has a soft metal layer, when the end portion 292 of the wire 290 is hit onto the wire bonding pad 25, the degree of vibrating the wafer 210 due to the wire bonding process can be buffered. The end portion 2 of the wire 29 can be placed on the wire splicing plate 250 disposed above the active component 228, so that the surface 222 of the substrate 220 can reduce the area of the reserved inactive zone, so that the active component can be added (10). The extent of placement on the surface (10) of the substrate 22 reduces the size of the cymbal 21 。. In addition, since the wire 塾 # 25 〇 has a soft metal layer ′, when the end portion 2 of the wire 290 is hit onto the wire shims 25 , the degree of vibration of the wafer 210 due to the wire splicing process can be buffered, so that the wafer 21Q can be avoided. Cracks are formed in the barrier layer 24 or the dielectric structure 232. In addition, since the opening 242 of the protective layer 240 can be made small, the metal micro-circuit structure can be electrically connected to the wire-bonding pad 25q only in a small area. I2&quot;5 cooked 4 7 day repair ¥ replacement page

-· - · j MEG 02-008TW-R 接而了以縮減用以與打線墊片250連接之金屬微線路結構體234的尺寸, 故可⑽加位在保護層下之金屬微線路結構體234的線路佈局空間。 在上述的結構中’打線塾片係位在開口的正上方,然而本發明的應用 並非僅限於此,如第3圖所示,其緣示依照本發明第二較佳實施例之一種 可以進行減餘的⑼硫大綠圖,其巾若是本實細中的標號 與第-較佳實施例-樣者,則表示在本實施例中所指明的構件係雷同於在 第-較佳實補中所指_構件,在此便不再贅述。請參照第3圖,晶片 212還具有-引線256,而打線墊片254係位在開d 242周圍的保護層240 上,如此藉由引線256可以使打線墊片254與暴露於保護層240之開口 242 外的金屬微線路結構體234電性連接,而打線墊片254位在主動元件228 的上方,此打線塾片254打線墊片的表面金屬材質係為金。打線墊片况 及引線256的結構均至少包括一黏著層258及至少一軟質金屬層(未繪 示),此軟質金屬層之厚度大於i微米,其比如是由黏著層258、銅層、鎳 層及金層所構成’黏著層258係位於打線墊片254及引線256的底層,用 以使打線墊片254及引線256能夠固定在晶片212的表面,而銅層係位在 黏著層258上,鎳層係位在銅層上,金層係位在鎳層上。另外,打線塾片 254及引線256亦可以是由黏著層258、銅層及金層所構成,黏著層258係 位於打線墊片254及引線256的底層,用以使打線墊片254及引線256能 夠固定在晶片212的表面,而銅層係位在黏著層258上,金層係位在銅層 上,再者,打線墊片254及引線256亦可以是由黏著層258、鉛合金層及金 層所構成’黏著層258係位於打線墊片254及引線256的底層,用以使打 11-· - · j MEG 02-008TW-R is connected to reduce the size of the metal micro-circuit structure 234 for connection to the wire spacer 250, so that the metal micro-circuit structure 234 under the protective layer can be (10) Line layout space. In the above structure, the 'wire slap piece is tied directly above the opening, however, the application of the present invention is not limited thereto, as shown in Fig. 3, the edge of which can be carried out according to a second preferred embodiment of the present invention. The reduced (9) sulphur green map, if the towel is the same as in the first preferred embodiment, the component specified in the embodiment is identical to the first-best compensation. The components referred to in _ are not repeated here. Referring to FIG. 3, the wafer 212 further has a - lead 256, and the wire bonding pad 254 is positioned on the protective layer 240 around the opening d 242, so that the wire bonding pad 254 can be exposed to the protective layer 240 by the wire 256. The metal micro-circuit structure 234 outside the opening 242 is electrically connected, and the wire-bonding pad 254 is located above the active component 228. The surface metal material of the wire-bonding pad 254 wire-bonding pad is gold. The wire spacer and the structure of the lead 256 each include at least an adhesive layer 258 and at least one soft metal layer (not shown) having a thickness greater than i micrometers, such as an adhesive layer 258, a copper layer, and a nickel. The adhesive layer 258 is formed on the bottom layer of the wire bonding pad 254 and the lead 256 for fixing the wire bonding pad 254 and the wire 256 to the surface of the wafer 212, and the copper layer is anchored on the adhesive layer 258. The nickel layer is on the copper layer and the gold layer is on the nickel layer. In addition, the wire 254 and the lead 256 may also be formed by an adhesive layer 258, a copper layer and a gold layer. The adhesive layer 258 is located on the bottom layer of the wire bonding pad 254 and the lead 256 for the wire bonding pad 254 and the lead wire 256. It can be fixed on the surface of the wafer 212, and the copper layer is on the adhesive layer 258, and the gold layer is on the copper layer. Further, the wire spacer 254 and the lead 256 can also be formed by the adhesive layer 258, the lead alloy layer and The gold layer constitutes the 'adhesive layer 258 is located on the bottom layer of the wire pad 254 and the lead 256, so as to make 11

MEG 02-008TW-R 線塾片254及引線256能夠固定在晶片212的表面,而錯合金層係位在黏 著層258上,金層餘在錯合金層上。其中黏著層258的射比如是鈦、 鉻、鈦鶴合金或鈦氮化合物等。 在上述的實施例巾,保護層之開口係為甚小的結構,然而本發明的應 用並非僅限於此,如第4圖所示,鱗示依照本發明第三較佳實施例之一 種可以進行打線製程的晶片之剖面放大示意圖。請參照第4圖,保護層34〇 的開口 342亦可以是具有甚大的截面積,其開口 342的最大徑寬比如是6〇 微米’而保濩層340的開口 342可以暴露出金屬微線路結構體334。在製作 完保護層340後,可以進行製作打線墊μ 35〇的步驟,其中打線墊片· 可以是僅形成在暴露於保護層34Q之開σ 342外的金屬微線路結構體辦 上’而打線墊片350可以位在主動元件328的上方,此打雜片35〇打線 墊片的表面金屬材質係為金。打線墊# 35〇包括一黏著層脱及至少一軟 貝金屬層,此軟貝金屬層之厚度大於丨微米,其金屬層的結構如前所述, 在此便不·述。_,亦可以如第5 ®所袖結構,魏示依照本發明 第較佳實施例之-種可以進行打線製程的晶片之剖面放大示意圖,其中 若是本實施财的概與第三健實補―樣者,職示林實施例中所 才曰明的構件係雷同於在第一較佳實施例情指明的構件,在此便不再贅 述如第5圖所示,打線墊片354亦可以還延伸到保護層⑽之開口 3犯 的側土上及位在#近保護層_之開口 342周圍的保護層咖上。 别述的只婦彳巾’係藉由具有軟質金屬層的打線㈣來緩衝打線製 程對打線墊⑽造成崎擊,然而本個並非僅祕上述的顧。如第6 12The MEG 02-008TW-R wire 254 and lead 256 can be attached to the surface of the wafer 212, while the alloy layer is positioned on the adhesive layer 258 and the gold layer remains on the wrong alloy layer. The adhesion layer 258 is irradiated with titanium, chromium, titanium alloy or titanium nitride. In the above embodiment, the opening of the protective layer is a small structure, but the application of the present invention is not limited thereto. As shown in FIG. 4, the scale may be performed according to a third preferred embodiment of the present invention. A schematic cross-sectional view of a wafer of a wire bonding process. Referring to FIG. 4, the opening 342 of the protective layer 34A may have a large cross-sectional area, and the maximum diameter of the opening 342 is, for example, 6 〇 micron', and the opening 342 of the protective layer 340 may expose the metal micro-circuit structure. Body 334. After the protective layer 340 is formed, the step of fabricating the wire pad μ 35 , can be performed, wherein the wire bonding pad can be formed only on the metal micro-circuit structure exposed outside the opening σ 342 of the protective layer 34Q. The spacer 350 can be positioned above the active component 328. The metal material of the surface of the tampering pad 35 is a gold. The wire pad #35〇 includes an adhesive layer and at least one soft shell metal layer. The thickness of the soft shell metal layer is greater than 丨 micron. The structure of the metal layer is as described above, and will not be described here. _, can also be as shown in the 5th sleeve structure, in accordance with a preferred embodiment of the present invention, a cross-sectional enlarged view of a wafer that can be subjected to a wire bonding process, wherein if the implementation of the financial implementation and the third health supplement - In the example, the components illustrated in the embodiment of the present invention are identical to those in the first preferred embodiment, and will not be described again. As shown in FIG. 5, the wire spacer 354 can also be returned. It extends to the side soil made by the opening 3 of the protective layer (10) and to the protective layer around the opening 342 of the # near protective layer. The only women's wipes are made by the threading (4) with a soft metal layer to cushion the wire-laying process (10). However, this is not the only one mentioned above. As in the 6th 12

meg 02-008TW-R )正替換頁 圖所示,其繪示依照本發明第五較佳實施例之一種可以進行打線製程的晶 片之剖面放大示意圖。請參照第6圖,晶片410亦可以還包括一軟性介電 材質460及一引線470,如此藉由軟性介電材質460可以緩衝在打線時對晶 片410的衝擊。軟性介電材質460係位在保護層440上,而打線墊片45〇 係位在軟性介電材質460上,引線470係貫穿軟性介電材質46〇,用以使暴 露於保護層440之開口 442外的金屬微線路結構體434與打線墊片45〇電 性連接,其中打線墊片450係位在主動元件428的上方,並且打線塾片45〇 亦位在保護層440之開口 442的正上方,而軟性介電材質46〇比如為聚醯 亞胺。由於軟性介電材質460已經可以緩衝打線製程對晶片41〇所造成的 衝擊,因此打線墊片450亦可以是不需具有軟質金屬層的結構;當然打線塾 片450亦可以是具有軟質金屬層的結構,如此在進行打線製程時,會有更 加的緩衝效果。打線墊片450及引線470所構成的金屬結構係位在軟性介 電材質460上、軟性介電材質460之開孔462上、保護層44〇上、保護層 440之開口 442的侧壁上及暴露於保護層440之開口 442外的金屬微線路奸 構體434上,此打線墊片450打線墊片的表面金屬材質係為金。打線塾片 450及引線470所構成的金屬結構可以包括一黏著層452及至少一軟質金屬 層(未繪示),此軟質金屬層之厚度大於1微米,比如是由黏著層452、銅層 鎳層及金層所構成,黏著層452係位於打線墊片450及引線47〇所構成的 金屬結構之底層,用以使打線墊片450及引線470能夠固定在晶片41〇的 表面,而銅層係位在黏著層452上,鎳層係位在銅層上,金層係位在錄声 上;另外,打線墊片450及引線470所構成的金屬結構亦可以是由黏著芦 13Meg 02-008TW-R) Positive Replacement Page As shown in the figure, there is shown a cross-sectional enlarged view of a wafer which can be subjected to a wire bonding process in accordance with a fifth preferred embodiment of the present invention. Referring to FIG. 6, the wafer 410 may further include a flexible dielectric material 460 and a lead 470. Thus, the soft dielectric material 460 can buffer the impact on the wafer 410 during wire bonding. The soft dielectric material 460 is on the protective layer 440, and the wire bonding pad 45 is on the soft dielectric material 460, and the lead 470 is through the flexible dielectric material 46A for opening to the protective layer 440. The metal microcircuit structure 434 outside the 442 is electrically connected to the wire bonding pad 45〇, wherein the wire bonding pad 450 is positioned above the active component 428, and the wire clamping tab 45 is also positioned at the opening 442 of the protective layer 440. Above, the soft dielectric material 46 is, for example, polyimine. Since the soft dielectric material 460 can buffer the impact of the wire bonding process on the wafer 41, the wire spacer 450 can also be a structure that does not need to have a soft metal layer; of course, the wire bonding plate 450 can also have a soft metal layer. The structure, when doing the wire-laying process, will have a more buffering effect. The metal structure formed by the wire spacer 450 and the wire 470 is on the flexible dielectric material 460, the opening 462 of the flexible dielectric material 460, the protective layer 44, the sidewall of the opening 442 of the protective layer 440, and The surface metal material of the wire gasket 250 wire gasket is gold, which is exposed on the metal microwire frame 434 outside the opening 442 of the protective layer 440. The metal structure formed by the wire splicing 450 and the wire 470 may include an adhesive layer 452 and at least one soft metal layer (not shown). The thickness of the soft metal layer is greater than 1 micrometer, for example, by the adhesive layer 452 and the copper layer. The layer and the gold layer are formed, and the adhesive layer 452 is located on the bottom layer of the metal structure formed by the wire bonding pad 450 and the lead wire 47, so that the wire bonding pad 450 and the wire 470 can be fixed on the surface of the wafer 41〇, and the copper layer The structure is on the adhesive layer 452, the nickel layer is on the copper layer, and the gold layer is on the sound recording; in addition, the metal structure formed by the wire spacer 450 and the lead wire 470 can also be adhered by the reed 13

12995½ 7.1 MEG 02-008TW-R 452、銅層及金層所構成,黏著層452係位於打線墊片45〇及引線47〇所構 成的金屬結構之底層,用以使打線墊片450及引線470能夠固定在晶片41〇 的表面,而銅層係位在黏著層452上,金層係位在銅層上:再者,打線墊片 450及引線470所構成的金屬結構亦可以是由黏著層452、錯合金層及金層 所構成,黏著層452係位於打線墊片450及引線470所構成的金屬結構之 底層,用以使打線墊片450及引線470能夠固定在晶片410的表面,而鉛 合金層係位在黏著層452上,金層係位在鉛合金層上。其中黏著層452的 材質比如是鈦、鉻、鈦鎢合金或鈦氮化合物等。 在上述第五較佳實施例的結構中,由於打線墊片450下具有軟性介電 材質460,同時打線墊片45〇亦可以具有軟質金屬層,因此在將導線49〇之 端部492打到打線墊片450上時,可以緩衝因為打線製程造成震動晶片41〇 的程度,如此導線490之端部492便可以打到配置在正位於主動元件428 上方的打線墊片450上,如此基底420之表面422便可以減少預留非主動 區的面積,故可以增加主動元件428配置在基底42〇之表面422上的密度, 進而降低晶片410的尺寸。另外,由於打線墊片45q下具有軟性介電材質 460,同時打、線墊片45〇亦可以具有軟質金屬層,因此在將導線·之端部 492打到打線墊片450 ±時,可以缓衝因為打線製程造成震動晶片的程 度故可以避免晶片41〇的保護層440或介電結構體432產生裂痕的情形。 再者’由於保護層440的開口 442可以製作得报小,約略為〇. 5微米到4〇 微米之間,因此金屬微線路結構體434僅需小區域地與引線47〇電性連接, 而可以縮減用以與引線470連接之金屬微線路結構體434的尺寸,故可以 1299 1299129951⁄2 7.1 MEG 02-008TW-R 452, consisting of a copper layer and a gold layer. The adhesive layer 452 is located on the bottom layer of the metal structure formed by the wire bonding pad 45〇 and the lead wire 47〇 for the wire bonding pad 450 and the lead wire 470. It can be fixed on the surface of the wafer 41, and the copper layer is on the adhesive layer 452, and the gold layer is on the copper layer: in addition, the metal structure formed by the wire spacer 450 and the wire 470 can also be an adhesive layer. 452. The alloy layer and the gold layer are formed. The adhesive layer 452 is located on the bottom layer of the metal structure formed by the wire bonding pad 450 and the wire 470, so that the wire bonding pad 450 and the wire 470 can be fixed on the surface of the wafer 410. The lead alloy layer is on the adhesive layer 452, and the gold layer is on the lead alloy layer. The material of the adhesive layer 452 is, for example, titanium, chromium, titanium tungsten alloy or titanium nitride. In the structure of the fifth preferred embodiment, since the wire spacer 450 has a soft dielectric material 460, and the wire spacer 45 can also have a soft metal layer, the end portion 492 of the wire 49 is hit. When the wire spacer 450 is wound, the degree of vibration of the wafer 41 can be buffered due to the wire bonding process, so that the end portion 492 of the wire 490 can be placed on the wire bonding pad 450 disposed above the active component 428, such that the substrate 420 The surface 422 can reduce the area of the reserved inactive area, so that the density of the active element 428 disposed on the surface 422 of the substrate 42 can be increased, thereby reducing the size of the wafer 410. In addition, since the wire gasket 45q has a soft dielectric material 460, and the wire gasket 45 〇 can also have a soft metal layer, when the wire end portion 492 is hit to the wire spacer 450 ±, it can be slowed down. It is possible to avoid the occurrence of cracks in the protective layer 440 or the dielectric structure 432 of the wafer 41 due to the degree of vibration of the wafer caused by the wire bonding process. Furthermore, since the opening 442 of the protective layer 440 can be made small, approximately between 5 μm and 4 μm, the metal micro-circuit structure 434 only needs to be electrically connected to the lead 47 in a small area. The size of the metal micro-circuit structure 434 to be connected to the lead 470 can be reduced, so that it can be 1299 1299

MEG 02-008TW-R 增加位在保護層440下之金屬微線路結構體434的線路佈局空間。 在上述的第五較佳實施例中,打線墊片係位在保護層之開口的正上 方’然而本發明的應用並非僅限於此,如第7圖所示,其繪示依照本發明 第六較佳實施例之一種可以進行打線製程的晶片之剑面放大示意圖,其中 若是本實施例中的標號與第五較佳實施例一樣者,則表示在本實施例中所 指明的構件係雷同於在第一較佳實施例中所指明的構件,在此便不再贅 述。請參照第7圖,晶片412之引線472除了在軟性介電材質460的開孔 462中延伸之外,還在軟性介電材質460上延伸,而打線墊片454係位在軟 性介電材質460之開孔462周圍的軟性介電材質460上,如此藉由引線472 可以使打線墊片454與暴露於保護層440之開口 442外的金屬微線路結構 體434電性連接,而打線墊片454位在主動元件428的上方,此打線墊片 454打線墊片的表面金屬材質係為金。打線墊片454及引線472所構成的金 屬結構如第五較佳實施例所述,在此便不再贅述。 綜上所述,本發明至少具有下列優點: 1·本發明之晶片’由於打線塾片下具有軟性介電材質,或打線墊片具 有軟質金屬層的配置,因此在將導線之端部打到打線墊片上時,可以緩衝 因為打線製程造成震動晶片的程度,如此導線之瑞部便可以打到配置在正 位於主動元件上方的打線墊片上,如此基底之表面便可以減少預留非主動 區的面積,故可以增加主動元件配置在基底之表面上的密度,進而降低晶 片的尺寸。 2·本發明之晶片,由於打線墊片下具有軟性介電材質,或打線墊片具 15MEG 02-008TW-R increases the line layout space of the metal micro-circuit structure 434 located under the protective layer 440. In the fifth preferred embodiment described above, the wire bonding pad is fastened directly above the opening of the protective layer. However, the application of the present invention is not limited thereto, as shown in FIG. 7, which is shown in accordance with the sixth aspect of the present invention. A schematic illustration of a sword face enlargement of a wafer which can be subjected to a wire bonding process, wherein the reference numerals in this embodiment are the same as those in the fifth preferred embodiment, indicating that the components specified in the embodiment are identical to The components specified in the first preferred embodiment will not be described again. Referring to FIG. 7, the lead 472 of the wafer 412 extends over the flexible dielectric material 460 in addition to the opening 462 of the flexible dielectric material 460, and the wire bonding pad 454 is tied to the flexible dielectric material 460. The flexible dielectric material 460 around the opening 462, such that the wire bonding pad 454 can be electrically connected to the metal micro-circuit structure 434 exposed outside the opening 442 of the protective layer 440 by the wire 472, and the wire bonding pad 454 Positioned above the active component 428, the surface metal material of the wire spacer 454 wire gasket is gold. The metal structure of the wire spacer 454 and the lead wire 472 is as described in the fifth preferred embodiment, and will not be described again. In summary, the present invention has at least the following advantages: 1. The wafer of the present invention has a soft dielectric material under the wire, or the wire gasket has a soft metal layer configuration, so that the end of the wire is hit. When the wire gasket is used, it can buffer the degree of vibrating the wafer due to the wire bonding process, so that the wire portion of the wire can be placed on the wire bonding pad located above the active component, so that the surface of the substrate can reduce the reservation non-active. The area of the area can increase the density of the active component disposed on the surface of the substrate, thereby reducing the size of the wafer. 2. The wafer of the present invention has a soft dielectric material under the wire gasket or a wire gasket 15

meg 02-008TW-R f修曲正努换買 有軟質金屬層的配置,因此在將導線之端部打到打線墊片上時,可以緩」 因為打線製程造成震動晶片的程度,故可以避免晶片的保護層或介電結構 體產生裂痕的情形。 3·本發明之晶片,由於保護層的開口可以製作得很小,因此金屬微線 路結構體僅需小區域地與打線墊片或引線電性連接,而可以縮減用以與打 線塾片或引線連接之金屬微線路結構體的尺寸,故可以增加位在保護層下 之金屬微線路結構體的線路佈局空間。 雖然本發明已以一較佳實施例揭露如上,然其並非用以限定本發明, 任何熟習此技藝者,在不脫離本發明之精神和範圍内,當可作些許之更動 與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1圖繪示習知適用於打線製程的晶片之剖面示意圖。 第2圖繪示依照本發明第一較佳實施例之一種可以進 行打線製程的晶片之剖面放大示意圖。 第3圖繪示依照本發明第二較佳實施例之一種可以進 行打線製程的晶片之剖面放大示意圖。 第4圖繪示依照本發明第三較佳實施例之一種可以進 行打線製程的晶片之刮面放大示意圖。 第5圖繪示依照本發明第四較佳實施例之一種可以進 行打線製程的晶片之刮面放大示意圖。 第6圖綠示依照本發明第五較佳實施例之一種可以進 行打線製程的晶片之剖面放大示意圖。Meg 02-008TW-R f is a configuration that has a soft metal layer. Therefore, when the end of the wire is hit on the wire shims, it can be slowed down. A case where a protective layer or a dielectric structure of a wafer is cracked. 3. The wafer of the present invention, since the opening of the protective layer can be made small, the metal micro-circuit structure only needs to be electrically connected to the wire pad or the lead in a small area, and can be reduced for use with the wire or the wire. The size of the connected metal micro-circuit structure can increase the layout space of the metal micro-circuit structure under the protective layer. Although the present invention has been described above in terms of a preferred embodiment, it is not intended to limit the invention, and it is obvious to those skilled in the art that the present invention can be modified and retouched without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view showing a conventional wafer suitable for a wire bonding process. Fig. 2 is a schematic enlarged cross-sectional view showing a wafer which can be subjected to a wire bonding process in accordance with a first preferred embodiment of the present invention. Fig. 3 is a schematic enlarged cross-sectional view showing a wafer which can be subjected to a wire bonding process in accordance with a second preferred embodiment of the present invention. Fig. 4 is a schematic enlarged plan view showing a scraping surface of a wafer which can be subjected to a wire bonding process according to a third preferred embodiment of the present invention. Fig. 5 is a schematic enlarged plan view showing a scraping surface of a wafer which can be subjected to a wire bonding process in accordance with a fourth preferred embodiment of the present invention. Fig. 6 is a cross-sectional enlarged view showing a wafer which can be subjected to a wire bonding process in accordance with a fifth preferred embodiment of the present invention.

129955^)年 B : (MEG 02-008TW-R 跑〜一……一.--—: 第7圖繪示依照本發明第六較佳實施例之一種可以進 行打線製程的晶片之剖面放大示意圖。 【主要元件符號說明】 圖式之標示說明: 110 ·晶片 120 :基底 122 :表面129955^) Year B: (MEG 02-008TW-R Run~一...一.--: Figure 7 is a cross-sectional enlarged view of a wafer that can be wire-bonded in accordance with a sixth preferred embodiment of the present invention; [Main component symbol description] Description of the diagram: 110 · Wafer 120: Substrate 122: Surface

124 :主動區 126 :非主動區 128 :主動元件 130 :線路結構層 132 :介電結構體 134 :金屬微線路結構體 136 :打線墊片124: active region 126: inactive region 128: active device 130: circuit structure layer 132: dielectric structure 134: metal microcircuit structure 136: wire spacer

140 :保護層 142 :開口 190 :導線 192 :端部 210 :晶片 212 :晶片 220 :基底 17140: protective layer 142: opening 190: wire 192: end 210: wafer 212: wafer 220: substrate 17

MEG 02-008TW-R 12995 月u日修&amp;正替換頁 222 :表面 228 :主動元件 230 :線路結構層 232 :介電結構體 234 :金屬微線路結構體 240 :保護層 242 ··開口MEG 02-008TW-R 12995 month u repair &amp; replacement page 222 : surface 228 : active component 230 : circuit structure layer 232 : dielectric structure 234 : metal microcircuit structure 240 : protective layer 242 · · opening

250 :打線墊片 252 :黏著層 254 :接點打線墊片 256 :引線 258 :黏著層 290 :導線 292 :端部250 : Wire gasket 252 : Adhesive layer 254 : Contact wire gasket 256 : Lead 258 : Adhesive layer 290 : Wire 292 : End

328 :主動元件 334 ··金屬微線路結構體 340 :保護層 342 :開口 350 :打線墊片 352 :黏著層 354 :打線墊片 18328: Active component 334 · Metal microcircuit structure 340 : Protective layer 342 : Opening 350 : Wire spacer 352 : Adhesive layer 354 : Wire spacer 18

MEG 02-008TW-R 1299550 a)jLtitir '96. 7. 1 7 、——: 立10 ·晶片 412 :晶片 420 :基底 422 :表面 428 :主動元件 432 :介電結構體 434 :金屬微線路結構體 440 :保護層 442 :開口 450 :打線墊片 452 :黏著層 454 :打線墊片 460 :軟性介電材質 462 :開孔 470:引線 472:引線 490 :導線 492 :端部MEG 02-008TW-R 1299550 a) jLtitir '96. 7. 1 7 , --: Li 10 · Wafer 412 : Wafer 420 : Substrate 422 : Surface 428 : Active element 432 : Dielectric structure 434 : Metal micro-circuit structure Body 440: protective layer 442: opening 450: wire spacer 452: adhesive layer 454: wire spacer 460: flexible dielectric material 462: opening 470: lead 472: lead 490: wire 492: end

Claims (1)

MEG 02-008TW-R 1299 5§0月9修^正替換頁 Λ. 2 '. 十、申請專利範圍: 1· 一種晶片結構’該晶片結構至少包括: 一基底,該基底具有至少一主動元件,係位在該基底之一表面上; 一線路結構層,係位在該基底之該表面上,該線路結構層包括一介電 結構體及一金屬微線路結構體,該金屬微線路結構體係交錯於該介電結構 體中,並且該金屬微線路結構體與該主動元件電性連接; 一保護層,位在該線路結構層上,該保護層之一第一開口暴露出該金 屬微線路結構體; 一介電材質層,位在該保護層上,該介電材質層材質包括聚合物,該 介電材質層之一第二開口暴露出該金屬微線路結構體; 一打線墊片,係配置在該介電材質層上,該打線墊片包括一黏著層及 一金屬層,該黏著層位在該介電材質層上,而該金屬層位在該黏著層上, 該金屬層包括至少一金層,該金屬層之厚度大微米,該打線墊片經由 該第一開口及該第二開口與該金屬微線路結構體連接,且該打線墊片係配 置在該些主動元件之至少其中之一上;以及 一導線,接合在該打線墊片上。 2·如申請專利範圍第1項所述之晶片結構,該第一開口之一孔徑係介於 〇· 5微米至40微米之間。 3·如申請專利範圍第1項所述之晶片結構,其中該打線墊片係直接正位於 該第二開口上。 4·如申請專利範圍第1項所述之晶片結構,還包括一引線位在該第一開口 12MEG 02-008TW-R 1299 5§0月9修^正换页Λ. 2 '. X. Patent scope: 1. A wafer structure 'The wafer structure at least includes: a substrate having at least one active component Anchored on a surface of the substrate; a circuit structure layer on the surface of the substrate, the circuit structure layer comprising a dielectric structure and a metal microcircuit structure, the metal microcircuit structure system Interleaved in the dielectric structure, and the metal microcircuit structure is electrically connected to the active component; a protective layer is disposed on the circuit structure layer, and a first opening of the protective layer exposes the metal microcircuit a dielectric material layer on the protective layer, the dielectric material layer material comprises a polymer, and a second opening of the dielectric material layer exposes the metal microcircuit structure; Arranging on the dielectric material layer, the wire bonding pad comprises an adhesive layer and a metal layer, the adhesive layer is on the dielectric material layer, and the metal layer is on the adhesive layer, the metal layer comprises At least one gold layer The metal layer is connected to the metal microcircuit structure via the first opening and the second opening, and the wire spacer is disposed on at least one of the active components; And a wire bonded to the wire shims. 2. The wafer structure of claim 1, wherein the first opening has a pore size between 微米·5 μm and 40 μm. 3. The wafer structure of claim 1, wherein the wire spacer is directly on the second opening. 4. The wafer structure of claim 1, further comprising a lead in the first opening 12 MEG 02-008TW-R 及該第二開口内,該打線糾透過刻線麟由該第—開口及該第二開 口連接該金屬微線路結構體。 5·如申請專利範圍帛1項所述之晶片結構,該引線係由該黏著層及該金屬 層所構成。 6·如申請專利範園第1項所述之晶片結構,該打線塾片係位在該介電材質 層上。In the MEG 02-008TW-R and the second opening, the wire aligning is connected to the metal microcircuit structure through the first opening and the second opening through the scribe line. 5. The wafer structure of claim 1, wherein the lead is formed of the adhesive layer and the metal layer. 6. The wafer structure as claimed in claim 1, wherein the wire is placed on the dielectric layer. 7·如申請專利範圍第1項所述之晶片結構,其中該打線墊片更可包括一銅 層位在該黏著層與該金層之間。 8·如申請專利賴第1項所述之晶片結構,其中該打線墊片更可包括一銅 層及-鎳層位在該黏著層與該金層之間,細層位在絲著層上,該鎳 層位在該銅層上。 9.如申請專利範圍第1項所述之晶片結構,其中該金屬層的硬度係小於 8〇Hv。7. The wafer structure of claim 1, wherein the wire spacer further comprises a copper layer between the adhesive layer and the gold layer. 8. The wafer structure of claim 1, wherein the wire bonding pad further comprises a copper layer and a nickel layer between the adhesive layer and the gold layer, and the fine layer is on the wire layer. The nickel layer is on the copper layer. 9. The wafer structure of claim 1, wherein the metal layer has a hardness of less than 8 〇 Hv. 10·如申請專利圍第1項所述之晶片結構,其中該黏著層的材質係選自於 鈦鎢合金材質。 11·如申請專利範圍第1項所述之晶片、结構,其中該黏著層的材質係選自於 鈦之金屬材質。 12·如申請專利範圍第1項所述之晶片結構,其中該黏著層的材質係選自於 鉻之金屬材質。 13•如申請專利範圍第1項所述之晶片結構,其中該該黏著層的材質係選自 於鈦氮化合物。 21 12910. The wafer structure of claim 1, wherein the material of the adhesive layer is selected from the group consisting of titanium tungsten alloy. 11. The wafer or structure of claim 1, wherein the material of the adhesive layer is selected from the group consisting of titanium. 12. The wafer structure of claim 1, wherein the material of the adhesive layer is selected from the group consisting of chromium metal. The wafer structure of claim 1, wherein the material of the adhesive layer is selected from the group consisting of titanium nitride compounds. 21 129 7 替換頁 1/1 » . - MiiU 02-008TW-R 14.如申請專利範陳項所述之晶片結構,其中該介電讎為聚酿亞 胺。 15.如申請專利範圍帛i項所述之晶片結構, 1微米到5微米之間。 16·如申凊專利範圍第1項所述之晶片、结構,其中該 形成在該打線墊片上。 如申π專利範圍第1項所述之晶片結構,其中該打線墊片的表面金屬材 質係為金。 I中該打線墊片的厚度係介於 導線係經由一打線製程 17· 18.如申請專利範圍第!項所述之晶片結構,其中該主動元件包括一金屬氧 化半導體。 19·如申明專利細第1項所述之晶片結構,其中該主動元件包括一電晶 體。 20·如申請專利範圍第i項所述之晶片結構,其中該打線塾片更可包括一錯 合金層位在該黏著層與該金層之間。7 Replacement page 1/1 » . - MiiU 02-008TW-R 14. The wafer structure as described in the patent application, wherein the dielectric enthalpy is a polyamine. 15. A wafer structure as claimed in claim IA, between 1 micrometer and 5 micrometers. The wafer or structure of claim 1, wherein the wafer is formed on the wire bonding pad. The wafer structure of claim 1, wherein the surface metal material of the wire spacer is gold. The thickness of the wire gasket in I is between the wire and the wire through the one-line process. 17. 18. As claimed in the patent scope! The wafer structure of item wherein the active device comprises a metal oxide semiconductor. The wafer structure of claim 1, wherein the active device comprises an electro-optic body. The wafer structure of claim i, wherein the wire splicing sheet further comprises a wrong alloy layer between the adhesive layer and the gold layer. 22 m22 m 126126 9731TW 120 140 130 MEG 02-008TW-R 1299!豐工月”賴.—錄麵: 七、指定代表圖: (一) 本案指定代表圖為:第(7 )圖。 (二) 本代表圖之元件符號簡單說明: 428 :主動元件 434 :金屬微線路結構體 440 :保護層 442 ··開口 454 :打線墊片 460 :軟性介電材質 462 :開孔 472 :引線 八、本案若有化學式時,請揭示最能顯示發明特徵的化學式:9731TW 120 140 130 MEG 02-008TW-R 1299! Fenggongyue" Lai.- Recording: 7. Designation of representative drawings: (1) The representative representative of the case is: (7). (2) Brief description of the component symbols: 428: Active component 434: Metal microcircuit structure 440: Protective layer 442 · Opening 454: Wire spacer 460: Flexible dielectric material 462: Opening 472: Lead 8. If there is a chemical formula in this case, Please reveal the chemical formula that best shows the characteristics of the invention:
TW091121967A 2002-09-25 2002-09-25 Structure of wire bonding over semiconductor chip TWI299550B (en)

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