TWI289880B - Manufacturing process for a multilayer structure - Google Patents
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1289880 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種由數種半導體材料所構成之多層 結構之製造方法,該結構包含一由第一半導體材料所構成 5 之基板以及一由第二半導體材料所構成之外表薄層,兩種 半導體材料具有貫質上不同的晶格參數。 【先前技術】 這種型式之方法係為已知技術。 10 因此,製造包含一由例如石夕之材料所構成之基板,以 及一由例如矽-鍺(SiGe)或甚至鍺(Ge)之材料所構成之外 表薄層之結構係為已知技術。 以申請人之名之專利申請案FR 0208600係關於一種 用以從一晶圓製造包含半導體材料之一薄層之一結構之 15 方法,該晶圓包含一晶格參數適應層,而該晶格參數適應 層包含一由具有第一晶格參數之半導體材料所構成之上 層,特徵在於其包含下述階段: (a) 在具有實質上不同於第一晶格參數之第二額定晶 格參數之半導體材料之一薄膜之適應層之上層上,成長足 20 夠之最小厚度,以保持在下之適應層之上層之第一晶格參 數且因此受到應變; (b) 在具有實質上與第一晶格參數相同之額定晶格參 數之半導體材料之一鬆弛層之薄膜上之成長;及 (C)位於相對於鬆弛層之適應層之側面上的晶圓之至 -6- !289880 少一部分之移除,包含下述操作: •形成一脆化區至相對於鬆弛層之適應層之側面; •電源供應於脆化區以從晶圓卸下—包含鬆弛層之 、、、吉構0 屬於t專利申請Ϊ之方法因此採用—種層轉移技術(尤其 =於SMARTCUT型式或财謂⑧型式)以構纽期望晶 10 15 -曰i: Γ!方法之一初始元件係為—晶圓’該晶圓包含 區;:格f數適麟,該晶格參數適應層對應於該晶圓之一 ”在其表面上出現—實質上鬆弛材 數個例如錯位之結構缺陷。 ,、不/、有夕 特別要載_是_弛層—般意味著 曰曰、、、。構之任何半導體材料層,亦即,且二似紇、、、口 層之材料之敎晶格參數相同之—晶格參數成此 ,結構係在晶趙=:二導= ::來產生應變’藉以使至少一晶格參二:二 冋於此種材料之額定晶格參數之義務。、實貝上不 專利申請案FR 0208600之方法椹士、 例如於本文開始_提及之結構之解財利於構成 【發明内容】 本發明之目的係用以對該專利申 種程度的補充。 τ月茱之教杈提供某 20 1289880 為達成這個目的,本發明提出 所構成之多層結構之製造方法,該結構3=體;料 L主嚅麻 土伋以及由第一+導體材料所構成 =二專::兩種半導體材料具有實質上不同的晶, 特徵在於此方法包含下述步驟: ^數 •在-支撐基板上產生包含該外表薄層之一層· 立-脆2由該切基板與該沈積層㈣成1體中建 10 15 •使該總體與一目標基板接合; •於這個脆化區之階層脫離,·及 •處理所產生之結構之表面。 【實施方式】 本發明之其他樣態、目的與優轉從參考_所提供 之本發明之下述說明而顯現更清楚,於其中圖1&至^ 不出用以實施本發明之一個實施例之主要步驟。 首先參考圖la,其顯示出上面已沈積有一層1〇5( 所示)之一支撐基板100。 支撐基板100係由-種具有第一晶格參數之半導體材 料所構成。例如,其可以是由矽所構成。 層奶係為由-種具有不同於上述所提及之第一晶格 參數之第二晶格參數之材料所構成之一層。 因此’層105可以是由SiGe,或甚至是以所構成。 據說層105係藉由-種技術而沈積,該技術允許: 20 1289880 •沈積一材料之一期望厚度,關於它的晶格參數係實 質上不同於上面製造有沈積物之支樓基板之晶格參數; •同時構成這種實際上免除於錯位型式之缺陷之沈 積物之一外表層。 5 文獻WO 00/15885譬如教導一種允許SiGe或Ge沈積 在矽上之方法。 這種沈積方法因此可譬如依據第一模式而執行,其中 單晶矽Ge係藉由實行下述步驟而沈積在單晶矽之一支撐 基板上: 1〇 •使單晶矽之基板的溫度穩定於400T:至500°C之第 一預設穩定溫度,較佳是43(TC至460°C ; •於該第一預設溫度下化學氣相沈積(CVD)Ge,直到 獲得位在小於一最後期望厚度之一預設厚度之支撐基板 上之Ge之基底層為止; 15 •增加化學氣相沈積Ge之溫度從第一預設溫度到範 圍從750。(:至850°C,較佳是從80(TC至850°C之一第二預 設溫度;以及 •於該第二預設溫度下繼續化學氣相沈積Ge,直到為 單晶石夕Ge之層獲得一最後期望厚度為止。 20 這種沈積方法亦可依據譬如由文獻WO 00/15885所 揭露的那些變形例而實現。 直接在可以是由矽所構成之一支撐基板上獲得鬆弛 SiGe或鬆弛Ge之一薄層之其他方法亦是可行的。 亦可參考公開公報•在供虛擬基板製造用之氫或氦氣 1289880 離子植入法之後之假晶Sil-xGex/Si (100)異質結構之應變 鬆弛(Strain relaxation of pesedomorphic Sil_xGex/Si (100) heterostructures after hydrogen or helium ion implantation for virtual substrate fabrication)’,B· Hollander 等人,物理 5 研究之核能儀器與方法B175-177 (2001) 357-367,其係於 此列入參考。 在這種方法中,係藉由製作一應變層並藉由鬆弛這個 層而產生此層110。 鬆弛SiGe之薄層亦可藉由以下文獻所揭露之技術而 ίο 獲得,這些文獻因為它們揭露可供本發明實現之用以獲得 這種層之方法而列入參考: —”基於含碳層之結合之新型式之SiGe薄應變鬆弛 緩衝層之發展(Development of a new type of SiGe thin strained relaxed buffer based on the incorporation of carbon 15 containing layer)",在第一屆SiGe技術與元件會議中提出 (ISTDM,日本名古屋,2003年1月15-17日); —”為n-Mosfet之具有高Ge含量之薄SiGe緩衝層 (Thin SiGe Buffers with High Ge content for n-Mosfets)"(Lyutovich 等人,材料科學 & 工程,B89 2〇 (2002),341-345);及 —”具有0·1μπι以下之厚度之鬆弛SiGe緩衝層 (Relaxed SiGe buffers with thickness below 0.1μιη)??(Bauer 等人一薄固體薄膜369 (2000),152-156)。 回到本發明之方法,在所有情況下,包含所欲產生之 1289880 結構之外表薄層之一層110已被建構在支撐基板100上。 因此,已經完成包含在支樓基板100上之SiGe(具有 期望之Si/Ge比率)或Ge之一層110之一中間晶圓1〇。 此種層100之自由表面可被拋光,以便允許與將要在 此方法中從事之中間晶圓10接合。 中間晶圓10之表面粗链度必須確實少於幾埃 (angstrom)rms以供這種接合使用。 一介面105因此被界定在層11〇與支撐1〇〇之間。 特別要載明的是藉由使用此種型式之沈積方法,錯位 10 15 型式之缺陷已被侷限於層110之與介面1〇5鄰接之區域 内0 吾人理解到侷限意味著大多數的錯位型式之缺陷係 位於該區域中。層11G之其餘部分並未能完全免除缺陷, 但它們的集中性係與微電子應用相容。 係在!侷:住錯位型式之缺陷之層110之區域, 糸在由夕所構成之支撐基板100^^ 層層〜 鬆弛SiGe層具有期望去:::製’這種G” 大約為0·5至1微米。又 種4望厚度尤其可以是 中 現在參考圖^脆化區12G係建立在晶圓ι〇之厚度 這個脆化區尤其可藉由 經由層110植入物質而形成。 20 1289880 被植入之物質係為一種或數種原子或分子物質,例如 氮或氣離子或分子。 植入亦可以是不同物質(例如氩與氦)之共同植入。特 別要載明的是在本文中,“植入”也涵蓋這種至少兩種物質 5 之共同植入。 當脆化區係藉由植入而形成時,植入參數可被定義成 俾能使脆化區位於支撐基板1〇〇中,如圖lb所示。 亦可能定義這些參數,俾能使脆化區位於層11()本身 中(較佳是位於與介面105鄰接的此種層之區域中)。 10 特別要載明的是脆化區亦已經在沈積層110之前藉由 在支撐基板100中建立多孔區域而形成。 緊接著產生包含脆化區之晶圓,並將這個晶圓接合至 目標基板20。 目標基板20可以是由矽所構成。 15 /黏著於目標基板上之晶圓10之面係為對應至層11〇 之鬆他表面。 生為了執行這種接合,這些表面已在被置於接觸之前被 /月洗’且一接合層已可選擇地被插入在這些表面之間。 又’譬如氧化層之電氣絕緣層可被插入在晶圓與目才# 2〇 基板之間。 、不 這種氧化層可從目標基板20之表面之氧化開始。 同樣地,如果其係由SiGe所構成的話,其可從層u〇 之表面之氧化開始。 如果層110係由Ge或SiGe所構成,則亦可能在接合 -12- Ϊ289880 之前’藉由氧化層沈積來使其與一氧化層結合。 因此,在接合之前,晶圓及/或目標基板可以是與一絕 緣層相關。 如果需要的話,可處理一個或兩個待接合之基板之表 面’以便使這些基板之表面粗糙度下降至有利接合之數值 (亦即,不超過幾埃rms)。 這種表面處理可以是一種拋光步驟。 在接合之後,可能開始進行傳統熱處理以強化接合介 面。 緊接著進行藉由熱及/或機械電源之於脆化介面之階 層之分離。 結果為包含如圖Id所示之下述元件之結構3〇: •目標基板20 ; •層110 ;及 •支撐基板1 〇〇之任意殘留物。 於此結構中,層110本身包含: •一晶格參數適應層(與支撐基板1〇〇之殘留物鄰接 的層110之一部份);以及 •一期望厚度之鬆弛層。 當脆化區已藉由植入而在層110之”晶格參數適應層” 之厚度中構成時’所產生之結構3G並不包含支撐基板之 殘留物’且晶格參數適應層之_部份已在分離期間與這個 結構3 0分開。 於此情況下,所產生之結構之表面係被處理(圖le)以 -13- 1289880 改善層110之表面狀態。 這種表面處理可包含拋光,與其他型式之處理。 亦可能以執行植入,俾能在被鬆弛之層110之一部分 中獲得脆化區。 5 於此情況下,轉移層並不包含例如錯位之缺陷(或只有 非苇;的缺陷),且在分離之後所產生之結構可出現不需 要任竹額外處理之表面層(其來自層110之鬆他部分)。 在已將脆化區形成在支撐基板1〇〇之厚度中(藉由植_ 入或藉由優先創造多孔區域)的狀況下,下一個步驟係選 10 擇性侵蝕這個支撐基板之殘留物。 這種選擇性侵蝕可以是選擇性化學蝕刻,其只侵蝕支 樓基板之材料。 這種蝕刻可藉由一種潮濕方法(選擇適合之蝕刻溶 液)’或藉由一種乾燥方法(經由能量電漿或粉碎之選擇性 15 蝕刻)而完成。 這種蝕刻可以在拋光之後進行。 於此種選擇性侵蝕之初期,對應於錯位型式之缺陷被_ 侷限於這個層110之-部分,處理層11〇之自由表面以移 除晶格參數適應層。 20 上述所說明的為用以實施本發明之兩個主要變形例 (分別在支撐基板中,以及在層110中創造脆化區)。 在这兩個情況下,最後結構之活性層係對應至層110 之鬆他部分。 依據第三主要變形例’層110實際上係由不同階層(或 1289880 階級)所組成,而這個層110已被建構如下: •第一階層之沈積物,譬如藉由一種例如由文獻WO 00/15885或由上述B. Hollander等人之參考文獻所揭露之 技術,或者通常藉由任何其他用以產生鬆弛薄層之已知技 5 術: •第二階層之沈積物,構成供化學侵蝕用之止擋層; 及 •第三階層之沈積物,對應於鬆弛層以構成最後結構 之活性層。這種沈積以具有活性層之期望厚度完成。 1〇 第一階層係對應至晶格參數適應層。其可以是由SiGe 或Ge所構成。 第二階層同時必須: •關於化學侵蝕,具有與第三階層相關之良好選擇性 (於此方面,階層2與3必須使用不同材料);以及 15 •從具有兩個圍繞它之階層之晶格參數的角度來 看,不會引起太顯著的差異(於此方面,階層1、2與3之 材料必須不是太過不同的)。 舉例而言,可建構下述組合: 材料階層1 材料階層2 材料階層3 Ge SiGe(50/50) SiGe 或 Ge SiGe 應變Si SiGe 或 Ge 階層1與3之層較佳是由相同本質之材料所製成,俾 -15- 1289880 能使插在這兩層之間的階層2之層於其兩個表面接收同類 限制。 、 於此情況下,較佳將是使用下述材料:1289880 IX. Description of the Invention: [Technical Field] The present invention relates to a method of fabricating a multilayer structure composed of a plurality of semiconductor materials, the structure comprising a substrate composed of a first semiconductor material and a substrate The two semiconductor materials constitute a thin outer layer, and the two semiconductor materials have different lattice parameters in the cross. [Prior Art] This type of method is a known technique. 10 Therefore, it is known to manufacture a substrate comprising a substrate composed of, for example, a stone material, and a structure composed of a material such as bismuth-tellurium (SiGe) or even germanium (Ge). Patent application FR 0208600 in the name of the Applicant relates to a method for fabricating a structure comprising a thin layer of a semiconductor material from a wafer, the wafer comprising a lattice parameter adaptation layer, and the lattice The parametric adaptation layer comprises an overlayer of semiconductor material having a first lattice parameter, characterized in that it comprises the following stages: (a) having a second nominal lattice parameter substantially different from the first lattice parameter a layer of semiconductor material on the upper layer of the adaptation layer that grows to a minimum thickness of 20 to maintain the first lattice parameter of the layer above the adaptation layer and is thus strained; (b) having substantially the first crystal a growth of a film on a relaxed layer of one of the semiconductor materials having the same nominal lattice parameter; and (C) a portion of the wafer on the side of the adaptive layer relative to the relaxed layer to -6-!289880 In addition, it includes the following operations: • Forming an embrittlement zone to the side of the adaptation layer relative to the relaxed layer; • Power supply to the embrittlement zone for unloading from the wafer—including the relaxation layer, Special The method of applying for defects is therefore based on a layer transfer technique (especially = in SMARTCUT type or in the form of a type 8) to form a desired crystal 10 15 -曰i: Γ! One of the methods is the initial element is - wafer 'wafer' Inclusion region;: lattice f-number, the lattice parameter adaptation layer corresponding to one of the wafers "appears on its surface - substantially loose material, such as structural defects of misalignment.", no / special To carry _ is _ relaxation layer - generally means 曰曰,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Therefore, the structure is in the form of crystal Zhao =: two-conductor = :: to generate strain 'by virtue of at least one crystal lattice two: two 冋 冋 冋 此种 此种 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The method of 0208600, for example, the structure of the structure mentioned at the beginning of this article is advantageous. The purpose of the present invention is to supplement the degree of the patent application. The teaching of the 茱月茱 provides a certain 20 1289880 In order to achieve this object, the present invention proposes a system of multilayer structures Method, the structure 3 = body; material L main ramie soil and composed of the first + conductor material = two special: two semiconductor materials have substantially different crystals, characterized in that the method comprises the following steps: a layer on the support substrate that produces a layer comprising the outer surface. The vertical-brittle layer is formed by the cut substrate and the deposited layer (4) into a body. 10 15 • the entire body is bonded to a target substrate; The layers of the chemical zone are separated, and the surface of the resulting structure is processed. [Embodiment] Other aspects, objects, and advantages of the present invention will become apparent from the following description of the present invention provided by reference. 1 & to the main steps used to practice one embodiment of the present invention. Referring first to Figure la, it is shown that one of the support substrates 100 of a layer 1 (shown) has been deposited thereon. The support substrate 100 is composed of a semiconductor material having a first lattice parameter. For example, it may be composed of 矽. The layer milk system is a layer composed of a material having a second lattice parameter different from the first lattice parameter mentioned above. Thus the layer 105 can be composed of SiGe, or even. Layer 105 is said to be deposited by a technique that allows: 20 1289880 to deposit a desired thickness of a material, the lattice parameter of which is substantially different from the lattice of the substrate on which the deposit is made. Parameters; • At the same time constitute one of the outer layers of the deposit that is virtually free of defects in the misalignment pattern. 5 Document WO 00/15885, for example, teaches a method of allowing SiGe or Ge to deposit on a crucible. The deposition method can thus be performed, for example, according to the first mode, wherein the single crystal germanium Ge is deposited on one of the support substrates of the single crystal germanium by performing the following steps: 1. 使 making the temperature of the substrate of the single crystal germanium stable The first predetermined stable temperature at 400T: to 500 ° C, preferably 43 (TC to 460 ° C; • chemical vapor deposition (CVD) Ge at the first preset temperature until the position is less than one Finally, one of the thicknesses is desired to be a predetermined thickness of the base layer of Ge on the support substrate; 15 • Increasing the temperature of the chemical vapor deposition Ge from the first preset temperature to the range from 750. (: to 850 ° C, preferably From a second preset temperature of 80 (TC to 850 ° C; and • continuing chemical vapor deposition of Ge at the second predetermined temperature until a final desired thickness is obtained for the layer of monocrystalline Ge. Such a deposition method can also be realized in accordance with, for example, those disclosed in the document WO 00/15885. Other methods of obtaining a thin layer of relaxed SiGe or relaxed Ge directly on a support substrate which may be formed of tantalum It is possible. It can also refer to the publication of the bulletin. Strain relaxation of pesedomorphic Sil_xGex/Si (100) heterostructures after hydrogen or helium ion implantation for virtual substrate after hydrogen or helium 1289880 ion implantation Fabrication), B. Hollander et al., Physics 5 Research Nuclear Energy Instruments and Methods B175-177 (2001) 357-367, which is incorporated herein by reference. In this method, by making a strain layer and This layer 110 is created by relaxing this layer. The thin layer of relaxed SiGe can also be obtained by the techniques disclosed in the literature, as they disclose methods for obtaining the layer that can be implemented by the present invention. Included in the "Development of a new type of SiGe thin strained relaxed buffer based on the incorporation of carbon 15 containing layer", in "Development of a new type of SiGe thin strained relaxed buffer based on the incorporation of carbon 15 containing layer" Presented at the first SiGe Technology and Components Conference (ISTDM, Nagoya, Japan, January 15-17, 2003); —” for n-Mosfet Thin SiGe Buffers with High Ge content for n-Mosfets" (Lyutovich et al., Materials Science & Engineering, B89 2〇 (2002), 341-345); and —” with 0 - Relaxed SiGe buffers with thickness below 0.1 μm (Bauer et al., a thin solid film 369 (2000), 152-156). Returning to the method of the present invention, in all cases, a layer 110 comprising a thin layer of the outer layer comprising the desired 1289880 structure has been constructed on the support substrate 100. Therefore, SiGe (having a desired Si/Ge ratio) or one of the intermediate layers 110 of one of the Ge layers 110 included in the support substrate 100 has been completed. The free surface of such layer 100 can be polished to allow for bonding to intermediate wafer 10 to be performed in this method. The surface roughness of the intermediate wafer 10 must be indeed less than a few angstroms of rms for use in such bonding. An interface 105 is thus defined between the layer 11〇 and the support 1〇〇. In particular, it is stated that by using this type of deposition method, the defect of the misalignment type 10 15 has been limited to the region of the layer 110 adjacent to the interface 1〇5. I understand that the limitation means that most of the misalignment patterns The defect is located in this area. The remainder of layer 11G is not completely free of defects, but their concentration is compatible with microelectronic applications. Attached! Bureau: The area of the layer 110 of the faulty type of the faulty layer, the support substrate 100^^ layered by the eve: the relaxed SiGe layer has the desired to:::[This G" is about 0·5 to 1 In addition, the thickness of the powder can be in the middle of the reference. The embrittlement zone 12G is established in the thickness of the wafer. This embrittlement zone can be formed, in particular, by implanting a substance via the layer 110. 20 1289880 The substance is one or several atomic or molecular substances, such as nitrogen or gas ions or molecules. Implantation can also be co-implantation of different substances (such as argon and helium). In particular, it is stated in this article, Implantation also covers the co-implantation of at least two substances 5. When the embrittlement zone is formed by implantation, the implantation parameter can be defined as 俾 enabling the embrittlement zone to be located in the support substrate 1〇〇 As shown in Figure lb. It is also possible to define these parameters so that the embrittlement zone can be located in layer 11() itself (preferably in the region of such layer adjacent to interface 105). The embrittlement zone has also been established in the support substrate 100 before the deposition layer 110. A wafer is formed next to the region, and the wafer is bonded to the target substrate 20. The target substrate 20 may be made of germanium. 15 / The surface of the wafer 10 adhered to the target substrate To correspond to the surface of the layer 11 。. In order to perform this joint, these surfaces have been washed by / before the contact is placed and a bonding layer has been selectively inserted between these surfaces. For example, an electrical insulating layer of an oxide layer may be interposed between the wafer and the substrate. The oxide layer may not be oxidized from the surface of the target substrate 20. Similarly, if it is composed of SiGe In this case, it can start from the oxidation of the surface of the layer. If the layer 110 is composed of Ge or SiGe, it is also possible to bond it to an oxide layer by depositing an oxide layer before bonding -12-Ϊ289880. Thus, prior to bonding, the wafer and/or target substrate may be associated with an insulating layer. If desired, the surface of one or both of the substrates to be bonded may be processed to reduce the surface roughness of the substrates to a favorable The combined value (ie, no more than a few rms). This surface treatment can be a polishing step. After bonding, conventional heat treatment may be initiated to strengthen the bonding interface. This is followed by thermal and/or mechanical power. Separation of the hierarchy of the embrittlement interface. The result is a structure comprising the following elements as shown in Figure Id: • Target substrate 20; • Layer 110; and • Any residue of support substrate 1 。. The layer 110 itself comprises: • a lattice parameter adaptation layer (a portion of the layer 110 adjacent to the residue of the support substrate 1); and • a relaxed layer of a desired thickness. When implanted and formed in the thickness of the "lattice parameter adaptation layer" of layer 110, the resulting structure 3G does not contain the residue of the support substrate and the portion of the lattice parameter adaptation layer has been separated during this period. Structure 30 is separated. In this case, the surface of the resulting structure is treated (Fig. 13) to improve the surface state of layer 110 by -13 - 1289880. This surface treatment can include polishing, and other types of processing. It is also possible to perform an implantation to obtain an embrittlement zone in one of the relaxed layers 110. 5 In this case, the transfer layer does not contain defects such as misalignment (or defects only non-defective), and the structure produced after separation may have a surface layer that does not require additional processing of the bamboo (which comes from layer 110) Loose his part). In the case where the embrittlement zone has been formed in the thickness of the support substrate 1 (by implanting or by preferentially creating a porous region), the next step is to selectively etch the residue of the support substrate. This selective erosion can be a selective chemical etch that only erodes the material of the support substrate. This etching can be accomplished by a wet method (selecting a suitable etching solution) or by a drying method (selective etching through energy plasma or pulverization). This etching can be performed after polishing. At the beginning of this selective erosion, the defect corresponding to the misalignment pattern is limited to the portion of this layer 110, and the free surface of the layer 11 is treated to remove the lattice parameter adaptation layer. 20 What has been described above is the two main variants for implementing the invention (in the support substrate, respectively, and in the layer 110 to create an embrittlement zone). In both cases, the active layer of the final structure corresponds to the loose portion of layer 110. According to a third major variant, the layer 110 is actually composed of different classes (or 1289880 classes), and this layer 110 has been constructed as follows: • Deposits of the first level, for example by a document WO 00/ 15885 or the technique disclosed by the above referenced by B. Hollander et al., or generally by any other known technique for producing a lazy layer: • a deposit of the second level, which is used for chemical erosion. a stop layer; and a third layer of deposit corresponding to the relaxed layer to form the active layer of the final structure. This deposition is done with the desired thickness of the active layer. 1〇 The first hierarchy corresponds to the lattice parameter adaptation layer. It may be composed of SiGe or Ge. The second class must also: • be concerned with chemical erosion, with good selectivity associated with the third class (in this respect, classes 2 and 3 must use different materials); and 15 • from a lattice with two classes surrounding it From the point of view of the parameters, it does not cause too significant differences (in this respect, the materials of the layers 1, 2 and 3 must not be too different). For example, the following combinations can be constructed: material level 1 material level 2 material level 3 Ge SiGe (50/50) SiGe or Ge SiGe strain Si SiGe or Ge layer 1 and 3 layers are preferably made of materials of the same nature Made, 俾-15-1289880 enables the layer 2 of the layer 2 interposed between the two layers to receive the same type of restriction on both surfaces. In this case, it is preferable to use the following materials:
材料階層2 SiGe(50/50). Ge 材料階層1 GeMaterial Level 2 SiGe(50/50). Ge Material Level 1 Ge
SiGe 應變SiSiGe strained Si
SiGe 於此第三變形例中’從事用以建立結構30之脆化區、 接合與分離之相同步驟。 因此,脆化區於此又可位於層11〇中。於此情況下, 10 15 其較佳是位於第一階層之厚度中(於其中其已藉由植入而 建構)。 為了獲得最後結構,執行兩種選擇性侵餘: •一第一選擇性侵飯,用以消除第一階層之殘留物。 這種侵蚀尤其可以是一種化學侵蝕,由此證明對應於一止 擋層之一階層之插入;及 •一第二選擇性侵蝕,用以消除止擋層本身。 亦可能構成只有兩個階層之層110,此兩階層為例如 上述所說明之第一階層與像上述階層2與3之第二階層。 於此情況下,第二階層可以譬如是由應變矽所構成, 而第一階層係由SiGe或Ge所構成。 又,第二階層從而形成最後結構之活性層,而第一階 層仍然構成晶格參數適應層。 -16- 20 1289880 下述材料(所提供之此表 仍然於此情況下,將能夠使用 與先前之表作為非限制性實例):In the third modification, SiGe is engaged in the same steps for establishing the embrittlement zone, bonding and separation of the structure 30. Therefore, the embrittlement zone can again be located in the layer 11〇. In this case, 10 15 is preferably located in the thickness of the first level (where it has been constructed by implantation). In order to obtain the final structure, two selective insults are performed: • A first selective insult to eliminate the residue of the first level. This erosion can be, in particular, a chemical attack, thereby demonstrating the insertion of a layer corresponding to one of the stop layers; and • a second selective erosion to eliminate the stop layer itself. It is also possible to form a layer 110 having only two levels, such as the first level described above and the second level like the above levels 2 and 3. In this case, the second level may be composed of strain enthalpy, and the first level is composed of SiGe or Ge. Again, the second level thus forms the active layer of the final structure, while the first order layer still constitutes the lattice parameter adaptation layer. -16- 20 1289880 The following materials (this table provided is still in this case will be able to use and the previous table as a non-limiting example):
材料階層 材料階層2Material hierarchy material level 2
GeGe
SiGe(50/50)SiGe (50/50)
SiGe 應變Si 5 在所有情況下,在圖le之結構已產生之後,可從事習 知之表面處理措施。 因此,本發明可使包含譬如位在矽基柘 SiGe層之多層結構被產生。 3 吾人應注意到在本發明的情況下,層11〇之適應層在 1〇 其厚度中不會出現濃度梯度(例如鍺之濃度之梯度果 適應層係在Si支撐基板與具有既定之Ge濃度之Ge或 SiGe鬆弛層之間的話)。 習知之適應層常出現這種濃度梯度,其係對應至適應 層中之晶格參數之梯度。 15 但是,這種具有濃度梯度之適應層必定都是相當厚的 (適應層之兩侧上之晶格參數的差異越重要,適應層就越 厚)。 WO 02/15244揭露這種具有濃度梯度之傳統適應層之 一例0 20 反之,在本發明的情況下,適應層可以是彳艮薄。 真正要提醒的是缺陷(例如錯位)係被侷限於與其和支 -17- 1289880 撐基板100之介面105鄰接的層lio之區域。 相較於例如WO 02/15244所揭露之已知技術而言,本 發明之這個具體樣態係有利的。 與這個樣態相關的優點之實例,係為這種薄適應層使 藉由橫越具有植入物質之適應層而在藉支撐基板1〇〇之内 植入來建構脆化區成為可能之事實。 這能夠在分離與抑制支撐基板100之剩餘材料(si或 其他)之後,為最後結構獲得非常高的品質表面,而不需 要用以處理分裂表面(例如將藉由於位於適應層本身内之 10 15 脆化區分離而獲得之一個表面)之麻煩處理(其將是關於具 有梯度之適應層之情況,這些適應層太厚而不能藉由植入 來橫越)。 吾人亦應注意到藉由本發明而獲得之結構係為錯位 型式之缺陷之例子,即使在嵌入區域中亦是如此。 —又,所產生之結構接著可用以使譬如應變石夕之補充層 藉由遙晶而成長在SiGe或Ge層上。SiGe strained Si 5 In all cases, conventional surface treatments can be performed after the structure of the diagram has been produced. Therefore, the present invention can be produced by a multilayer structure including, for example, a germanium-based SiGe layer. 3 It should be noted that in the case of the present invention, the layer of the layer 11 不会 does not exhibit a concentration gradient in its thickness (for example, the gradient of the concentration of yttrium is adapted to the Si supporting substrate and has a predetermined Ge concentration). Between the Ge or SiGe relaxation layers). This concentration gradient often occurs in conventional adaptation layers, which correspond to the gradient of the lattice parameters in the adaptation layer. 15 However, this adaptation layer with a concentration gradient must be quite thick (the more important the difference in lattice parameters on both sides of the adaptation layer, the thicker the adaptation layer). WO 02/15244 discloses an example of such a conventional adaptation layer having a concentration gradient. Conversely, in the case of the present invention, the adaptation layer may be thin. What is truly to be reminded is that the defect (e.g., misalignment) is limited to the area of the layer lio adjacent to the interface 105 of the support substrate 175-1289880. This particular aspect of the invention is advantageous over the known techniques disclosed, for example, in WO 02/15244. An example of the advantages associated with this aspect is the fact that such a thin adaptation layer makes it possible to construct an embrittlement zone by implanting within the support substrate 1〇〇 across the adaptation layer with the implant material. . This enables a very high quality surface to be obtained for the final structure after separating and suppressing the remaining material (si or otherwise) of the support substrate 100, without the need to process the split surface (eg, due to being located within the adaptation layer itself). The cumbersome treatment of a surface obtained by the separation of the embrittlement zone (which will be the case with an adaptive layer with gradients that are too thick to be traversed by implantation). It should also be noted that the structure obtained by the present invention is an example of a defect of a misalignment type, even in an embedded region. - Again, the resulting structure can then be used to grow a complementary layer such as strained stone on the SiGe or Ge layer by telecrystals.
在階層2之層係由應變石夕所構成的狀況下,為了保存 由石夕基板上之應變Si-SiGe雙層所組成之最後結構, 行單一選擇性侵蝕會是有利的。 疋 20 ▼…入、、口,丹j止搭厚。 最後,亦可能在將這個結構接合至目標基板之上 段之前’使應變㈣沈積在階層3之層上 包含位於㈣板上之應㈣層之結構。 -18- 1289880 【圖式簡單說明】 圖la至le顯示出用以實施本發明之一個實施例之主 要步驟。 5 【圖式之代號說明】 10〜中間晶圓 20〜目標基板 30〜結構 100〜支撐基板 ίο 105〜層/介面 110〜層 120〜脆化區 -19-In the case where the layer of the layer 2 is composed of strained stone, it is advantageous to perform single selective etching in order to preserve the final structure composed of the strained Si-SiGe double layer on the stone substrate.疋 20 ▼...In, and the mouth, Dan j is thick. Finally, it is also possible to deposit strain (4) on the layer of level 3, including the structure of the (four) layer on the (four) board, before joining this structure to the upper portion of the target substrate. -18- 1289880 BRIEF DESCRIPTION OF THE DRAWINGS Figures la to le show the main steps for carrying out an embodiment of the present invention. 5 [Description of code description] 10~ intermediate wafer 20~target substrate 30~structure 100~support substrate ίο 105~layer/interface 110~layer 120~brittle zone -19-
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| US7247545B2 (en) * | 2004-11-10 | 2007-07-24 | Sharp Laboratories Of America, Inc. | Fabrication of a low defect germanium film by direct wafer bonding |
| EP2269226A1 (en) * | 2008-03-13 | 2011-01-05 | S.O.I.Tec Silicon on Insulator Technologies | Substrate having a charged zone in an insulating buried layer |
| CN105023991B (en) * | 2014-04-30 | 2018-02-23 | 环视先进数字显示无锡有限公司 | A kind of manufacture method of the LED laminated circuit boards based on inorganic matter |
| CN108231695A (en) * | 2016-12-15 | 2018-06-29 | 上海新微技术研发中心有限公司 | Composite substrate and method for manufacturing the same |
| CN107195534B (en) * | 2017-05-24 | 2021-04-13 | 中国科学院上海微系统与信息技术研究所 | Ge composite substrate, substrate epitaxial structure and preparation method thereof |
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| JP2001015721A (en) * | 1999-04-30 | 2001-01-19 | Canon Inc | Method for separating composite member and method for producing thin film |
| US6323108B1 (en) * | 1999-07-27 | 2001-11-27 | The United States Of America As Represented By The Secretary Of The Navy | Fabrication ultra-thin bonded semiconductor layers |
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