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AU2003294170A1 - Manufacturing process for a multilayer structure - Google Patents

Manufacturing process for a multilayer structure

Info

Publication number
AU2003294170A1
AU2003294170A1 AU2003294170A AU2003294170A AU2003294170A1 AU 2003294170 A1 AU2003294170 A1 AU 2003294170A1 AU 2003294170 A AU2003294170 A AU 2003294170A AU 2003294170 A AU2003294170 A AU 2003294170A AU 2003294170 A1 AU2003294170 A1 AU 2003294170A1
Authority
AU
Australia
Prior art keywords
manufacturing process
multilayer structure
multilayer
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003294170A
Inventor
Carlos Mazure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of AU2003294170A1 publication Critical patent/AU2003294170A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H10P90/1924
    • H10P14/20
    • H10P90/1916
    • H10W10/181
AU2003294170A 2002-12-06 2003-12-05 Manufacturing process for a multilayer structure Abandoned AU2003294170A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0215499A FR2848334A1 (en) 2002-12-06 2002-12-06 Multi-layer structure production of semiconductor materials with different mesh parameters comprises epitaxy of thin film on support substrate and adhesion on target substrate
FR02/15499 2002-12-06
PCT/IB2003/006397 WO2004053961A1 (en) 2002-12-06 2003-12-05 Manufacturing process for a multilayer structure

Publications (1)

Publication Number Publication Date
AU2003294170A1 true AU2003294170A1 (en) 2004-06-30

Family

ID=32320086

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003294170A Abandoned AU2003294170A1 (en) 2002-12-06 2003-12-05 Manufacturing process for a multilayer structure

Country Status (8)

Country Link
EP (1) EP1568073A1 (en)
JP (1) JP4762547B2 (en)
KR (1) KR100797210B1 (en)
CN (1) CN1720605A (en)
AU (1) AU2003294170A1 (en)
FR (1) FR2848334A1 (en)
TW (1) TWI289880B (en)
WO (1) WO2004053961A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7110081B2 (en) 2002-11-12 2006-09-19 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method
US7247545B2 (en) * 2004-11-10 2007-07-24 Sharp Laboratories Of America, Inc. Fabrication of a low defect germanium film by direct wafer bonding
EP2269226A1 (en) * 2008-03-13 2011-01-05 S.O.I.Tec Silicon on Insulator Technologies Substrate having a charged zone in an insulating buried layer
CN105023991B (en) * 2014-04-30 2018-02-23 环视先进数字显示无锡有限公司 A kind of manufacture method of the LED laminated circuit boards based on inorganic matter
CN108231695A (en) * 2016-12-15 2018-06-29 上海新微技术研发中心有限公司 Composite substrate and method for manufacturing the same
CN107195534B (en) * 2017-05-24 2021-04-13 中国科学院上海微系统与信息技术研究所 Ge composite substrate, substrate epitaxial structure and preparation method thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5882987A (en) * 1997-08-26 1999-03-16 International Business Machines Corporation Smart-cut process for the production of thin semiconductor material films
FR2783254B1 (en) * 1998-09-10 2000-11-10 France Telecom METHOD FOR OBTAINING A LAYER OF MONOCRYSTALLINE GERMANIUM ON A MONOCRYSTALLINE SILICON SUBSTRATE, AND PRODUCTS OBTAINED
JP2001015721A (en) * 1999-04-30 2001-01-19 Canon Inc Method for separating composite member and method for producing thin film
US6323108B1 (en) * 1999-07-27 2001-11-27 The United States Of America As Represented By The Secretary Of The Navy Fabrication ultra-thin bonded semiconductor layers
JP3607194B2 (en) * 1999-11-26 2005-01-05 株式会社東芝 Semiconductor device, semiconductor device manufacturing method, and semiconductor substrate
FR2809867B1 (en) * 2000-05-30 2003-10-24 Commissariat Energie Atomique FRAGILE SUBSTRATE AND METHOD FOR MANUFACTURING SUCH SUBSTRATE
JP2004507084A (en) * 2000-08-16 2004-03-04 マサチューセッツ インスティテュート オブ テクノロジー Manufacturing process of semiconductor products using graded epitaxial growth
WO2002071491A1 (en) * 2001-03-02 2002-09-12 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits
US6940089B2 (en) * 2001-04-04 2005-09-06 Massachusetts Institute Of Technology Semiconductor device structure
US6566158B2 (en) * 2001-08-17 2003-05-20 Rosemount Aerospace Inc. Method of preparing a semiconductor using ion implantation in a SiC layer
JP2003249641A (en) * 2002-02-22 2003-09-05 Sharp Corp Semiconductor substrate, method of manufacturing the same, and semiconductor device

Also Published As

Publication number Publication date
CN1720605A (en) 2006-01-11
TWI289880B (en) 2007-11-11
EP1568073A1 (en) 2005-08-31
KR100797210B1 (en) 2008-01-22
TW200511393A (en) 2005-03-16
JP2006509361A (en) 2006-03-16
WO2004053961A1 (en) 2004-06-24
KR20050084146A (en) 2005-08-26
JP4762547B2 (en) 2011-08-31
FR2848334A1 (en) 2004-06-11

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase