TWI285945B - Thermal-enhance semiconductor package and manufacturing method thereof - Google Patents

Abstract

A thermal enhanced semiconductor package includes a substrate, a semiconductor chip and a thermal-dissipation metal film. The semiconductor chip is electrically connected to the substrate in a flip chip fashion. The thermal-dissipation metal film is formed on the back surface of the chip whereby to convey the thermal energy from the semiconductor package to outside more quickly. Furthermore, a heat spreader is disposed onto the thermal-dissipation metal film, and when the temperature reaches the melting point, the heat spreader will be well bonded with the thermal-dissipation metal film in order to improve the thermal dissipation ability of the semiconductor package. Besides, the invention provides a method for manufacturing the thermal-enhance semiconductor package as mentioned above.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer package structure, and more particularly to a heat dissipation type semiconductor wafer package structure having a heat dissipation metal film and a method of fabricating the same. [Technical Technology] Flip-chip bonding technology is different from the traditional I c package by wire bonding (W i re bonding) as a signal connection method, which is a semiconductor wafer active

The surface surf ace is turned upside down, and the contacts of the bonding pads on the semiconductor wafer are electrically connected to the substrate by using conductors such as metal bumping and solder bumps. connection. Since the flip-chip bonding technique has a short bonding lead, the value ^ ^ ^ ^ ^ ^ 传 has low transmission delay and high-frequency noise is easy to use. In recent years, it has been widely used in the traditional flip-chip packaging structure, which is exposed to the outside world, without attaching any divergence, and the surface of the wafer is directly bare and lacks a protective layer, which is easy to cause semi-conducting two: In addition, when the semiconductor wafer is subjected to high-speed operation of the semiconductor wafer, the _: sheet is destroyed, and it is easier to accumulate the semiconductor crystal in the sheet, which cannot be transferred to the outside in time. And make the life of semiconductor wafers

In addition, in order to effectively improve the sealing package structure, there are many types, and the heat dissipation rate of the structure is the flip-chip performance Flip Chip gal. Figure 1 is not HFC-BGA (High chip package structure 1 mainly includes one Grid Array), the semiconductor crystallite plate 1 1 , a semiconductor wafer 1 2, and a

1285945 V. Description of the invention (2) Heat spreader 15 (heat spreader). The bonding surface of the semiconductor wafer 12 is turned upside down and electrically connected to the substrate 11 by a bump bump 13. In addition, if the size of the heat sink is much larger than that of the semiconductor wafer, a stiffener ring 18 may be mounted on the substrate 11 to support the heat sink to avoid tilting of the heat sink disposed on the back surface of the semiconductor wafer. Further, the junction of the bumps 13 with the semiconductor wafer 1 2 and the substrate 1 1 is filled with a primer (u n d e r - f i 1 1 ) 14 4, which further reduces the concentration of thermal stress generated when the package structure changes due to temperature. Furthermore, the solder balls 16 are implanted on opposite sides of the surface of the substrate 11 connected to the semiconductor wafer 12, thereby electrically connecting the circuit board or other electronic components; the heat sink 15 is adhered to the semiconductor wafer 12 by the thermal conductive adhesive 17, The heat sink 15 can conduct heat generated by the semiconductor wafer 12 out of the semiconductor chip package structure 1. The semiconductor wafer package structure 2 shown in Fig. 2 is a variation of the semiconductor chip package structure 1 shown in Fig. 1. When the size of the semiconductor wafer 22 is sufficiently large, the stiffening ring of Fig. 1 can be omitted. It is to be noted that the reference numerals of the respective elements in Fig. 2 correspond to the reference numerals of the respective elements in Fig. 1. However, as shown in FIG. 1, the heat sink 15 is adhered to the semiconductor wafer 12 by a thermal conductive adhesive 7', that is, the heat sink 15 is attached by a direct lid attach technology (DLA), wherein the heat sink 15 and The spacing between the semiconductor wafers 12 is called BLT (bond line thickness). The smaller the BLT system, the better, because if the BLT is too large, the thermal conductive adhesive 17 filled between the BLTs is too thick, which will lead to the problem of poor thermal conductivity, which means that the heat dissipation effect cannot be achieved; but if the BLT is too small, The thermal conductive adhesive 17 is too thin, which easily causes the heat sink 15 and the semiconductor

1285945 V. INSTRUCTIONS (3) The problem of insufficient adhesion strength between wafers 12. In addition, the thermal conductive adhesive 17 must have a tack strength and also lead to a cost improvement. Moreover, as shown in FIG. 2, the heat sink 25 is directly adhered to the semiconductor wafer 22 by the heat conductive adhesive 27, and the heat sink 25 is easily inclined, thereby causing void or delamination of the heat conductive adhesive 27. Therefore, the heat dissipation effect of the semiconductor chip package structure 2 is lowered. Therefore, in order to avoid the disadvantages of the aforementioned semiconductor wafer package structure, it is an important subject to achieve a good heat dissipation effect of the semiconductor chip package structure. SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a heat dissipation type semiconductor chip package structure and a method of manufacturing the same, which are provided with a heat dissipation metal film on the back surface of a semiconductor wafer. Further, another object of the present invention is to provide a heat-dissipating type semiconductor chip package structure and a method of manufacturing the same that can adhere a heat sink to a back surface of a semiconductor wafer without a thermal conductive paste. In order to achieve the above object, the present invention provides a heat-dissipating semiconductor wafer package structure mainly comprising a substrate, a semiconductor wafer, and a heat dissipation metal film. The semiconductor wafer is electrically connected to the substrate, and the heat dissipation metal film can be formed on the back surface of the semiconductor wafer by sputtering or other surface deposition. Thus, the heat dissipating metal film formed on the back surface of the semiconductor wafer can be used to protect the semiconductor wafer and avoid the destruction of the semiconductor wafer, and the heat generated by the semiconductor wafer can be quickly transferred from the semiconductor wafer.

Page 9 1285945 V. INSTRUCTIONS (4) To the metal film to avoid excessive heat build-up inside the semiconductor wafer, causing damage to the semiconductor wafer. The present invention also provides a method of fabricating a thermally enhanced semiconductor wafer package structure comprising the steps of: providing a substrate; plating a rear surface of the semiconductor wafer with a heat dissipating metal film and electrically connecting the semiconductor wafer to the substrate. Further, the present invention utilizes the metal film plated on the back surface of the semiconductor wafer to be directly bonded to the heat sink, so that the cost of using the heat conductive knee can be eliminated. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, please refer to the related drawings for explaining a heat-dissipating semiconductor wafer package structure according to a preferred embodiment of the present invention. As shown in FIG. 3, the heat dissipation type semiconductor package structure of the present invention mainly comprises a substrate 31 and a semiconductor wafer 32. The substrate 31 has an upper surface 311 and a lower surface 312 opposite to the upper surface 31. The squeezing surface 321 and a back surface of the active surface, such as the pad 323, are formed on the active surface 321 . The plurality of bumps 324 are formed on the pad 323 , and the heat dissipating metal film 33 is disposed on the back surface 322 . Semiconductor wafer μ Γ 2 Γ: Λ 接? It is disposed facing the upper surface 311 of the substrate 31, and is electrically connected to the substrate 31 by bumps 243. The wafer 32 is composed of tantalum, and the heat-dissipating metal film 33 is composed of gold-aluminum-aluminum (A 1 ) or other conductive materials, which are composed of 良好 ^ 士 & , ^ ^ ^ ^ Λ , ^ good material shell. Bumps 324 can be tin-lead bumps or gold bumps. In addition, in the case of I 4 Q, the compensation factor x -# is inconsistent with the thermal expansion coefficient of the semiconductor wafer 32, in order to avoid the influence of the thermal stress of the package structure,

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The bump 324 is connected to the semiconductor wafer 32 and the substrate 3, and is filled between the semiconductor wafer 32 and the substrate 31 by a primer or other filling body having the same effect to reduce the influence of thermal stress on the package structure. The solder ball 37 is placed on the lower surface 312 of the substrate 31 to connect the semiconductor package structure to the circuit board or other electronic components. As shown in FIG. 4, the reinforced heat dissipation semiconductor package structure of the present invention may further comprise a cover heat dissipation. The sheet 35 is bonded to the substrate 31 by a eutectic bonding with the heat dissipation metal film 33 of the back surface 322 of the semiconductor wafer and by a thermal conductive adhesive 36 to dissipate the heat of the semiconductor wafer via the bumps 324 to the substrate 31. The heat dissipation metal film 33 and the cover fins 35 can be further transmitted to the outside to improve the heat dissipation effect of the semiconductor wafer 32. For example, the heat sink is made of aluminum (ai), and the political hot metal film 3 is made of the alloy. When the temperature is heated to the eutectic temperature, the defensive metal film 33 forms a eutectic bond with the heat sink 35, so that the cap-shaped heat sink 35 and the semiconductor wafer are bonded by metal. The heat sink is tightly bonded to the semiconductor wafer 32. As shown in Fig. 5, a flat heat sink 38 can also be attached to the back surface 32 2 of the semiconductor wafer by the heat dissipation metal film 3 3 to increase heat dissipation. In addition, in order to increase the stiffness and positioning accuracy of the flat fins 38, a stiffener ring 39 may be provided to prevent the flat fins 38 from being deformed and tilted. As shown in FIG. The semiconductor wafer 32 is disposed on another embodiment of the lower surface 31 2 of the substrate. As shown in FIG. 7, the semiconductor substrate 32 is disposed on the upper surface 31 of the substrate, and the semiconductor wafer 32 is disposed on the lower surface 312 of the substrate. In the aspect, the back surface of each of the semiconductor wafers 3 2 is provided with a dispersion

Page 11 1285945 V. INSTRUCTIONS (6) Hot metal film 3 3. In this embodiment, the semiconductor wafer 32 can also be electrically connected to the substrate 3 by wire bonding by a plurality of conductive wires. As shown in FIG. 8, the substrate 31 may be provided with an opening 313 for disposing the semiconductor wafer 32 in the opening, and electrically connecting the semiconductor wafer 32 and the substrate 31' to the conductive line 325 by a plurality of conductive lines 325. It is a gold thread. Finally, the semiconductor wafer 32 and the conductive line 325 are covered with a single layer of glue 4, and the heat-dissipating metal film 33 on the back surface of the semiconductor wafer is exposed to the sealant 40, whereby the heat dissipation effect of the semiconductor wafer package structure can be improved. It is to be noted that the reference numerals of the respective elements in Figs. 4, 5, 6, 7, and 8 correspond to the reference symbols of the respective elements in Fig. 3.

As shown in Fig. 9, a method of manufacturing the heat-dissipating type semiconductor wafer package structure of the present invention will be described. First, in step 91, a substrate is provided, which may be an organic substrate or a ceramic substrate (ceramic).

Substrate; then, in step 92, providing a wafer having an active surface and a back surface, wherein the back surface is provided with a heat dissipating metal film, and the active surface is formed with a plurality of pads, and a plurality of bumps are formed on the solder bumps; in step 9.3, the active surface of the wafer is disposed toward the upper surface of the substrate and the bumps formed on the edge slabs (such as tin bumps, gold bumps, etc.) are utilized. Electrically connecting to the substrate; in step 93, electrically connecting the wafer to the substrate, wherein the dome is in a flip-chip type, and the primer or the potting and equivalent filler (such as an alien The conductive adhesive is filled between the gap between the wafer and the substrate to reduce the influence of thermal stress on the package structure. Finally, in step 94, the wafer and the substrate are diced to form a plurality of flip chip package wafer structures. In step 92, the gold is plated by the enamel clock or other surface deposition methods.

Page 12 1285945 V. Description of the invention (7) On the back surface of the semiconductor wafer, a metal heat-dissipating film composed of Mingshixi alloy is formed; in addition, a heat sink is provided on the surface of the heat-dissipating metal film, and then Heating the temperature to the eutectic temperature of the aluminum-bismuth alloy causes the heat sink to react with the heat-dissipating metal film on the back side of the semiconductor wafer to form a eutectic bond, whereby the heat sink and the semi-body wafer are eutectic The metal keys formed by the bonding are tightly joined. Finally, in step 9.5, a plurality of fresh balls are placed on the underlying surface of the flip-chip wafer structure to enable the semiconductor chip's sealing structure to be signaled to the circuit board or other electronic components. , $

Because of the high strength of the metal bond bonding, the metal bond formed by eutectic bonding, fusion bonding, or other chemical transformation is used instead of bonding the heat sink and the semiconductor wafer by using a conductive adhesive or other adhesive. Not only can the problem of tilting, delamination, and widening of the heat sink can be avoided, but the heat conduction path can be shortened, thereby achieving the heat dissipation rate of the second sheet. In addition, since the elimination of the conductive paste or the adhesive, the cost of the semiconductor package structure is lowered. The invention is not intended to be limited to the scope of the invention.

In the detailed description of the embodiment, it is easy to explain that the technical contents of the present invention are made in this embodiment, and therefore, various changes can be made without exceeding the scope of patents.

1285945 Brief description of the drawings [Simplified description of the drawings] Fig. 1 is a schematic view showing a conventional semiconductor wafer package structure of the HFC-BGA type. Fig. 2 is a schematic view showing a conventional semiconductor wafer package structure having a heat sink. Fig. 3 is a schematic view showing the reinforced heat dissipation type semiconductor wafer package structure of the first preferred embodiment of the present invention. Figure 4 is a schematic view showing a reinforced heat dissipation type semiconductor wafer package structure of a second preferred embodiment of the present invention. Fig. 5 is a schematic view showing a reinforced heat dissipation type semiconductor wafer package structure of a third preferred embodiment of the present invention. Figure 6 is a schematic view showing a reinforced heat dissipation type semiconductor wafer package structure of a fourth preferred embodiment of the present invention. Figure 7 is a schematic view showing a reinforced heat dissipation type semiconductor wafer package structure of a fifth preferred embodiment of the present invention. Figure 8 is a schematic view showing a reinforced heat dissipation type semiconductor wafer package structure of a sixth preferred embodiment of the present invention. Figure 9 is a flow chart showing the flow of a method of fabricating a heat dissipating semiconductor wafer package structure in accordance with a preferred embodiment of the present invention. [Description of Symbols] I Semiconductor Chip Package Construction II Substrate 12 Semiconductor Wafer

Page 14 1285945 Brief description of the diagram 13 Bump 14 Primer 15 Heat sink 16 Solder ball 17 Thermal paste 18 Stiffener ring 2 Semiconductor chip package structure 21 Substrate 22 Semiconductor wafer 25 Heat sink 26 Solder ball 27 Thermal paste 3 Semiconductor chip package construction 31 substrate 311 substrate upper surface 312 substrate lower surface 313 open π 32 semiconductor wafer 321 semiconductor wafer active surface 322 semiconductor wafer back surface 323 semiconductor wafer pad 324 bump 325 conductive line 3 3 heat dissipation metal film

Page 15 1285945 Brief description of the figure 34 Primer 35 Cap heat sink 36 Thermal paste 37 Solder ball 3 8 Flat fin 3 9 Stiffener ring 40 Sealant 91 Provide a substrate 92 Form a metal heat sink on the back of the wafer 93 electrically connecting the semiconductor wafer to the substrate in a flip chip manner. 94. Cutting the wafer and the substrate to form a plurality of flip chip package units. 9 Place the solder balls on the other side of the substrate.

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Claims (1)

1285945 VI. Patent Application Range 1. A heat-dissipating semiconductor wafer package structure comprising: a substrate having an upper surface and a lower surface; a semiconductor wafer having an active surface and a back surface opposite to the active surface The active surface has a plurality of pads, and the plurality of bumps are disposed on the plurality of fresh slabs. The semiconductor wafer is disposed on the upper surface of the substrate with the active surface, and is electrically connected to the substrate by the plurality of bumps. The upper surface of the substrate; a heat dissipating metal film disposed on the back surface of the semiconductor wafer; and a plurality of solder balls formed on the lower surface of the substrate. 2. The heat-dissipating semiconductor wafer package structure of claim 1, wherein the heat-dissipating metal film is formed by a sputtering method. 3. The reinforced heat-dissipating semiconductor wafer package structure of claim 1, wherein the heat-dissipating metal film is gold. The film is the first to belong to the Jin Fan ♦ 散 散 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 专用 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造 造The method further includes: a heat sink disposed on the heat dissipation metal film and eutectic bonded to the heat dissipation metal film. Page 17 1285945 VI. Scope of Application Patent 6. The heat-dissipating semiconductor wafer package structure of claim 5, wherein the heat-dissipating metal film is an aluminum-bismuth alloy, and the heat sink is aluminum. 7. The heat-dissipating semiconductor wafer package structure of claim 5, further comprising: a thermal conductive adhesive, the heat sink being fixed to the substrate by the thermal conductive adhesive. 8. The reinforced heat sink type semiconductor chip package structure of claim 1, further comprising: at least one stiffening ring, wherein the stiffening ring is simultaneously connected to the substrate and the semiconductor wafer by the thermal conductive adhesive. 9. The reinforced semiconductor wafer package structure of claim 1, further comprising: a filler body filled between the upper surface of the substrate and the active surface of the semiconductor wafer. 1 . A reinforced heat dissipation semiconductor wafer package structure comprising: a substrate; a semiconductor wafer having an active surface and a back surface opposite to the active surface, the active surface having a plurality of pads, the pads Electrically connected to the substrate; and a heat dissipating metal film is disposed on the back surface of the semiconductor wafer. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 1 2. The heat-dissipating semiconductor wafer package structure of claim 10, wherein the heat-dissipating metal film is formed by sputtering. 1 3. The reinforced heat dissipating semiconductor wafer package structure of claim 10, wherein the heat dissipating metal film is gold. 1 4. The reinforced heat dissipating semiconductor wafer package structure of claim 10, wherein the heat dissipating metal film is aluminum. 1 5. The reinforced semiconductor chip package structure of claim 10, further comprising: a heat sink disposed on the heat dissipation metal film and eutectic bonded to the heat dissipation metal film. 1 6. The reinforced heat dissipating semiconductor wafer package structure of claim 15, wherein the heat dissipating metal film is an aluminum bismuth alloy, and the heat dissipating film is aluminum. 1 7. The reinforced thermal semiconductor wafer package structure of claim 10, wherein the pads are electrically connected to the substrate by a plurality of conductive wires Page 19 1285945 VI. Application for patent coverage. The reinforced thermal semiconductor wafer package structure of claim 10, wherein the substrate is provided with an opening, the semiconductor chip is disposed in the opening, and electrically connected to the substrate by the conductive wires . _1 9 · The heat-dissipating semiconductor wafer package structure of claim 10, wherein the substrate further comprises an upper surface and a lower surface, wherein the semiconductor wafer is provided on the upper surface of the substrate There are multiple solder balls. The heat-dissipating semiconductor wafer package structure of claim 19, further comprising: another semiconductor wafer disposed on the lower surface of the substrate and electrically connected to the substrate. 2 1 — A method of manufacturing a thermally enhanced semiconductor chip package structure, comprising: (a) providing a wafer having an active surface and a back surface opposite to the active surface, the active surface having a plurality of a solder bump, a plurality of bumps are disposed on the plurality of solder pads, the back surface is provided with a heat dissipation metal film; (b) providing a substrate having an upper surface and a lower surface; (c) the wafer The active surface is disposed on the upper surface of the substrate, and is electrically connected to the substrate by the plurality of bumps; Page 20 1285945 VI. Scope of Application (d) Cutting the wafer and the substrate; and (e) forming a plurality of solder balls on the lower surface of the substrate. 2 2. The method of manufacturing a heat-dissipating semiconductor chip package structure according to claim 21, wherein after step (c), a heat sink is disposed on the heat dissipation metal film, wherein the heat sink is Co-crystal bonding with the heat dissipation metal film. The manufacturing method of the reinforced heat-dissipating semiconductor chip package structure of claim 21, wherein in the step (c), the method further comprises: filling a filler body on the active surface of the wafer and the upper surface of the substrate between. 2. The method of manufacturing a heat-dissipating semiconductor wafer package structure according to claim 21, wherein the heat-dissipating metal film is formed by a sputtering method. 2 5. A method of fabricating a thermally enhanced semiconductor chip package structure, comprising: (a) providing a wafer having an active surface and a back surface opposite the active surface, the active surface having a plurality of a solder pad, the back surface is provided with a heat dissipation metal film; (b) cutting the wafer to form a plurality of semiconductor wafers; (c) providing at least one substrate; Page 21 1285945 VI. Patent Application Range (d) Providing at least one of the plurality of semiconductor wafers, disposing the semiconductor wafer on the substrate, and electrically connecting the pads to the substrate. 2. The method of manufacturing a heat-dissipating semiconductor chip package structure according to claim 25, wherein the substrate further comprises an upper surface and a lower surface, wherein the semiconductor wafer is provided on the upper surface of the substrate, and in the step ( After d), a step (e) is further included, in which a plurality of solder balls are formed on the lower surface of the substrate. [2] The manufacturing method of the heat-dissipating-type semiconductor chip package structure of claim 26, wherein after the step (e), the method further comprises a step (f) of providing another semiconductor wafer a lower surface of the substrate and electrically connected to the substrate. [2] The method of manufacturing a heat-dissipating semiconductor chip package structure according to claim 27, wherein after the step (c), the heat sink is provided on the heat dissipation metal film, wherein the heat sink is The heat dissipation metal film is eutectic bonded. 2. The method of fabricating a heat-dissipating semiconductor wafer package structure according to claim 25, wherein the semiconductor wafer is electrically connected to the substrate in a flip chip state. 3 0. Reinforced heat sink type semiconductor chip package as claimed in item 25 Page 22 1285945 VI. Patent Application The manufacturing method of the structure, wherein the pads are electrically connected to the substrate by a plurality of conductive wires. 3 1. A method of manufacturing a heat-dissipating semiconductor wafer package structure according to claim 25, wherein the heat-dissipating metal film is formed by a sputtering method. Page 23