1285435 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種可應用於^^ . 馬用於指紋感測之感測器封 •裝構造或是影像感測之感測器封裝構造，特別係有關於一 種具有半導體裝置之多晶片感測器封裝構造。 【先前技術】 習知影像感測之感測器封裝構造係將—感測器晶片 # 以一封膠體適當密封保護，該感測器封裝構造僅具有感測 的功能卻無法儲存感測資料。 睛參閱第1圖，一種習知指紋感測器封裝構造1〇〇係 包含有一基板110、一感測晶片120及一封膠體13〇。該 感測晶片120係具有一感測區121，以供感測指紋。該感 測晶片120係設置於該基板11〇之一上表面m，並以複 數個銲線140電性連接該感測晶片12〇之複數個銲墊I。 與該基板110之複數個内連接墊i i 3。該封膠體i 30係形 φ 成於該基板110之該上表面111，以密封該些銲線140與 該感測晶片120 ’該封膠體13〇係顯露該感測晶片12〇之 該感測區121。該基板丨丨〇之一下表面丨丨2係形成有複數 個外連接塾114 ’以供對外電性連接。該指紋感測器封裝 構造100係以錫膏連接該基板110之該些外連接墊114與 一外部電路板（圖未繪出）。由於該指紋感測器封裝構造i 00 僅包含有該影像感測晶片120，不能儲存感測資料，因此 該指紋感測器封裝構造100必需藉由外部之電子裝置才能 儲存該影像感測晶片120所感測之資料。 5 1285435 【發明内容】 本發明之主要目的係在提供一種多晶片感測器封裝 構造，一感測器裝置係設置於一基板之一上表面，該感測 器裝置係具有一感測區，且該感測器裝置係電性連接至該 基板…半導體裝置係設置該基板之—下表面且電性連接 至該感測器裝置，以儲存該感測器裝置之感測資料。由於 該多晶片感測器封裝構造係利用該基板之該上表面及該1285435 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a sensor package structure applicable to sensor mounting and image sensing or image sensing for fingerprint sensing. In particular, it relates to a multi-chip sensor package construction having a semiconductor device. [Prior Art] A conventional sensor-sensing sensor package structure protects the sensor wafer # with a gel that has only a sensing function but cannot store sensing data. Referring to Figure 1, a conventional fingerprint sensor package structure 1 includes a substrate 110, a sensing wafer 120, and a gel 13 〇. The sensing wafer 120 has a sensing area 121 for sensing fingerprints. The sensing chip 120 is disposed on an upper surface m of the substrate 11 and electrically connected to the plurality of pads 1 of the sensing wafer 12 by a plurality of bonding wires 140. A plurality of inner pads i i 3 are connected to the substrate 110. The encapsulant i 30 is formed on the upper surface 111 of the substrate 110 to seal the soldering wire 140 and the sensing wafer 120 ′. The encapsulant 13 embodies the sensing of the sensing wafer 12 〇 Area 121. One of the lower surfaces 丨丨2 of the substrate is formed with a plurality of external ports 114' for external electrical connection. The fingerprint sensor package structure 100 is connected to the external connection pads 114 of the substrate 110 by solder paste and an external circuit board (not shown). Since the fingerprint sensor package structure 00 only includes the image sensing chip 120 and cannot store the sensing data, the fingerprint sensor package structure 100 must be stored by an external electronic device to store the image sensing chip 120. Information sensed. 5 1285435 SUMMARY OF THE INVENTION The main object of the present invention is to provide a multi-chip sensor package structure, a sensor device is disposed on an upper surface of a substrate, and the sensor device has a sensing region. The sensor device is electrically connected to the substrate. The semiconductor device is disposed on the lower surface of the substrate and electrically connected to the sensor device to store the sensing material of the sensor device. Since the multi-chip sensor package structure utilizes the upper surface of the substrate and the
下表面分開設置該感測器裝置與該半導體裝置，因此可使 感測器封裝構造能具有儲存感測資料之功效，且不需增加 感測器封裝構造之尺寸。 本發明之-人目的係在提供一種多晶片感測器封裝 構造，其中該半導體裝置係包含有至少—晶片並具有複數 個凸塊，該些凸塊係接合至該基板，以利在該基板之下表 面周邊設置-間隔電路板或是設置複數個銲球。 種多晶片感測器封裝 本發明之再一目的係在提供一 間隔電路板與該半導 該間隔電路板係電性 構造，其另包含有一間隔電路板，該 體裝置係設置於該基板之該下表面， 連接至該基板，並且一封膦舻尨 一 T膠體係密封該半導體裝置及該間 隔電路板’較佳地，該半導靜护 等體裝置之一背面係顯露於該封 膠體，以利散熱。 本發明之另一目的係在於想 亍隹於挺供一種多晶片感測器 裝構造，係在該基板之該下表 卜衣面叹置有複數個第一銲球 及該半導體裝置，並以一封 t膠體松封該半導體裝置及該 第一銲球。其中，複數個第- 乐一知球係接合於該些第一 1285435 * 球’以供對外電性連接。 依據本發明，一種多晶片感測器封裝構造主要包含一 ^基板、一感測器裝置、複數個電連接元件、一第一封膠體 ’ ·以及一半導體装置。該基板係具有一上表面及一下表面， 該感測器裝置係設置於該基板之該上表面，且該感測器裝 置係具有一感測區，該些電連接元件係電性連接該基板與 該感測器裝置，該第一封膠體係形成於該基板之該上表 泰面，以密封該些電連接元件且顯露該感測區。該半導體裝 置係没置於該基板之該下表面並且電性連接至該感測器 裝置。此外，該多晶片感測器封裝構造可另包含一間隔電 路板，該間隔電路板係設置於該基板之該下表面並與該基 板電性連接。一第二封膠體係形成於該基板之該下表面， 以密封該半導體裝置及該間隔電路板。 【實施方式】 請參閱第2圖，在本發明之第一具體實施例中，一種 φ 多晶片感測器封裝構造20〇主要包含一基板210、一感測 器裝置220、複數個電連接元件23〇、一第一封膠體24〇 以及一半導體裝置250。該基板210係具有一上表面211 及一下表面212’其中該上表面211係形成有複數個第一 連接墊213,該下表面212係形成有複數個第二連接墊214 及複數個第三連接墊21 5。該感測器裝置220係可為指紋 感測晶片或是影像感測晶片（如CMOS感測晶片），該感測 器裝置220係可以一黏晶材料221設置於該基板210之該 上表面211，且該感測器裝置2 2 0係具有一感測區2 2 2以 7 1285435The lower surface is provided with the sensor device and the semiconductor device separately, thereby enabling the sensor package construction to have the effect of storing sensing data without increasing the size of the sensor package construction. The object of the present invention is to provide a multi-chip sensor package structure, wherein the semiconductor device comprises at least a wafer and has a plurality of bumps bonded to the substrate to facilitate the substrate The lower surface perimeter is set - the spacing board is either a plurality of solder balls. A multi-chip sensor package further aims to provide a spacer circuit board and the semi-conductive circuit board electrically connected structure, further comprising a spacer circuit board, the body device being disposed on the substrate The lower surface is connected to the substrate, and a phosphine-T-gel system seals the semiconductor device and the spacer circuit board. Preferably, a back surface of the semiconductor device is exposed to the sealant. To facilitate heat dissipation. Another object of the present invention is to provide a multi-chip sensor mounting structure in which a plurality of first solder balls and the semiconductor device are slanted on the surface of the substrate. A t-colloid seals the semiconductor device and the first solder ball. Wherein, a plurality of first-learn balls are joined to the first 1285435* balls for external electrical connection. According to the present invention, a multi-chip sensor package structure mainly includes a substrate, a sensor device, a plurality of electrical connection elements, a first encapsulant, and a semiconductor device. The substrate has an upper surface and a lower surface. The sensor device is disposed on the upper surface of the substrate, and the sensor device has a sensing region, and the electrical connection components are electrically connected to the substrate. With the sensor device, the first encapsulation system is formed on the upper surface of the substrate to seal the electrical connection elements and expose the sensing region. The semiconductor device is not placed on the lower surface of the substrate and is electrically connected to the sensor device. In addition, the multi-chip sensor package structure can further include a spacer circuit board disposed on the lower surface of the substrate and electrically connected to the substrate. A second encapsulation system is formed on the lower surface of the substrate to seal the semiconductor device and the spacer circuit board. [Embodiment] Referring to FIG. 2, in a first embodiment of the present invention, a φ multi-chip sensor package structure 20A mainly includes a substrate 210, a sensor device 220, and a plurality of electrical connection components. 23〇, a first encapsulant 24〇 and a semiconductor device 250. The substrate 210 has an upper surface 211 and a lower surface 212'. The upper surface 211 is formed with a plurality of first connection pads 213. The lower surface 212 is formed with a plurality of second connection pads 214 and a plurality of third connections. Pad 21 5. The sensor device 220 can be a fingerprint sensing chip or an image sensing chip (such as a CMOS sensing chip). The sensor device 220 can be disposed on the upper surface 211 of the substrate 210. And the sensor device 220 has a sensing area 2 2 2 to 7 1285435
及複數個銲墊223。該些電連接元件230係電性連接該基 板210之該些第一連接墊213與該感測器裝置22〇之該些 銲墊223，在本實施例中，該些電連接元件230係為銲線。 該第一封膠體240係形成於該基板210之該上表面211， 以密封該感測器裝置220及該些電連接元件230，並且該 第一封膠體240係顯露該感測區222，該第一封膠體24〇 係可以壓模方式形成。該半導體裝置25〇係設置於該基板 210之該下表面212，並且電性連接至該感測器裝置22〇, 用以儲存該感測器裝置220之感測資料或是增加該多晶片 感測器封裝構造200之功能。該半導體襄置25〇係包含有 至少一晶片並具有複數個凸塊253，可選自於覆晶晶片、 球格陣列封裝構造、與晶片尺寸封裝構造之其中之一。在 本實施例中，該半導體裝置250係為一覆晶晶片。此外， 該晶片係可為記憶體晶片，其係具有一主動面251及一背 面252。該些凸塊253係接合至該基板21〇之該些第二連 接墊214。此外，該多晶片感測器封裝構造2〇〇可另包含 一間隔電路板260,該間隔電路板26〇係設置於該基板21〇 之該下表Φ 212並與該基板21G電性連接。在本實㈣ 中’該基板21〇之該些第三連接墊215上係設置有複數個 第一銲球270以電性連接該間隔電路板26〇 基 在該基板㈣之該下表面212可形成有一第二封膠 體280’以密封該半導體裝£…與該些第—銲球 較佳地，該半導體裝置25〇之該背面加係顯露於該第二 封膠體280，以利該半導體裝置250散熱。此外，在該間 8 1285435 隔電路板270下方係可設置複數個第二銲球290，以利該 多晶片感測器封裝構造200藉由該些第二銲球290連接至 • 一外部電路板（圖未繪出）。 • 請參閱第3圖，在本發明之第二具體實施例中，另一 種多晶片感測器封裝構造300係包含一基板310、一感測 器裝置3 20、複數個電連接元件330、一第一封膠體34〇、 一半導體裝置350以及複數個第一輝球360。該基板310 係具有一上表面311及一下表面312，該上表面311係形 成有複數個連接墊313。該感測器裝置320係設置於該基 板310之該上表面311，該感測器裝置32〇係具有一感測 區3 21以及複數個銲墊322，該些電連接元件3 3 〇係電性 連接該基板310與該感測器裝置320,該些電連接元件33〇 係可為銲線。該第一封膠體340係形成於該基板31〇之該 上表面311，以密封該感測器裝置32〇及該些電連接元件 33〇，且該第一封膠體340係顯露該感測區321。 φ 該半導體裝置350係設置於該基板310之該下表面 3 12並且電性連接至該感測器裝置3 2 〇，以儲存該感測器 裝置320之感測資料，該半導體裝置35〇係可以複數個凸 塊3 5 1或複數個銲線電性連接至該基板3丨〇，再經由該基 板310與該些電連接元件33〇電性連接至該感測器裝置 320。該些第一銲球360係設置於該基板31〇之該下表面 312。一第二封膠體370係形成於該基板31〇之該下表面 312以密封該半導體裝置35〇與該些第一銲球36〇，但顯 露該半導體裝置350之一背面352。其中，在形成該第二 9 1285435 封膠體370之後係可進行—研磨步驟，以使該些第一鲜球 360之複數個接合面361顯露於該第二封膠體37〇。該多 晶片感測器封裝構造300可另包含複數個第二銲球38〇， 以接合於該些第一銲球360之該些接合面361，故該多晶 片感測器封裝構造300能藉由該些第二銲球38〇連接至一 外部電路板（圖未繪出）。 在本發明之第三具體實施例中，揭示另一種多晶片感 測器封裝構造。請參閱第，—種多晶片感測器封裝構 造400主要包含一基板41〇、—感測器裝置42〇、複數個 電連接元件430、-封膠體物以及—半導體裝置“Ο, 其元件大致與第-具體實施例相同，重覆部分不再費述。 該基板410之一下表面412係具有一凹穴413，以容置該 半導體裝置450,而該感測器裝4㈣係設置於該基板41〇 之一上表面41卜藉由該些電連接元件43〇係電性連接該 基板彻與該感測器裝置伽。而形成於該基板41〇之該 上表面4η之該封膠體440係密封該些電連接元件43〇且 顯露該感測器裝置420之一感測區421。該半導體裝置45〇 係具有複數個凸塊451 ’以接合至在該凹穴413内之連接 墊⑴，使得該半導體裝置45()能電性連接至該感測器裝 置420。此外，複數個銲球46〇係設置於該基板41〇之該 下表面412，以供對外表面接合。 、本發明之保護範圍當視後附之申請專利範圍所界定 者為準’任肖熟知此項技藝者，纟不脫離本發明之精神和 範圍内所作之任何變化與修改，均屬於本發明之保護範 1285435 圍。 【圖式簡早說明】 第1圖·習知指紋感測器封裝構造之截面示意圖。 第2圖•依據本發明之第一 θ ^ ^ ^ 十奴<示具體實施例，一種多晶片感測 器封裝構造之截面示意圖。 第3圖：依據本發明之第-i雜 5犬；1 <乐一具體實施例，另一種多晶片感 測器封裝構造之截面示意圖。 第4圖：依據本發明之第三具體實施例，另一種多晶片感 測器封裝構造之截面示意圖。 【主要元件符號說明】 100感測器封裝構造 110 基板 111 上表面 112 下表面 113 内連接墊 114 外連接墊 120 感測晶片 121 感測區 122 鲜墊 130 封膠體 140 鲜線 200 多晶片感測器封裝構造 210 基板 211 上表面 212 下表面 213 第一連接墊 214 第二連接墊 215 第三連接墊 220 感測器裝置 221 黏晶材料 222 感測區 223 銲墊 230 電連接元件 240 第一封膠體 250 半導體裝置 251 主動面 252 背面 253 凸塊 260 間隔電路板 270 第一銲球 280 第二封膠體 290 第二銲球 11 1285435 300多晶片感測器封裝構造And a plurality of pads 223. The electrical connection elements 230 are electrically connected to the first connection pads 213 of the substrate 210 and the pads 223 of the sensor device 22. In this embodiment, the electrical connection elements 230 are Welding wire. The first encapsulant 240 is formed on the upper surface 211 of the substrate 210 to seal the sensor device 220 and the electrical connection elements 230, and the first encapsulant 240 exposes the sensing region 222. The first colloidal 24 tether can be formed by compression molding. The semiconductor device 25 is disposed on the lower surface 212 of the substrate 210 and electrically connected to the sensor device 22 for storing the sensing data of the sensor device 220 or increasing the multi-chip sense. The function of the detector package construction 200. The semiconductor device 25 includes at least one wafer and has a plurality of bumps 253, which may be selected from one of a flip chip, a ball grid array package structure, and a wafer size package structure. In this embodiment, the semiconductor device 250 is a flip chip. Additionally, the wafer can be a memory wafer having an active surface 251 and a back surface 252. The bumps 253 are bonded to the second connection pads 214 of the substrate 21 . In addition, the multi-chip sensor package structure 2 can further include a spacer circuit board 260 disposed on the lower surface Φ 212 of the substrate 21 并 and electrically connected to the substrate 21G. A plurality of first solder balls 270 are disposed on the third connection pads 215 of the substrate 21 to electrically connect the spacer circuit board 26 to the lower surface 212 of the substrate (4). Forming a second encapsulant 280 ′ to seal the semiconductor device and the first solder balls. Preferably, the back surface of the semiconductor device 25 is exposed to the second encapsulant 280 to facilitate the semiconductor device. 250 heat dissipation. In addition, a plurality of second solder balls 290 may be disposed under the interlayer circuit board 270 to facilitate connection of the multi-chip sensor package structure 200 to the external circuit board by the second solder balls 290. (Figure not shown). Referring to FIG. 3, in a second embodiment of the present invention, another multi-chip sensor package structure 300 includes a substrate 310, a sensor device 320, a plurality of electrical connection elements 330, and a The first colloid 34, a semiconductor device 350, and a plurality of first fluff 360. The substrate 310 has an upper surface 311 and a lower surface 312, and the upper surface 311 is formed with a plurality of connection pads 313. The sensor device 320 is disposed on the upper surface 311 of the substrate 310. The sensor device 32 has a sensing region 3 21 and a plurality of pads 322. The electrical connecting elements 3 3 are electrically connected. The substrate 310 and the sensor device 320 are connected, and the electrical connection elements 33 can be wire bonding. The first encapsulant 340 is formed on the upper surface 311 of the substrate 31 to seal the sensor device 32 and the electrical connection elements 33, and the first encapsulant 340 exposes the sensing region. 321. The semiconductor device 350 is disposed on the lower surface 312 of the substrate 310 and electrically connected to the sensor device 3 2 〇 to store the sensing data of the sensor device 320. A plurality of bumps 3 5 1 or a plurality of bonding wires may be electrically connected to the substrate 3 , and electrically connected to the sensor device 320 via the substrate 310 and the electrical connecting elements 33 . The first solder balls 360 are disposed on the lower surface 312 of the substrate 31. A second encapsulant 370 is formed on the lower surface 312 of the substrate 31 to seal the semiconductor device 35 and the first solder balls 36, but exposes a back surface 352 of the semiconductor device 350. Wherein, after the second 9 1285435 encapsulant 370 is formed, a grinding step may be performed to expose the plurality of bonding faces 361 of the first fresh balls 360 to the second encapsulant 37〇. The multi-chip sensor package structure 300 can further include a plurality of second solder balls 38A for bonding to the bonding surfaces 361 of the first solder balls 360. Therefore, the multi-chip sensor package structure 300 can The second solder balls 38 are connected to an external circuit board (not shown). In a third embodiment of the invention, another multi-chip sensor package construction is disclosed. Please refer to the first, multi-chip sensor package structure 400 mainly includes a substrate 41 〇, a sensor device 42 〇, a plurality of electrical connection elements 430, a sealant and a semiconductor device “Ο, the components thereof The same as the first embodiment, the repeated portion is not described. One of the lower surfaces 412 of the substrate 410 has a recess 413 for accommodating the semiconductor device 450, and the sensor device 4 (4) is disposed on the substrate. The upper surface 41 of the 41 卜 is electrically connected to the substrate by the electrical connecting elements 43 and is connected to the sensor device. The encapsulant 440 formed on the upper surface 4 η of the substrate 41 系Sealing the electrical connection elements 43 and exposing one of the sensing regions 421 of the sensor device 420. The semiconductor device 45 has a plurality of bumps 451 'to be joined to the connection pads (1) in the recesses 413, The semiconductor device 45 () is electrically connected to the sensor device 420. Further, a plurality of solder balls 46 are disposed on the lower surface 412 of the substrate 41 for external surface bonding. The scope of protection is defined by the scope of the patent application attached to it. Any changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention are within the scope of protection of the invention 1285435. [Illustration of the drawings] Figure 1 A schematic cross-sectional view of a conventional fingerprint sensor package structure. Fig. 2 is a cross-sectional view showing a multi-chip sensor package structure according to a first embodiment of the present invention. A cross-sectional view of another multi-wafer sensor package structure according to the present invention, a first embodiment of the multi-chip sensor package. FIG. 4 is a cross-sectional view showing another third embodiment of the present invention. Schematic diagram of the multi-chip sensor package structure. [Main component symbol description] 100 sensor package structure 110 substrate 111 upper surface 112 lower surface 113 inner connection pad 114 outer connection pad 120 sensing wafer 121 sensing area 122 fresh pad 130 Sealant 140 Fresh wire 200 Multi-chip sensor package structure 210 Substrate 211 Upper surface 212 Lower surface 213 First connection pad 214 Second connection pad 215 Third connection pad 220 Sensor device 221 Bonding material 222 Sensing area 223 Pad 230 Electrical connection element 240 First colloid 250 Semiconductor device 251 Active surface 252 Back side 253 Bump 260 Spacer board 270 First solder ball 280 Second encapsulant 290 Second solder ball 11 1285435 300 multi-chip sensor package construction
311上表面 312下表面 321感測區 322銲墊 310基板 313連接墊 320感測器裝置 330電連接元件 350半導體裝置 360第一銲球 380第二銲球 400多晶片感測器 410基板 413凹穴 420感測器裝置 430電連接元件 450半導體裝置 340第一封膠體 3 5 1凸塊 361接合面 封裝構造 411上表面 414連接墊 421感測區 440封膠體 451凸塊 352背面 370第二封膠體 412下表面 422銲墊 460銲球311 upper surface 312 lower surface 321 sensing area 322 pad 310 substrate 313 connection pad 320 sensor device 330 electrical connection element 350 semiconductor device 360 first solder ball 380 second solder ball 400 multi-chip sensor 410 substrate 413 concave Hole 420 sensor device 430 electrical connection element 450 semiconductor device 340 first encapsulant 3 5 1 bump 361 joint surface package structure 411 upper surface 414 connection pad 421 sensing area 440 sealant 451 bump 352 back 370 second Colloid 412 lower surface 422 pad 460 solder ball
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