TWI272885B - Method for forming presolder bump on circuit board by translate plate technique - Google Patents

Abstract

A method for forming a presolder bump on a circuit board by a translate plate technique comprises the following steps: providing a translate plate, which has a portion of the surface thereof with dewetting properties, and which is electrically conductive for the convenience of forming an electroplating solder or electrically non-conductive for the convenience of forming an electroless plating solder; forming a solder on the translate plate; installing the translate plate on an organic circuit substrate, in which the organic circuit substrate is installed with a plurality of circuit layouts and installed with at least a solder pad thereon to be used as an alignment target for the solder on the translate plate and the circuit board; performing a reflow operation to melt the solder on the translate plate into a globular solder; and then installing the solder on the solder pad of the circuit board to complete the production of the presolder bump on the circuit board.

Description

1272885 ____ Case No. 91107396_年月日日_Amendment__ V. Description of the Invention (1) Field of the Invention: The present invention relates to a method for forming a pre-solder bump on a circuit board by a transfer plate technique In particular, with regard to the auxiliary solder formed by the transfer plate, reflow soldering on the circuit board is used to form a flip chip package and soldering between the circuit boards, and is applied to form a flip chip element. BACKGROUND OF THE INVENTION Since IBM revealed the nip-chip packaging technology in the early 1960s, flip-chip package components have been mainly placed on expensive ceramic circuit boards. In this structure, germanium wafers and The thermal expansion relationship between ceramic circuit boards is small because of the small difference, so it does not cause obvious suspicion in use. Compared with the general gold wire (w i r e _ b 0 n d i ng) package method, the flip chip method can provide higher packing density (low component profile) and southergenicity (shorter wire and low inductance). In view of this, the industry's overlay I technology has used solder paste on the Taowan circuit board for 4 years, the so-called control chip connection technology (control_c〇llapse chip connection, C4). However, in recent years, in the modern electronic products are gradually becoming smaller! Under the trend of i-degree and low cost, the flip-chip components are embedded in the low, the second machine = the board' and the epoxy resin is used in the underfill. The thermal stress caused by the structure of the 丨 # # # # # # # # # # # # # # # # 四 四 四 四 四 四 四 四 四 四 四 四 四 四 四 四 四 # # # # # # # # # # # # # # # # To enable the industry to achieve the purpose of low-cost flip chip packaging. j used in the general low-cost flip chip # loading technology, the semiconductor called the most 1272885 correction --- ^-^J11073flR ^ ^ five, invention description (2) A slanting Ϊ ^ Ξ has a number of radiant designs' and the organic circuit board also has several phases of your w 1 contact design; between the wafer and the board with & Wenfeng tin bumps or other conductivity Adhesive material is set, and the wafer is soldered. 2 2 is sub-arranged on the circuit board. The solder bump or conductive adhesive 1 is used to make electrical output/input and mechanical connection between the chip and the circuit board. In the case of bumps, the gap between the wafer and the board can be filled with the ruthlessness (Underf i 1 1), thereby suppressing the uncoordinated thermal expansion and reducing the stress of the i dry tin joint. ^ I and a, in order to make the solder joint to form a flip chip assembly, usually a metal bump such as solder bump, gold bump or copper A bump or the like is formed on the surface of the crystal red pad in advance, and wherein the bump may be any shape, such as a pin-shaped large bump ball, a bump, a column bump or the like. Solder bumps (or pre- solder bumps); often use low-temperature solder, also formed on the contact pads of the board. At a reflow temperature, the wafer is soldered After the bond is bonded to the circuit board, the flip chip is completed after the primer is disposed between the wafer and the circuit board, and a typical example of forming the flip chip by soldering can be referred to FIG. 1 and FIG. For example, a metal bump 11 is formed on the electrode pad 12 of the wafer 13, and a bump 14 is formed on the blade pad of the circuit board 16. Α. Then, at a reflow temperature, the melting 簪f is molded into the pre-solder bump 14 to form a solder joint 17 (s〇lder one '"underfill"] 8 in the 曰 im im 千 千 , , 所 所 所 所 所 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - As shown in Figure 1B. a曰 Then read Figure 2A to B, which is another application of pre-solder bumps.

1272885 __MMl V. Description of the invention (3) Typical example of component 2. The solder bumps 21 are formed on the "electrode" pad 2 2 of the wafer, and the wafer 23 is bonded to the circuit board 24 at a reflow temperature, as shown by the second A, and the solder joint 25 is formed in contact at this time. On the solder pad 26, the same is returned to the ground layer 2 after the gap between the wafer 2 3 and the circuit board 24 is completed, as shown in Fig. 2B. Generally, a pre-solder bump is formed. The most common method of blocking on a circuit board is stencil printing. Some references reveal stencil printing techniques can refer to 11.8.?&1:.1^〇3.5,2 0 3,0 7 5 ( G. Angulas et al), 5, 492, 266 (KG Hoebener ct al) and 5, 8 28, 1 28 (Υ·Higashiguchi et al). The choice of solder bump technology for flip chip assembly includes bump pitch and size reduction According to the actual experience, when the bump pitch is less than 1.25 mm, the stencil printing method is difficult to produce, and it must be changed by electroplating. However, it is known that flip chip is packaged on the circuit board. For the technique of making electroplated bumps, refer to U.S. Pat. Nos. 5, 391, 514 (Τ· P. Gal 1 et al) 5,480,835 (Κ·G· Hoebener et al). However, although the solder bumps fabricated on the board by electroplating are better than the stencil printing method, there are still some shortcomings in the implementation, such as solder bumps. In the block process, the organic insulation must be protected from damage to avoid product reliability. At the same time, the consistency of plating and bump height must be controlled. These details are in US Pat· Nos 5,391,514. And 5, 48 0, 8 3 5 are not disclosed. In view of this, the present invention provides a method for forming a predetermined tin bump on a circuit board by a transfer plate technique, which is formed on an organic circuit board. The process of bump pitch solder bumps (ie less than 〇 · 15 mm), not only

1272885 Main month 曰 _ correction and can provide the same height of solder bumps — __ Case No. 91107396 V. Invention description (4) will damage the organic insulation protection layer. Brief Description of the Invention: The main object of the present invention is to provide a method for forming a pre-solder bump on a circuit board by a transfer plate technique without damaging the solder mask (s 〇 der mask layer) and forming solder bumps for fabrication. Solder between flip chip package components and between boards or between boards and boards. '% Another object of the present invention is to provide a method for forming a pre-solder bump on a circuit board by a transfer plate technology, the transfer plate comprising at least one surface having a tin-reducing property' electrically conductive power supply process, and electroplating solder ( Electroplating solder is formed on its surface. It is still another object of the present invention to provide a method for forming a pre-solder bump on a road surface by a transfer plate technique, the transfer plate comprising at least one surface having a p-tin property, which may be electrically or non-conductive, and electrolessly soldered ( Electroless plating solder) is formed on the surface of the present invention. The object of the invention is to provide a method for forming a pre-solder bump on a circuit board by using a transfer board, wherein the circuit board comprises a surface having a plurality of circuit layouts. There is at least one pad. The circuit board is separated by a plurality of organic insulating layer regions; and the organic insulating layer is composed of an organic material, a fiber-reinforced organic material, or a particle-reinforced organic material. A further object of the present invention is to provide a method for manufacturing a pre-solder bump on a transfer board, which is disposed on a circuit board, and the solder formed on the transfer board can be aligned on the circuit board. Solder pad. After the reflow process, the solder then melts and becomes a spherical solder.

Page 7 1272885 —__ Case No. 911Q73%_车月日 You π: _ 5, invention description (5) and finally the solder pad located on the circuit board. In order to achieve the above object, the present invention provides a method for forming a pre-solder bump on a circuit board by a transfer plate technique, the steps comprising: first providing a transfer plate having a surface having a dewetting property. It may be electrically conductive to form electroplating solder, or non-conducting to form electroless plating solder; solder is formed on the transfer plate, and then the transfer plate is placed in an organic circuit On the substrate; the organic circuit substrate is provided with a plurality of circuit layouts, and at least one solder pad is disposed thereon to serve as an alignment mark between the solder of the transfer board and the circuit board; for reflow soldering, the solder of the transfer board is then melted and It becomes a spherical solder and is finally placed on the pad of the circuit board. In order to enable the reviewing committee to have a better understanding and approval of the purpose, characteristics and efficacy of the present invention, the detailed description of the drawing is as follows: · Detailed description: In order for the reviewing committee to have the purpose, features and effects of the present invention, There is a further understanding and recognition, and the detailed description of the schema is as follows. The invention may, of course, be embodied in many different forms and is not limited to the details described in the description. The present invention relates to a method for forming a presolder bump on a circuit board by a transfer plate technique, which can form solder bumps with good uniformity without damaging the circuit board. "The second protective layer. However, the drawings of the present invention are only for the sake of simplicity, and are not depicted by the scale of the F, which does not reflect the structure of the wafer carrier.

Page 8 1272885 - Case No. 91107396_ Year Month Correction V. Invention Description (6) Inch and characteristics, together with the first description. Referring to Figure 2A, an embodiment of the present invention is first provided with a transfer plate 100 comprising a base plate and a conductive layer on its surface. 1〇3. On the other hand, the electric layer 110 is covered with a descaling insulative layer comprising a plurality of openings 1 〇 5 . The substrate plate 102 can be made of a stiff material; and the conductive layer 103 is composed of a tin-reducing material, which is not easily melted in the solder and has low adhesion to the solder. The properties are, for example, aluminum (A1), chromium (Cr) or conductive particles filled with conductive particles, etc., and the conductive layer 103 can also be selected to be melted in the solder material. Such as tin (Sn), gold (Au), tin-lead (Sn-Pd) or tin-copper alloy (Sn-C u); and the tin-reducing insulating layer 1 〇 4 can be made of organic material, fiber-reinforced (fiber-reinforced Organic material or particle-reinforced material, such as epoxy resin (ep〇xy resi η), polyethylamine (p〇1 yimi de), bis-butyric acid di A compound filled with a bismaleimide triazine-based resin, a cyanate ester, a polybenzocyclobutane or a Shixia particle. Wherein the conductive layer 103 can play the role of a seed layer so that a plating current can be conducted to the edge electrode of the transfer plate 100 via the conductive layer 103 (Fig. Not shown in the middle) and not taken from the side electrode. With the aid of the conductive layer 103, the solder bumps 1 〇 6 can be formed in the respective openings 105 of the transfer plate 1 ’ as shown in Fig. 3B.

Page 9 1272885 ____tli 911Q7^fi ^^日—Amendment 5, invention description (7) ' "-' And another preferred embodiment, before electroplating, a thin electric layer can be deposited first 7 7 at the opening 1 〇 5 In the bottom edge, as shown in Figure 3C. The conductive layer and the 丨〇7 are composed of a tin-reducing material, which is not easily dissolved in the solder and has low adhesion to the front tin, such as aluminum (A1), chromium (Cr) or conductive particle-filled trees = ( Conductive particles fHled resin), etc., of course, you can also choose the material that will be refined in the solder 'Sn, Sn, Sn-Pd or Sn-Cu Wait. In a further preferred embodiment, the substrate plate 102 can also be formed directly from a conductive tin-reducing material, such as a resin filled with chromium or conductive particles, so that the conductive layer 103 does not have to be formed. As shown in Figure 3D. However, by means of a tin-containing insulating layer 1 q 4 provided with a plurality of openings 105, electron mirror solder can be formed in each of the openings 105, and in order to form larger solder bumps, the openings are formed. 1 〇5 can be designed to penetrate part of the substrate board 1 〇 2, as shown in Figure 3E. For the embodiment of the present invention, not only electroplating solder but also electroless plating solder can be applied. Referring to Fig. 4A, a substrate plate 108 can be made of a conductive or non-conductive material, but it is preferable to have a tin-reducing property for soldering, such as the aforementioned aluminum, chromium and resin. A thin catalytic layer 1 〇 9', such as palladium (Pd), is formed on the surface of the substrate 10 8 as a catalyst for the formation of an electroless solder. And forming a tin-reducing layer 1 1 包含 comprising a plurality of openings π 1 on the catalytic layer 109, the tin-reducing layer 1 1 lanthanum may be composed of conductive or non-conductive materials, such as aluminum, chromium, resin or Resin filled with conductive particles. Finally, an electroless solder can be formed in each of the openings 1 1 1 to form a complete transfer plate Π 2 .

Page 10 1272885 Case No. 91107396_年月日日—_ V. DESCRIPTION OF THE INVENTION (8) In another preferred embodiment, the catalytic layer 109 can also be formed after the formation of the tin-reducing layer n ,, but it is formed only On the bottom side of each of the openings 111, as shown in FIG. In this embodiment, for the purpose of simplifying the process, the tin-reducing material, such as 1&丨7〇?8 Bu 40 0 0 type, can be directly selected as the tin-reducing layer 11〇, in this simple process Electroless solder may be finally formed in each of the openings 111. After the solder bumps are formed on the transfer plate by electroplating or electroless plating, the transfer plate can be placed on an organic circuit board 300, as shown in FIG. In the figure, the transfer plate 200 is formed with solder bumps 113 by electric key or electroless plating as described above. On the surface of the organic circuit board 30, a plurality of pads 31 and a wiring circuit layer separated by an organic insulating layer are formed. The organic insulating layer is made of an organic material, a fiber-reinforced organic material (f彳, 曰η κ II oer-reinforced 〇rganiC material) or a pellet-reinforced organic material (paeticie-reinforced organic material), such as an epoxy resin. A composite material of polyethylamine, bis-butyric acid sulfide imine/trinitrogen-trap resin, cyanoester, polybenzocyclobutane or glass fiber. A solder mask 32 0 (solder mask 1 aver), and a female connector * α α α 此 此 此 此 ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ Next, the solder bumps 113 of the transfer board 200 and the pads 310 of the organic circuit board 300 are bonded. After the reflow process (i.e., the solder bumps 113 are melted at an appropriate temperature environment), the transfer plate 2 is removed, as shown in Fig. 5B. Thus, because the tin bump ii 3 is in contact with the tinned surface of the transfer plate 200, the solder bump i丨3 can be pulled to the machine circuit board 300, resulting in a new pre- Solder bumps 3 13 remain on the pad 310. 1272885 ----11107396 玍月日五, invention description (9) ' ^ ^ - and another preferred embodiment, the transfer plate 2 0 0 is placed on the organic plate 300, but is not in contact with the pad 310. After the reflow step, the solder bump i丨3 is melted and a spherical solder i丨8 is formed. The spherical solder Π 8 of the curved surface and the shrinking tin surface of the transfer plate 2 only maintain the weak bonding strength, so that the spherical solder n 8 is naturally seated on the solder pad having the circuit board 300 3 1 0, as shown in Figure 5c. Finally, as a result of Figure 5, the new pre-solder bump 3丨3 is formed on the organic pad 3 0 0. ^ 本In still another embodiment of the invention, the solder bumps 1 〇6, i丨3 are alloys of optionally mixed metals: lead (pd), tin (Sn), silver '(Ag), copper (Cn) , 铋 (Bi), 锑 (Sb), 辞 (Z n), nickel (Ni), aluminum (A1), magnesium (Mg), indium (ln), gallium (Ga), hoof (Te). Also after the reflow step 'can also take a cleaning step, for example Ultrasonic cleaning to remove the flux (f 1 ux) residue. In the context of the present invention, the solder mask 3 2 0 does not limit the portion of the surface that must be covered by the pad. As shown, the solder resist film 3 2 1 is deposited on the surface of the organic circuit board 300, but does not cover any portion of the pad 310. Thus, the pre-solder bump 31 3 can also be formed by the foregoing method. The fresh pad 3 1 0. In another embodiment of the present invention, the pad 3 10 is not limited to any shape and size. As shown in FIG. 7 , it only shows the top of the organic circuit board 3 〇〇 Three layers of circuit layers 301, 302, and 303. In the figure, a solder resist film 320 is deposited on the surface of the organic circuit board 3, and patterned to expose the pad 3 10 0. The circuit in the vertical direction Line 3 0 5 is usually a so-called laminated via

Page 12 1272885 Emperor 91107396 V. The invention (10) (stacked via) technology is completed. The pre-solder bumps 31 3 can also be formed on the pads 3 10 in the manner described above. The pre-solder bumps 3 1 3 can be applied to flip chip (f丨丨p ch丨p) packaging technology. As shown in Fig. 8A, a silicon wafer 4 is provided with an electrode pad 4, and is coupled to the organic circuit board 3. Then, at a reflow temperature, the flip-chip solder is connected to the junction between the pad 3 10 and the electrode pad 4 1 , as shown in FIG. In still another embodiment of the present invention, the pre-solder bump 3 丨 3 can also be applied to a flip chip sealing technique by soldering metal bumps on an IC wafer. As shown in Fig. 9A, a 丨c wafer 5 〇 is adhered to the organic circuit board 3 by using metal bumps 5 2 所附 attached to the respective electrode pads 5 。. At a reflow temperature, a flip-chip solder joint 35 〇 can be formed between the pad 31 〇 and the electrode pad 5 iP as shown in FIG. 9B. The metal bumps 52 can be composed of a metal, a metal alloy or a plurality of layers of metal, such as solder bumps, gold bump copper bumps or copper pillars covered with a solder cap. The metal bump 5 2 0 can be used for the county bar, the field..., π ^ Λ ^ 疋 any shape, such as a stud bump, a spherical bump column bump or other shape. The pre-solder bump 313 of an embodiment can be applied to the splicing of the slab. % Figure 10A shows that there is a solder pad 61〇, and! The surface of the circuit board 600 is disposed on the Tm variable circuit board. ^ ^ 6 5 0 is provided with electrode pads 660 bonded to the electrical and other metal bumps - 6 ^ block 62 ° formed on each of the solder pads, the circuit board 6 〇〇 re-disk organic on each of the electrode pads On 660. Then, it is formed, which is located in the m-lane bay. In-reflow temperature ____ electrode ~ 塾 6 6 0 and solder pad 310 soldering 3 6 0, and page 13 1272885 MM ^ nrn ^ 'invention description (11)

S, in a pad 31 〇 and the pad 61 鹌 older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older older And the metal bumps 6 2 0, ^ ^ genus, metal alloy or laminated metal, the system is the same method (mouth, dry, ^ gold bump, copper bump or covered with a tin cap (solder Cap / copper pillar Although the metal bumps β 2 0, β 7 0 may be any shape such as a stud bump & spherical bump, braided bump or other shape Ϊ 5 f $ formed by transfer plate technology The pre-solder bumps on the board have at least the following advantages: 1) ί t = the process of forming solder bumps on the organic circuit board, does not 有机 the organic protective layer on the circuit board, and can provide solder bumps The height of the block is uniform. (2) The present invention provides a method for forming a pre-solder bump on a circuit board by using a spine-turning technology to reduce board damage. (3) The present invention uses a transfer board. Technical form = ^ ^ ^ ^ ^ After the tin bump is formed, the flip chip component with the circuit is high. The alignment effect of the good result is 'the yield rate is high = the yield is good, and the cost of improving the efficiency is also very low. &, high mass production, ^ the overall process of the invention is easy, the efficacy is deep and the implementation of progress: not obvious The purpose of the invention is to use the market and the private land. It is extremely valuable for the industry, and it is a new invention that has not been seen in the market. The invention patents stipulated in the law, the invention has been in compliance with the patent Volume g 奎 不 , , , 戋 提出 提出 提出 提出 ' ' ' 提出 提出 提出 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '

The 14th stomach, of course, the above is only the second prayer of the present invention 1272885

Page 15 1272885 _ Case No. 91107396_年月日日_^_ Brief description of the diagram Simple description of the diagram: Figure 1 A to A B is a schematic diagram of the structure of the application of metal bumps and pre-solder bumps. 2A to 2B are schematic views showing the structure of another conventional solder bump. 3A to 3B are schematic views showing a method of forming a plated solder bump on a transfer plate according to an embodiment of the present invention. Figure 3C is a schematic view showing another embodiment of a method of forming an electroplated solder bump on a transfer plate according to an embodiment of the present invention. Fig. 3D is a schematic view showing still another embodiment of a method for forming an electroplated solder bump on a transfer plate according to an embodiment of the present invention. Fig. 3E is a schematic view showing still another embodiment of a method for forming an electroplated solder bump on a transfer plate according to an embodiment of the present invention. 4A to 4B are schematic views showing a method of forming an electroless-plated solder bump on a transfer plate according to another embodiment of the present invention. 5A to 5B are schematic views showing a method of forming a pre-solder bump on a circuit board by a transfer plate technique according to an embodiment of the present invention. Figure 5C is a schematic view showing a method of forming a spherical solder on a circuit board by a transfer plate technique according to an embodiment of the present invention. Fig. 6 is a schematic view showing a method of depositing a solder film on the surface of an organic circuit board without covering the solder pad according to another embodiment of the present invention. Figure 7 is a schematic view showing a method of forming a pad of a circuit line in a laminated via technique according to another embodiment of the present invention. 8A to 8B are schematic views showing a method of performing electroplating soldering on a flip chip device according to another embodiment of the present invention.

Page 16 1272885 _ Case No. 91107396 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Schematic diagram of the method. 10A to 10B are schematic views showing another embodiment of the present invention for performing electroplating solder on a flip chip device to form a coupling between flip chip soldering and board soldering. Description of the figure: 1, 2-Crystalline element 1 1 - Metal bump 12, 2 2-electrode pad 13, 23 - Wafer 1 4 - Pre-solder bump 1 5, 2 6 - Pad 16, 24 - Circuit Plate 1, 7, 2 5 - Solder connection 1, 8, 2 7 - Bottom glue 2 Bu solder bump 1 0 0, 1 1 2, 2 0 0 - Transfer plate 1 0 2, 1 0 8, 2 1 0 - Substrate Plate 10 3-conductive layer, 1 0 4 - tinned insulating layer 1 0 5 - opening 1 0 6 - solder bump 10 7 - conductive layer 1 0 9 - catalytic layer

Page 17 1272885 _ Case No. 91107396_ Year and Moon Correction Schematic Description 1 1 0, 2 1 2 - Tinned Layer 111 - Opening 1 1 2 - Transfer Plate 1 1 3 - Solder Bump 1 1 8 - Spherical Solder 3 0 0 _ Organic circuit board 301, 302, 303 - Circuit layer 3 0 5 - Circuit line 3 1 0, 6 1 0 - Pad 3 1 3 - Pre-solder bump 3 2 0, 3 2 1 - Solder mask Membrane 3 4 0 - flip-chip solder connection 3 50 - flip-chip solder connection 3 6 0, 3 7 0 - solder 4 0 0, 5 0 0, 6 5 0 - IC chip 4 1 0, 5 1 0, 6 6 0 - electrode pad 5 2 0,6 2 0,6 7 0 -metal bump 6 0 0 -circuit board

Page 18

Claims (1)

1272885 1 . A pre-welding step of forming a circuit board by a transfer plate technique, comprising: a centroid method, wherein (a) providing an organic circuit board, at least - forming a circuit layout and including at least one pad; The surface (b) provides a transfer plate having at least one side portion having an electrically conductive tinting property; " (c) forming an electroplating solder on a surface portion of the transfer plate; d) applying a reflow step (ref丄〇w) to melt the solder, and aligning the solder of the slab with the solder pad of the circuit board, so that the solder $ is moved and adhered to the solder pad New presolder bumps. 2) The method for forming a pre-solder bump on a circuit board by the transfer plate technology according to claim 1, wherein the solder material may be an alloy composed of an optional column of metals: wrong, tin, silver, Copper, grade, tantalum, = nickel, aluminum, fierce, indium, antimony and gallium. 3 - a method for forming a pre-solder bump on a circuit board by a transfer plate technique, the pot step comprising: , ' ' (a) providing an organic circuit board having a circuit layout formed on at least one surface thereof, and Included in at least one fluorene; (b) providing a transfer plate having at least one surface portion having tin-reducing properties, (c) forming electroless plating solder on a surface portion of the transfer plate; (d) applying one time The soldering step melts the solder to the soldering pair of the transfer plate 1272885 _ Case No. 91107396_年月日日__ VI. Patent Application Scope The solder pad of the board is allowed to transfer and adhere to the pad to become a new pre-solder bump. 4 . The method for forming a pre-solder bump on a circuit board by using a transfer plate technology as described in claim 3, wherein the solder material may be an alloy composed of the following metals: wrong, tin, silver, Copper, silver, recorded, remarks, nickel, aluminum, manganese, indium, antimony and gallium. Page 20