1269415 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種覆晶接合方法，特別係有關於一 種使用非導電膠之覆晶接合方法。 【先前技術】 在 I960 年代由 IBM 發明的 C4 ( c〇ntr〇lled c〇Uapse Chip Connection )即為覆晶封裝（FHp_chip )技術的前身， 也開啟覆晶封裝封裝技術的概念，隨著電子產品正走向輕 薄短小、I/O數增加及功能提升之發展趨勢，覆晶封裝技 術具有電性佳、尺寸小、散熱佳及高密度等優點，正符合 未來高效能和攜帶式產品之所需。 請參閱第1及2圖，一種習知使用非導電膠之覆晶接 合方法，首先，如第1圖所示，提供一基板11〇，該基板 110之一上表面111係形成有複數個接點丨〗2及複數個線 路113，該基板11 〇係可為一種可撓性基板。之後，點塗 形成一非導電膠120於該些接點112上。接著，提供一晶 片130，該晶片130之一主動面131上係設置有複數個金 凸塊132’並以熱壓合方式使該晶片130之該些金凸塊132 通過該非導電膠120，且該晶片130之該些金凸塊132對 準該基板11 〇之該些接點112。之後，如第2圖所示，經 熱壓合步驟後，該些凸塊132係電性揍觸至該些接點112， 然而由於該些金凸塊132與該些接點112係為表面接觸， 因此容易受0、力效應而發生斷路，其導電可靠度不佳。 【發明内容】 1269415 本發明之主要目的係在於提供一種使用非導電膠之 * 覆晶接合方法及其構造，其係設置複數個導電顆粒於一基 板之複數個接點上，一晶片之複數個凸塊係通過一非導電 膠並藉由該些導電顆粒而電性連接至該些接點。其中該些 導電顆粒係嵌入該些凸塊與該些接點，具有提升導電可靠 度之功效。 依據本發明之一種使用非導電膠之覆晶接合方法，首 鲁 先提供一基板，該基板之一表面係形成有複數個接點，並 且在遠些接點上係設置有複數個導電顆粒。接著，形成一 非導電膠於該些接點上，該非導電膠係包覆該些導電顆 粒。之後，再熱壓合一具有複數個凸塊之晶片至該非導電 膠，該晶片之該些凸塊係通過該非導電膠並藉由該些導電 顆粒而電性連接至該基板之該些接點。， y 【實施方式】 本發明之第一具體實施例係揭示一種使用非導電膠 _ 之覆晶接合方法。首先，請參閱第3A圖，提供一基板21〇， 該基板210之一上表面211係形成有複數個接點212，該 些接點212係可為基板上之引腳或是連接線路213之凸塊 接墊，該基板210係可選自於可撓性電路基板、玻璃基板、 硬質印刷電路板與陶瓷基板之其中之一，在本實施例中， 該基板210係為一可撓性電路基板，該些接點212之材質 係為銅、紹或導電膠（Conductive P〇lymer)。接著，請參閱 第3B圖，利用模板印刷、網板印刷或是模板噴塗等方法 設置複數個導電顆粒220於該些接點212上，在本實施例 6 1269415 中’係以一模板250覆蓋於該基板2i〇之該上表面211， 該模板250係具有複數個開孔25 1以顯露出該些接點 212，之後，利用模板印刷將該些導電顆22〇設置於該 些接點212，該些導電顆粒220係為硬度高之金屬粒子， 例如鎳，且該些導電顆粒220係為不規則狀。之後，請參 閱第3C圖’點塗形成一非導電膠230於該些接點212上， 該非導電膠230係包覆該些導電顆粒220,該非導電膠230 係流佈至部分線路213。接著，請參閱第3D圖，熱壓合 一晶片240至該非導電膠230,該晶片240之一主動面241 係具有複數個凸塊242，該些凸塊242係為金凸塊。在進 行熱壓合步驟時，該些凸塊242係對準於該些接點212。 最後’請參閱第3 E圖’經熱壓合步驟後，該些凸塊2 4 2 係通過該非導電膠23 0並藉由該些導電顆粒220而電性連 接至該些接點212，較佳地，該孥導電顆粒22〇係具有可 刺入該些凸塊242之尖銳角，以使該些導電顆粒22〇係可 嵌入該些凸塊242與該些接點212，以避免該些凸塊242 與該些接點212因受熱應力效應而發生斷路，且可提升導 電可靠度。並且由於該非導電膠230係預先包覆該些接點 212上之該些導電顆粒220，因此該些導電顆粒220係能 固定於該些接點212上，以避免該些導電顆粒22〇脫落而 造成機台污染。 本發明之第二具體實施例係揭示另一種使用非導電 膠之覆晶接合方法。首先，請參閱第4A圖，提供一基板 3 1 〇，該基板3 10之一上表面3 11你形成有複數個接點 1269415 312，該基板310係可選自於玻璃基板、硬質印刷電路板 與陶瓷基板之其中之一，在本實施例中，該基板3 1 0係為1269415 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a flip chip bonding method, and more particularly to a flip chip bonding method using a non-conductive paste. [Prior Art] C4 (c〇ntr〇lled c〇Uapse Chip Connection) invented by IBM in the 1960s is the predecessor of flip chip packaging (FHp_chip) technology, and also opens the concept of flip chip packaging technology, along with electronic products. As the trend toward thin and light, increased I/O and functional enhancement, flip chip packaging technology has the advantages of good electrical properties, small size, good heat dissipation and high density, which is in line with the needs of future high-performance and portable products. Referring to FIGS. 1 and 2, a conventional flip chip bonding method using a non-conductive paste, first, as shown in FIG. 1, a substrate 11 is provided, and an upper surface 111 of the substrate 110 is formed with a plurality of connections. The substrate 11 can be a flexible substrate, as shown in Fig. 2 and a plurality of lines 113. Thereafter, a non-conductive paste 120 is formed on the contacts 112 by dot coating. Next, a wafer 130 is provided. The active surface 131 of the wafer 130 is provided with a plurality of gold bumps 132 ′ and the gold bumps 132 of the wafer 130 are passed through the non-conductive paste 120 by thermocompression bonding. The gold bumps 132 of the wafer 130 are aligned with the contacts 112 of the substrate 11 . Then, as shown in FIG. 2, after the thermal pressing step, the bumps 132 are electrically connected to the contacts 112, but the gold bumps 132 and the contacts 112 are surfaced. Contact, so it is easy to be broken by the 0, force effect, its conductivity reliability is not good. SUMMARY OF THE INVENTION 1269415 The main object of the present invention is to provide a flip-chip bonding method using a non-conductive paste and a structure thereof, which are provided with a plurality of conductive particles on a plurality of contacts of a substrate, and a plurality of wafers. The bumps are electrically connected to the contacts by a non-conductive paste and by the conductive particles. The conductive particles are embedded in the bumps and the contacts, and have the effect of improving the conductivity reliability. According to a flip chip bonding method using a non-conductive paste of the present invention, a substrate is provided on a surface of a substrate, and a plurality of contacts are formed on one surface of the substrate, and a plurality of conductive particles are disposed on the distal contacts. Next, a non-conductive paste is formed on the contacts, and the non-conductive glue coats the conductive particles. Thereafter, the wafer having a plurality of bumps is further thermocompression-bonded to the non-conductive paste, and the bumps of the wafer are electrically connected to the contacts of the substrate through the non-conductive paste and by the conductive particles. . [Embodiment] A first embodiment of the present invention discloses a flip chip bonding method using a non-conductive paste. First, referring to FIG. 3A, a substrate 21 is provided. One surface 211 of the substrate 210 is formed with a plurality of contacts 212, which may be pins on the substrate or connection lines 213. The bumper substrate is selected from one of a flexible circuit substrate, a glass substrate, a hard printed circuit board and a ceramic substrate. In the embodiment, the substrate 210 is a flexible circuit. The material of the contacts 212 is copper, conductive or conductive glue (Conductive P〇lymer). Next, referring to FIG. 3B, a plurality of conductive particles 220 are disposed on the contacts 212 by stencil printing, screen printing, or stencil spraying, and are covered by a template 250 in this embodiment 6 1269415. The upper surface 211 of the substrate 2i, the template 250 has a plurality of openings 25 1 to expose the contacts 212, and then the conductive particles 22 are disposed on the contacts 212 by stencil printing. The conductive particles 220 are metal particles having a high hardness, such as nickel, and the conductive particles 220 are irregular. Then, please refer to FIG. 3C to form a non-conductive paste 230 on the contacts 212. The non-conductive paste 230 covers the conductive particles 220, and the non-conductive paste 230 is distributed to the partial lines 213. Next, referring to FIG. 3D, a wafer 240 is thermally pressed to the non-conductive paste 230. One active surface 241 of the wafer 240 has a plurality of bumps 242, which are gold bumps. The bumps 242 are aligned with the contacts 212 during the thermocompression bonding step. Finally, please refer to FIG. 3E. After the thermocompression bonding step, the bumps 2 4 2 are electrically connected to the contacts 212 through the non-conductive paste 230 and electrically connected to the contacts 212. Preferably, the conductive particles 22 have a sharp angle that can penetrate the bumps 242, so that the conductive particles 22 can be embedded in the bumps 242 and the contacts 212 to avoid the The bumps 242 and the contacts 212 are broken due to thermal stress effects, and the conductivity reliability can be improved. And the conductive particles 220 are fixed on the contacts 212 to prevent the conductive particles 22 from falling off. Causes machine pollution. A second embodiment of the present invention discloses another flip chip bonding method using a non-conductive paste. First, referring to FIG. 4A, a substrate 3 1 提供 is provided, and an upper surface 3 11 of the substrate 3 10 is formed with a plurality of contacts 1269415 312, which may be selected from a glass substrate and a hard printed circuit board. One of the ceramic substrates, in the embodiment, the substrate 3 1 0 is
一液晶顯示面板之玻璃基板。該些接點3 12之材質係為 銅、紹或導電膠（Conductive Polymer)。設置複數個導電顆 粒321於該些接點312上，較佳地，該些導電顆粒321係 可預先組成於一導電膠320内，故可利用點塗方式形成該 些導電顆粒321而不需在該基板310之該上表面311覆蓋 模板或網板以固定該些導電顆粒3 2 1，該些導電顆粒3 2 j 之材質係包含鎳、銀或其它硬質金屬顆粒。接著，請參閱 第4B圖，形成一非導電膠膜33〇(N〇n_c〇nductive Fih NCF)於該些接點312上，該非導電膠膜33〇係覆蓋於該導 電膠320上，熱壓合一晶片34〇至該非導電膠膜33〇，該 晶片340之一主動面341係具有複數個凸塊342，其中該 些凸塊342係為金凸塊。最後，請參閱第4C圖，經熱壓 合步驟後，該些凸塊342係通過該非導電膠膜33〇，藉由 該導電膠320之該些導電顆^ 321電性連接至該些接點 312,因此不僅可防止該些導電顆粒321缶意流動同時具 有提升導電可靠度之功效。 附之申請專利範圍所界定 在不脫離本發明之精神和 ’均屬於本發明之保護範 本發明之保護範圍當視後 者為準，任何熟知此項技藝者， 範圍内所作之任何變化與修改 圍。 【圖式簡單說明】 ^ 圖·習知使用非導電膠之覆晶接合製程中晶片 8 1269415 於熱壓合步驟前之截面示意圖。 第 2 圖：習知使用非導電膠之覆晶接合製程中晶片 於熱壓合步驟後之截面示意圖。 第3 A至3E圖：依據本發明之第一具體實施例，一種使用 非導電膠之覆晶接合製程之截面示意圖。 第4A至4C圖：依據本發明之第二具體實施例，另一種使 用非導電膠之覆晶接合製程之截面示意 圖。 【主要元件符號說明】 100覆晶接合構造A glass substrate of a liquid crystal display panel. The materials of the contacts 3 12 are copper, sinter or conductive adhesive (Conductive Polymer). A plurality of conductive particles 321 are disposed on the contacts 312. Preferably, the conductive particles 321 are pre-formed in a conductive paste 320. Therefore, the conductive particles 321 can be formed by using a dot coating method without The upper surface 311 of the substrate 310 covers the template or the screen to fix the conductive particles 3 2 1 , and the conductive particles 3 2 j are made of nickel, silver or other hard metal particles. Next, referring to FIG. 4B, a non-conductive adhesive film 33〇(N〇n_c〇nductive Fih NCF) is formed on the contacts 312, and the non-conductive adhesive film 33 is coated on the conductive adhesive 320, and is hot pressed. The active wafer 341 has a plurality of bumps 342, wherein the bumps 342 are gold bumps. Finally, referring to FIG. 4C, after the thermocompression bonding step, the bumps 342 pass through the non-conductive adhesive film 33, and the conductive particles 321 of the conductive paste 320 are electrically connected to the contacts. 312, therefore, not only can the conductive particles 321 be prevented from flowing freely, but also have the effect of improving the conductivity reliability. The scope of the invention is defined by the scope of the invention, and the scope of the invention is to be construed as being limited by the scope of the invention. [Simple description of the drawing] ^ Fig. Schematic diagram of the cross section of the wafer 8 1269415 before the thermocompression bonding step in the flip chip bonding process using a non-conductive paste. Fig. 2 is a schematic cross-sectional view showing a wafer after a thermocompression bonding step in a flip chip bonding process using a non-conductive paste. 3A to 3E are schematic cross-sectional views showing a flip chip bonding process using a non-conductive paste in accordance with a first embodiment of the present invention. 4A to 4C are cross-sectional views showing another flip chip bonding process using a non-conductive paste in accordance with a second embodiment of the present invention. [Main component symbol description] 100 flip-chip bonding structure
110 基板 111 上 表 面 112 接 點 113 線路 120 非 導 電膠 130 晶 片 131 主動 面 132 凸 塊 200 覆晶 接合構造 210 基板 211 上 表 面 212 接 點 213 線路 220 導 電 顆粒 230 非 導 電膠 240 晶片 241 主 動 面 242 凸 塊 250 模板 251 開 孔 300 覆晶 接合構造 310 基板 311 上 表 面 312 接 點 320 導電 膠 321 導 電 顆粒 330 非導 電膠膜 340 晶 片 341 主 動 面 342凸塊 9110 substrate 111 upper surface 112 contact 113 line 120 non-conductive adhesive 130 wafer 131 active surface 132 bump 200 flip-chip bonding structure 210 substrate 211 upper surface 212 contact 213 line 220 conductive particles 230 non-conductive glue 240 wafer 241 active surface 242 Bump 250 template 251 opening 300 flip chip bonding structure 310 substrate 311 upper surface 312 contact 320 conductive adhesive 321 conductive particles 330 non-conductive film 340 wafer 341 active surface 342 bump 9