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TW350979B - Method to produce a condensator in a semiconductor arrangement - Google Patents

Method to produce a condensator in a semiconductor arrangement

Info

Publication number
TW350979B
TW350979B TW086110317A TW86110317A TW350979B TW 350979 B TW350979 B TW 350979B TW 086110317 A TW086110317 A TW 086110317A TW 86110317 A TW86110317 A TW 86110317A TW 350979 B TW350979 B TW 350979B
Authority
TW
Taiwan
Prior art keywords
forming
layer
light shade
statistical
cylindrical structure
Prior art date
Application number
TW086110317A
Other languages
English (en)
Inventor
Volker Lehmann
Martin Franosch
Herbert Schafer
Hans Reisinger
Hermann Wendt
Stengl Reinhard
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW350979B publication Critical patent/TW350979B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/041—Manufacture or treatment of capacitors having no potential barriers
    • H10D1/043—Manufacture or treatment of capacitors having no potential barriers using patterning processes to form electrode extensions, e.g. etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/716—Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

Landscapes

  • Semiconductor Memories (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
TW086110317A 1996-08-14 1997-07-21 Method to produce a condensator in a semiconductor arrangement TW350979B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19632835A DE19632835C1 (de) 1996-08-14 1996-08-14 Verfahren zur Herstellung eines Kondensators in einer Halbeiteranordnung

Publications (1)

Publication Number Publication Date
TW350979B true TW350979B (en) 1999-01-21

Family

ID=7802659

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086110317A TW350979B (en) 1996-08-14 1997-07-21 Method to produce a condensator in a semiconductor arrangement

Country Status (5)

Country Link
US (1) US6140177A (zh)
EP (1) EP0944915B1 (zh)
DE (2) DE19632835C1 (zh)
TW (1) TW350979B (zh)
WO (1) WO1998007184A1 (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19933564C1 (de) 1999-07-16 2001-01-25 Infineon Technologies Ag Verfahren zur Herstellung eines Vertikal-Halbleitertransistorbauelements und Vertikal-Halbleitertransistorbauelement
DE19958904C2 (de) * 1999-12-07 2002-01-24 Infineon Technologies Ag Verfahren zur Herstellung einer Hartmaske auf einem Substrat
DE10038378A1 (de) * 2000-08-07 2002-02-28 Infineon Technologies Ag Verfahren zur Herstellung von Kondensatorelektroden
US6620675B2 (en) 2001-09-26 2003-09-16 International Business Machines Corporation Increased capacitance trench capacitor
FR2835970B1 (fr) * 2002-02-11 2005-02-25 Memscap Micro-composant electronique incluant une structure capacitive
US8618072B2 (en) 2008-12-09 2013-12-31 Snu R&Db Foundation Composition comprising expression or activity inhibitors of ninjurin1 for the prevention and treatment of inflammatory disease
US9520459B2 (en) * 2012-12-21 2016-12-13 SK Hynix Inc. Surface treatment method for semiconductor device
WO2019066765A1 (en) * 2017-09-26 2019-04-04 Intel Corporation HIGH CAPACITANCE NON-PLANE CAPACITORS FORMED BY CAVITY FILLING
WO2019066766A1 (en) 2017-09-26 2019-04-04 Intel Corporation III-N NANOSTRUCTURES FORMED BY CAVITY FILLING
CN108155152B (zh) * 2017-12-19 2019-09-06 长鑫存储技术有限公司 导体结构、电容器阵列结构及制备方法
US10580778B2 (en) * 2018-07-18 2020-03-03 Nanya Technology Corporation Dynamic random access memory structure and method for preparing the same
US10535660B1 (en) * 2018-08-30 2020-01-14 Nanya Technology Corporation Dynamic random access memory structure and method for preparing the same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0338061A (ja) * 1989-07-05 1991-02-19 Fujitsu Ltd 半導体記憶装置
KR930009583B1 (ko) * 1990-11-29 1993-10-07 삼성전자 주식회사 융모모양의 커패시터구조를 가진 반도체 메모리장치의 제조방법
KR930006730B1 (ko) * 1991-03-20 1993-07-23 삼성전자 주식회사 고집적 반도체 메모리장치의 커패시터 제조방법
US5130885A (en) * 1991-07-10 1992-07-14 Micron Technology, Inc. Dram cell in which a silicon-germanium alloy layer having a rough surface morphology is utilized for a capacitive surface
KR940005288B1 (ko) * 1991-07-11 1994-06-15 금성일렉트론 주식회사 반도체 장치의 제조방법
KR960010002B1 (ko) * 1991-12-18 1996-07-25 삼성전자 주식회사 고집적 반도체 메모리장치의 커패시터 제조방법
JPH0620958A (ja) * 1992-04-10 1994-01-28 Internatl Business Mach Corp <Ibm> 粗いシリコン表面の形成およびその応用
US5254503A (en) * 1992-06-02 1993-10-19 International Business Machines Corporation Process of making and using micro mask
KR960001336B1 (ko) * 1992-06-30 1996-01-26 현대전자산업주식회사 고집적 반도체소자의 제조방법
US5702968A (en) * 1996-01-11 1997-12-30 Vanguard International Semiconductor Corporation Method for fabricating a honeycomb shaped capacitor
US5770500A (en) * 1996-11-15 1998-06-23 Micron Technology, Inc. Process for improving roughness of conductive layer

Also Published As

Publication number Publication date
DE19632835C1 (de) 1998-04-02
DE59705303D1 (de) 2001-12-13
WO1998007184A1 (de) 1998-02-19
US6140177A (en) 2000-10-31
EP0944915A1 (de) 1999-09-29
EP0944915B1 (de) 2001-11-07

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees