TW230837B - Semiconductor IC structure and its fabricating method for the memoryunit of SRAM - Google Patents

Abstract

A semiconductor IC structure and its fabricating method for the memory unitof SRAM, which is applicable to semiconductor substrate with ground line andbit line, and the memory unit owning the first and second memory nodeincludes: 1. the first doped area formed on the semiconductor substrate, as the firstmemory node of memory unit; 2. the first MOS transistor whose source and drain is separately the seconddoped area and the third doped area formed on the semiconductor substrateand connected with the ground line and the first doped area separately,and the gate of the first MOS transistor is formed on the semiconductorsubstrate between the second doped area and the third doped area; 3. the second MOS transistor whose source and drain is separately the fourth doped area and the fifth doped area formed on the semiconductorsubstrate and connected with the first doped area and the bit linesseparately, and the gate of the second MOS transistor is formed on thesemiconductor substrate between the fourth doped area and the fifth dopedarea and connected with the second memory node; It has the features: 1. the first dielectric layer formed on the gate of the first MOS transistor; 2. conducting layer formed on the first dielectric layer and coupled withthe ground line to form the capacitor of the second memory node.