TW202129819A - Method for controlling substrate processing system, and substrate processing system - Google Patents
Method for controlling substrate processing system, and substrate processing system Download PDFInfo
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Abstract
本發明提供一種能夠特定出已檢測出缺口部之檢測點的基板處理系統之控制方法及基板處理系統。 本發明係一種基板處理系統之控制方法,該基板處理系統具備:第1室,其具有第1載置部;第2室,其具有第2載置部;搬送裝置,其將基板從上述第1室搬送至上述第2室;第1感測器模組,其設置於從上述第1室向上述第2室之搬送路徑上,具有檢測上述基板之外緣位置之至少3個感測器;以及控制部;上述基板處理系統之控制方法包括如下步驟:搬送上述基板,藉由上述第1感測器模組檢測上述基板之外緣位置;以及判定上述第1感測器模組之檢測點是否在形成於上述基板之缺口部檢測出。The present invention provides a control method and a substrate processing system of a substrate processing system that can specify a detection point where a notch has been detected. The present invention is a method for controlling a substrate processing system. The substrate processing system includes: a first chamber having a first placement part; a second chamber having a second placement part; and a conveying device that transfers a substrate from the first The first chamber is transported to the second chamber; the first sensor module is installed on the transport path from the first chamber to the second chamber, and has at least three sensors for detecting the position of the outer edge of the substrate And a control unit; the control method of the substrate processing system includes the steps of: transporting the substrate, detecting the position of the outer edge of the substrate by the first sensor module; and determining the detection of the first sensor module Whether the dot is detected in the notch formed in the above-mentioned substrate.
Description
本發明係關於一種基板處理系統之控制方法及基板處理系統。The present invention relates to a control method of a substrate processing system and a substrate processing system.
已知例如將晶圓搬送至對晶圓進行成膜處理等所需處理之處理室中之搬送臂。於晶圓設置有用以表示晶軸方向之定向平面或凹口等缺口部。For example, a transfer arm that transfers a wafer to a processing chamber where the wafer is subjected to required processing such as film formation processing is known. The wafer is provided with a notch such as an orientation plane or a notch that indicates the direction of the crystal axis.
專利文獻1中揭示有一種位置辨識裝置,其根據檢測構件之檢測資料算出半導體晶圓之中心位置,上述檢測構件具備可檢測半導體晶圓之端緣位置的複數個感測器。又,專利文獻2中揭示有一種搬送系統,其基於表示基板之通過時點之信號,取得基板之固持位置的偏離,基於所取得之基板之把持位置的偏離來修正搬送機構之搬送動作,而將基板搬送至目標位置。
[先前技術文獻]
[專利文獻]
[專利文獻1]日本專利特開2011-18828號公報 [專利文獻2]日本專利特開2013-197454號公報[Patent Document 1] Japanese Patent Laid-Open No. 2011-18828 [Patent Document 2] Japanese Patent Laid-Open No. 2013-197454
[發明所欲解決之問題][The problem to be solved by the invention]
專利文獻1所揭示之位置辨識裝置中係使用預先確定之晶圓半徑,判定是否為已檢測出形成於晶圓之定向平面之感測器,從而算出晶圓之中心位置。然,晶圓之半徑有時會因尺寸之容許範圍、製程中因熱引起之膨脹、成膜製程中之張力等而發生變化。因此,專利文獻1中所揭示之方法有無法恰當地特定出已檢測出晶圓之缺口部之感測器之虞。同樣,專利文獻2中所揭示之方法亦有當晶圓之半徑變化時無法恰當地取得固持位置之偏離之虞。The position recognition device disclosed in
本發明之一形態提供一種能夠特定出已檢測出缺口部之檢測點的基板處理系統之控制方法及基板處理系統。 [解決問題之技術手段]One aspect of the present invention provides a control method and a substrate processing system of a substrate processing system that can specify a detection point where a notch has been detected. [Technical means to solve the problem]
本發明之一形態之基板處理系統之控制方法的基板處理系統具備:第1室,其具有第1載置部;第2室,其具有第2載置部;搬送裝置,其將基板從上述第1室搬送至上述第2室;第1感測器模組,其設置於上述第1室至上述第2室之搬送路徑上,具有檢測上述基板之外緣位置之至少3個感測器;以及控制部;上述基板處理系統之控制方法包括如下步驟:搬送上述基板,藉由上述第1感測器模組檢測上述基板之外緣位置;以及判定上述第1感測器模組之檢測點是否在形成於上述基板之缺口部檢測出。 [發明之效果]The substrate processing system of the control method of the substrate processing system according to one aspect of the present invention includes: a first chamber having a first placing part; a second chamber having a second placing part; and a conveying device that transfers the substrate from the above The first chamber is transported to the second chamber; the first sensor module is installed on the transport path from the first chamber to the second chamber, and has at least three sensors for detecting the position of the outer edge of the substrate And a control unit; the control method of the substrate processing system includes the steps of: transporting the substrate, detecting the position of the outer edge of the substrate by the first sensor module; and determining the detection of the first sensor module Whether the dot is detected in the notch formed in the above-mentioned substrate. [Effects of Invention]
根據本發明之一態樣,提供一種能夠特定出已檢測出缺口部之檢測點的基板處理系統之控制方法及基板處理系統。According to one aspect of the present invention, a control method and a substrate processing system of a substrate processing system capable of specifying a detection point where a notch has been detected are provided.
以下,參照圖式,對用以實施本發明之形態進行說明。於各圖式中,有時對相同構成部分標註相同符號,省略重複之說明。Hereinafter, a mode for implementing the present invention will be described with reference to the drawings. In the drawings, the same components are sometimes labeled with the same symbols, and repeated descriptions are omitted.
<基板處理系統> 利用圖1,對一實施方式之基板處理系統之整體構成之一例進行說明。圖1係表示一實施方式之基板處理系統之一例之構成的俯視圖。再者,於圖1中,對晶圓W標註點狀陰影來進行圖示。<Substrate Processing System> Using FIG. 1, an example of the overall configuration of a substrate processing system according to an embodiment will be described. FIG. 1 is a plan view showing the configuration of an example of a substrate processing system according to an embodiment. In addition, in FIG. 1, the wafer W is illustrated with dotted hatching.
圖1所示之基板處理系統係群集構造(多室型)之系統。基板處理系統具備:處理室PM(Process Module)1~6、搬送室VTM(Vacuum Transfer Module)、加載互鎖真空室LLM(Load Lock Module)、承載器模組LM(Loader Module)1~2、負載埠LP(Load Port)1~4及控制部100。The substrate processing system shown in Fig. 1 is a system with a cluster structure (multi-chamber type). The substrate processing system includes: processing chamber PM (Process Module) 1 to 6, transfer chamber VTM (Vacuum Transfer Module), load lock vacuum chamber LLM (Load Lock Module), loader module LM (Loader Module) 1 to 2, Load ports LP (Load Port) 1 to 4 and the
將處理室PM1~6減壓至規定之真空氛圍,於其內部對半導體晶圓W(以下亦稱為「晶圓W」)實施所需處理(蝕刻處理、成膜處理、清潔處理、灰化處理等)。處理室PM1~6與搬送室VTM相鄰地配置。處理室PM1~6與搬送室VTM藉由閘閥GV1~6之開閉而連通。處理室PM1具有載置晶圓W之載置部111。同樣,處理室PM2~6分別具有載置晶圓W之載置部。再者,用以進行處理室PM1~6中之處理的各部之動作由控制部100控制。Decompress the processing chambers PM1 to 6 to a predetermined vacuum atmosphere, and perform required processing (etching, film forming, cleaning, ashing) on semiconductor wafer W (hereinafter also referred to as "wafer W") inside it Processing etc.). The processing chambers PM1 to 6 are arranged adjacent to the transfer chamber VTM. The processing chambers PM1 to 6 and the transfer chamber VTM communicate with each other by opening and closing the gate valves GV1 to GV6. The processing chamber PM1 has a
將搬送室VTM減壓至規定之真空氛圍。又,於搬送室VTM之內部,設置有搬送晶圓W之搬送裝置ARM1。搬送裝置ARM1根據閘閥GV1~6之開閉,於處理室PM1~6與搬送室VTM之間進行晶圓W之搬入及搬出。又,搬送裝置ARM1根據閘閥GV7之開閉,於加載互鎖真空室LLM與搬送室VTM之間進行晶圓W之搬入及搬出。再者,搬送裝置ARM1之動作、閘閥GV1~7之開閉由控制部100控制。Decompress the transfer chamber VTM to a specified vacuum atmosphere. In addition, inside the transfer chamber VTM, a transfer device ARM1 for transferring the wafer W is provided. The transfer device ARM1 carries in and out the wafer W between the processing chamber PM1 to PM6 and the transfer chamber VTM according to the opening and closing of the gate valves GV1 to GV6. In addition, the transfer device ARM1 carries in and out the wafer W between the load lock vacuum chamber LLM and the transfer chamber VTM in accordance with the opening and closing of the gate valve GV7. In addition, the operation of the conveying device ARM1 and the opening and closing of the gate valves GV1 to GV7 are controlled by the
搬送裝置ARM1例如構成為具備基台、第1連桿、第2連桿、及末端效應器124之多關節臂。再者,於圖1中,對搬送裝置ARM1之末端效應器124進行了圖示,省略了其他圖示。末端效應器124之頭端側設置有保持晶圓W之保持部。再者,驅動搬送裝置ARM1之致動器由控制部100控制。The conveying device ARM1 is configured as a multi-articulated arm provided with a base, a first link, a second link, and an
又,於搬送室VTM之內部,設置有偵測晶圓W之感測器模組S1~7。感測器模組S1於搬送裝置ARM1將晶圓W搬入至處理室PM1時,或從處理室PM1搬出時,偵測是否保持有晶圓W以及所保持之晶圓W之偏心量。再者,關於感測器模組S1之偵測方法,利用圖2等在後文進行說明。同樣,感測器模組S2~6於搬送裝置ARM1將晶圓W搬入至處理室PM2~6時,或從處理室PM2~6搬出時,偵測是否保持有晶圓W以及所保持之晶圓W之偏心量。感測器模組S7於搬送裝置ARM1將晶圓W搬入至加載互鎖真空室LLM時,或從加載互鎖真空室LLM搬出時,偵測是否保持有晶圓W及所保持之晶圓W之偏心量。再者,關於感測器模組S7之感測方法,利用圖3等在後文進行說明。感測器模組S1~7例如可使用光學式通過感測器。感測器模組S1~7之檢測值被輸入至控制部100。In addition, sensor modules S1-7 for detecting the wafer W are arranged inside the transfer chamber VTM. The sensor module S1 detects whether the wafer W is held and the amount of eccentricity of the held wafer W when the transfer device ARM1 carries the wafer W into or out of the processing chamber PM1. Furthermore, the detection method of the sensor module S1 will be described later using FIG. 2 and so on. Similarly, the sensor modules S2-6 detect whether the wafer W is held and the wafer W is held and the wafer W is held and when the wafer W is transported into the processing chamber PM2-6 or when it is removed from the processing chamber PM2-6. The amount of eccentricity of circle W. The sensor module S7 detects whether the wafer W is held and the wafer W is held when the wafer W is loaded into the load lock chamber LLM or removed from the load lock chamber LLM by the transfer device ARM1 The amount of eccentricity. Furthermore, the sensing method of the sensor module S7 will be described later using FIG. 3 and so on. The sensor modules S1-7 may use optical pass sensors, for example. The detection values of the sensor modules S1 to 7 are input to the
加載互鎖真空室LLM設置於搬送室VTM與承載器模組LM1~2之間。加載互鎖真空室LLM可切換大氣氛圍與真空氛圍。加載互鎖真空室LLM與真空氛圍之搬送室VTM藉由閘閥GV7之開閉而連通。加載互鎖真空室LLM與大氣氛圍之承載器模組LM1藉由閘閥GV8之開閉而連通。加載互鎖真空室LLM與大氣氛圍之承載器模組LM2藉由閘閥GV9之開閉而連通。加載互鎖真空室LLM具有載置晶圓W之載置部131。再者,加載互鎖真空室LLM內之真空氛圍或大氣氛圍之切換由控制部100控制。The load lock vacuum chamber LLM is arranged between the transfer chamber VTM and the carrier modules LM1~2. The load lock vacuum chamber LLM can switch the atmosphere and vacuum atmosphere. The load lock vacuum chamber LLM and the vacuum atmosphere transfer chamber VTM are connected by opening and closing the gate valve GV7. The load lock vacuum chamber LLM and the carrier module LM1 of the atmospheric atmosphere are connected by opening and closing the gate valve GV8. The load lock vacuum chamber LLM and the carrier module LM2 of the atmospheric atmosphere are connected by opening and closing the gate valve GV9. The load lock vacuum chamber LLM has a
承載器模組LM1~2為大氣氛圍,例如形成有潔淨空氣之降流。又,於承載器模組LM1之內部,設置有搬送晶圓W之搬送裝置ARM2。搬送裝置ARM2根據閘閥GV8之開閉,於加載互鎖真空室LLM與承載器模組LM1之間進行晶圓W之搬入及搬出。同樣,於承載器模組LM2之內部,設置有搬送晶圓W之搬送裝置ARM3。搬送裝置ARM3根據閘閥GV9之開閉,於加載互鎖真空室LLM與承載器模組LM2之間進行晶圓W之搬入及搬出。再者,搬送裝置ARM2、3之動作、閘閥GV8、9之開閉由控制部100控制。The carrier modules LM1~2 have an atmospheric atmosphere, for example, a downflow of clean air is formed. In addition, inside the carrier module LM1, a transport device ARM2 for transporting the wafer W is provided. The transfer device ARM2 carries in and out the wafer W between the load lock vacuum chamber LLM and the carrier module LM1 according to the opening and closing of the gate valve GV8. Similarly, inside the carrier module LM2, a transport device ARM3 for transporting the wafer W is provided. The transfer device ARM3 carries in and out the wafer W between the load lock vacuum chamber LLM and the carrier module LM2 according to the opening and closing of the gate valve GV9. In addition, the operation of the conveying devices ARM2, 3 and the opening and closing of the gate valves GV8, 9 are controlled by the
搬送裝置ARM2例如構成為具備基台、第1連桿、第2連桿、及末端效應器144之多關節臂。再者,於圖1中,對搬送裝置ARM2之末端效應器144進行了圖示,省略了其他圖示。末端效應器144之頭端側設置有保持晶圓W之保持部。再者,驅動搬送裝置ARM2之致動器由控制部100控制。搬送裝置ARM3構成為與搬送裝置ARM2相同之多關節臂。The conveying device ARM2 is configured as a multi-articulated arm including a base, a first link, a second link, and an
於承載器模組LM1之壁面,設置有負載埠LP1、2。又,於承載器模組LM2之壁面,設置有負載埠LP3、4。負載埠LP1~4安裝有收容著晶圓W之載具C或空載具C。作為載具C,例如可使用FOUP(Front Opening Unified Pod,前開式單元匣)等。Load ports LP1 and 2 are provided on the wall surface of the carrier module LM1. In addition, load ports LP3 and 4 are provided on the wall surface of the carrier module LM2. The load ports LP1 to 4 are equipped with a carrier C or an empty carrier C accommodating the wafer W. As the carrier C, for example, FOUP (Front Opening Unified Pod) or the like can be used.
搬送裝置ARM2可將收容於負載埠LP1、2中之晶圓W藉由搬送裝置ARM2之保持部保持而取出。又,可將保持於保持部之晶圓W收容於負載埠LP1、2中。同樣,搬送裝置ARM3可將收容於負載埠LP3、4中之晶圓W藉由搬送裝置ARM3之保持部保持而取出。又,可將保持於保持部之晶圓W收容於負載埠LP3、4中。The transfer device ARM2 can take out the wafer W accommodated in the load ports LP1 and 2 by the holding part of the transfer device ARM2. In addition, the wafer W held in the holding portion can be accommodated in the load ports LP1 and 2. Similarly, the transfer device ARM3 can take out the wafer W accommodated in the load ports LP3 and 4 by being held by the holding part of the transfer device ARM3. In addition, the wafer W held in the holding portion can be accommodated in the load ports LP3 and 4.
控制部100具有CPU(Central Processing Unit,中央處理單元)、ROM(Read Only Memory,唯讀記憶體)、RAM(Random Access Memory,隨機存取記憶體)及HDD(Hard Disk Drive,硬式磁碟機)。控制部100亦可具有SSD(Solid State Drive,固態磁碟)等其他記憶區域而不限於HDD。於HDD、RAM等記憶區域中,儲存有設定了製程順序、製程條件、搬送條件之配方。The
CPU按照配方控制各處理室PM中之晶圓W之處理,控制晶圓W之搬送。於HDD或RAM中可記憶用以執行各處理室PM中之晶圓W之處理及晶圓W之搬送的程式。程式可以儲存於記憶媒體之方式提供,亦可經由網路從外部裝置提供。The CPU controls the processing of the wafer W in each processing chamber PM according to the recipe, and controls the transportation of the wafer W. A program for executing the processing of the wafer W and the transfer of the wafer W in each processing chamber PM can be stored in the HDD or RAM. The program can be provided by storing it in a memory medium, or by providing it from an external device via the network.
<基板處理系統之動作> 其次,對基板處理系統之動作之一例進行說明。此處,作為基板處理系統之動作之一例,按如下動作進行說明:於處理室PM1中,對安裝於負載埠LP1之載具C所收容之晶圓W實施處理,將其收容至安裝於負載埠LP3之空載具C中。再者,於動作之開始時點,閘閥GV1~9關閉,加載互鎖真空室LLM內為大氣氛圍。<The operation of substrate processing system> Next, an example of the operation of the substrate processing system will be described. Here, as an example of the operation of the substrate processing system, the following operations are described: in the processing chamber PM1, the wafer W accommodated in the carrier C installed in the load port LP1 is processed, and the wafer W is accommodated in the load. In the empty vehicle C of port LP3. Furthermore, at the beginning of the operation, the gate valves GV1-9 are closed, and the load lock vacuum chamber LLM is filled with atmospheric air.
控制部100打開閘閥GV8。控制部100控制搬送裝置ARM2,將晶圓W從負載埠LP1之載具C中取出,載置於加載互鎖真空室LLM之載置部131。當晶圓W載置於加載互鎖真空室LLM之載置部131,搬送裝置ARM2從加載互鎖真空室LLM退避時,控制部100關閉閘閥GV8。The
控制部100控制加載互鎖真空室LLM之排氣裝置(未圖示)排出室內之空氣,將加載互鎖真空室LLM從大氣氛圍向真空氛圍切換。The
其次,如路徑151所示,將加載互鎖真空室LLM之載置部131所載置之晶圓W搬送至處理室PM1,載置於載置部111。具體而言,控制部100打開閘閥GV7。控制部100控制搬送裝置ARM1將末端效應器124插入加載互鎖真空室LLM直至到達預先設定之教導點,保持加載互鎖真空室LLM之載置部131所載置之晶圓W,向搬送室VTM搬送。再者,如下文中利用圖4所說明,將晶圓W從加載互鎖真空室LLM向搬送室VTM搬送時,使用感測器模組S7算出晶圓W之半徑。當末端效應器124從加載互鎖真空室LLM退避時,控制部100關閉閘閥GV7。Next, as shown by the
控制部100打開閘閥GV1。控制部100控制搬送裝置ARM1將末端效應器124插入處理室PM1直至到達預先設定之教導點,將所保持之晶圓W載置於處理室PM1之載置部111。再者,如下文利用圖6所說明,將晶圓W從搬送室VTM向處理室PM1搬送時,使用感測器模組S1算出晶圓W之中心位置。控制部100控制搬送裝置ARM1,基於所算出之晶圓W之中心位置,調整晶圓W之位置。當末端效應器124從處理室PM1退避時,控制部100關閉閘閥GV1。The
控制部100控制處理室PM1,對晶圓W實施所需處理。The
當晶圓W之處理結束時,如路徑152所示,將處理室PM1之載置部111所載置之晶圓W搬送至加載互鎖真空室LLM,載置於載置部131。具體而言,控制部100打開閘閥GV1。控制部100控制搬送裝置ARM1將末端效應器124插入處理室PM1直至到達預先設定之教導點,保持處理室PM1之載置部111所載置之晶圓W,向搬送室VTM搬送。當末端效應器124從處理室PM1退避時,控制部100關閉閘閥GV1。When the processing of the wafer W is completed, as indicated by the
控制部100打開閘閥GV7。控制部100控制搬送裝置ARM1將末端效應器124插入加載互鎖真空室LLM直至到達預先設定之教導點,將所保持之晶圓W載置於加載互鎖真空室LLM之載置部131。當末端效應器124從加載互鎖真空室LLM退避時,控制部100關閉閘閥GV7。The
控制部100控制加載互鎖真空室LLM之進氣裝置(未圖示)向室內供給例如潔淨空氣,將加載互鎖真空室LLM從真空氛圍向大氣氛圍切換。The
控制部100打開閘閥GV9。控制部100控制搬送裝置ARM3,取出加載互鎖真空室LLM之載置部131所載置之晶圓W,收容於負載埠LP3之載具C中。當晶圓W從加載互鎖真空室LLM之載置部131取出,搬送裝置ARM3從加載互鎖真空室LLM退避時,控制部100關閉閘閥GV9。The
以上,對將晶圓W搬送至處理室PM1及從處理室PM1中搬出之例進行了說明,亦可同樣地將晶圓W搬送至處理室PM2~6及從處理室PM2~6中搬出。In the above, the example in which the wafer W is transferred to and out of the processing chamber PM1 has been described, but the wafer W may be transferred to and out of the processing chambers PM2 to PM2 to 6 in the same manner.
<晶圓之中心位置檢測> 其次,利用圖2及圖3,對感測器模組S1~7進行進一步說明。<Wafer center position detection> Next, using FIGS. 2 and 3, the sensor modules S1-7 are further described.
圖2係對感測器模組S1之構成及感測器模組S1之檢測要領進行說明的模式圖之一例。感測器模組S1具有2個感測器11、12。以下,亦將具有2個感測器11、12之感測器模組S1稱為「2感測器型感測器模組」。感測器11、12例如為光學式通過感測器,檢測將晶圓W從搬送室VTM搬送至處理室PM1或從處理室PM1搬送至搬送室VTM時通過上方之晶圓W之邊緣。感測器11、12隔開規定間隔地配置。又,感測器11、12可相對於基準線10配置於相反側。又,感測器11、12亦可相對於基準線10對稱地配置。所謂基準線10,例如係通過處理室PM1之載置部111之中心且於搬送裝置ARM1搬送晶圓W之方向上延伸之線。FIG. 2 is an example of a schematic diagram illustrating the structure of the sensor module S1 and the detection method of the sensor module S1. The sensor module S1 has two
於圖2中,藉由將晶圓W沿基準線10朝上方搬送,而利用感測器11檢測出檢測點21之位置。又,利用感測器12檢測出檢測點22之位置。藉由進一步搬送晶圓W,而利用感測器11檢測出檢測點23之位置。又,利用感測器12檢測出檢測點24之位置。感測器模組S1之檢測值被輸入至控制部100。控制部100基於搬送裝置ARM1之姿勢(末端效應器124之位置、速度)及感測器模組S1之檢測值,算出晶圓W之中心位置。In FIG. 2, the position of the
圖3係對感測器模組S7之構成及感測器模組S7之檢測要領進行說明的模式圖之一例。感測器模組S7具有3個感測器31~33。以下,亦將具有3個感測器31~33之感測器模組S7稱為「3感測器型感測器模組」。感測器31~33例如為光學式通過感測器,檢測將晶圓W從搬送室VTM搬送至加載互鎖真空室LLM或從加載互鎖真空室LLM搬送至搬送室VTM時通過上方之晶圓W之邊緣。感測器31~33隔開規定間隔地配置。又,感測器31、32可相對於基準線30配置於相反側。又,感測器31、32亦可相對於基準線30對稱地配置。所謂基準線30,例如係通過加載互鎖真空室LLM之載置部131之中心且於搬送裝置ARM1搬送晶圓W之方向上延伸之線。FIG. 3 is an example of a schematic diagram illustrating the structure of the sensor module S7 and the detection method of the sensor module S7. The sensor module S7 has three sensors 31-33. Hereinafter, the sensor module S7 having three
又,感測器33係與感測器32隔開凹口50之開口寬度以上之間隔而配置。再者,於圖3中,圖示了感測器33設置於感測器31與感測器32之間,但感測器33並不限於此,亦可設置於較感測器31與感測器32之間更外側。In addition, the
於圖3中,藉由將晶圓W沿基準線30朝上方搬送,而利用感測器31檢測出檢測點41之位置。又,利用感測器32檢測出檢測點42之位置。又,利用感測器33檢測出檢測點45之位置。藉由進一步搬送晶圓W,而利用感測器31檢測出檢測點43之位置。又,利用感測器32檢測出檢測點44之位置。又,利用感測器33檢測出檢測點46之位置。感測器模組S7之檢測值被輸入至控制部100。控制部100基於搬送裝置ARM1之姿勢(末端效應器124之位置、速度)及感測器模組S7之檢測值,算出晶圓W之半徑及晶圓W之中心位置。In FIG. 3, by transporting the wafer W upward along the
控制部100根據檢測點假想三角形,求出三角形之外接圓,藉此推定晶圓W之半徑及晶圓W之中心位置。此處,於晶圓W,設置有用以表示晶軸方向之凹口50。於感測器(11~12、31~33)在形成有凹口50之位置檢測出邊緣(於圖2之例中為檢測點22,於圖3之例中為檢測點42)之情形時,有根據包含該檢測點之三角形(例如,於圖2之例中,為由檢測點21、22、23所構成之三角形,於圖3之例中,為由檢測點41、42、43所構成之三角形)推定出之晶圓W之中心位置與實際之晶圓W之中心位置錯開之虞。The
圖4係表示基於感測器模組S7之檢測值而算出晶圓W之半徑的處理之一例之流程圖。FIG. 4 is a flowchart showing an example of the process of calculating the radius of the wafer W based on the detection value of the sensor module S7.
於步驟S101中,控制部100從感測器模組S7取得6個檢測點41~46(參照圖3)。具體而言,控制部100控制搬送裝置ARM1,將晶圓W從加載互鎖真空室LLM向搬送室VTM搬送。此時,晶圓W通過感測器模組S7上,藉此檢測出檢測點41~46。In step S101, the
於步驟S102中,控制部100根據6個檢測點41~46形成複數個三角形。此處,形成至少4個三角形。於以下說明中,亦將所形成之4個三角形稱為三角形T1~T4。In step S102, the
於步驟S103中,控制部100分別算出步驟S102中所形成之各三角形T1~T4之外接圓半徑及外接圓中心。In step S103, the
於步驟S104中,控制部100根據步驟S103中所算出之各三角形T1~T4之外接圓半徑算出外接圓半徑之平均值。In step S104, the
於步驟S105中,控制部100判定是否於形成有凹口50之位置檢測出檢測點41~46。In step S105, the
此處,判定步驟S103中所算出之各三角形T1~T4之外接圓中心之偏差是否落在載置精度之範圍內。所謂載置精度係表示將晶圓W載置於載置部111時容許從標準位置位移何種程度之值。於外接圓中心之偏差落在載置精度之範圍內之情形時,判定未於形成有凹口50之位置檢測出檢測點41~46。於外接圓中心之偏差未落在載置精度之範圍內之情形時,則判定於形成有凹口50之位置檢測出任一檢測點41~46。Here, it is determined whether the deviation of the center of the outer circle of each triangle T1 to T4 calculated in step S103 falls within the range of placement accuracy. The placement accuracy is a value indicating how much displacement from the standard position is allowed when the wafer W is placed on the
於在形成有凹口50之位置檢測出檢測點41~46之情形時(S105・是),控制部100之處理進入步驟S108。於未在形成有凹口50之位置檢測出檢測點41~46之情形時(S105・否),控制部100之處理進入步驟S106。When the detection points 41 to 46 are detected at the position where the
於步驟S106中,控制部100判定未在形成有凹口50之位置檢測出檢測點41~46。In step S106, the
於步驟S107中,控制部100算出晶圓W之半徑。此處,基於檢測點41~46(或從檢測點41~46之中選擇之點),算出晶圓W之半徑。例如可將各三角形T1~T4之外接圓半徑之平均作為晶圓W之半徑。亦可選擇各三角形T1~T4之外接圓半徑中之任一外接圓半徑作為晶圓W之半徑。繼而,結束控制部100之處理。In step S107, the
於步驟S108中,控制部100分別對步驟S103中所算出之各三角形T1~T4之外接圓半徑與步驟S104中所算出之外接圓半徑之平均值的大小關係進行比較,產生判定結果圖形。於以下說明中,將外接圓半徑大於平均值之情形用「○」表示,將外接圓半徑小於平均值之情形用「×」表示。例如,於三角形T1之外接圓半徑大於平均值,三角形T2之外接圓半徑小於平均值,三角形T3之外接圓半徑大於平均值,三角形T4之外接圓半徑小於平均值之情形時,產生「○×○×」之判定結果圖形。In step S108, the
於步驟S109中,控制部100根據預先記憶於控制部100之表格,判定與步驟S108中所產生之判定結果圖形一致者。In step S109, the
圖5係表格之一例。於表格中,對應地記憶有各檢測點41~46為形成有凹口50之位置處之檢測點之情形時各三角形T1~T4之判定結果圖形。例如,於檢測點41為形成有凹口50之位置處之檢測點之情形時,記憶有「○×○×」之判定結果圖形。於檢測點42為形成有凹口50之位置處之檢測點之情形時,記憶有「×○××」之判定結果圖形。於檢測點43為形成有凹口50之位置處之檢測點之情形時,記憶有「×○×○」之判定結果圖形。Figure 5 is an example of the table. In the table, the judgment result patterns of the triangles T1 to T4 when the detection points 41 to 46 are the detection points at the positions where the
此處,於由6個檢測點41~46所形成之20種三角形之中,以與各檢測點41~46對應之判定結果圖形成為唯一之方式,設定三角形T1~T4。Here, among the 20 types of triangles formed by 6 detection points 41 to 46, the triangles T1 to T4 are set so that the determination result pattern corresponding to each
又,於由6個檢測點41~46所形成之20種三角形之中,針對某一三角形與其他三角形成為相同大小圖形之情況,可使用其中任一三角形來製作表格。於此情形時,可將形狀變得較窄之三角形(例如由檢測點42、45及其他檢測點構成之三角形、由檢測點44、46及其他檢測點構成之三角形等)排除。藉此,可使3個檢測點相互分隔,而可減少所算出之外接圓半徑、外接圓中心之誤差。In addition, among the 20 types of triangles formed by the 6 detection points 41 to 46, for the case where a certain triangle and other triangles become the same size figure, any one of these triangles can be used to create a table. In this case, triangles whose shapes have become narrower (for example, triangles composed of detection points 42, 45 and other detection points, triangles composed of detection points 44, 46 and other detection points, etc.) can be excluded. In this way, the three detection points can be separated from each other, and the error of the calculated circumscribed circle radius and circumscribed circle center can be reduced.
例如,於步驟S108中產生「○×○×」之判定結果圖形之情形時,於步驟S109中根據表格判定檢測點41為與判定結果圖形一致者,控制部100之處理進入步驟S110。再者,於步驟S108中所產生之判定結果圖形與表格中之內容均不一致之情形時,視為無符合條件者,控制部100之處理進入步驟S110。For example, when a determination result pattern of "○×○×" is generated in step S108, it is determined in step S109 that the
於步驟S110中,控制部100判定是否有與表格相符之判定結果圖形。於不存在與表格相符之判定結果圖形之情形時(S110・否),控制部100之處理進入步驟S106,判定未在形成有凹口50之位置檢測出檢測點41~46。於存在與表格相符之判定結果圖形之情形時(S110・是),控制部100之處理進入步驟S111,特定為步驟S109中所判定之檢測點(此處為檢測點41)處於形成有凹口50之位置。In step S110, the
於步驟S112中,將步驟S111中所特定出之形成有凹口50之位置之檢測點排除後,算出晶圓W之半徑。此處,基於檢測點42~46(或從檢測點42~46之中選擇之點),算出晶圓W之半徑。例如可將不包含檢測點41的各三角形之外接圓半徑之平均作為晶圓W之半徑。亦可選擇不包含檢測點41之各三角形之外接圓半徑中之任一外接圓半徑作為晶圓W之半徑。繼而,結束控制部100之處理。In step S112, after excluding the detection points at the position where the
圖6係表示基於感測器模組S1之檢測值算出晶圓W之中心位置的處理之一例之流程圖。FIG. 6 is a flowchart showing an example of the process of calculating the center position of the wafer W based on the detection value of the sensor module S1.
於步驟S201中,控制部100從感測器模組S1取得4個檢測點21~24(參照圖2)。具體而言,控制部100控制搬送裝置ARM1,將晶圓W從搬送室VTM向處理室PM1搬送。此時,晶圓W通過感測器模組S1上,藉此檢測出檢測點21~24。In step S201, the
於步驟S202中,控制部100根據4個檢測點21~24形成複數個三角形。此處,形成4個三角形。In step S202, the
於步驟S203中,控制部100分別算出步驟S202中所形成之各三角形之外接圓半徑及外接圓中心。In step S203, the
於步驟S204中,控制部100判定步驟S203中所算出之各三角形之外接圓中心之偏差是否落在載置精度之範圍內。於外接圓中心之偏差落在載置精度之範圍內之情形時(S204・是),控制部100之處理進入步驟S205。於外接圓中心之偏差未落在載置精度之範圍內之情形時(S204・否),控制部100之處理進入步驟S207。In step S204, the
於步驟S205中,控制部100判定未在形成有凹口50之位置檢測出檢測點21~24。In step S205, the
於步驟S206中,控制部100算出晶圓W之半徑及晶圓W之中心位置。此處,基於檢測點21~24(或從檢測點21~24之中選擇之點),算出晶圓W之中心位置。例如可將各三角形之外接圓中心之平均位置作為晶圓W之中心位置。亦可選擇各三角形之外接圓中心中之任一外接圓中心作為晶圓W之中心位置。藉此,可使所算出之晶圓W之中心位置與實際之晶圓W之中心位置之誤差落在載置精度之範圍內。繼而,結束控制部100之處理。In step S206, the
於步驟S207中,控制部100判定各三角形之外接圓半徑中可視為與藉由圖4所示之處理所算出之晶圓W之半徑同值之外接圓是否為1個。此處,所謂同值,指能夠於計算精度下視為同值者。於可視為與晶圓W之半徑同值之外接圓為1個之情形時(S207・是),控制部100之處理進入步驟S208。於可視為與晶圓W之半徑同值之外接圓並非1個之情形時(S207・否),控制部100之處理進入步驟S210。再者,於未能算出應當參照之晶圓W之半徑之情形時,控制部100判定為步驟S207・否,控制部100之處理進入步驟S210。In step S207, the
於步驟S208中,控制部100將檢測點21~24中未用於可視為與晶圓W之半徑同值之外接圓之檢測點特定為形成有凹口50之位置處之檢測點。In step S208, the
於步驟S209中,將步驟S208中所特定之形成有凹口50之位置處之檢測點排除後,算出晶圓W之中心位置。即,算出可視為與晶圓W之半徑同值之外接圓之外接圓中心作為晶圓W之中心位置。繼而,結束控制部100之處理。In step S209, the center position of the wafer W is calculated after the detection point at the position where the
於步驟S210中,控制部100使晶圓W從處理室PM1退出,在其偏移後,使其再次進入處理室PM1內。此處之偏移量設為凹口50之開口寬度以上。藉此,於使晶圓W再進入處理室PM1內時,可防止凹口50再次通過感測器11、12之上。並且,控制部100之處理返回至步驟S201。藉此,可於未形成凹口50之位置檢測出晶圓W之外緣位置。In step S210, the
以上,根據一實施方式之基板處理系統,於經由搬送室VTM將晶圓W於加載互鎖真空室LLM與各處理室PM1~6之間搬送之系統中,可提高載置精度。As described above, according to the substrate processing system of one embodiment, in the system that transfers the wafer W between the load lock vacuum chamber LLM and the processing chambers PM1 to 6 through the transfer chamber VTM, the placement accuracy can be improved.
此處,對參考例之基板處理系統中之晶圓W之中心位置之檢測方法進行說明。於參考例之基板處理系統之檢測方法中,根據4個檢測點形成三角形,判定各三角形之外周圓之半徑R是否處於預先給出的晶圓W之半徑之範圍內,藉此,對形成有凹口50之位置處之檢測點進行判定。然而,晶圓W之半徑必須容許某種程度之尺寸差(例如300±0.2 mm),難以兼顧晶圓W之半徑之容許度與晶圓W之中心位置之檢測精度(載置精度)。Here, the detection method of the center position of the wafer W in the substrate processing system of the reference example will be described. In the inspection method of the substrate processing system of the reference example, triangles are formed based on 4 inspection points, and it is determined whether the radius R of the outer circumference of each triangle is within the predetermined radius of the wafer W, thereby, The detection point at the position of the
相對於此,於本實施方式之基板處理系統中,即便未預先給出晶圓W之半徑尺寸,又,即便每個晶圓W之半徑尺寸不同,亦可高精度地求出晶圓W之中心位置,可提高將晶圓W載置於各處理室PM1~6之載置部111時之載置精度。In contrast, in the substrate processing system of this embodiment, even if the radius size of the wafer W is not given in advance, and even if the radius size of each wafer W is different, the wafer W can be obtained with high accuracy. The center position can improve the placement accuracy when the wafer W is placed on the
又,於本實施方式之基板處理系統中,將晶圓W從加載互鎖真空室LLM搬送至各處理室PM1~6,將處理過之晶圓W從各處理室PM1~6搬送至加載互鎖真空室LLM。可將3感測器型感測器模組(參照圖3)用於各搬送路徑共同通過之感測器模組S7,將2感測器型感測器模組(參照圖2)用於各處理室PM1~6之感測器模組S1~6,因此,可減少感測器之數量而降低基板處理系統之成本。In addition, in the substrate processing system of this embodiment, the wafer W is transferred from the load lock vacuum chamber LLM to the processing chambers PM1 to 6, and the processed wafer W is transferred from the processing chambers PM1 to 6 to the load cell. Lock the vacuum chamber LLM. The 3-sensor type sensor module (refer to Fig. 3) can be used for the sensor module S7 that each conveying path passes through, and the 2-sensor type sensor module (refer to Fig. 2) can be used for the sensor module S7. The sensor modules S1-6 of each processing chamber PM1-6, therefore, can reduce the number of sensors and reduce the cost of the substrate processing system.
其次,利用圖7,對另一實施方式之基板處理系統之整體構成之一例進行說明。圖7係表示另一實施方式之基板處理系統之一例之構成的俯視圖。再者,於圖7中,對晶圓W標註點狀陰影來進行圖示。Next, an example of the overall configuration of a substrate processing system according to another embodiment will be described using FIG. 7. FIG. 7 is a plan view showing the configuration of an example of a substrate processing system according to another embodiment. In addition, in FIG. 7, the wafer W is shown with dotted hatching.
圖7所示之基板處理系統與圖1所示之基板處理系統同樣為群集構造之系統,具備處理室PM1~6、搬送室VTM、加載互鎖真空室LLM、承載器模組LM1~2、負載埠LP1~4及控制部100。The substrate processing system shown in Fig. 7 is the same as the substrate processing system shown in Fig. 1 in a cluster structure. It includes processing chambers PM1~6, transfer chamber VTM, load lock vacuum chamber LLM, and carrier modules LM1~2. Load ports LP1 to 4 and the
此處,圖7所示之基板處理系統與圖1所示之基板處理系統相比,於處理室PM1之感測器模組S1變更為3感測器型感測器模組(參照圖3)方面不同。再者,感測器模組S1之構成與圖3所示之感測器模組S7之構成相同,省略重複之說明。Here, the substrate processing system shown in FIG. 7 is compared with the substrate processing system shown in FIG. ) Is different. Furthermore, the structure of the sensor module S1 is the same as the structure of the sensor module S7 shown in FIG. 3, and the repeated description is omitted.
又,於圖7所示之基板處理系統中,如晶圓W之路徑153~155所示般進行連續搬送。此處,於經由搬送室VTM將晶圓W從1個室向其他室搬送之各路徑153~155中,至少將3感測器型感測器模組各配置至少1個(參照圖3)。Furthermore, in the substrate processing system shown in FIG. 7, the wafer W is continuously transported as shown by the
如路徑153所示,將加載互鎖真空室LLM之載置部131所載置之晶圓W搬送至處理室PM1,載置於處理室PM1之載置部111。此處,於晶圓W通過感測器模組S7時,基於圖4所示之流程算出晶圓W之半徑。又,於晶圓W通過感測器模組S1時,基於圖6所示之流程算出晶圓W之中心位置。基於所算出之晶圓W之中心位置,調整晶圓W之載置位置。As shown by the
於處理室PM1中,對晶圓W實施所需之第1處理。再者,由於對晶圓W實施第1處理,晶圓W之半徑有時會由於製程中因熱引起之膨脹、成膜製程中之張力等而發生變化。In the processing chamber PM1, the required first processing is performed on the wafer W. Furthermore, since the first process is performed on the wafer W, the radius of the wafer W may sometimes change due to expansion due to heat during the process, tension during the film forming process, and the like.
當晶圓W之第1處理結束時,如路徑154所示,將處理室PM1之載置部111所載置之晶圓W搬送至處理室PM2,載置於處理室PM2之載置部。此處,於晶圓W通過感測器模組S1時,基於圖4所示之流程算出晶圓W之半徑。又,於晶圓W通過感測器模組S2時,基於圖6所示之流程算出晶圓W之中心位置。基於所算出之晶圓W之中心位置,調整晶圓W之載置位置。When the first processing of the wafer W is completed, as shown by the
於處理室PM2中,對晶圓W實施所需之第2處理。In the processing chamber PM2, the required second processing is performed on the wafer W.
當晶圓W之第2處理結束時,如路徑155所示,將處理室PM2之載置部所載置之晶圓W搬送至加載互鎖真空室LLM,載置於載置部131。此處,於晶圓W通過感測器模組S7時,基於圖4所示之流程算出晶圓W之半徑及中心位置。基於所算出之晶圓W之中心位置,調整晶圓W之載置位置。When the second processing of the wafer W is completed, as indicated by the
以上,根據另一實施方式之基板處理系統,即便未預先給出晶圓W之半徑尺寸,又,即便每個晶圓W之半徑尺寸不同,亦可高精度地求出晶圓W之中心位置,可提高將晶圓W載置於處理室PM1之載置部111時之載置精度。As described above, according to the substrate processing system of another embodiment, even if the radius size of the wafer W is not given in advance, even if the radius size of each wafer W is different, the center position of the wafer W can be obtained with high accuracy. , The placement accuracy when placing the wafer W on the
又,根據另一實施方式之基板處理系統,於進行連續搬送之構成中,即便由於在處理室PM1中對晶圓W實施所需處理而導致晶圓W之半徑尺寸發生變化,亦可高精度地求出處理過之晶圓W之中心位置,可提高將處理過之晶圓W載置於下一個處理室PM2之載置部111時之載置精度。In addition, according to the substrate processing system of another embodiment, in the continuous transport configuration, even if the radius size of the wafer W is changed due to the required processing on the wafer W in the processing chamber PM1, it can be highly accurate Finding the center position of the processed wafer W can improve the placement accuracy when placing the processed wafer W on the
再者,於圖7之例中,感測器模組S3~6圖示為2感測器型感測器模組(參照圖2),但對於感測器模組S3~6而言,亦可於晶圓W之各路徑上配置至少1個以上之3感測器型感測器模組(參照圖3)。Furthermore, in the example of FIG. 7, the sensor modules S3-6 are shown as 2-sensor type sensor modules (refer to FIG. 2), but for the sensor modules S3-6, It is also possible to arrange at least one or more 3-sensor sensor modules on each path of the wafer W (refer to FIG. 3).
再者,所進行的說明是,在路徑153上,於晶圓W通過感測器模組S7時算出晶圓W之半徑,於晶圓W通過感測器模組S1時算出晶圓W之中心位置,但並不限於此。亦可為如下構成:在路徑153上,於晶圓W通過感測器模組S1時,基於圖4所示之流程算出晶圓W之半徑及中心位置。於此構成中,於步驟S107或步驟S112中,控制部100算出晶圓W之半徑,並且算出晶圓W之中心位置。於步驟S107中算出晶圓W之中心位置時,基於檢測點41~46(或從檢測點41~46之中選擇之點),算出晶圓W之半徑及晶圓W之中心位置。例如,亦可將各三角形T1~T4之外接圓中心之平均位置作為晶圓W之中心位置。亦可選擇各三角形T1~T4之外接圓中心中之任一外接圓中心作為晶圓W之中心位置。又,於步驟S112中算出晶圓W之中心位置時,將步驟S111中所特定出之形成有凹口50之位置處之檢測點(此處為檢測點41)排除後,算出晶圓W之半徑及晶圓W之中心位置。即,基於檢測點42~46(或從檢測點42~46之中選擇之點),算出晶圓W之半徑及晶圓W之中心位置。例如,亦可將不包含檢測點41之各三角形之外接圓中心之平均位置作為晶圓W之中心位置。亦可選擇不包含檢測點41之各三角形之外接圓中心中之任一外接圓中心作為晶圓W之中心位置。Furthermore, the explanation is that on the
又,亦可將感測器模組S1設為3感測器型感測器模組(參照圖3),將感測器模組S2、S7設為2感測器型感測器模組(參照圖2)。藉由設置於路徑153之感測器模組S1,可高精度地求出晶圓W之半徑及中心位置,可提高將晶圓W載置於處理室PM1之載置部111時之載置精度。又,可藉由設置於路徑154上之感測器模組S1而高精度地求出晶圓W之半徑,藉由設置於路徑154上之感測器模組S2而高精度地求出晶圓W之中心位置,可提高將晶圓W載置於處理室PM2之載置部111時之載置精度。In addition, the sensor module S1 can also be set as a 3-sensor type sensor module (refer to Figure 3), and the sensor modules S2 and S7 may be set as a 2-sensor type sensor module. (Refer to Figure 2). With the sensor module S1 installed in the
再者,於路徑155上,配置有2感測器型感測器模組S2、S7。於將晶圓W載置於加載互鎖真空室LLM之載置部131時,當晶圓W通過感測器模組S7時,基於圖6所示之流程算出晶圓W之中心位置。此處,於將晶圓W載置於加載互鎖真空室LLM之載置部131時,不要求與將晶圓W載置於處理室PM1、2之載置部111時相當之高載置精度。即,於圖6所示之流程中,步驟S204所容許之載置精度範圍變大。藉此,即便基於藉由2感測器型感測器模組(參照圖2)所算出之晶圓W之中心位置(S206)進行控制,亦可滿足所要求之載置精度地載置晶圓W。又,於步驟S204中,於外接圓中心之偏差未落在載置精度之範圍內之情形時(S204・否),控制部100之處理進入步驟S207。於此情形時,未能算出應當參照之晶圓W之半徑,因此控制部100判定為步驟S207・否,控制部100之處理進入步驟S210。Furthermore, on the
其次,利用圖8,對又一實施方式之基板處理系統之整體構成之一例進行說明。圖8係表示又一實施方式之基板處理系統之一例之構成的俯視圖。再者,於圖8中,對晶圓W標註點狀陰影來進行圖示。Next, using FIG. 8, an example of the overall configuration of a substrate processing system according to another embodiment will be described. FIG. 8 is a plan view showing the configuration of an example of a substrate processing system according to another embodiment. In addition, in FIG. 8, the wafer W is illustrated with dotted hatching.
圖8所示之基板處理系統與圖1所示之基板處理系統同樣為群集構造之系統,具備處理室PM1~6、搬送室VTM、加載互鎖真空室LLM、承載器模組LM1~2、負載埠LP1~4及控制部100。The substrate processing system shown in Fig. 8 is the same as the substrate processing system shown in Fig. 1 in a cluster structure. It includes processing chambers PM1~6, transfer chamber VTM, load lock vacuum chamber LLM, and carrier modules LM1~2. Load ports LP1 to 4 and the
處理室PM1具有俯視下呈2×2列行狀載置合計4片晶圓W之載置部111~114。同樣,處理室PM2~6分別具有載置4片晶圓W之載置部。加載互鎖真空室LLM具有俯視下呈2×2列行狀載置合計4片晶圓W之載置部131~134。又,處理室PM1~6之載置部111~114之配置與加載互鎖真空室LLM之載置部131~134之配置相同。The processing chamber PM1 has mounting
搬送裝置ARM1構成為具備基台121、第1連桿122、第2連桿123、及末端效應器124之多關節臂。第1連桿122之一端側係相對於基台121以上下方向為旋轉軸旋動自如地安裝。又,基台121可使第1連桿122在上下方向升降。第2連桿123之一端側係相對於第1連桿122之另一端側以上下方向為旋轉軸旋動自如地安裝。末端效應器124之基端側係相對於第2連桿123之另一端側以上下方向為旋轉軸旋動自如地安裝。末端效應器124之頭端側設置有複數個保持晶圓W之保持部。驅動第1連桿122之升降、基台121與第1連桿122之關節、第1連桿122與第2連桿123之關節、第2連桿123與末端效應器124之關節的致動器由控制部100控制。The transport device ARM1 is configured as a multi-articulated arm provided with a
末端效應器124形成為頭端側分支之叉狀,具有基端部240、及從基端部240延伸之2個板片(叉分枝部)241、242。板片241、242從基端部240朝相同方向延伸,形成為相同高度。板片241具有沿板片241之長度方向保持複數個晶圓W之保持部243、244。板片242具有沿板片242之長度方向保持複數個晶圓W之保持部245、246。如此,保持於末端效應器124之4片晶圓W以相同高度(於同一平面上)保持。The
感測器模組S1~S7以對應於2個板片241、242之方式,設置有2組。The sensor modules S1 to S7 are provided in two groups corresponding to the two
於圖8所示之基板處理系統中,將晶圓W從加載互鎖真空室LLM搬送至各處理室PM1~6並處理之後,從各處理室PM1~6搬送至加載互鎖真空室LLM。因此,感測器模組S7為具有3個感測器31~33之感測器模組。再者,於進行連續搬送之構成中,針對感測器模組S1~6,亦可以於晶圓W之各路徑上至少將3感測器型感測器模組(參照圖3)各配置至少1個之方式,配置3感測器型感測器模組(參照圖3)。In the substrate processing system shown in FIG. 8, the wafer W is transferred from the load lock vacuum chamber LLM to the processing chambers PM1 to 6 and processed, and then transferred from the processing chambers PM1 to 6 to the load lock vacuum chamber LLM. Therefore, the sensor module S7 is a sensor module with three sensors 31-33. Furthermore, in the continuous transport configuration, for the sensor modules S1 to 6, it is also possible to arrange at least 3 sensor-type sensor modules (refer to FIG. 3) on each path of the wafer W At least one way is to configure a 3-sensor sensor module (refer to Figure 3).
將加載互鎖真空室LLM之載置部131~134所載置之晶圓W搬送至處理室PM1,載置於處理室PM1之載置部111~114。此處,於晶圓W通過感測器模組S7時,基於圖4所示之流程分別算出各晶圓W之半徑。又,於晶圓W通過感測器模組S1時,基於圖6所示之流程算出各晶圓W之中心位置。基於所算出之各晶圓W之中心位置,控制搬送裝置ARM1,調整晶圓W之載置位置。The wafer W placed on the
圖4所示之流程係對各晶圓W逐個進行處理。圖6所示之流程基本上係對各晶圓W逐個進行處理。此處,於算出4片晶圓W中之第1~3晶圓W之中心位置(S206或S209),而將第4晶圓W判定為S207・否之情形時,使晶圓W偏移後再插入。藉此,算出第4晶圓W之中心位置(S206或S209)。此時,第1晶圓W之凹口50與感測器模組S1之位置關係亦發生變化,由此存在下次將第1晶圓W判定為S207・否之虞。The process shown in FIG. 4 is to process each wafer W one by one. The process shown in FIG. 6 basically processes each wafer W one by one. Here, when the center positions of the first to third wafers W among the four wafers W are calculated (S206 or S209), and the fourth wafer W is judged as S207·No, the wafer W is shifted Insert it later. In this way, the center position of the fourth wafer W is calculated (S206 or S209). At this time, the positional relationship between the
於此情形時,可反覆進行再次偏移及再進入,重複該操作直至算出4片晶圓W之中心位置為止。又,亦可將因偏移而被判定為S207・否之第1晶圓W之中心位置作為偏移前所算出之中心位置。藉此,可減少重做次數。In this case, the offset and reentry can be repeated again and again, and this operation is repeated until the center position of the 4 wafers W is calculated. In addition, the center position of the first wafer W determined as S207·No due to the offset may be the center position calculated before the offset. In this way, the number of redoing can be reduced.
10, 30:基準線 11, 12, 31, 32, 33:感測器 21, 22, 23, 24, 41, 42, 43, 44, 45, 46:檢測點 50:凹口(缺口部) 100:控制部 111, 112, 113, 114:載置部(第1載置部、第2載置部) 121:基台 122:第1連桿 123:第2連桿 124:末端效應器 131, 132, 133, 134:載置部(第1載置部、第2載置部) 144:末端效應器 151, 152, 153, 154, 155:路徑(搬送路徑) 240:基端部 241, 242:板片 243, 244:保持部 245, 246:保持部 ARM1:搬送裝置 ARM2:搬送裝置 ARM3:搬送裝置 C:載具 GV1, GV2, GV3, GV4, GV5, GV6, GV7:閘閥 GV8:閘閥 GV9:閘閥 LLM:加載互鎖真空室 LM1, LM2:承載器模組 LP1, LP2, LP3, LP4:負載埠 PM1, PM2, PM3, PM4, PM5, PM6:處理室(第1室、第2室) S1, S2, S3, S4, S5, S6, S7:感測器模組(基板感測部) VTM:搬送室(第1室、第2室) W:晶圓10, 30: baseline 11, 12, 31, 32, 33: sensor 21, 22, 23, 24, 41, 42, 43, 44, 45, 46: detection point 50: Notch (notch part) 100: Control Department 111, 112, 113, 114: Placement part (1st placement part, 2nd placement part) 121: Abutment 122: 1st link 123: 2nd link 124: End Effector 131, 132, 133, 134: Placement section (1st placement section, 2nd placement section) 144: End Effector 151, 152, 153, 154, 155: route (transport route) 240: Base end 241, 242: Plate 243, 244: holding part 245, 246: holding part ARM1: Conveying device ARM2: Conveying device ARM3: Conveying device C: Vehicle GV1, GV2, GV3, GV4, GV5, GV6, GV7: gate valve GV8: Gate valve GV9: Gate valve LLM: Load lock vacuum chamber LM1, LM2: Carrier module LP1, LP2, LP3, LP4: Load port PM1, PM2, PM3, PM4, PM5, PM6: processing room (room 1 and room 2) S1, S2, S3, S4, S5, S6, S7: sensor module (board sensing part) VTM: transfer room (room 1 and room 2) W: Wafer
圖1係表示一實施方式之基板處理系統之一例之構成的俯視圖。 圖2係對感測器模組之構成及檢測要領進行說明的模式圖之一例。 圖3係對感測器模組之構成及檢測要領進行說明的模式圖之一例。 圖4係表示算出晶圓之半徑的處理之一例之流程圖。 圖5係表格之一例。 圖6係表示算出晶圓之中心位置的處理之一例之流程圖。 圖7係表示另一實施方式之基板處理系統之一例之構成的俯視圖。 圖8係表示又一實施方式之基板處理系統之一例之構成的俯視圖。FIG. 1 is a plan view showing the configuration of an example of a substrate processing system according to an embodiment. Fig. 2 is an example of a schematic diagram explaining the structure and detection method of the sensor module. Fig. 3 is an example of a schematic diagram illustrating the structure and detection methods of the sensor module. FIG. 4 is a flowchart showing an example of processing for calculating the radius of the wafer. Figure 5 is an example of the table. FIG. 6 is a flowchart showing an example of processing for calculating the center position of the wafer. FIG. 7 is a plan view showing the configuration of an example of a substrate processing system according to another embodiment. FIG. 8 is a plan view showing the configuration of an example of a substrate processing system according to another embodiment.
100:控制部 100: Control Department
111:載置部 111: Placement Department
124:末端效應器 124: End Effector
131:載置部 131: Placement Department
144:末端效應器 144: End Effector
151:路徑 151: Path
152:路徑 152: Path
ARM1:搬送裝置 ARM1: Conveying device
ARM2:搬送裝置 ARM2: Conveying device
ARM3:搬送裝置 ARM3: Conveying device
C:載具 C: Vehicle
GV1,GV2,GV3,GV4,GV5,GV6,GV7:閘閥 GV1, GV2, GV3, GV4, GV5, GV6, GV7: gate valve
GV8:閘閥 GV8: Gate valve
GV9:閘閥 GV9: Gate valve
LLM:加載互鎖真空室 LLM: Load lock vacuum chamber
LM1,LM2:承載器模組 LM1, LM2: Carrier module
LP1,LP2,LP3,LP4:負載埠 LP1, LP2, LP3, LP4: load port
PM1,PM2,PM3,PM4,PM5,PM6:處理室 PM1, PM2, PM3, PM4, PM5, PM6: processing room
S1,S2,S3,S4,S5,S6,S7:感測器模組 S1, S2, S3, S4, S5, S6, S7: sensor module
VTM:搬送室 VTM: transfer room
W:晶圓 W: Wafer
Claims (16)
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| JP5516482B2 (en) * | 2011-04-11 | 2014-06-11 | 東京エレクトロン株式会社 | Substrate transport method, substrate transport apparatus, and coating and developing apparatus |
| JP5582152B2 (en) * | 2012-02-03 | 2014-09-03 | 東京エレクトロン株式会社 | Substrate transport apparatus, substrate transport method, and storage medium |
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