TW202127172A - recovery boosting circuit and LDO REGULATOR WITH OUTPUT-DROP RECOVERY - Google Patents

Abstract

An electronic circuit for voltage regulation includes a voltage regulator and a recovery boosting circuit. The recovery boosting circuit is configured to detect a voltage drop occurring in an output voltage of the voltage regulator, to generate (i) a first electrical current that is derived from the output voltage of the voltage regulator and (ii) a second electrical current that is derived from a supply voltage of the voltage regulator, to generate a pulse whose energy depends on the first electrical current and on the second electrical current, and to assist the voltage regulator in recovering from the voltage drop, by applying the pulse to the voltage regulator.

Description

Recovery boost circuit, electronic circuit for voltage regulation and method thereof

The present invention mainly relates to a power circuit system, in particular to a voltage regulation method and system with output voltage drop recovery.

Low-dropout (LDO) voltage regulators are commonly used for electronic circuit power supplies. Various low pressure, temperature and pressure configurations are common knowledge in this field. For example, US Patent No. US7,199,565 describes a low-dropout voltage regulator, which includes a startup circuit, a curvature correction bandgap circuit, an error amplifier, a metal oxide semiconductor transfer device, and a transient response boost circuit with voltage conversion efficiency. The metal oxide semiconductor transfer device has a gate node coupled to the output of the error amplifier, and a drain node that generates an output voltage. Transient response boost circuit with voltage conversion efficiency applies voltage to the gate node of the metal oxide semiconductor transmission device to accelerate the response time of the error amplifier, and promote the final adjustment of the low-dropout voltage regulator when a voltage drop occurs The output voltage.

An embodiment of the invention described herein provides a recovery boost circuit. Restore the boost circuit configuration to: detect the voltage drop occurring in the output voltage of the voltage regulator; generate a first current from the output voltage of the voltage regulator; generate pulses whose energy is related to the first current; and by applying pulses To the voltage regulator, help the voltage regulator recover from the voltage drop.

In another embodiment, the recovery boost circuit includes a cut-off circuit configured to cut off the pulse after a duration dependent on the first current.

In some embodiments, the recovery boost circuit is further configured to generate a second current from the power supply voltage of the voltage regulator, and the energy of the pulse depends on the first and second currents.

In some embodiments, the voltage regulator includes a low-dropout regulator with two stages, and the boost circuit configuration is restored to apply a pulse between the two stages.

In some embodiments, the voltage regulator includes an output stage with a resistance ladder, and the boost circuit configuration is restored to detect the voltage drop by comparing the first voltage and the second voltage obtained from each branch of the resistance ladder. In one embodiment, the recovery boost circuit includes (1) a low-pass filter configured to filter the first voltage; and (2) a comparator configured to compare the filtered first voltage with the second voltage To detect the voltage drop.

In one disclosed embodiment, the energy of the pulse depends on the sum of the first current and the second current. In another embodiment, the recovery boost circuit includes a cut-off circuit configured to cut off the pulse after a duration dependent on the first current and the second current.

In another embodiment, the recovery boost circuit includes a Native Field-Effect Transistor (FET), which is configured to compensate for the pulse change caused by the difference in the power supply voltage. In another embodiment, the recovery boost circuit includes a series capacitor configured to pulse charge and then discharge to apply the pulse to the voltage regulator. In another embodiment, the recovery boost circuit includes a native field effect transistor, the drain of which is connected to a voltage regulator to apply pulses.

According to an embodiment of the present invention, the present invention further provides an electronic circuit for voltage regulation, which includes a voltage regulator and any of the above-mentioned recovery boost circuits.

According to an embodiment of the present invention, the present invention further provides a voltage adjustment method, which includes: detecting a voltage drop that occurs in the output voltage of the voltage regulator; generating a first current from the output voltage of the voltage regulator; generating a pulse, which The energy is related to the first current; and by applying pulses to the voltage regulator, the voltage regulator is helped to recover from the voltage drop.

According to an embodiment of the present invention, the present invention further provides an integrated circuit (Integrated Circuit, IC), which includes: an electronic circuit system; and a voltage regulating circuit system configured to generate an output voltage for powering the electronic circuit system. The voltage regulating circuit system includes: a voltage regulator configured to generate an output voltage; and any one of the above-mentioned recovery boosting circuits.

Overview

The embodiments of the invention described herein provide improved methods and devices for voltage regulation. The disclosed technology improves the recovery of the voltage regulator from the output voltage drop, which may be caused by, for example, a momentary change in the load state. The disclosed technology is very effective in avoiding the overshoot phenomenon during the recovery from the voltage drop, and has a good performance under a wide range of power supply voltages.

In some embodiments, the electronic circuit includes a two-stage low-dropout voltage regulator, and a recovery boost unit. Restore the configuration of the boost unit to detect the voltage drop occurring in the output voltage of the low-dropout voltage regulator, generate a pulse in response to the detected voltage drop, and by applying the pulse to the midpoint between the two stages of the low-dropout voltage regulator, To help the low-dropout voltage regulator recover from the voltage drop. Pulses generally help draw current from the first-stage output of the low-dropout voltage regulator, so it can increase the speed at which the low-dropout voltage regulator can respond to voltage drops.

In the partially disclosed embodiments, the recovery boost unit sets the pulse energy (for example, pulse amplitude and/or duration) according to (1) the actual output voltage including the voltage drop and (2) the actual power supply voltage. In one embodiment, the recovery boost unit generates (1) a first current, which comes from the output voltage of the low-dropout voltage regulator, and (2) a second current, which comes from the power supply voltage. Dependency is usually anti-phase dependence, that is, lower output voltage and/or lower power supply voltage are converted into stronger pulses, and vice versa. The recovery boost unit generates pulses based on these two currents.

By generating pulses in this way, the pulse energy can be matched to the actual characteristics of the voltage drop (due to the dependence on the first current). Therefore, the recovery is fast and accurate, and almost no overshoot occurs. In addition, the recovery speed and accuracy can be improved under a wide range of power supply voltages (due to the dependence of the pulse on the second current).

In addition, the disclosed technology is used as a built-in protection mechanism, which can actually disable the recovery boost unit during the conversion process of the low-dropout voltage regulator, such as wake-up or conversion from sleep mode to normal operation. The reliability of the recovery boost unit is therefore significantly improved. The disclosed technology eliminates the need to install dedicated protection hardware for this purpose, thus reducing the size and cost.

Other advantageous features that help achieve high performance are, for example, the use of native field-effect transistors and the use of a pair of voltages obtained from the same resistance ladder to detect the voltage drop. This resistance ladder is also used to output low-dropout voltage regulators. The output voltage. The characteristics of the recovery boost unit and the realization of several examples will be described and explained as follows.

System specification

FIG. 1 is a block diagram of a circuit 20 including a low-dropout voltage regulator 24 with improved output voltage drop recovery according to an embodiment of the present invention. The low-dropout voltage regulator 24 provides power to the load 26, which may include any suitable circuit system. In many practical situations, the instantaneous change of the current consumption of the load 26 will cause a voltage drop in the output voltage of the low-dropout voltage regulator 24. It is very important to recover quickly from this voltage drop with almost no overshoot. The method of recovering the output voltage drop described herein can help the low-dropout voltage regulator 24 to recover.

The circuit 20 can be used in various systems that require a regulated power supply under different load conditions. A typical use case is a controller or other integrated circuit that can switch between sleep mode and normal mode.

In the embodiment of Figure 1, the low-dropout voltage regulator 24 includes a two-stage low-dropout voltage regulator. The first stage contains a differential amplifier, in this example an Operational Transconductance Amplifier (OTA) 28. The second stage includes a P-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS FET) 32, which is represented by M1 in the figure. Both stages are connected to the power supply voltage denoted by Vcc.

In this example, Vcc varies in the range of 1.8-3.3V. In some embodiments, an extended range of about 1.7-3.6V can be considered. In the 1.2V of this example, the regulated output voltage generated by the low-dropout voltage regulator 24 is represented by Vout.

The output of the operational transconductance amplifier 28 can be used to drive the gate of the P-type metal oxide semiconductor field effect transistor 32. The midpoint between these two levels is represented by VG. The output voltage Vout is taken from the source of the P-type metal oxide semiconductor field effect transistor 32. The drain of the P-type metal oxide semiconductor field effect transistor 32 is connected to Vcc. The source of the P-type metal oxide semiconductor field effect transistor 32 (from which Vout is obtained) is grounded through a resistor ladder. In this example, three series resistors R1A, R1B, and R2 are included. The feedback voltage FB is taken from the nodes of R1B and R2, and is fed back to one of the differential input terminals of the operational transconductance amplifier 28. The other differential input terminal of the operational transconductance amplifier 28 is connected to the reference voltage Vref. For example, Vref can be generated by a band gap voltage reference (not shown).

The electronic circuit 20 further includes a recovery boost circuit 36, which is also intended to recover the boost unit herein. The recovery boosting unit 36 may detect the voltage drop occurring in Vout, and in response to the detected voltage drop, may generate a current pulse at the node VG. The energy (for example, the amplitude and/or duration) and the duration of the pulse match the voltage drop characteristics after detection. The pulse facilitates rapid discharge from node VG and exceeds the capability of operational transconductance amplifier 28. Specifically, in a system operating at a low power supply voltage of 1.8V, the current of the output branch of the operational transconductance amplifier is generally limited to keep the operational transconductance amplifier below the saturation state. Therefore, the bandwidth of the feedback loop of the low-dropout voltage regulator will increase significantly during the pulse period. The pulse generated by the recovery boost unit is therefore also called "discharge pulse".

The existence of the pulse improves the recovery of the low-dropout voltage regulator 24 from the voltage drop. Generally speaking, when assisted by the pulse generated by the recovery boost unit 36, the depth of the voltage drop in Vout is smaller, so the speed of returning to the normal output voltage is faster. It should be noted that the energy of the pulse has a considerable influence on the recovery performance. If the pulse energy is too small, the recovery ability will be relatively slow. If the pulse energy is too high, overshoot may occur in Vout. As described below, because the pulse energy setting using the disclosed technology is quite accurate, the recovery speed is fast and there is almost no overshoot. This performance can be achieved within a wide range of Vcc, such as between 1.8-3.3V. Examples of simulation performance with and without the assistance of the boost unit 36 are shown in Figure 6 below.

Except for the Vcc and the ground point, the recovery boost unit 36 has two inputs and one output. The two inputs represented by 1.20V and 1.15V in the diagram are taken from two different branches (ie, voltage divisions) of the resistance ladder of the low-dropout voltage regulator 24. It means that the input of 1.20V is equal to Vout. The resistance in the resistance ladder is designed so that the second input, represented by 1.15V, is 50mV lower than Vout. The generated discharge pulse is supplied from the output of the recovery boost unit 36 to the node VG (the input of the operational transconductance amplifier, that is, the gate of the P-type metal oxide semiconductor field effect transistor 32, that is, the low-dropout voltage regulator 24). Midpoint between levels).

For several reasons, it is helpful to get 1.20V input and 1.15V input from a resistance ladder. First, the inputs at both ends match each other. Second, Vref is not loaded or used to provide these inputs. Third, the glitch detection is performed directly on the Vout (1.20V) node, thus improving the speed and reliability of detection.

Example of restoration of boost unit configuration

FIG. 2 is a block diagram of the recovery boost unit 40 according to an embodiment of the present invention. This configuration can be used to realize the recovery boost unit 36 of FIG. 1.

The recovery boost unit 40 receives two voltages as inputs, which are Vout and VrefA which is 50 mV lower than Vout. When Vout has a voltage drop, VrefA will also have this voltage drop. However, VrefA is filtered by a low-pass filter (LPF) 44, which in this example is a resistance-capacitance (RC) filter. Due to the low-pass filter, the output of the low-pass filter (represented by VrefA_Filter) is approximately constant at 1.15V, even during the voltage drop of Vout.

The surge detector 48, which usually includes a high-speed comparator, can be used to detect the voltage drop in Vout. The surge detector 48 compares Vout with VrefA_Filter (a low-pass filtered version of VrefA, that is, 50 mV lower than Vout). Whenever the instantaneous amplitude of Vout drops by more than 50mV, the output of the surge detector 48 will become high (equal to Vcc). Otherwise, the output of the surge detector 48 is low (0V). The output of the surge detector 48 is represented by BP1. In other words, the surge detector 48 outputs a pulse of amplitude Vcc, which starts to be generated when the voltage drops below 50 mV.

In the embodiment of FIG. 2, the recovery boost unit 40 includes a native N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOS FET), which is represented by NATIVE1. The gate of NATIVE1 is connected to Vout, and the drain of NATIVE1 is connected to BP1. The function of NATIVE1 is to limit the pulse amplitude at the output of the surge detector 48 from Vcc to approximately Vout (1.2V), regardless of the actual value of Vcc. This operation helps to match the characteristics of pulses and voltage drops in a wide range of power supply voltages.

The source of NATIVE1 is connected to a capacitor denoted by C_BOOST, which couples the limiting pulse to the gate of another native N-type metal oxide semiconductor field effect transistor denoted by NATIVE2. C_BOOST charges quickly at the beginning of the pulse, and then gradually discharges.

The drain of NATIVE2 is connected to the midpoint VG (between the two stages of the low-dropout voltage regulator 24). The source of NATIVE2 is grounded by an additional N-type metal oxide semiconductor field effect transistor, which is denoted by NDIS. NATIVE2 can be used as a switch, which is turned on and off by the pulse of BP2. When closed, the recovery boost unit 40 draws current from the VG to help the low-dropout voltage regulator recover from the voltage drop, as described above. The gate of the transistor NDIS is connected to BP1, that is, connected to the output of the surge detector 48. When the output of the surge detector 48 becomes low (when the voltage drop is less than 50 mV), the transistor NDIS can be used to terminate the pulse.

Given that the critical voltage is approximately zero, native transistors are usually suitable for limiting pulses (working mode such as NATIVE1) and suitable for switching currents in response to pulses (working mode such as NATIVE2). The native transistor NATIVE2 is especially suitable for use because it has a relatively low input gate voltage of 1.2V (that is, the limiting result of NATIVE1, regardless of the range of the power supply voltage). In addition, native transistors usually have a very small physical area and can provide high current at the same time. However, the disclosed technology is not limited to the use of native transistors, and other suitable types of transistors can be used in alternative embodiments.

In an alternative embodiment, the transistor NDIS can be omitted. In one embodiment, the ideal condition is usually that the off current of NATIVE2 is negligible.

In this embodiment, the recovery boost unit 40 further includes two current sources, which are configured to generate two currents represented by I1 and I2. The current source of I1 includes an N-type metal oxide semiconductor field effect transistor represented by N1A and a resistor R1A. This current source is powered by Vout, so I1 depends on Vout. In particular, whenever a voltage drop occurs in Vout, the current I1 drops. The current source of I2 includes an N-type metal oxide semiconductor field effect transistor represented by N2A and a resistor R2A. This current source is powered by Vcc, so I2 depends on Vcc.

The recovery boost unit 40 includes two current mirrors using N-type metal oxide semiconductor field effect transistors N1B and N2B. N1B and N2B use bias voltages BIAS1 and BIAS2 respectively to mirror the currents I1 and I2. The sum of the two currents (I1+I2) can be applied to BP2. In other words, the node BP2 can be discharged using two current sources.

The energy of the discharge pulse discharged at the node BP2 depends on Vout and Vcc, and their dependence is usually in reverse phase, that is, lower Vout and/or lower Vcc are converted into higher energy pulses, and vice versa. More specifically, the discharge pulse energy that defines the intensity of the discharge current at the VG follows the state of Vout during the actual Vout step-down period, and is used as the real-time negative feedback of the discharge pulse. As Vout decreases deeper and/or longer, the energy of the discharge pulse slowly decays, and quickly decays as Vout decreases and recovers.

This dependency therefore causes the pulse energy to match the actual characteristics of the Vout voltage drop in real time and in a wide range of Vcc. Therefore, the recovery speed from the voltage drop is fast and there is almost no overshoot.

As described above, the disclosed technology can be used as a built-in protection mechanism to prevent the low-dropout voltage regulator 24 from discharging at the VG during the conversion process (for example, wake-up or conversion from sleep mode to normal operation). During this conversion process, the levels of Vout and VrefA may be difficult to stabilize, and it may be difficult to activate the surge detector 48 to generate an output “1” until the low-dropout voltage regulator 24 stabilizes. However, relative to this conversion process (for example, the wake-up time), the derived discharge pulse is very short, so that the output of the surge detector remains at "0" during most of the conversion process, thereby enabling the low-dropout voltage regulator 24 keep it steady.

In addition, since Vout and VrefA are taken from the same resistance ladder, the design can guarantee that Vout will be higher than VrefA. This guarantee also applies during the conversion process.

FIG. 3 is a block diagram of the recovery boost unit 52 according to an embodiment of the present invention. This configuration can also be used to realize the recovery boosting unit 36 of FIG. 1. Except for the following differences, the recovery boosting unit 52 is similar in structure and operation to the recovery boosting unit 40 of FIG. 2.

The first difference between this embodiment and the above-mentioned embodiment is that in this embodiment, the capacitor C_BOOST is omitted from the recovery boost unit.

The second difference between this embodiment and the above-mentioned embodiment is that in this embodiment, the pulse generator 56 generates pulses based on the currents I1, I2 and the output of the surge detector 48. Generally speaking, the pulse generator 56 is triggered by the output of the surge detector 48. When triggered, the pulse generator generates a pulse whose duration depends on the sum of the currents I1 and I2 (I1+I2). This pulse controls the N-type metal oxide semiconductor field effect transistor represented by NCUT, which is connected in series with the transistor NATIVE2 and the transistor NDIS by connecting the drain to the gate. Using the transistor NCUT, the pulse generator 56 starts the pulse when the output of the surge detector goes high, and stops the pulse after the required duration.

The configurations of the recovery booster units in Figs. 2 and 3 are also different from each other in the shape of the discharge pulse. The pulse generated by the recovery boost unit 36 (Figure 2) generally has a monotonically decreasing amplitude. The pulse generated by the recovery boost unit 40 (Figure 3) has an approximately constant amplitude.

FIG. 4 is a block diagram of a recovery boost unit 60 according to another embodiment of the present invention. This configuration can also be used to realize the recovery boosting unit 36 of FIG. 1. The example in Figure 4 shows another way of controlling the pulse energy to vary with I1 and I2 (and also with Vout and Vcc).

In this example, the current I2 is generated and mirrored to BP2, as shown in the recovery boost unit 40 in FIG. 2. On the other hand, in order to generate the current I1, the recovery boost unit 60 includes a differential current amplifier 64 (usually an operational amplifier, used as an error amplifier). The two differential inputs of the amplifier 64 are connected to Vout and VrefA_Filter. The voltage NBIAS1 is obtained from the current branch output of the amplifier 64. NBIAS1 depends on the depth of the voltage drop in Vout. The N-type metal oxide semiconductor field effect transistor N1B uses the voltage NBIAS1 to mirror the currents I1 to BP2.

Fig. 5 is a circuit diagram of the amplifier 64 used in the recovery boost unit 60 in Fig. 4 according to an embodiment of the present invention. The amplifier 64 is used to generate a current I1 with a high gain and track the real-time waveform of the voltage drop of Vout. The amplifier 64 is a differential amplifier with an effective load.

The right branch has high impedance, while the left branch (the drain of the left differential device, equivalent to NBIAS1) has low impedance. The left branch has a low voltage gain (because it is in the form of a diode), but has a high current gain that depends on the differential gain (Vout-VrefA_Filter).

Therefore, the voltage NBIAS1 can be effectively obtained, and the transient fluctuation of Vout (or Vout-VrefA_Filter) can be closely followed during the voltage drop of Vout. Therefore, NBIAS1 is very suitable for use as the current source of the current mirror N1B, which changes its current in the same way as I1, but has a greater gain.

Simulation performance

Figure 6 is a graph showing the simulation performance of a low-dropout voltage regulator with and without improved output voltage drop recovery according to an embodiment of the present invention. In this example, the configuration of Figure 3 (with pulse generator 56) is used for simulation. All graphs show changes in voltage over time.

Starting from the top of the figure, the curve 70 shows the Vout with no improvement in the output voltage drop recovery (the recovery of the boost unit will be invalid). The deep and long voltage drop can be clearly seen. Curve 74 shows Vout with improved output voltage drop recovery (will restore the boost unit to be effective). It can be seen that the voltage drop is significantly shorter and shallower.

Then down, curves 78 and 82 respectively show the voltage at VG with and without improved output voltage drop recovery (the midpoint between the two stages of the low-drop voltage regulator). Without the improved output voltage drop recovery (curve 78), the transition at VG becomes very slow (narrow bandwidth feedback). If the improved output voltage drop recovery is included (curve 82), the conversion at the VG is significantly faster due to the improved current drawn at the VG driven by the recovery boost unit (high-bandwidth feedback).

Moving on, curves 86 and 90 represent the two inputs of the surge detector 48. Curve 86 represents Vout, and curve 90 represents VrefA_Filter. The surge detector 48 outputs pulses between the time curves 86 below the curve 90 until the time curve 86 returns to the top of the curve 90.

Finally, at the bottom of the figure, the curve 94 represents the pulse output by the surge detector 48. Curve 98 shows the output of the recovery boost unit, that is, the pulse applied to the midpoint VG after the pulse is terminated by using the pulse generator 56 and the transistor NCUT.

FIG. 7 is a block diagram of an integrated circuit 100 including a low-dropout voltage regulator with improved output voltage drop recovery according to an embodiment of the present invention. In this example, the low-dropout voltage regulator 24 is used to provide the regulated voltage Vout for powering the circuit system 104. As described herein, the recovery boost unit 36 is used to improve the recovery of the low-dropout voltage regulator 24 from a drop in Vout. It is worth noting that, in addition to helping to recover from a drop in output, the recovery boost unit 36 will not affect the performance, stability or operating point of the low-dropout voltage regulator 24 in any way, and it will not be a low-dropout voltage. The regulator adds any capacitive load.

The circuit configurations shown in Figures 1 to 5 and Figure 7 are examples of configurations selected for conceptual clarification. In alternative embodiments, any other suitable configuration may be used. For example, the disclosed technology can be used with other types of voltage regulators, not necessarily only with two-stage low-dropout voltage regulators. The configuration of the recovery booster unit described in Figures 2 to 4 is also described as an example only. In alternative embodiments, any other suitable recovery boost unit configuration may be used.

In various embodiments, the circuits shown in Figures 1 to 5 and Figure 7 can be configured in any suitable manner, such as using individual components or application-specific integrated circuits (ASICs). The above given values, such as the Vout value, the range of Vcc, and the input value of the recovery boost unit, are selected as examples only. The technique of disclosure can be used with any other suitable value.

20: Circuit 24: Low-dropout voltage regulator 26: load 28: Operational transconductance amplifier 32: P-type metal oxide semiconductor field effect transistor 36, 40, 52, 60: restore boost unit 44: low pass filter 48: Surge detector 56: Pulse generator 64: Differential current amplifier 70, 74, 78, 82, 86, 90, 94, 98: curve 100: Integrated circuit 104: Circuit System FB: Feedback voltage Vref: Reference voltage Vcc: power supply voltage Vout: output voltage R1A, R1B, R2: resistance

From the following detailed description of its embodiments and the accompanying drawings, the present invention will be more comprehensive and easier to understand, in which:

Figure 1 is a block diagram of a low-dropout voltage regulator with improved output voltage drop recovery according to an embodiment of the present invention;

FIGS. 2 to 4 are block diagrams of recovery boost units (Recovery Boost Units, RBUs) used in the low-dropout voltage regulator of FIG. 1 according to an embodiment of the present invention;

Fig. 5 is a circuit diagram of a differential amplifier used in the recovery boost unit of Fig. 4 according to an embodiment of the present invention;

Figure 6 is a graph showing the simulation performance of a low-dropout voltage regulator with and without improved output voltage drop recovery according to an embodiment of the present invention;

FIG. 7 is a block diagram of an integrated circuit including a low-dropout voltage regulator with improved output voltage drop recovery according to an embodiment of the present invention.

20: Circuit

24: Low-dropout voltage regulator

26: load

28: Operational transconductance amplifier

32: P-type metal oxide semiconductor field effect transistor

36: restore boost unit

FB: Feedback voltage

Vref: Reference voltage

Vcc: power supply voltage

Vout: output voltage

R1A, R1B, R2: resistance

Claims (11)

A recovery boost circuit, which includes: Multiple hardware circuits electrically connected to each other are configured to: Detecting a voltage drop occurring in an output voltage of a voltage regulator; Generating a first current from the output voltage of the voltage regulator; Generate a pulse, the energy of which is related to the first current; and The pulse is applied to the voltage regulator to help the voltage regulator recover from the voltage drop. The restoration boost circuit according to claim 1, wherein the restoration boost circuit is further used for: A second current is generated, which comes from a power supply voltage of the voltage regulator, and the energy of the pulse depends on the first and second currents. The restoration step-up circuit according to claim 1, wherein the voltage regulator includes an output stage having a resistance ladder, and wherein the restoration step-up circuit is configured to compare a first obtained from each branch of the resistance ladder A voltage and a second voltage are used to detect the voltage drop, and the hardware circuits of the recovery boost circuit include: A low-pass filter configured to filter the first voltage; and A comparator configured to detect the voltage drop by comparing the filtered first voltage and the second voltage. The recovery boost circuit according to claim 2, wherein the energy of the pulse depends on the sum of the first current and the second current. The restoration boost circuit according to claim 1, wherein the hardware circuits of the restoration boost circuit include: A cut-off circuit configured to cut off the pulse after a duration dependent on the first current. The restoration boost circuit according to claim 1, wherein the hardware circuits of the restoration boost circuit include: A native field effect transistor configured to compensate for the change in the pulse caused by the difference in a power supply voltage of the voltage regulator. The restoration boost circuit according to claim 1, wherein the hardware circuits of the restoration boost circuit include: A series capacitor configured to be charged with the pulse and then discharged to apply the pulse to the voltage regulator. The restoration boost circuit according to claim 1, wherein the hardware circuits of the restoration boost circuit include: A native field effect transistor whose drain is connected to the voltage regulator to apply the pulse. An electronic circuit for voltage regulation, which includes: The recovery boost circuit as described in one of claims 1, 3, and 5-8; and The voltage regulator. A voltage regulation method, which includes: Detecting a voltage drop occurring in an output voltage of a voltage regulator; Generating a first current from the output voltage of the voltage regulator; Generate a pulse, the energy of which is related to the first current; and By applying the pulse to the voltage regulator, the voltage regulator is helped to recover from the voltage drop. An integrated circuit comprising: An electronic circuit system; and A voltage regulation circuit system, the voltage regulation circuit system includes the recovery boost circuit as described in one of claims 1, 3, and 5-8, and the voltage regulator, and the voltage regulation circuit system is configured to generate The output voltage supplied by the electronic circuit system.

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