TW201911603A - Micro device integration into system substrate - Google Patents
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Abstract
Description
本發明係關於將經轉移微裝置系統整合至一受體基板上。更具體言之,本發明係關於用於在轉移至一受體基板中之後增強微裝置之效能之後處理步驟,包含光學結構之顯影、光電薄膜裝置之整合、色彩轉換層之添加及一施體基板上之裝置之恰當圖案化。The present invention relates to the integration of a transferred microdevice system onto an acceptor substrate. More specifically, the present invention relates to a processing step for enhancing the performance of a microdevice after transfer to an acceptor substrate, including development of an optical structure, integration of a photovoltaic thin film device, addition of a color conversion layer, and application of a donor Proper patterning of the devices on the substrate.
本發明之一目的係藉由提供整合於一相同受體基板上之一發光微裝置及一薄膜光電發光裝置而克服先前技術之缺點。It is an object of the present invention to overcome the shortcomings of the prior art by providing a light emitting micro device and a thin film photovoltaic device integrated on a same receptor substrate.
因此,本發明係關於一種整合式光學系統,其包括複數個像素,各像素包括:Accordingly, the present invention is directed to an integrated optical system that includes a plurality of pixels, each of which includes:
一受體基板;a receptor substrate;
一發光微裝置,其整合於該受體基板上;a luminescent microdevice integrated on the acceptor substrate;
一平坦化或堤岸區,其包圍該微裝置;及a planarization or embankment region surrounding the microdevice; and
一薄膜發光光電裝置,其之至少一部分安裝於該平坦化或堤岸區上。A thin film light-emitting photovoltaic device, at least a portion of which is mounted on the planarization or embankment region.
相關申請案之交叉參考 此申請案主張2017年7月18日申請之美國專利申請案第15/653,120號之優先權,該案之全部內容以引用的方式併入本文中。CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Patent Application Serial No. No. No. No. No. No. No.
雖然結合各種實施例及實例描述本教示,但不希望本教示限於此等實施例。相反,如熟習此項技術者將瞭解到,本教示涵蓋各種替代及等效物。Although the present teachings are described in connection with various embodiments and examples, it is not intended that the present teachings be limited to such embodiments. Instead, it will be appreciated by those skilled in the art that the present teachings cover various alternatives and equivalents.
產生基於微裝置之一系統之程序包括:在一施體基板(或一臨時基板)上預處理裝置;將微裝置從施體基板轉移至受體基板;及後處理以實現裝置功能性。預處理步驟可包含圖案化及添加接合元件。轉移程序可涉及將微裝置之一預選定陣列接合至受體基板,接著移除施體基板。已針對微裝置產生若干不同選擇性轉移程序。在將微裝置整合至接收基板中之後,可執行額外後處理以製成所需功能連接。A process for generating a system based on a microdevice includes: pretreating a device on a donor substrate (or a temporary substrate); transferring the micro device from the donor substrate to the acceptor substrate; and post processing to achieve device functionality. The pre-processing step can include patterning and adding bonding elements. The transfer procedure can involve bonding a pre-selected array of microdevices to the acceptor substrate, followed by removal of the donor substrate. Several different selective transfer procedures have been generated for micro devices. After the micro device is integrated into the receiving substrate, additional post processing can be performed to make the desired functional connection.
在本發明中,使用發射裝置以描述不同整合及後處理方法。然而,熟習此項技術者將瞭解,在此等實施例中可使用其他裝置(諸如感測器)。例如,在感測器微裝置的情況中,光學路徑將類似於發射微裝置,但在相反方向上。In the present invention, a transmitting device is used to describe different integration and post-processing methods. However, those skilled in the art will appreciate that other devices, such as sensors, can be used in such embodiments. For example, in the case of a sensor microdevice, the optical path will be similar to the transmitting micro device, but in the opposite direction.
本發明之一些實施例係關於用於改良微裝置之效能之後處理步驟。例如,在一些實施例中,微裝置陣列可包括微發光二極體(LED)、有機LED、感測器、固態裝置、積體電路、(微機電系統) MEMS及/或其他電子組件。接收基板可為但不限於一印刷電路板(PCB)、薄膜電晶體底板、積體電路基板或(在光學微裝置(諸如LED)之一個情況中)一顯示器之一組件(例如,一驅動電路底板)。在此等實施例中,除了使微裝置互連之外,可使用額外結構(例如,反射層、填料、黑色矩陣或其他層)之後處理步驟來改良所產生之LED光之輸出耦合。在另一實例中,可使用介電層及金屬層以將一光電薄膜裝置與經轉移微裝置整合於系統基板中。Some embodiments of the invention relate to processing steps for improving the performance of a microdevice. For example, in some embodiments, a micro device array can include a micro light emitting diode (LED), an organic LED, a sensor, a solid state device, an integrated circuit, a (microelectromechanical system) MEMS, and/or other electronic components. The receiving substrate may be, but not limited to, a printed circuit board (PCB), a thin film transistor substrate, an integrated circuit substrate, or (in one case of an optical micro device (such as an LED)) one component of a display (eg, a driving circuit) Base plate). In such embodiments, in addition to interconnecting the micro devices, additional processing (eg, reflective layers, fillers, black matrices, or other layers) may be used to post-process steps to improve the output coupling of the resulting LED light. In another example, a dielectric layer and a metal layer can be used to integrate a photovoltaic thin film device and a transferred micro device into a system substrate.
在一項實施例中,藉由使用填料(或介電質)將像素(或子像素)之作用區域延展為大於微裝置。此處,圖案化填料以界定像素之作用區域(作用區域係發射光或吸收輸入光之區域)。在另一實施例中,使用反射層以將光限制在作用區域內。In one embodiment, the active area of the pixel (or sub-pixel) is extended to be larger than the microdevice by using a filler (or dielectric). Here, the filler is patterned to define the active area of the pixel (the active area is the area that emits light or absorbs input light). In another embodiment, a reflective layer is used to confine light within the active area.
在一項實施例中,反射層可為微裝置電極之一者。In an embodiment, the reflective layer can be one of the micro device electrodes.
在另一實施例中,作用區域可包括若干子像素或像素。In another embodiment, the active area may include several sub-pixels or pixels.
作用區域之大小可大於、小於或相同於像素(子像素)區域。The size of the active area can be larger, smaller, or the same as the pixel (sub-pixel) area.
在另一實施例中,在將微裝置整合於受體基板中之後,將薄膜光電裝置沈積於受體基板中。In another embodiment, the thin film optoelectronic device is deposited in the acceptor substrate after the micro device is integrated into the acceptor substrate.
在一項實施例中,針對微裝置產生一光學路徑以透過光電裝置之所有或一些層發射(吸收)光。In one embodiment, an optical path is generated for the microdevice to emit (absorb) light through all or some of the layers of the optoelectronic device.
在另一實施例中,微裝置之光學路徑未通過光電裝置之所有或一些層。In another embodiment, the optical path of the microdevice does not pass through all or some of the layers of the optoelectronic device.
在一項實施例中,光電裝置係一薄膜裝置。In one embodiment, the optoelectronic device is a thin film device.
在另一實施例中,使用光電裝置之電極以界定像素(或子像素)之作用區域。In another embodiment, the electrodes of the optoelectronic device are used to define the active area of the pixel (or sub-pixel).
在另一實施例中,至少一個光電裝置電極與微裝置電極共用。In another embodiment, at least one optoelectronic device electrode is shared with the micro device electrode.
在一項實施例中,色彩轉換材料覆蓋表面且部分(或完全)包圍微裝置之主體。In one embodiment, the color conversion material covers the surface and partially (or completely) surrounds the body of the microdevice.
在一項實施例中,堤岸結構分離色彩轉換材料。In one embodiment, the bank structure separates the color conversion material.
在另一實施例中,色彩轉換材料覆蓋表面(及/或部分或完全)覆蓋作用區域(之主體)。In another embodiment, the color conversion material covers the surface (and/or partially or completely) covering the active area (the body).
在一項實施例中,施體基板上之微裝置經圖案化以匹配受體(系統)基板中之陣列結構。在此情況中,施體基板之部分(或全部)中之所有裝置經轉移至受體基板。In one embodiment, the microdevices on the donor substrate are patterned to match the array structure in the receptor (system) substrate. In this case, all of the devices in part (or all) of the donor substrate are transferred to the acceptor substrate.
在另一實施例中,在施體基板中產生通孔(VIA)以將施體基板上之微裝置與受體基板耦合。In another embodiment, a via (VIA) is created in the donor substrate to couple the microdevice on the donor substrate to the acceptor substrate.
在另一實施例中,施體基板具有一個以上微裝置類型且至少在一個方向上,施體基板上之微裝置類型之圖案部分或完全匹配系統基板上之對應區域(或墊)之圖案。In another embodiment, the donor substrate has more than one micro device type and in at least one direction, the pattern of the micro device type on the donor substrate partially or completely matches the pattern of corresponding regions (or pads) on the system substrate.
在另一實施例中,施體基板具有一個以上微裝置類型且至少在一個方向上,施體基板中之不同微裝置類型之間的節距係系統基板上之對應區域(或墊)之節距之一倍數。In another embodiment, the donor substrate has more than one micro device type and in at least one direction, the pitch between different micro device types in the donor substrate is the corresponding region (or pad) segment on the system substrate One multiple of the distance.
在另一實施例中,施體基板具有一個以上微裝置類型。至少在一個方向上,兩個不同微裝置之間的節距匹配受體(或系統)基板上之對應區域(或墊)之節距。In another embodiment, the donor substrate has more than one micro device type. In at least one direction, the pitch between two different microdevices matches the pitch of the corresponding region (or pad) on the receptor (or system) substrate.
在一項實施例中,施體基板上之不同微裝置類型之圖案產生各類型之一二維陣列,其中不同類型之各陣列之間的節距匹配系統基板上之對應區域之節距。In one embodiment, the pattern of different micro device types on the donor substrate produces a two dimensional array of each type, wherein the pitch between the arrays of different types matches the pitch of the corresponding regions on the system substrate.
在另一實施例中,施體基板上之不同微裝置類型之圖案產生一維陣列,其中陣列之節距匹配系統基板上之對應區域(或墊)之節距。In another embodiment, the pattern of different micro device types on the donor substrate produces a one-dimensional array in which the pitch of the array matches the pitch of corresponding regions (or pads) on the system substrate.
圖1展示一受體基板100、接觸墊101a及101b及微裝置102a及102b,其等在附接至受體基板100之一陣列中。微裝置102a及102b已經轉移至其等上之接觸墊101a及101b定位在平行於受體基板100且安裝於受體基板100上之一陣列中。微裝置102a及102b自一施體基板轉移且接合至接觸墊101a及101b。微裝置102a及102b可為通常可按平面批次製造之任何微裝置,包含但不限於LED、OLED、感測器、固態裝置、積體電路、MEMS及/或其他電子組件。1 shows an acceptor substrate 100, contact pads 101a and 101b, and microdevices 102a and 102b that are attached to an array of acceptor substrates 100. The contact pads 101a and 101b to which the microdevices 102a and 102b have been transferred are positioned in an array parallel to the acceptor substrate 100 and mounted on the acceptor substrate 100. Microdevices 102a and 102b are transferred from a donor substrate and bonded to contact pads 101a and 101b. Microdevices 102a and 102b can be any microdevice that can be manufactured in a flat batch, including but not limited to LEDs, OLEDs, sensors, solid state devices, integrated circuits, MEMS, and/or other electronic components.
如在圖2A中描繪,在其中微裝置102a及102b為微LED之一項實施例中,在經接合之微LED 102a及102b上方形成一保形介電層201及一反射層202。在一些實施例中,保形介電層201為約0.1 µm至1 µm厚,且可藉由數個不同薄膜沈積技術之任一者沈積。保形介電層201將微LED 102a及102b之側壁與反射層202隔離。另外,介電層201鈍化且保護微LED 102a及102b之側壁。保形介電層201亦可覆蓋相鄰微LED裝置102a及102b之間的受體基板100之頂部表面。保形反射層202可經沈積於介電層201上方。反射層202可為一單一層或由多個層組成。各種導電材料可用作反射層202。在一些實施例中,保形反射層202可為具有高達0.5 µm之一總厚度之一金屬雙層。As depicted in FIG. 2A, in one embodiment in which the micro devices 102a and 102b are micro-LEDs, a conformal dielectric layer 201 and a reflective layer 202 are formed over the bonded micro-LEDs 102a and 102b. In some embodiments, the conformal dielectric layer 201 is about 0.1 μm to 1 μm thick and can be deposited by any of a number of different thin film deposition techniques. The conformal dielectric layer 201 isolates the sidewalls of the micro-LEDs 102a and 102b from the reflective layer 202. Additionally, dielectric layer 201 passivates and protects the sidewalls of micro-LEDs 102a and 102b. The conformal dielectric layer 201 can also cover the top surface of the acceptor substrate 100 between adjacent micro LED devices 102a and 102b. The conformal reflective layer 202 can be deposited over the dielectric layer 201. The reflective layer 202 can be a single layer or composed of multiple layers. Various conductive materials can be used as the reflective layer 202. In some embodiments, the conformal reflective layer 202 can be a metal bilayer having one of a total thickness of up to 0.5 μm.
參考圖2B,可接著藉由使用(例如)微影圖案化及蝕刻而圖案化介電層201及反射層202以部分曝露微LED 102a及102b之頂部表面。在其中微LED 102a及102b整合於一顯示器系統之一背板中(亦參考圖2C)之一項實施例中,可在相鄰微LED 102a及102b之間且在反射層202上形成一黑色矩陣203以降低環境光之反射。在一個實例中,黑色矩陣203可為一樹脂層(諸如聚醯亞胺或聚丙烯酸),其中已分散有黑色顏料(諸如碳黑)之顆粒。在一些實施例中,黑色矩陣層203之厚度可為0.01 µm至2 µm。黑色矩陣層203可經圖案化及蝕刻以曝露微LED 102a及102b之頂部表面,如在圖2C中展示。視情況,黑色矩陣203之厚度可經設計以平坦化整合基板100。在另一實施例中,可由有機絕緣材料製成之一平坦化層經形成及圖案化以平坦化背板基板。Referring to FIG. 2B, dielectric layer 201 and reflective layer 202 can then be patterned to partially expose the top surfaces of micro-LEDs 102a and 102b by, for example, lithographic patterning and etching. In an embodiment in which the micro-LEDs 102a and 102b are integrated in a backplane of a display system (see also FIG. 2C), a black can be formed between adjacent micro-LEDs 102a and 102b and on reflective layer 202. Matrix 203 is used to reduce the reflection of ambient light. In one example, the black matrix 203 may be a resin layer (such as polyimine or polyacrylic acid) in which particles of a black pigment such as carbon black have been dispersed. In some embodiments, the black matrix layer 203 may have a thickness of 0.01 μm to 2 μm. The black matrix layer 203 can be patterned and etched to expose the top surfaces of the micro-LEDs 102a and 102b, as shown in Figure 2C. Optionally, the thickness of the black matrix 203 can be designed to planarize the integrated substrate 100. In another embodiment, a planarization layer, which may be made of an organic insulating material, is formed and patterned to planarize the backplane substrate.
參考圖3A,可在基板100上方保形沈積一透明導電層301,從而覆蓋黑色矩陣203及微LED 102a及102b之頂部表面。在一些實施例中,透明電極301可為0.1 um至1 um厚之氧化物層,包含(但不限於)铟锡氧化物(ITO)及摻雜鋁之氧化鋅。在其中整合總成係一顯示結構之一情況中,透明電極301可為微LED裝置102a及102b之共同電極。Referring to FIG. 3A, a transparent conductive layer 301 can be conformally deposited over the substrate 100 to cover the black matrix 203 and the top surfaces of the micro LEDs 102a and 102b. In some embodiments, the transparent electrode 301 can be an oxide layer of 0.1 um to 1 um thick, including but not limited to indium tin oxide (ITO) and aluminum-doped zinc oxide. In the case where one of the display structures is integrated, the transparent electrode 301 can be a common electrode of the micro LED devices 102a and 102b.
視情況,反射層202可用作透明電極301之一導電率增強劑。在此情況中,反射層202之部分可不使用黑色矩陣203或其他平坦化層覆蓋,使得透明電極層301可連接至反射層202。The reflective layer 202 may be used as one of the conductivity enhancers of the transparent electrode 301, as the case may be. In this case, portions of the reflective layer 202 may not be covered with a black matrix 203 or other planarization layer such that the transparent electrode layer 301 may be connected to the reflective layer 202.
在圖3B中展示之另一實施例中,可在基板100上形成反射或其他類型之光學組件302以增強由微裝置102a及102b產生之光之輸出耦合。共同接觸件301係透明的以容許光透過此層輸出。此等結構可稱為頂部發射結構。In another embodiment, shown in FIG. 3B, a reflective or other type of optical component 302 can be formed on substrate 100 to enhance the output coupling of light generated by microdevices 102a and 102b. The common contact 301 is transparent to allow light to pass through this layer output. Such structures may be referred to as top emission structures.
參考圖3C,接觸墊101a及101b可形成以具有一凹形或其他形狀結構以增強由微裝置102a及102b產生之光之輸出耦合。接觸墊101a及101b之形式不限於凹形形式且可取決於微裝置光發射特性而具有其他形式。Referring to FIG. 3C, contact pads 101a and 101b can be formed to have a concave or other shape structure to enhance the output coupling of light generated by microdevices 102a and 102b. The form of the contact pads 101a and 101b is not limited to the concave form and may have other forms depending on the light emitting characteristics of the micro device.
在一實施例中,參考圖3D,結構經設計以從基板100輸出光。在此等底部發射結構中,基板100可為透明的且共同電極303經設計為反射性以用於更佳光提取。In an embodiment, referring to FIG. 3D, the structure is designed to output light from the substrate 100. In such bottom emission structures, substrate 100 can be transparent and common electrode 303 is designed to be reflective for better light extraction.
在圖3E中展示之另一實施例中,反射層202可經延展以覆蓋微裝置102a及102b且亦充當共同頂部電極。In another embodiment, shown in FIG. 3E, reflective layer 202 can be extended to cover microdevices 102a and 102b and also serve as a common top electrode.
參考圖4A,在另一實施例中,可在形成反射層202之前沈積且圖案化介電層201,此可容許微LED 102a及102b與反射層202之間的一直接接觸。因此,反射層202可用作微裝置102a及102b之一共同頂部接觸件。可使用黑色矩陣203或替代地一平坦化層。Referring to FIG. 4A, in another embodiment, the dielectric layer 201 can be deposited and patterned prior to forming the reflective layer 202, which can permit a direct contact between the micro LEDs 102a and 102b and the reflective layer 202. Thus, reflective layer 202 can be used as a common top contact for micro devices 102a and 102b. A black matrix 203 or alternatively a planarization layer can be used.
參考圖4B,在其他實施例中,可在基板100之頂部上沈積一共同透明電極301及/或其他光學層以增強導電率及/或光輸出耦合。Referring to FIG. 4B, in other embodiments, a common transparent electrode 301 and/or other optical layers may be deposited on top of the substrate 100 to enhance conductivity and/or light output coupling.
微光電裝置之主要挑戰之一者係相鄰微裝置102a與102b之間的空白空間。具有此結構特性之顯示系統可產生稱為「紗門效應」之一影像假影。在一項實施例中,微裝置大小可在光學上延展以相同於或大於微裝置大小。在圖5中展示之一項實施例中,在將微裝置102a及102b之陣列自施體轉移至受體基板100之後,可沈積且圖案化一透明填料501以界定像素(或子像素)。在一項實施例中,填料501之大小可為一像素(或子像素)區域中可能的較小或最大之大小。在另一實例中,填料501大小可大於像素或子像素區域。填料501可具有與系統基板100上之像素區域不同或類似之一形狀。可接著應用圖3及圖4中提及之程序以改良自微裝置102a及102b之光提取。One of the main challenges of micro-optical devices is the empty space between adjacent micro-devices 102a and 102b. A display system having this structural characteristic produces an image artifact called "the screen door effect". In one embodiment, the micro device size can be optically extended to be the same or larger than the micro device size. In one embodiment shown in FIG. 5, after transferring the array of microdevices 102a and 102b from the donor to the acceptor substrate 100, a transparent filler 501 can be deposited and patterned to define the pixels (or sub-pixels). In one embodiment, the size of the filler 501 can be a small or largest size possible in a pixel (or sub-pixel) region. In another example, the filler 501 can be larger in size than a pixel or sub-pixel region. Filler 501 can have a shape that is different or similar to the pixel area on system substrate 100. The procedures mentioned in Figures 3 and 4 can then be applied to improve light extraction from the micro devices 102a and 102b.
參考圖6A,在其中像素601包括兩個子像素601a及601b之一實施例中,填料501經圖案化以界定像素601之作用區域(作用區域係定義為顯示器自其發射光之區域)。此處,作用區域之大小可小於、大於或相同於像素(子像素)區域。如在圖6B、圖6C及圖6D中展示,可應用圖2及圖3中提及之程序。此組態管理歸因於子像素601a與601b之間的分離之邊緣處之變色。Referring to FIG. 6A, in an embodiment in which pixel 601 includes two sub-pixels 601a and 601b, filler 501 is patterned to define an active area of pixel 601 (the active area is defined as the area from which the display emits light). Here, the size of the active area may be smaller, larger or the same as the pixel (sub-pixel) area. As shown in Figures 6B, 6C, and 6D, the procedures mentioned in Figures 2 and 3 can be applied. This configuration management is attributed to the discoloration at the edges of the separation between the sub-pixels 601a and 601b.
參考圖6B,可在像素601周圍形成一介電層201及一反射層202。Referring to FIG. 6B, a dielectric layer 201 and a reflective layer 202 may be formed around the pixel 601.
亦參考圖6C,可在相鄰像素601之間且在各子像素601a及601b周圍形成一黑色矩陣203以降低環境光之反射。Referring also to FIG. 6C, a black matrix 203 may be formed between adjacent pixels 601 and around each of the sub-pixels 601a and 601b to reduce reflection of ambient light.
參考圖6D,可在基板100之頂部上沈積一透明導電層301,從而覆蓋黑色矩陣203及微LED 601a及601b之頂部表面。Referring to FIG. 6D, a transparent conductive layer 301 may be deposited on top of the substrate 100 to cover the black matrix 203 and the top surfaces of the micro LEDs 601a and 601b.
在圖6E中展示之另一實施例中,可在基板100上形成反射或其他光學組件602以增強由微裝置601a及601b產生之光之輸出耦合。共同接觸件301係透明的以使光透過此層輸出。此等結構可稱為頂部發射結構。In another embodiment, shown in FIG. 6E, a reflective or other optical component 602 can be formed on substrate 100 to enhance the output coupling of light generated by microdevices 601a and 601b. The common contact 301 is transparent to allow light to pass through this layer for output. Such structures may be referred to as top emission structures.
參考圖6F,接觸墊101a及101b可經形成以具有一凹形結構以增強由微裝置101a及101b產生之光之輸出耦合。接觸墊101a及101b之形式不限於凹形形式且可取決於微裝置光發射特性而具有其他形式。Referring to FIG. 6F, contact pads 101a and 101b can be formed to have a concave structure to enhance the output coupling of light generated by microdevices 101a and 101b. The form of the contact pads 101a and 101b is not limited to the concave form and may have other forms depending on the light emitting characteristics of the micro device.
參考圖6G,在另一實施例中,結構經設計以從基板100輸出光。在此等底部發射結構中,基板100可為透明的且共同電極303可包括一反射材料一用於更佳光提取。Referring to FIG. 6G, in another embodiment, the structure is designed to output light from the substrate 100. In such bottom emission structures, substrate 100 can be transparent and common electrode 303 can include a reflective material for better light extraction.
在圖6H中展示之另一實施例中,反射層202可經延展以覆蓋微裝置601a及602b且亦充當共同頂部電極。In another embodiment, shown in FIG. 6H, reflective layer 202 can be extended to cover microdevices 601a and 602b and also serve as a common top electrode.
在其他實施例中,前述像素界定結構可覆蓋一個以上像素(或子像素) 601a及601b。In other embodiments, the aforementioned pixel delimiting structure may cover more than one pixel (or sub-pixel) 601a and 601b.
在另一情況中,可使用接收基板100上之一反射層或接觸墊101a及101b以覆蓋接收基板100且在轉移微裝置601a及601b之前產生一反射區域以用於更佳光輸出耦合。In another case, a reflective layer or contact pads 101a and 101b on the receiving substrate 100 can be used to cover the receiving substrate 100 and produce a reflective region for better light output coupling prior to transferring the micro devices 601a and 601b.
在所有前述實施例中,反射層亦可為不透明的。另外,反射層可用作微裝置601a及601b之電極之一者或用作系統基板連接之一者(電極、信號或電力線)。在另一實施例中,反射層可用作一觸控電極。可圖案化反射層以充當一觸控螢幕電極。在一個情況中,其等可在垂直及水平方向上圖案化以形成觸控螢幕交叉電極。在此情況中,吾人可使用垂直及水平跡線之間的一介電質。混合結構 In all of the foregoing embodiments, the reflective layer may also be opaque. Alternatively, the reflective layer can be used as one of the electrodes of the micro devices 601a and 601b or as one of the system substrate connections (electrodes, signals or power lines). In another embodiment, the reflective layer can be used as a touch electrode. The reflective layer can be patterned to act as a touch screen electrode. In one case, they can be patterned in the vertical and horizontal directions to form a touch screen crossing electrode. In this case, we can use a dielectric between the vertical and horizontal traces. Mixed structure
在另一實施例中,在微裝置801之一陣列已經轉移至受體基板100之後,將一薄膜光電裝置904整合於受體基板100中。In another embodiment, a thin film optoelectronic device 904 is integrated into the acceptor substrate 100 after an array of micro devices 801 has been transferred to the acceptor substrate 100.
圖7繪示受體基板100及下電極接觸件或接合墊702a及702b(微裝置801陣列經轉移至其等上且在數個混合結構實施例中,一薄膜光電裝置904經整合於其等中)。7 illustrates the acceptor substrate 100 and the lower electrode contacts or bond pads 702a and 702b (the array of micro devices 801 is transferred thereto or the like, and in several hybrid structure embodiments, a thin film optoelectronic device 904 is integrated therein, etc. in).
參考圖8,可將微裝置801之一者轉移且接合至受體基板100之接合墊702a。在一個情況中,如在圖9中展示,可在受體基板100上方形成一介電層901以覆蓋曝露之電極702a及702b及任何其他導電層。可使用微影術及蝕刻來圖案化介電層901。接著沈積且圖案化一導電層902以形成薄膜光電裝置904之一底部電極。若底部電極902與受體基板100中之其他導電層之間不存在非所要耦合之風險,則可消除介電層901。然而,介電層901亦可充當一平坦層以提供光電裝置904之更佳製造。Referring to FIG. 8, one of the micro devices 801 can be transferred and bonded to the bond pads 702a of the acceptor substrate 100. In one case, as shown in FIG. 9, a dielectric layer 901 can be formed over the acceptor substrate 100 to cover the exposed electrodes 702a and 702b and any other conductive layers. The dielectric layer 901 can be patterned using lithography and etching. A conductive layer 902 is then deposited and patterned to form one of the bottom electrodes of the thin film photovoltaic device 904. If there is no risk of undesired coupling between the bottom electrode 902 and other conductive layers in the acceptor substrate 100, the dielectric layer 901 can be eliminated. However, dielectric layer 901 can also serve as a planar layer to provide better fabrication of optoelectronic device 904.
仍參考圖9,可在受體基板100上例如在介電層901及微裝置801上方沈積一堤岸層903以覆蓋底部電極902及微裝置801之邊緣。可接著在堤岸層903及底部電極902結構上方形成薄膜光電裝置904。有機LED (OLED)裝置係此一薄膜光電裝置904之一實例,其可使用不同技術形成,諸如但不限於陰影遮罩、微影術及印刷圖案化。最後,視需要沈積且圖案化光電薄膜裝置904之一頂部電極905。Still referring to FIG. 9, a bank layer 903 may be deposited over the acceptor substrate 100, such as over the dielectric layer 901 and the micro device 801, to cover the edges of the bottom electrode 902 and the micro device 801. A thin film photovoltaic device 904 can then be formed over the bank layer 903 and the bottom electrode 902 structure. An organic LED (OLED) device is an example of such a thin film photovoltaic device 904 that can be formed using different techniques such as, but not limited to, shadow masking, lithography, and print patterning. Finally, a top electrode 905 of one of the photovoltaic thin film devices 904 is deposited and patterned as needed.
在其中微裝置801之厚度極高之一實施例中,底部電極902內可出現裂縫或其他結構問題。在此等實施例中,一平坦化層903可結合介電層901或在無介電層901的情況下使用來解決此問題。In embodiments where the thickness of the microdevice 801 is extremely high, cracks or other structural problems may occur within the bottom electrode 902. In such embodiments, a planarization layer 903 can be used in conjunction with dielectric layer 901 or in the absence of dielectric layer 901 to address this problem.
在圖10中展示之另一實施例中,微裝置801可具有一上裝置電極1001。上裝置電極1001在系統基板100中或上之其他微裝置801之間可係共同的。在此情況中,平坦化層901 (若存在)及/或堤岸結構903覆蓋上裝置電極1001以將上電極1001與光電薄膜裝置904及頂部及底部電極902、905絕緣,以避免光電裝置904與裝置電極1001之間的任何短路。In another embodiment, shown in FIG. 10, the microdevice 801 can have an upper device electrode 1001. Upper device electrode 1001 may be common between other micro devices 801 in or on system substrate 100. In this case, the planarization layer 901 (if present) and/or the bank structure 903 overlies the upper device electrode 1001 to insulate the upper electrode 1001 from the photo-film device 904 and the top and bottom electrodes 902, 905 to avoid optoelectronic device 904 and Any short circuit between device electrodes 1001.
參考圖11,在一項實施例中,薄膜光電裝置904之頂部電極905可透過堤岸(平坦化)層903及光電薄膜裝置904中之一開口1005連接至微裝置801。在此情況中,光電薄膜裝置904可選擇性地形成使得其並不覆蓋開口1005。Referring to FIG. 11, in one embodiment, the top electrode 905 of the thin film photovoltaic device 904 can be coupled to the micro device 801 through a bank (planarization) layer 903 and one of the openings 1005 of the photovoltaic device 904. In this case, the photo film device 904 can be selectively formed such that it does not cover the opening 1005.
在另一情況中,微裝置801之下電極702a可在薄膜光電裝置904與經轉移微裝置801之間共用。In another case, the lower electrode 702a of the microdevice 801 can be shared between the thin film optoelectronic device 904 and the transferred micro device 801.
參考圖12,在另一實例中,薄膜光電裝置904之底部電極902可在微裝置801上方延伸,使得薄膜光電裝置904可疊置在微裝置801上方或周圍。若微裝置801需要具有通過其頂部電極1001至外部之一透明路徑,則底部電極902 (若不透明)需要在微裝置801上方具有一開口(例如,如圖13A中結合另一實施例展示)。在此情況中,可亦由堤岸層903覆蓋開口。開口不限於圖12中繪示之特定結構且可使用不同方法產生。Referring to FIG. 12, in another example, the bottom electrode 902 of the thin film optoelectronic device 904 can extend over the micro device 801 such that the thin film optoelectronic device 904 can be stacked over or around the micro device 801. If the micro device 801 needs to have a transparent path through its top electrode 1001 to the outside, the bottom electrode 902 (if opaque) needs to have an opening above the micro device 801 (e.g., as shown in Figure 13A in conjunction with another embodiment). In this case, the opening may also be covered by the bank layer 903. The opening is not limited to the particular structure depicted in Figure 12 and can be produced using different methods.
仍參考圖12,若下電極702a係透明的,則微裝置801可具有通過基板100之一透明路徑。在其中需要通過上電極1001之一透明路徑之一情況中,底部電極902及微裝置上電極1001需要係透明的或需要上電極1001及底部電極902之一者或兩者中之開口與上電極1001及底部電極902之一者或兩者中之透明度之一組合。Still referring to FIG. 12, if the lower electrode 702a is transparent, the micro device 801 can have a transparent path through the substrate 100. In the case where one of the transparent paths through the upper electrode 1001 is required, the bottom electrode 902 and the micro device upper electrode 1001 need to be transparent or require one or both of the upper electrode 1001 and the bottom electrode 902 and the upper electrode and the upper electrode One of 1001 and bottom electrode 902 or one of the transparency in both.
圖13A展示一佈局結構,其中底部電極902具有一開口1301以容許通至頂部電極905之一透明路徑。開口1301亦可延伸穿過共同頂部電極905之堤岸層903。若不存在共同頂部電極905且若堤岸層903係透明的,則不需要堤岸層903中之開口1301。在一些實施例中,若頂部電極905亦係不透明的,則亦需要頂部電極905中之開口1301以用於頂部發射。FIG. 13A shows a layout structure in which the bottom electrode 902 has an opening 1301 to allow access to one of the transparent paths of the top electrode 905. The opening 1301 can also extend through the bank layer 903 of the common top electrode 905. If the common top electrode 905 is not present and if the bank layer 903 is transparent, the opening 1301 in the bank layer 903 is not required. In some embodiments, if the top electrode 905 is also opaque, the opening 1301 in the top electrode 905 is also required for top emission.
參考圖13B,在另一實施例中,為提供微裝置801之一透明路徑,底部電極902不覆蓋微裝置801。針對一共同頂部電極905,堤岸層903中可存在一開口1301。若不存在共同頂部電極905且堤岸層903係透明的,則不需要堤岸層903中之開口1301。Referring to FIG. 13B, in another embodiment, to provide a transparent path for the micro device 801, the bottom electrode 902 does not cover the micro device 801. For a common top electrode 905, an opening 1301 may be present in the bank layer 903. If the common top electrode 905 is not present and the bank layer 903 is transparent, the opening 1301 in the bank layer 903 is not required.
在另一情況中,薄膜光電裝置904之接觸墊結構702b可延伸以充當反射層。如在圖14A中可見,具有接觸件702b之兩個並排像素可用來側向限制由像素中之微裝置801產生之光。在圖14B中展示之另一實施例中,安裝於基板100之一頂部表面上之一反射層1401可反射更多光朝向頂部電極905。因此,增強由微裝置801產生之光之輸出耦合。在此情況中,最佳實踐係使薄膜光電裝置904之頂部及底部電極902及905透明,或在電極902及905係不透明之情況下製成開口。In another case, the contact pad structure 702b of the thin film optoelectronic device 904 can extend to act as a reflective layer. As can be seen in Figure 14A, two side-by-side pixels with contacts 702b can be used to laterally limit the light generated by the micro-devices 801 in the pixels. In another embodiment, shown in FIG. 14B, one of the reflective layers 1401 mounted on one of the top surfaces of the substrate 100 can reflect more light toward the top electrode 905. Thus, the output coupling of the light generated by the micro device 801 is enhanced. In this case, the best practice is to make the top and bottom electrodes 902 and 905 of the thin film photovoltaic device 904 transparent, or to make openings if the electrodes 902 and 905 are opaque.
在另一實施例中,薄膜光電裝置904及微裝置801可在系統基板100之兩個相對側上。在此情況中,系統基板電路可在系統基板100之一個側上且透過接觸孔連接至另一側,或電路可在系統基板100之兩個側上。In another embodiment, thin film optoelectronic device 904 and micro device 801 can be on opposite sides of system substrate 100. In this case, the system substrate circuit may be connected to one side on one side of the system substrate 100 and through the contact hole, or the circuit may be on both sides of the system substrate 100.
在另一情況中,微裝置801可在系統基板100上且薄膜光電裝置904在另一系統基板上。此兩個基板可接著經接合在一起。在此情況中,電路可在系統基板之一者上或兩個基板上。In another case, the micro device 801 can be on the system substrate 100 and the thin film optoelectronic device 904 on another system substrate. The two substrates can then be joined together. In this case, the circuit can be on one of the system substrates or on both substrates.
圖14C及圖14D展示其中微裝置(LED) 801及薄膜光電裝置904經整合以產生一半導體裝置之不同結構。此處,使用理想地安裝於基板100上沿著基板100在微裝置801及薄膜光電裝置904兩者下方延伸之一反射或光限制結構5601以引導微裝置801之光輸出。反射結構5601可與微裝置電極702a相同或可使用一單獨電極702a。如在圖14D中展示,從接觸墊702b延伸至平行於光電裝置904之一主要平坦區段902b之底部電極902之一第一部分902a可包括能夠用作一光限制或反射結構之一反射材料,其用於將光引導在所要方向上(例如,穿過基板100或頂部電極905)且防止光進入相鄰像素。可首先沈積底部電極902之第一部分902a,接著可在主要平坦區段902b之後沈積底部電極之剩餘部分902b或第一部分902a。又,其他電極可經沈積以連接微裝置801。理想地,薄膜光電裝置904之底部及頂部電極902及905兩者係透明的,使得來自微裝置801及光電裝置904之光經發射穿過頂部電極905。未向外發射之任何離散光可藉由反射結構5601及902a向外重導引穿過頂部電極905。可在堤岸結構903之間形成光電裝置904,堤岸結構903可替代地為黑色矩陣。在光電裝置904之後,可整合(諸如囊封)其他結構。14C and 14D show different structures in which micro device (LED) 801 and thin film optoelectronic device 904 are integrated to produce a semiconductor device. Here, a light reflection or light confinement structure 5601 extending under the microdevice 801 and the thin film optoelectronic device 904 along the substrate 100 is ideally mounted on the substrate 100 to direct the light output of the micro device 801. Reflective structure 5601 can be the same as microdevice electrode 702a or a separate electrode 702a can be used. As shown in FIG. 14D, the first portion 902a extending from the contact pad 702b to the bottom electrode 902 parallel to one of the major planar sections 902b of the optoelectronic device 904 can include a reflective material that can function as one of a light confining or reflective structure, It is used to direct light in a desired direction (eg, through substrate 100 or top electrode 905) and to prevent light from entering adjacent pixels. The first portion 902a of the bottom electrode 902 can be deposited first, and then the remaining portion 902b or first portion 902a of the bottom electrode can be deposited after the main flat portion 902b. Also, other electrodes may be deposited to connect the micro device 801. Ideally, both the bottom and top electrodes 902 and 905 of the thin film photovoltaic device 904 are transparent such that light from the microdevice 801 and the optoelectronic device 904 is emitted through the top electrode 905. Any discrete light that is not emitted outward may be redirected outwardly through the top electrode 905 by reflective structures 5601 and 902a. Optoelectronic devices 904 may be formed between the bank structures 903, which may alternatively be black matrices. After optoelectronic device 904, other structures may be integrated (such as encapsulated).
圖14E、圖14F及圖14G描述其中光電裝置904及微裝置801並排在基板100上之另一結構。此處,將微裝置801轉移至系統基板100。沈積且圖案化一平坦化層903 (或堤岸層)以敞開光電裝置904之一區域。使用不同可能方法(諸如氣相沈積、印刷等)沈積光電裝置904。接著,在光電裝置904及微裝置801之頂部上方沈積頂部電極905。此處,可在頂部電極905之後沈積其他結構。光可通過頂部電極905或系統基板100。在圖14E中描述之一個結構中,微裝置801及光電裝置905具有相同頂部電極905。在圖14F中描述之另一結構中,微裝置801具有由鈍化(介電)層903覆蓋之一單獨上電極5620。此處,在薄膜光電裝置904及微裝置801兩者上方延伸之頂部電極905可用作一光限制/反射結構以導引來自微裝置801及薄膜光電裝置904之光穿過系統基板100。在圖14G中展示之另一實例中,共用頂部電極905;然而,鈍化/平坦化層903在5622處圖案化為一或多個凹形結構以產生用於將光引導在所要方向上(例如,返回穿過基板100)之一或多個光限制/反射結構。此處,可使用一單獨層來在沈積頂部電極905之前產生光限制結構。14E, 14F, and 14G depict another structure in which the photovoltaic device 904 and the micro device 801 are side by side on the substrate 100. Here, the micro device 801 is transferred to the system substrate 100. A planarization layer 903 (or bank layer) is deposited and patterned to open an area of the optoelectronic device 904. Photovoltaic device 904 is deposited using different possible methods, such as vapor deposition, printing, and the like. Next, a top electrode 905 is deposited over the top of the optoelectronic device 904 and the micro device 801. Here, other structures may be deposited after the top electrode 905. Light can pass through the top electrode 905 or the system substrate 100. In one configuration depicted in Figure 14E, microdevice 801 and optoelectronic device 905 have the same top electrode 905. In another configuration depicted in FIG. 14F, the microdevice 801 has a single upper electrode 5620 covered by a passivated (dielectric) layer 903. Here, the top electrode 905 extending over both the thin film photovoltaic device 904 and the micro device 801 can be used as a light confining/reflecting structure to guide light from the micro device 801 and the thin film photovoltaic device 904 through the system substrate 100. In another example shown in FIG. 14G, the top electrode 905 is shared; however, the passivation/planarization layer 903 is patterned at 5562 as one or more concave structures to create a guide for directing light in a desired direction (eg, Returning through one or more of the light confining/reflecting structures of the substrate 100). Here, a separate layer can be used to create a light confinement structure prior to deposition of the top electrode 905.
在此處描述之所有結構中,微裝置801之(若干)接觸電極702a可在微裝置801轉移至系統基板100之後沈積,或一接觸件702a可在轉移程序之前預先存在。在微裝置801之前可存在一平坦化層901或903,且可在系統基板100上安裝其他裝置以改良表面輪廓。在此情況中,可存在將微裝置801連接至系統基板100中之其他元件之開口。In all of the configurations described herein, the contact electrode(s) 702a of the microdevice 801 can be deposited after the microdevice 801 is transferred to the system substrate 100, or a contact 702a can be pre-existing prior to the transfer procedure. A planarization layer 901 or 903 may be present prior to the microdevice 801, and other devices may be mounted on the system substrate 100 to improve the surface profile. In this case, there may be openings that connect the microdevice 801 to other components in the system substrate 100.
可組合前文描述之結構。例如,可混合光限制或提取結構及混合裝置。The structure described above can be combined. For example, light confinement or extraction structures and mixing devices can be mixed.
在此處圖9至圖14中描述之混合裝置中,薄膜發光裝置結構904可包含一彩色濾光器。在使用彩色濾光器之情況中,來自微裝置801之光需要經過薄膜發光裝置結構904且穿過彩色濾光器。In the hybrid device depicted in Figures 9-14 herein, the thin film light emitting device structure 904 can include a color filter. In the case of a color filter, light from the microdevice 801 needs to pass through the thin film illumination device structure 904 and through the color filter.
圖14H及圖14I展示將微裝置801與一彩色濾光器5810及光電裝置904整合之兩個實例。在此情況中,光通過系統基板100。在沈積彩色濾光器5810、定位接合墊702a及702b且轉移微裝置801及上電極1001(可改變此等步驟之順序)之後,可視需要沈積一平坦化(例如,介電)層901。可在各先前步驟之後沈積兩個或三個不同平坦化層。接著,分別沈積且形成光電裝置904及底部及頂部電極902及905。此處,微裝置801可在轉移之前包含一光限制結構(此亦可用於此文件中之其他結構)。又,如在圖14I中展示,光限制結構可在轉移微裝置801之後形成。在所繪示之實施例中,光限制具有一鈍化層5814 (藉此與微裝置801及上電極1001絕緣)及形成為用於將光反射在一所要方向上(例如,穿過基板100)之一凹形結構之一反射層5812。14H and 14I show two examples of integrating microdevice 801 with a color filter 5810 and optoelectronic device 904. In this case, light passes through the system substrate 100. After depositing color filter 5810, locating bond pads 702a and 702b, and transferring microdevice 801 and upper electrode 1001 (the order of which may be changed), a planarized (e.g., dielectric) layer 901 may be deposited as desired. Two or three different planarization layers can be deposited after each previous step. Next, photovoltaic device 904 and bottom and top electrodes 902 and 905 are separately deposited and formed. Here, the micro device 801 can include a light confinement structure (this can also be used for other structures in this document) prior to transfer. Again, as shown in FIG. 14I, the light confinement structure can be formed after transferring the micro device 801. In the illustrated embodiment, the light confinement has a passivation layer 5814 (here insulated from the microdevice 801 and the upper electrode 1001) and is formed to reflect light in a desired direction (eg, through the substrate 100) One of the concave structures is a reflective layer 5812.
圖14J展示將微裝置801與光電裝置904及安裝於光電裝置904及頂部電極905上方之彩色濾光器5810整合之另一實例。所有上述結構(諸如光限制結構)在此實例中可配合微裝置801及光電裝置904使用。此處,光通過透明頂部電極905。此結構中,頂部電極905與彩色濾光器5810之間可存在一(或若干)透明保護層5910。整合 14J shows another example of integrating microdevice 801 with optoelectronic device 904 and color filter 5810 mounted over optoelectronic device 904 and top electrode 905. All of the above structures, such as light confinement structures, can be used with microdevice 801 and optoelectronic device 904 in this example. Here, light passes through the transparent top electrode 905. In this configuration, one (or several) transparent protective layers 5910 may be present between the top electrode 905 and the color filter 5810. Integration
此文件亦揭示用於將一單體微裝置陣列整合於一系統基板中或將一微裝置陣列選擇性轉移至一系統基板之各種方法。此處,所提出之程序分為兩個類別。在第一類別中,系統基板上之接合墊之節距與微裝置之接合墊之節距相同。在第二類別中,系統基板上之接合墊具有大於微裝置之接合墊之一節距。針對第一類別,呈現三個不同整合或轉移方案 1.前側接合 2.後側接合 3.貫穿基板通孔接合。This document also discloses various methods for integrating a single microdevice array into a system substrate or selectively transferring a micro device array to a system substrate. Here, the proposed procedure is divided into two categories. In the first category, the pitch of the bond pads on the system substrate is the same as the pitch of the bond pads of the micro device. In the second category, the bond pads on the system substrate have a pitch that is greater than one of the bond pads of the micro device. For the first category, three different integration or transfer schemes are presented 1. Front side joint 2. Back side joint 3. Through substrate through hole joint.
在此實施例中,微裝置在功能性方面可具有相同類型或不同類型。在一項實施例中,微裝置係具有相同色彩或具有數個不同色彩(例如,紅色、綠色及藍色)之微LED,且系統基板係背板,從而控制個別微LED。此等多色LED陣列直接製造在一基板上或自生長基板轉移至一臨時基板。在圖15中展示之一個實例中,在一犧牲/緩衝層1502及基板1501上生長RGB微LED裝置1503、1504及1505。在一個情況中,具有接觸墊1507之系統基板1506可對準(圖16)且接合至微裝置基板1501,如在圖17中展示。在移除微裝置基板1501 (圖18)及犧牲/緩衝層1502 (圖19)之後,可在整合樣本上(圖20)旋塗/沈積一填料介電塗層2001 (例如,聚醯亞胺光阻劑)。此步驟之後可進行一蝕刻程序以揭露微LED裝置之頂部。在微LED裝置之情況中,可在樣本上沈積一共同透明電極2002。在另一實施例中,可沈積且圖案化一頂部電極以隔離微裝置以用於後續程序。In this embodiment, the micro devices may be of the same type or different types in terms of functionality. In one embodiment, the microdevices are micro LEDs having the same color or having a plurality of different colors (eg, red, green, and blue), and the system substrate is a backplane to control the individual micro LEDs. These multi-color LED arrays are fabricated directly on a substrate or transferred from a growth substrate to a temporary substrate. In one example shown in FIG. 15, RGB micro-LED devices 1503, 1504, and 1505 are grown on a sacrificial/buffer layer 1502 and substrate 1501. In one case, system substrate 1506 having contact pads 1507 can be aligned (FIG. 16) and bonded to microdevice substrate 1501, as shown in FIG. After removing the microdevice substrate 1501 (Fig. 18) and the sacrificial/buffer layer 1502 (Fig. 19), a filler dielectric coating 2001 (e.g., polyimine) can be spin coated/deposited on the integrated sample (Fig. 20). Photoresist). An etching process can be performed after this step to expose the top of the micro LED device. In the case of a micro LED device, a common transparent electrode 2002 can be deposited on the sample. In another embodiment, a top electrode can be deposited and patterned to isolate the microdevice for subsequent processing.
在另一實施例中,如在圖21中展示,在一緩衝/犧牲層1502上生長微裝置1503、1504及1505。在基板上沈積/旋塗一介電填料層2101以完全覆蓋微裝置。在圖21中繪示之一個實例中,此步驟之後可進行一蝕刻程序以揭露微裝置1503、1504及1505之頂部以形成頂部共同接觸件及晶種層以用於後續程序(例如,電鍍)。參考圖22,接著在樣本之頂部上沈積、生長或接合一厚機械支撐層2102。此處,填料層2101可為一黑色矩陣層或一反射材料。又,在沈積機械支撐件之前,吾人可沈積一電極(作為一經圖案化或一共同層)。接著沈積機械支撐層。在光電裝置(諸如LED)的情況中,機械支撐層需要係透明的。如在圖23及圖24中展示,接著使用各種程序(諸如雷射剝離或蝕刻)來移除微裝置基板1501。在一個情況中,基板之厚度最初藉由諸如(但不限於)深反應性離子蝕刻(DRIE) 之程序減小至幾微米。接著,藉由諸如(但不限於)一濕式化學蝕刻程序之程序移除剩餘基板。在此情況中,緩衝/犧牲層1502可充當一蝕刻停止層以確保一均勻蝕刻子表面且避免對微裝置之任何損害。在移除緩衝層1502之後,如在圖24中展示,執行另一蝕刻(例如,RIE)以曝露微裝置。吾人可沈積且圖案化一金屬層以在微裝置之上接觸件及接合墊在微裝置製造期間尚未形成之情況下充當該等上接觸件及接合墊。接著可將具有接觸墊1507之系統基板1506對準且接合微裝置陣列,如在圖25中展示。取決於微裝置之類型及功能性,可接著移除機械支撐層2102及填料層2101,如在圖26A及圖26B中展示。In another embodiment, as shown in FIG. 21, micro devices 1503, 1504, and 1505 are grown on a buffer/sacrificial layer 1502. A dielectric filler layer 2101 is deposited/spin on the substrate to completely cover the microdevice. In one example depicted in FIG. 21, an etch process can be performed after this step to expose the tops of micro devices 1503, 1504, and 1505 to form top common contacts and seed layers for subsequent processing (eg, electroplating). . Referring to Figure 22, a thick mechanical support layer 2102 is then deposited, grown or bonded on top of the sample. Here, the filler layer 2101 can be a black matrix layer or a reflective material. Also, prior to depositing the mechanical support, one can deposit an electrode (as a patterned or a common layer). A mechanical support layer is then deposited. In the case of optoelectronic devices, such as LEDs, the mechanical support layer needs to be transparent. As shown in Figures 23 and 24, the microdevice substrate 1501 is then removed using various procedures, such as laser lift-off or etching. In one case, the thickness of the substrate is initially reduced to a few microns by a procedure such as, but not limited to, deep reactive ion etching (DRIE). The remaining substrate is then removed by a procedure such as, but not limited to, a wet chemical etch process. In this case, the buffer/sacrificial layer 1502 can act as an etch stop layer to ensure a uniform etch of the sub-surface and avoid any damage to the micro device. After the buffer layer 1502 is removed, as shown in FIG. 24, another etch (eg, RIE) is performed to expose the micro device. A metal layer can be deposited and patterned to act as the upper contact and bond pads on the micro device above the contacts and bond pads that have not been formed during micro device fabrication. The system substrate 1506 with contact pads 1507 can then be aligned and bonded to the micro device array, as shown in FIG. Depending on the type and functionality of the microdevice, the mechanical support layer 2102 and the filler layer 2101 can then be removed, as shown in Figures 26A and 26B.
在另一實施例中,實施貫穿基板通孔以製成至微裝置之背面之接觸件。In another embodiment, a through-substrate via is implemented to make a contact to the backside of the microdevice.
參考圖27,在一項實施例中,微裝置1503、1504及1505可為生長在一絕緣緩衝層1502上之多色微LED。此緩衝層1502亦可用作一蝕刻停止層。在微裝置1503、1504及1505上方及周圍沈積一介電層2701作為一填料層。Referring to FIG. 27, in one embodiment, micro devices 1503, 1504, and 1505 can be multi-color micro-LEDs grown on an insulating buffer layer 1502. This buffer layer 1502 can also be used as an etch stop layer. A dielectric layer 2701 is deposited over and around the microdevices 1503, 1504, and 1505 as a filler layer.
參考圖28A及圖28B,使用 諸如(但不限於)光微影之程序在基板1501之背側上形成圖案。在一項實施例中,使用 諸如DRIE之 一方法以在基板1501中製成基板穿孔(through substrate hole)。可使用(例如)一濕式蝕刻程序來移除可充當一蝕刻停止層之緩衝層1502。Referring to Figures 28A and 28B, a pattern is formed on the back side of the substrate 1501 using a procedure such as, but not limited to, photolithography. In one embodiment, a method such as DRIE is used to make a through substrate hole in the substrate 1501. A buffer layer 1502 that can serve as an etch stop layer can be removed using, for example, a wet etch process.
參考圖29,可在基板1501之背面上沈積一絕緣膜2901。可自微裝置1503、1504及1505之背側部分移除絕緣層2901以容許形成至此等微裝置之電接觸件。Referring to FIG. 29, an insulating film 2901 may be deposited on the back surface of the substrate 1501. The insulating layer 2901 can be removed from the backside portions of the micro devices 1503, 1504, and 1505 to allow for the formation of electrical contacts to such micro devices.
參考圖30,使用諸如(但不限於)電鍍之程序用一導電材料3001填充貫穿孔。此處,通孔可充當微裝置接觸件及接合墊。Referring to Figure 30, the through holes are filled with a conductive material 3001 using a procedure such as, but not limited to, electroplating. Here, the vias can serve as micro device contacts and bond pads.
如在圖31中繪示,藉由以下步驟形成微裝置1503、1504及1505之一共同前接觸件3101:執行一蝕刻程序(例如,使用RIE)以揭露微裝置1503、1504及1505之頂部;接著沈積一透明導電層以形成前接觸件3101。As shown in FIG. 31, one of the micro devices 1503, 1504, and 1505 is formed by a common front contact 3101 by performing an etching process (eg, using RIE) to expose the tops of the micro devices 1503, 1504, and 1505; A transparent conductive layer is then deposited to form the front contact 3101.
參考圖32,接著,將微裝置基板1501對準且接合至具有接觸墊1507之系統基板1506,系統基板1506在此實例中可為控制個別裝置之一背板。Referring to Figure 32, microdevice substrate 1501 is then aligned and bonded to system substrate 1506 having contact pads 1507, which in this example can be one of the control unit backplanes.
在另一實施例中,已以任意節距長度在一基板上製造微裝置以最大化生產良率。例如,微裝置可為多色微LED (例如,RGB)。此實例之系統基板可為具有擁有不同於微LED之節距長度之一節距長度之接觸墊之一顯示器背板。In another embodiment, microdevices have been fabricated on a substrate at any pitch length to maximize production yield. For example, the micro device can be a multi-color micro LED (eg, RGB). The system substrate of this example can be a display backplate having a contact pad having a pitch length that is different from the pitch length of the micro LED.
參考圖33A,在一項實施例中,施體基板1501具有微裝置類型3301、3302及3303且其等以一維陣列3304之形式圖案化,其中針對來自一個類型之各微裝置3301、3302及3303,至少存在其等之節距3305與受體(或系統)基板1506上之對應區域(或墊)之節距匹配之來自另一類型之一微裝置。Referring to FIG. 33A, in one embodiment, the donor substrate 1501 has micro device types 3301, 3302, and 3303 and is patterned in the form of a one-dimensional array 3304 for each of the micro devices 3301, 3302 from one type and 3303, at least one of the microdevices from another type having a pitch 3305 matching the pitch of the corresponding region (or pad) on the receptor (or system) substrate 1506.
作為一實例,在圖33B中展示之一項實施例中,接觸墊1507之節距3404比如在圖33中展示之微裝置3401之節距3402大一倍。As an example, in one embodiment shown in FIG. 33B, the pitch 3404 of the contact pads 1507 is twice as large as the pitch 3402 of the micro device 3401 shown in FIG.
參考圖34,使系統基板1506及微裝置基板1501接合在一起,對準且接觸。Referring to Figure 34, system substrate 1506 and microdevice substrate 1501 are bonded together, aligned and in contact.
如在圖35及圖36中展示,可使用諸如雷射剝離(LLO)之方法以將微裝置3401選擇性地轉移至系統基板1506上之接觸墊3403。如在圖37中展示,轉移之後可接著在系統基板之頂部上沈積一填料層3701及一保形導電層3702作為共同電極。As shown in FIGS. 35 and 36, a method such as laser lift-off (LLO) can be used to selectively transfer micro-device 3401 to contact pads 3403 on system substrate 1506. As shown in FIG. 37, a transfer layer 3701 and a conformal conductive layer 3702 can then be deposited on top of the system substrate as a common electrode after transfer.
在圖38A及圖38B中展示之另一實施例中,一緩衝層3801作為用於製造微裝置1503、1504及1505之一材料模板係必需的。In another embodiment, illustrated in Figures 38A and 38B, a buffer layer 3801 is required as a material template for fabricating one of the microdevices 1503, 1504, and 1505.
仍參考圖38A及圖38B,緩衝層3801經沈積於犧牲層1502上且經圖案化以隔離微裝置1503、1504及1505。在一些情況中,亦可圖案化犧牲層1502。Still referring to FIGS. 38A and 38B, buffer layer 3801 is deposited over sacrificial layer 1502 and patterned to isolate micro devices 1503, 1504, and 1505. In some cases, the sacrificial layer 1502 can also be patterned.
在一項實施例中,代替隔離個別微裝置,可使微裝置群組彼此隔離(如在圖38A及圖38B中展示)以促進轉移程序。In one embodiment, instead of isolating individual microdevices, the microdevice groups can be isolated from each other (as shown in Figures 38A and 38B) to facilitate the transfer procedure.
參考圖39,可在基板1501上旋塗一填充材料3901 (諸如但不限於聚醯亞胺)以填充個別微裝置1503、1504及1505之間的間隙。此填充步驟確保轉移程序期間的機械強度。此在使用如雷射剝離之一程序以將微裝置脫離載體基板時係尤其重要的。Referring to FIG. 39, a fill material 3901 (such as, but not limited to, polyimide) may be spin coated on substrate 1501 to fill the gap between individual microdevices 1503, 1504, and 1505. This filling step ensures the mechanical strength during the transfer procedure. This is especially important when using a procedure such as laser stripping to detach the microdevice from the carrier substrate.
參考圖40,微裝置可不具有相同高度,此使得難以將其等接合至系統基板1506。在此等情況中,吾人可實施一靜電夾持機構4001或系統基板1506中之其他夾持機構以將微裝置暫時保持在系統基板1506上以用於最終接合步驟。夾持機構4001可對微裝置係局部的或對一微裝置群組係一全域夾持,如在針對整個晶圓之相同節距轉移的情況中。夾持機構4001可在接觸電極1507上方之一層上。在此情況中,可使用一平坦化層。Referring to FIG. 40, the micro devices may not have the same height, which makes it difficult to bond them to the system substrate 1506. In such cases, one can implement an electrostatic clamping mechanism 4001 or other clamping mechanism in system substrate 1506 to temporarily hold the microdevice on system substrate 1506 for the final bonding step. The clamping mechanism 4001 can globally clamp the microdevices locally or to a microdevice group, as in the case of the same pitch shift for the entire wafer. The clamping mechanism 4001 can be on one of the layers above the contact electrode 1507. In this case, a planarization layer can be used.
在一項實施例中,參考圖41A,施體基板上之不同微裝置類型3301、3302及3303之圖案產生各類型之一二維陣列(例如,陣列4100),其中經定義為相鄰陣列之間的中心至中心距離之陣列之間的節距4101與系統基板上之對應區域之節距匹配。In one embodiment, referring to FIG. 41A, the pattern of different micro device types 3301, 3302, and 3303 on the donor substrate produces a two-dimensional array of each type (eg, array 4100), which is defined as an adjacent array. The pitch 4101 between the array of center-to-center distances matches the pitch of the corresponding area on the system substrate.
在圖41B及圖42中展示之一項實施例中,當子裝置節距4103大於其等基板上之經製造個別微裝置1503之正常距離(例如,在大顯示器中)時,微裝置基板1501以二維單色陣列之形式佈置。此處,接觸墊1507之節距4102及微裝置陣列1503之節距4103係相同的。使用此技術,吾人可放鬆微裝置製造要求且相較於上文所描述者減少選擇性轉移程序。In an embodiment shown in FIGS. 41B and 42 , when the sub-device pitch 4103 is greater than the normal distance (eg, in a large display) of the fabricated individual micro device 1503 on its substrate, the micro device substrate 1501 Arranged in the form of a two-dimensional monochromatic array. Here, the pitch 4102 of the contact pads 1507 and the pitch 4103 of the micro device array 1503 are the same. Using this technique, we can relax the microdevice manufacturing requirements and reduce the selective transfer procedure as compared to those described above.
圖43及圖44展示一替代性圖案,其中微裝置1503未形成為二維群組,且其中不同微裝置1503跨基板1501均勻放置,如在圖43中針對三個不同微裝置1503展示般。43 and 44 illustrate an alternative pattern in which microdevices 1503 are not formed into a two-dimensional group, and wherein different micro devices 1503 are evenly placed across substrate 1501, as shown for three different micro devices 1503 in FIG.
參考圖45,在另一實施例中,首先將微裝置4503轉移至一導電半透明共同基板4501,接著將其等接合至一系統基板4502。色彩轉換結構 Referring to FIG. 45, in another embodiment, the micro device 4503 is first transferred to a conductive translucent common substrate 4501, which is then bonded to a system substrate 4502. Color conversion structure
在其中微裝置係光學裝置(諸如LED)之一些實施例中,吾人可使用色彩轉換或彩色濾光器來定義不同功能性(在像素的情況中為不同色彩)。在此實施例中,系統基板上之兩個或兩個以上接觸墊裝有相同類型之光學裝置。一旦處在適當位置中,系統基板上之裝置便藉由不同色彩轉換層區分。In some embodiments in which the microdevice is an optical device, such as an LED, we can use color conversion or color filters to define different functionality (different colors in the case of pixels). In this embodiment, two or more contact pads on the system substrate are loaded with the same type of optical device. Once in place, the devices on the system substrate are distinguished by different color conversion layers.
參考圖46A及圖46B,在一項實施例中,在將微裝置1503轉移至系統基板1506之後,由一平坦化層4601覆蓋整個結構。接著在平坦化層4601上形成一共同電極4602。平坦化層之高度可相同於、高於或低於經堆疊裝置。若平坦化層4601較低(或不存在平坦化層),則裝置之壁可藉由鈍化材料保形覆蓋。Referring to Figures 46A and 46B, in one embodiment, after transferring microdevice 1503 to system substrate 1506, the entire structure is covered by a planarization layer 4601. A common electrode 4602 is then formed on the planarization layer 4601. The height of the planarization layer can be the same, higher or lower than the stacked device. If the planarization layer 4601 is low (or there is no planarization layer), the walls of the device may be conformally covered by the passivation material.
參考圖47,產生一堤岸結構4701 (尤其在使用一印刷程序來沈積色彩轉換層之情況下)。堤岸4701可分離各像素或僅分離不同色彩轉換材料4702。Referring to Figure 47, a bank structure 4701 is created (especially where a printing process is used to deposit the color conversion layer). The bank 4701 can separate the pixels or separate only the different color conversion materials 4702.
圖48展示一整合結構,其中色彩轉換材料4702完全覆蓋經轉移微裝置之頂部且部分覆蓋其等之側。堤岸4701分離色彩轉換層4702且電極4602係所有經轉移微裝置之一共同接觸件。Figure 48 shows an integrated structure in which color conversion material 4702 completely covers the side of the transfer microdevice and partially covers it. The bank 4701 separates the color conversion layer 4702 and the electrode 4602 is a common contact of all of the transferred microdevices.
圖49展示一整合結構,其中色彩轉換層4702完全覆蓋經轉移微裝置之頂部且部分覆蓋其等之側。堤岸4701分離色彩轉換層4702且至微裝置之接觸件經製成僅通過系統基板1506。Figure 49 shows an integrated structure in which color conversion layer 4702 completely covers the top of the transferred microdevice and partially covers the side thereof. The bank 4701 separates the color conversion layer 4702 and contacts to the micro device are made through only the system substrate 1506.
圖50展示一整合結構,其中色彩轉換層4702直接形成在共同電極4602上。在此情況中,不使用堤岸層。Figure 50 shows an integrated structure in which a color conversion layer 4702 is formed directly on the common electrode 4602. In this case, no bank layer is used.
圖51展示一整合結構,其中色彩轉換層4702完全覆蓋經轉移微裝置之頂部且部分覆蓋其等之側。電極4602係所有經轉移微裝置之一共同接觸件。在此情況中,不使用堤岸層。Figure 51 shows an integrated structure in which color conversion layer 4702 completely covers the top of the transferred microdevice and partially covers the side thereof. Electrode 4602 is a common contact for all of the transferred microdevices. In this case, no bank layer is used.
圖52展示一整合結構,其中色彩轉換層4702完全覆蓋經轉移微裝置之頂部且部分覆蓋其等之側。至微裝置之接觸件經製成僅通過系統基板1506。在此情況中,不使用堤岸層。Figure 52 shows an integrated structure in which color conversion layer 4702 completely covers the top of the transfer microdevice and partially covers the side thereof. The contacts to the micro device are made to pass only through the system substrate 1506. In this case, no bank layer is used.
在圖53A及圖53B中展示之一項實施例中,在整合系統基板1506上形成色彩轉換材料4702之後,在結構上沈積一平坦化層5301。在其中需要保護整合基板之色彩轉換材料及/或其他組件以免受環境條件影響之一些情況中,在整個結構上方形成一囊封層5302。應注意,囊封層5302可由一不同層堆疊形成以有效保護整合結構以免受環境條件影響。In one embodiment, shown in FIGS. 53A and 53B, after the color conversion material 4702 is formed on the integrated system substrate 1506, a planarization layer 5301 is deposited on the structure. In some cases where it is desirable to protect the color conversion material and/or other components of the integrated substrate from environmental conditions, an encapsulation layer 5302 is formed over the entire structure. It should be noted that the encapsulation layer 5302 can be formed from a stack of different layers to effectively protect the integrated structure from environmental conditions.
參考圖54A及圖54B,在另一實施例中,可將使用囊封層5302塗佈之一單獨基板5401接合至整合系統基板。Referring to Figures 54A and 54B, in another embodiment, one of the individual substrates 5401 coated with the encapsulation layer 5302 can be bonded to the integrated system substrate.
可組合圖53及圖54中描繪的實施例,其中在結構1506及單獨結構5401兩者上形成囊封層5302以用於更有效囊封。The embodiment depicted in Figures 53 and 54 can be combined wherein an encapsulation layer 5302 is formed on both the structure 1506 and the individual structure 5401 for more efficient encapsulation.
共同電極係以一毯覆層之形式沈積於基板上之一透明導電層。在一項實施例中,此層可充當一平坦化層。在一些實施例中,此層之厚度經選擇以滿足光學及電子要求兩者。The common electrode is deposited as a blanket layer on one of the transparent conductive layers on the substrate. In one embodiment, this layer can act as a planarization layer. In some embodiments, the thickness of this layer is selected to meet both optical and electronic requirements.
光學裝置之間的距離可經選擇為足夠大以便降低光學裝置之間的串擾,或在光學裝置之間沈積一阻擋層以達成此。在一個情況中,平坦化層亦充當一阻擋層。The distance between the optical devices can be selected to be large enough to reduce crosstalk between the optical devices, or a barrier layer can be deposited between the optical devices to achieve this. In one case, the planarization layer also acts as a barrier.
在沈積色彩轉換層之後,可沈積不同層(諸如偏光器)。After depositing the color conversion layer, different layers (such as polarizers) can be deposited.
在另一態樣中,在色彩轉換層上沈積彩色濾光器。在此情況中,可達成更寬之色域及更高之效率。吾人可在沈積彩色濾光器層之前在色彩轉換層之後使用一平坦化層及/或堤岸層。In another aspect, a color filter is deposited on the color conversion layer. In this case, a wider color gamut and higher efficiency can be achieved. A person can use a planarization layer and/or a bank layer after the color conversion layer before depositing the color filter layer.
彩色濾光器可大於色彩轉換層以阻擋任何光洩露。再者,可在色彩轉換島狀物或彩色濾光器之間形成一黑色矩陣。The color filter can be larger than the color conversion layer to block any light leakage. Furthermore, a black matrix can be formed between the color conversion islands or the color filters.
圖55A、圖55B及圖55C繪示其中在數個像素(或子像素)之間共用裝置之結構。此處,微裝置1503並不完全圖案化,但水平條件經設計使得接觸件1507界定經分配至各像素之區域。圖55A展示具有接觸墊1507之系統基板1506及具有微裝置1503之一施體基板1501。在微裝置1503經轉移至系統基板(在圖55B中展示)之後,吾人可進行後處理(圖55C),諸如沈積共同電極4602、色彩轉換層4702、彩色濾光器等。圖55C展示在微裝置1503之頂部上沈積色彩轉換層4702之一個實例。此處,色彩轉換層之後可進行彩色濾光器沈積。本發明中描述之方法及/或其他可能方法可用於不同部分或將不同層整合於顯示器中。又,吾人可在電極4602之前或之後使用平坦化層4601。又,可在LED 1503之間使用一反射層1509。可在墊1507之間使用填料且填料可為一黑色矩陣。可在LED 1503之間使用某一間隔件或光限制結構。在系統基板1506上,可使用一反射層來引導光。55A, 55B, and 55C illustrate a structure in which a device is shared among a plurality of pixels (or sub-pixels). Here, the micro device 1503 is not fully patterned, but the horizontal conditions are designed such that the contact 1507 defines an area that is assigned to each pixel. Figure 55A shows a system substrate 1506 having a contact pad 1507 and a donor substrate 1501 having a micro device 1503. After the microdevice 1503 is transferred to the system substrate (shown in Figure 55B), we can perform post processing (Fig. 55C), such as depositing a common electrode 4602, a color conversion layer 4702, a color filter, and the like. FIG. 55C shows an example of depositing a color conversion layer 4702 on top of the micro device 1503. Here, color filter deposition can be performed after the color conversion layer. The methods and/or other possible methods described in this disclosure can be used in different parts or in integrating different layers into a display. Again, the planarization layer 4601 can be used before or after the electrode 4602. Also, a reflective layer 1509 can be used between the LEDs 1503. A filler can be used between the pads 1507 and the filler can be a black matrix. A spacer or light confinement structure can be used between the LEDs 1503. On the system substrate 1506, a reflective layer can be used to direct the light.
圖55D展示在微裝置1503之頂部上沈積色彩轉換層4702之另一實例。然而,亦可使用本發明中描述之其他方法及其他可能方法。又,吾人可在透明上電極4602之前或之後使用平坦化層4601。又,可在LED 1503之間使用一反射層。可在墊1507之間使用填料且填料5502可為一黑色矩陣。可在微LED 1503之間使用某一間隔件或光限制結構5504。在系統基板1506上,可使用一反射層1509來引導光。此處,微LED 1503之光擴散至較大區域上方,使得色彩轉換層4702上存在較少應力。亦可使用不同結構來將光擴散至較大區域上。FIG. 55D shows another example of depositing a color conversion layer 4702 on top of the micro device 1503. However, other methods described in the present invention, as well as other possible methods, may also be used. Also, the planarization layer 4601 can be used before or after the transparent upper electrode 4602. Also, a reflective layer can be used between the LEDs 1503. A filler can be used between the pads 1507 and the filler 5502 can be a black matrix. A spacer or light confinement structure 5504 can be used between the micro LEDs 1503. On the system substrate 1506, a reflective layer 1509 can be used to direct light. Here, the light of the micro LED 1503 diffuses over a larger area such that there is less stress on the color conversion layer 4702. Different structures can also be used to diffuse light over a larger area.
在形成作用區域之後,可將如描述之色彩轉換層添加至像素(或子像素)作用區域中。此可提供一更高填充因數及更高之效能且亦在像素(或子像素)之作用區域由反射層覆蓋之情況下避免色彩從側像素(或子像素)洩露。After forming the active area, the color conversion layer as described can be added to the pixel (or sub-pixel) active area. This provides a higher fill factor and higher performance and also avoids color leakage from side pixels (or sub-pixels) if the active area of the pixel (or sub-pixel) is covered by the reflective layer.
已為圖解及描述之目的呈現本發明之一或多項實施例之先前描述。其並非旨在詳盡性或使本發明限於所揭示之精確形式。鑒於上述教示,許多修改及變化係可能的。本發明之範疇不旨在受限於此詳細描述,而是受限於隨附發明申請專利範圍。The previous description of one or more embodiments of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teachings. The scope of the invention is not intended to be limited to the details of the invention, but is limited by the scope of the appended claims.
100‧‧‧受體基板100‧‧‧Receptor substrate
101a‧‧‧接觸墊101a‧‧‧Contact pads
101b‧‧‧接觸墊101b‧‧‧Contact pads
102a‧‧‧微裝置/微發光二極體(LED)裝置102a‧‧‧Microdevice/micro-lighting diode (LED) device
102b‧‧‧微裝置/微發光二極體(LED)裝置102b‧‧‧Microdevice/micro-lighting diode (LED) device
201‧‧‧保形介電層201‧‧‧Conformal dielectric layer
202‧‧‧反射層202‧‧‧reflective layer
203‧‧‧黑色矩陣/黑色矩陣層203‧‧‧Black matrix/black matrix layer
301‧‧‧透明導電層/共同接觸件301‧‧‧Transparent Conductive Layer/Common Contact
302‧‧‧光學組件302‧‧‧Optical components
303‧‧‧共同電極303‧‧‧Common electrode
501‧‧‧透明填料501‧‧‧Transparent filler
601a‧‧‧子像素601a‧‧‧ subpixel
601b‧‧‧子像素601b‧‧‧ subpixel
602‧‧‧光學組件602‧‧‧Optical components
702a‧‧‧接合墊702a‧‧‧ joint pad
702b‧‧‧接合墊/接觸墊結構702b‧‧‧ Bonding pad/contact pad structure
801‧‧‧微裝置801‧‧‧Microdevice
901‧‧‧介電層901‧‧‧ dielectric layer
902‧‧‧底部電極902‧‧‧ bottom electrode
902a‧‧‧第一部分902a‧‧‧Part 1
902b‧‧‧主要平坦區段902b‧‧‧main flat section
903‧‧‧堤岸層/鈍化層/平坦化層903‧‧‧bank layer/passivation layer/flattening layer
904‧‧‧薄膜光電裝置/薄膜發光裝置結構904‧‧‧Thin-film optoelectronic device/thin film illuminator structure
905‧‧‧頂部電極905‧‧‧ top electrode
1001‧‧‧上裝置電極1001‧‧‧Upper device electrode
1005‧‧‧開口1005‧‧‧ openings
1301‧‧‧開口1301‧‧‧ openings
1401‧‧‧反射層1401‧‧‧reflective layer
1501‧‧‧基板/微裝置基板1501‧‧‧Substrate/microdevice substrate
1502‧‧‧犧牲/緩衝層1502‧‧‧sacrificial/buffer layer
1503‧‧‧微裝置1503‧‧‧Microdevice
1504‧‧‧微裝置1504‧‧‧Microdevice
1505‧‧‧微裝置1505‧‧‧Microdevice
1506‧‧‧系統基板1506‧‧‧System substrate
1507‧‧‧接觸墊1507‧‧‧Contact pads
1509‧‧‧反射層1509‧‧‧reflective layer
2001‧‧‧填料介電塗層2001‧‧‧ Filler dielectric coating
2002‧‧‧共同透明電極2002‧‧‧Common transparent electrode
2101‧‧‧介電填料層2101‧‧‧ dielectric filler layer
2102‧‧‧機械支撐層2102‧‧‧Mechanical support layer
2701‧‧‧介電層2701‧‧‧Dielectric layer
2901‧‧‧絕緣膜/絕緣層2901‧‧‧Insulation film/insulation
3001‧‧‧導電材料3001‧‧‧Electrical materials
3101‧‧‧前接觸件3101‧‧‧ Front contact
3301‧‧‧微裝置3301‧‧‧Microdevice
3302‧‧‧微裝置3302‧‧‧Microdevice
3303‧‧‧微裝置3303‧‧‧Microdevice
3304‧‧‧微陣列3304‧‧‧Microarray
3305‧‧‧節距3305‧‧‧ pitch
3401‧‧‧微裝置3401‧‧‧Microdevice
3402‧‧‧節距3402‧‧‧ pitch
3403‧‧‧接觸墊3403‧‧‧Contact pads
3404‧‧‧節距3404‧‧‧ pitch
3701‧‧‧填料層3701‧‧‧Filling layer
3702‧‧‧保形導電層3702‧‧‧Conformal conductive layer
3801‧‧‧緩衝層3801‧‧‧ Buffer layer
3901‧‧‧填充材料3901‧‧‧Filling materials
4001‧‧‧靜電夾持機構4001‧‧‧Electrostatic clamping mechanism
4100‧‧‧陣列4100‧‧‧Array
4101‧‧‧節距4101‧‧‧ pitch
4102‧‧‧節距4102‧‧‧ pitch
4103‧‧‧節距4103‧‧‧ pitch
4501‧‧‧導電半透明共同基板4501‧‧‧ Conductive translucent common substrate
4502‧‧‧系統基板4502‧‧‧System substrate
4503‧‧‧微裝置4503‧‧‧Microdevice
4601‧‧‧平坦化層4601‧‧‧flattening layer
4602‧‧‧共同電極4602‧‧‧Common electrode
4701‧‧‧堤岸結構/堤岸4701‧‧‧ Embankment structure / embankment
4702‧‧‧色彩轉換材料/色彩轉換層4702‧‧‧Color Conversion Material/Color Conversion Layer
5301‧‧‧平坦化層5301‧‧‧Destivation layer
5302‧‧‧囊封層5302‧‧‧Encapsulation layer
5401‧‧‧單獨基板5401‧‧‧ separate substrate
5502‧‧‧填料5502‧‧‧Filling
5504‧‧‧間隔件或光限制結構5504‧‧‧Parts or light confinement structures
5601‧‧‧反射或光限制結構5601‧‧‧reflection or light confinement structure
5620‧‧‧上電極5620‧‧‧Upper electrode
5810‧‧‧彩色濾光器5810‧‧‧Color filter
5812‧‧‧反射層5812‧‧‧reflective layer
5814‧‧‧鈍化層5814‧‧‧ Passivation layer
5910‧‧‧透明保護層5910‧‧‧Transparent protective layer
參考表示本發明之較佳實施例之附圖更詳細描述本發明,其中:The invention will be described in more detail with reference to the accompanying drawings, in which:
圖1展示具有接觸墊之一受體基板及附接至受體基板之經轉移微裝置之一陣列。1 shows an array of one of a transfer substrate having a contact pad and a transfer microdevice attached to the acceptor substrate.
圖2A展示具有接觸墊之一受體基板、附接至受體基板之經轉移微裝置之一陣列及頂部上之保形介電及反射層。2A shows a conformal dielectric and reflective layer having an acceptor substrate of a contact pad, an array of transferred microdevices attached to the acceptor substrate, and a top portion.
圖2B展示具有接觸墊之一受體基板、附接至受體基板之經轉移微裝置之一陣列及經圖案化之保形介電及反射層。2B shows an array of acceptor substrates having contact pads, an array of transferred microdevices attached to the acceptor substrate, and a patterned conformal dielectric and reflective layer.
圖2C展示具有接觸墊之一受體基板、附接至受體基板之經轉移微裝置之一陣列、經圖案化之保形介電及反射層及形成於相鄰微裝置之間的一黑色矩陣層。2C shows an acceptor substrate having a contact pad, an array of transferred microdevices attached to the acceptor substrate, a patterned conformal dielectric and reflective layer, and a black formed between adjacent micro devices Matrix layer.
圖3A展示具有接觸墊之一受體基板、附接至受體基板之經轉移微裝置之一陣列、經圖案化之保形介電及反射層、一黑色矩陣層及沈積於基板上之一透明導電層。3A shows an acceptor substrate having a contact pad, an array of transferred microdevices attached to the acceptor substrate, a patterned conformal dielectric and reflective layer, a black matrix layer, and one of the deposited on the substrate. Transparent conductive layer.
圖3B展示具有附接至其之經轉移微裝置之一整合陣列之一受體基板及用於光輸出耦合增強之光學反射組件。3B shows an acceptor substrate having an integrated array of one of the transferred microdevices attached thereto and an optical reflective assembly for light output coupling enhancement.
圖3C展示具有附接至其之經轉移微裝置之一整合陣列之一受體基板及用於光輸出耦合增強之凹形接觸墊。3C shows a receptor substrate having an integrated array of one of the transferred microdevices attached thereto and a concave contact pad for light output coupling enhancement.
圖3D展示具有以一底部發射組態附接至其之經轉移微裝置之一整合陣列之一受體基板。3D shows an acceptor substrate having an integrated array of one of the transferred microdevices attached thereto in a bottom emission configuration.
圖3E展示具有附接至其之經轉移微裝置之一整合陣列之一受體基板。Figure 3E shows an acceptor substrate having an integrated array of one of the transferred microdevices attached thereto.
圖4A展示具有經轉移微裝置之一受體基板、一保形介電層及一經連接反射層。4A shows an acceptor substrate having a transferred microdevice, a conformal dielectric layer, and a connected reflective layer.
圖4B展示具有經轉移微裝置、保形介電層、經連接反射層之一受體基板及沈積於基板上之一透明導電層。4B shows a transparent conductive layer having a transferred microdevice, a conformal dielectric layer, an acceptor substrate connected to the reflective layer, and deposited on the substrate.
圖5展示具有經轉移微裝置之一受體基板及界定像素(或子像素)之一經圖案化填料。Figure 5 shows a patterned filler having one of the acceptor substrates and one of the defined pixels (or sub-pixels) of the transferred microdevice.
圖6A展示覆蓋至少一個像素中之所有子像素(例如,覆蓋由兩個子像素組成之一像素之兩個子像素)之一像素化填料結構。6A shows one of the pixelated packing structures covering all of the sub-pixels in at least one of the pixels (eg, two sub-pixels covering one of the two sub-pixels).
圖6B展示由兩個子像素組成之一像素、經圖案化以界定該像素之一填料層及該像素周圍之經圖案化保形介電及反射層。6B shows a patterned conformal dielectric and reflective layer surrounded by two sub-pixels, patterned to define a filler layer of the pixel, and around the pixel.
圖6C展示由兩個子像素組成之一像素、經圖案化以界定該像素之一填料層、該像素周圍之經圖案化保形介電及反射層以及捲繞該像素之一黑色矩形層。6C shows one pixel composed of two sub-pixels, patterned to define one of the pixel's filler layers, a patterned conformal dielectric and reflective layer around the pixel, and a black rectangular layer that wraps the pixel.
圖6D展示由兩個子像素組成之一像素、經圖案化以界定該像素之一填料層、該像素周圍之經圖案化保形介電及反射層、捲繞該像素之一黑色矩形層及沈積於基板上之一透明導電層。6D shows a pixel composed of two sub-pixels, patterned to define a filler layer of the pixel, a patterned conformal dielectric and reflective layer around the pixel, a black rectangular layer that wraps the pixel, and A transparent conductive layer deposited on the substrate.
圖6E展示由兩個子像素組成之一像素,其具有受體基板上之反射光學組件以用於更佳光輸出耦合。Figure 6E shows one pixel consisting of two sub-pixels with reflective optical components on the acceptor substrate for better light output coupling.
圖6F展示由兩個子像素組成之一像素,其具有受體基板上之凹形接觸墊。Figure 6F shows one pixel consisting of two sub-pixels with a concave contact pad on the acceptor substrate.
圖6G展示具有一底部發射組態之由兩個子像素組成之一像素。Figure 6G shows one pixel consisting of two sub-pixels with a bottom emission configuration.
圖6H展示具有一底部發射組態之由兩個子像素組成之一像素、一共同頂部電極及側反射器。Figure 6H shows a pixel consisting of two sub-pixels, a common top electrode and a side reflector with a bottom emission configuration.
圖7展示具有兩個接觸墊之一受體基板。Figure 7 shows an acceptor substrate having two contact pads.
圖8展示具有接合至接觸墊之一者之一經轉移微裝置之一受體基板。Figure 8 shows an acceptor substrate having one of the transferred microdevices bonded to one of the contact pads.
圖9展示在一混合結構中將一經轉移微裝置與一光電薄膜裝置整合。Figure 9 shows the integration of a transferred microdevice with a photovoltaic thin film device in a hybrid configuration.
圖10展示在一混合結構中將一經轉移微裝置與一光電薄膜裝置整合之另一實例。Figure 10 shows another example of integrating a transferred microdevice with a photovoltaic thin film device in a hybrid configuration.
圖11展示在具有一共同頂部電極之一混合結構中將一經轉移微裝置與一光電薄膜裝置整合之一實例。Figure 11 shows an example of integrating a transferred microdevice with a photovoltaic thin film device in a hybrid structure having a common top electrode.
圖12展示在具有頂部及底部透明電極兩者之一雙表面混合結構中將一經轉移微裝置與一光電薄膜裝置整合之一實施例。Figure 12 shows an embodiment of integrating a transferred microdevice with a photovoltaic thin film device in a dual surface hybrid structure having both top and bottom transparent electrodes.
圖13A展示一系統基板及具有薄膜光電裝置之一整合微裝置之另一實施例。Figure 13A shows another embodiment of a system substrate and an integrated micro device having a thin film photovoltaic device.
圖13B展示一系統基板及與具有一薄膜光電裝置之一整合微裝置之另一實施例。Figure 13B shows another embodiment of a system substrate and integrated microdevice with one of the thin film optoelectronic devices.
圖14A展示一系統基板及具有兩個薄膜光電裝置之一整合微裝置之一實施例。Figure 14A shows an embodiment of a system substrate and an integrated microdevice having two thin film optoelectronic devices.
圖14B展示一系統基板及具有兩個薄膜光電裝置及受體基板上之一反射層之一整合微裝置之一實施例。Figure 14B shows an embodiment of a system substrate and an integrated microdevice having one of the two thin film optoelectronic devices and one of the reflective layers on the acceptor substrate.
圖14C及圖14D展示微LED及光電裝置之實例,其中光通過光電裝置。14C and 14D show examples of micro-LEDs and optoelectronic devices in which light passes through an optoelectronic device.
圖14E、圖14F及圖14G展示與系統基板上之光電裝置整合之微LED之另一實例。14E, 14F, and 14G show another example of a micro LED integrated with an optoelectronic device on a system substrate.
圖14H及圖14I展示與系統基板上之光電裝置及彩色濾光器整合之微LED之另一實例。14H and 14I show another example of a micro LED integrated with a photovoltaic device and a color filter on a system substrate.
圖14J展示與系統基板上之光電裝置及彩色濾光器整合之微LED之另一實例。Figure 14J shows another example of a micro LED integrated with optoelectronic devices and color filters on a system substrate.
圖15繪示一系統基板及一微裝置基板之一橫截面。Figure 15 illustrates a cross section of a system substrate and a micro device substrate.
圖16展示一轉移程序中之一系統基板及一微裝置基板之對準步驟。Figure 16 shows the alignment steps of one of the system substrates and one of the microdevice substrates in a transfer procedure.
圖17展示一轉移程序中之一系統基板及一微裝置基板之接合步驟。Figure 17 shows the bonding steps of a system substrate and a micro device substrate in a transfer procedure.
圖18展示一轉移程序中之一系統基板及一微裝置基板之微裝置基板移除步驟。Figure 18 shows the micro device substrate removal step of one of the system substrate and a micro device substrate in a transfer procedure.
圖19展示一轉移程序中之一系統基板及一微裝置基板之犧牲層移除步驟。Figure 19 shows the sacrificial layer removal step of one of the system substrate and a micro device substrate in a transfer procedure.
圖20展示一轉移程序中之一系統基板及一微裝置基板之共同電極形成步驟。Figure 20 shows a common electrode forming step of one of the system substrate and a micro device substrate in a transfer procedure.
圖21係具有一(若干)填料層之一微裝置基板之一橫截面。Figure 21 is a cross section of one of the microdevice substrates having one (several) filler layers.
圖22係使用一支撐層覆蓋之一微裝置基板之一橫截面。Figure 22 is a cross section of one of the microdevice substrates covered with a support layer.
圖23展示一轉移程序中之一微裝置基板之微裝置基板移除步驟。Figure 23 shows the microdevice substrate removal step of one of the microdevice substrates in a transfer procedure.
圖24A及圖24B展示一轉移程序中之一微裝置基板之犧牲層移除步驟。亦展示具有接觸墊之一系統基板。24A and 24B illustrate a sacrificial layer removal step of a microdevice substrate in a transfer procedure. A system substrate having one of the contact pads is also shown.
圖25展示一轉移程序中之一系統基板及一微裝置基板之接合步驟。Figure 25 shows the bonding steps of one of the system substrate and one of the micro device substrates in a transfer procedure.
圖26A及圖26B展示一轉移程序中之一微裝置基板之支撐層移除步驟。亦展示具有接觸墊及經轉移微裝置之一系統基板。26A and 26B illustrate a support layer removal step of one of the microdevice substrates in a transfer procedure. A system substrate having a contact pad and a transfer micro device is also shown.
圖27係使用一填料層覆蓋之一微裝置基板之一橫截面。Figure 27 is a cross section of one of the microdevice substrates covered with a filler layer.
圖28A及圖28B係具有基板中之導通孔及犧牲層之一微裝置基板之橫截面。28A and 28B are cross sections of a microdevice substrate having a via hole in a substrate and a sacrificial layer.
圖29係具有基板中之導通孔及由一絕緣層覆蓋之犧牲層之一微裝置基板之一橫截面。Figure 29 is a cross section of one of the microdevice substrates having via holes in the substrate and a sacrificial layer covered by an insulating layer.
圖30係具有基板中之一經導電層填充之導通孔及犧牲層之一微裝置基板之一橫截面。Figure 30 is a cross section of one of the microdevice substrates having one of the vias filled in the substrate and the sacrificial layer.
圖31係具有一共同頂部電極之一微裝置基板之一橫截面。Figure 31 is a cross section of one of the microdevice substrates having a common top electrode.
圖32係具有一共同頂部電極之一整合系統基板之一橫截面。Figure 32 is a cross section of one of the integrated system substrates having a common top electrode.
圖33A展示一施體基板上之微裝置之一二維配置。Figure 33A shows a two-dimensional configuration of a microdevice on a donor substrate.
圖33B係一系統基板及一微裝置基板之一橫截面。Figure 33B is a cross section of a system substrate and a micro device substrate.
圖34係一經接合系統基板及微裝置基板之一橫截面。Figure 34 is a cross section of a bonded system substrate and a microdevice substrate.
圖35展示一轉移程序中之一微裝置基板之雷射剝離步驟。Figure 35 shows the laser stripping step of one of the microdevice substrates in a transfer procedure.
圖36係選擇性轉移程序之後之一系統基板及一微裝置基板之一橫截面。Figure 36 is a cross section of one of the system substrate and a micro device substrate after the selective transfer procedure.
圖37係具有一共同頂部電極之一整合系統基板。Figure 37 is an integrated system substrate having one common top electrode.
圖38A及圖38B係具有擁有不同高度之微裝置之一微裝置基板之橫截面。38A and 38B are cross sections of a microdevice substrate having one of the microdevices having different heights.
圖39係具有一填料層之一微裝置基板之一橫截面。Figure 39 is a cross section of one of the microdevice substrates having a filler layer.
圖40展示一轉移程序中之具有夾持機構之一系統基板及一微裝置基板之對準步驟。Figure 40 illustrates the alignment steps of a system substrate having a clamping mechanism and a micro device substrate in a transfer procedure.
圖41A展示一施體基板上之微裝置之一二維配置。Figure 41A shows a two-dimensional configuration of a microdevice on a donor substrate.
圖41B係具有不同節距之一系統基板及一微裝置基板之一橫截面。Figure 41B is a cross section of one of a system substrate having a different pitch and a micro device substrate.
圖42展示具有不同節距之一系統基板及一微裝置基板之選擇性微裝置轉移程序。Figure 42 shows a selective micro device transfer procedure for a system substrate having a different pitch and a micro device substrate.
圖43係具有不同節距之一系統基板及一微裝置基板之一橫截面。Figure 43 is a cross section of one of a system substrate having a different pitch and a micro device substrate.
圖44展示具有不同節距之一系統基板及一微裝置基板之選擇性微裝置轉移程序。Figure 44 shows a selective micro device transfer procedure for a system substrate having a different pitch and a micro device substrate.
圖45展示一整合微裝置基板。Figure 45 shows an integrated microdevice substrate.
圖46A及圖46B展示微裝置至具有一平坦化層、一共同頂部電極、堤岸結構及色彩轉換元件之一系統基板之轉移程序。46A and 46B show a transfer procedure of a microdevice to a system substrate having a planarization layer, a common top electrode, a bank structure, and a color conversion element.
圖47展示具有用於界定像素之色彩之色彩轉換之一結構。Figure 47 shows a structure with color conversion for defining the color of a pixel.
圖48展示具有由一堤岸層分離之保形共同電極及色彩轉換之一結構。Figure 48 shows a structure having a conformal common electrode separated by a bank layer and color conversion.
圖49展示具有由一堤岸層分離之保形色彩轉換之一結構。Figure 49 shows a structure having a conformal color conversion separated by a bank layer.
圖50展示具有無堤岸層之共同電極上之色彩轉換元件之一結構。Figure 50 shows the structure of one of the color conversion elements on a common electrode having no bank layer.
圖51展示具有保形共同電極及色彩轉換之一結構。Figure 51 shows a structure having a conformal common electrode and color conversion.
圖52展示具有直接形成於微裝置上之保形色彩轉換元件之一結構。Figure 52 shows a structure having a conformal color conversion element formed directly on a micro device.
圖53A及圖53B展示具有用於定義像素色彩之色彩轉換、一平坦化層及一共同透明電極之一結構。53A and 53B show a structure having a color conversion for defining pixel colors, a planarization layer, and a common transparent electrode.
圖54A及圖54B展示具有用於定義像素色彩之色彩轉換之一結構及用於囊封之一單獨基板。Figures 54A and 54B show one structure having a color conversion for defining pixel colors and a single substrate for encapsulation.
圖55A、圖55B、圖55C及圖55D展示具有用於定義像素色彩之色彩轉換之一結構,而使用當前限制方法完成像素化。Figures 55A, 55B, 55C, and 55D show one structure with color conversion for defining pixel colors, and pixelation is done using the current limiting method.
Claims (20)
Applications Claiming Priority (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2879627A CA2879627A1 (en) | 2015-01-23 | 2015-01-23 | Selective semiconductor device integration into system substrate |
| CA2879465A CA2879465A1 (en) | 2015-01-23 | 2015-01-23 | Integration of semiconductor devices into system substrate |
| CA2880718A CA2880718A1 (en) | 2015-01-28 | 2015-01-28 | Selective transfer of semiconductor device to a system substrate |
| CA2889314A CA2889314A1 (en) | 2014-06-09 | 2015-04-24 | Authentication and information system for reusable surgical instruments |
| CA2890398A CA2890398A1 (en) | 2015-05-04 | 2015-05-04 | Selective and non-selective micro-device transferring |
| CA2936473A CA2936473A1 (en) | 2016-07-19 | 2016-07-19 | Integrated micro-devices and method of assembly |
| US15/653,120 US10700120B2 (en) | 2015-01-23 | 2017-07-18 | Micro device integration into system substrate |
| US15/653,120 | 2017-07-18 |
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| TWI820033B TWI820033B (en) | 2023-11-01 |
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| TW112137111A TWI879121B (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
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| TW112137111A TWI879121B (en) | 2015-01-23 | 2018-07-18 | Micro device integration into system substrate |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI761174B (en) * | 2020-11-06 | 2022-04-11 | 友達光電股份有限公司 | Touch display device |
| CN115863326A (en) * | 2023-02-08 | 2023-03-28 | 镭昱光电科技(苏州)有限公司 | Miniature light-emitting diode display device and preparation method thereof |
| CN119677265A (en) * | 2025-02-20 | 2025-03-21 | 晶能光电股份有限公司 | CSP device and preparation method thereof, and light-emitting array structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US9159700B2 (en) * | 2012-12-10 | 2015-10-13 | LuxVue Technology Corporation | Active matrix emissive micro LED display |
| US8928021B1 (en) * | 2013-06-18 | 2015-01-06 | LuxVue Technology Corporation | LED light pipe |
| WO2016030422A1 (en) * | 2014-08-26 | 2016-03-03 | X-Celeprint Limited | Micro assembled hybrid displays and lighting elements |
| US10381335B2 (en) * | 2014-10-31 | 2019-08-13 | ehux, Inc. | Hybrid display using inorganic micro light emitting diodes (uLEDs) and organic LEDs (OLEDs) |
| US10134803B2 (en) * | 2015-01-23 | 2018-11-20 | Vuereal Inc. | Micro device integration into system substrate |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI761174B (en) * | 2020-11-06 | 2022-04-11 | 友達光電股份有限公司 | Touch display device |
| CN115863326A (en) * | 2023-02-08 | 2023-03-28 | 镭昱光电科技(苏州)有限公司 | Miniature light-emitting diode display device and preparation method thereof |
| CN119677265A (en) * | 2025-02-20 | 2025-03-21 | 晶能光电股份有限公司 | CSP device and preparation method thereof, and light-emitting array structure |
Also Published As
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|---|---|
| TWI820033B (en) | 2023-11-01 |
| TWI879121B (en) | 2025-04-01 |
| TW202406172A (en) | 2024-02-01 |
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