TW201821388A - Oxide sintered body and sputtering target - Google Patents

Abstract

The present invention is an oxide sintered body comprising a perovskite phase and a perivitellite phase represented by In ₂ O ₃ .

Description

Oxide sintered body and sputtering target

The present invention relates to an oxide sintered body and a sputtering target manufactured using the same.

Amorphous (amorphous) oxide semiconductors used for thin-film transistor (TFT) have higher carrier mobility and larger optical band gap than general-purpose amorphous silicon (a-Si). Films can be formed at low temperatures, so it is expected to be applied to next-generation displays that require large-scale, high-resolution, and high-speed driving, or resin substrates with low heat resistance. In the formation of the oxide semiconductor (film), a sputtering method in which a sputtering target is sputtered can be preferably used. The reason is that compared with the thin film formed by the ion plating method, the vacuum deposition method, or the electron beam evaporation method, the thin film formed by the sputtering method has a component composition or a film thickness in the film surface direction (inside the film surface). It has excellent in-plane uniformity and can form a thin film with the same composition as the sputtering target. Patent Document 1 describes a method for producing a garnet compound represented by A ₃ B ₂ C ₃ O ₁₂ as a compound of alumina and hafnium oxide. Among them, Sm ₃ Al ₂ Al ₃ O ₁₂ compounds are exemplified. Patent Document 2 describes a sputtering target of a compound containing an A ₃ B ₅ O ₁₂ garnet structure obtained by sintering a raw material containing indium oxide, yttrium oxide, and alumina or gallium oxide. This target contains a garnet structure, which reduces the resistance and reduces the abnormal discharge during sputtering. There are reports about its application to TFT devices with high mobility. Patent Document 3 describes an α-Al ₂ O ₃ ceramic composite material containing a compound containing SmAlO ₃ and NdAlO ₃ -type perovskite structures obtained by sintering raw materials including hafnium oxide and alumina. Prior Art Literature Patent Literature Patent Literature 1: Japanese Patent Laid-Open No. 2008-7340 Patent Literature 2: International Publication No. 2015/098060 Patent Literature 3: Japanese Patent Laid-Open No. 9-67194

However, on the other hand, requirements for higher-performance TFTs are becoming stronger, and materials with high mobility and less deterioration in semiconductor characteristics due to CVD (chemical vapor deposition) are strongly desired. An object of the present invention is to provide a novel oxide sintered body and a sputtering target. If an element with a large atomic radius, such as a lanthanum metal, is added to a target material based on indium oxide, the following cases may occur: the lattice constant of indium oxide is changed, or the sintering density does not increase, and the strength of the target material is increased. Reduce, or generate micro-cracks due to thermal stress in sputtering using high power, or cause abnormal discharge due to cracking. These phenomena cause defects in the obtained thin film and cause deterioration of TFT performance. In order to solve the above-mentioned problems, the present inventors made efforts to discover new substances based on indium oxide containing lanthanide-based metal elements that can be used as targets, and finally found perovskites containing lanthanide-based metal elements Phase and a novel oxide sintered body of the skeletal phase represented by In ₂ O ₃ . Furthermore, it has been found that a sputtering target using the oxide sintered body has advantageous characteristics as a target material, such as high sintering density, low bulk resistance, less warpage of the target, and high bonding rate. With these target characteristics, even in high-power sputtering, it is difficult to generate abnormal discharge and stable sputtering can be performed. In addition, it was found that a thin film obtained by sputtering the sputtering target exhibits excellent TFT performance (CVD resistance) when used in a TFT, and completed the present invention. According to the present invention, there are provided the following oxide sintered body, sputtering target, method for producing oxide semiconductor thin film, method for producing thin film transistor, and method for producing electronic device. What is claimed is: 1. An oxide sintered body comprising a perovskite phase and a falconite phase represented by In ₂ O ₃ . 2. The oxide sintered body according to 1, wherein the perovskite phase is a compound represented by the following general formula (I): LnAlO ₃ (I) (wherein, Ln represents a member selected from La, Nd, Sm, and Eu , Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu). 3. The oxide sintered body according to any one of 1 or 2, wherein the Ln is one or both of Sm and Nd. 4. The oxide sintered body according to 2 or 3, wherein the atomic ratio of In, Al and Ln in the oxide sintered body is in the following range: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) It is 0.01 or more and 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less. 5. A sputtering target manufactured using the oxide sintered body according to any one of 1 to 4. 6. A method for manufacturing an oxide semiconductor thin film, comprising forming a film using a sputtering target such as 5. 7. A method for manufacturing a thin film transistor, comprising the step of forming an oxide semiconductor thin film using a sputtering target such as 5. 8. A method for manufacturing an electronic device, comprising the steps of: forming an oxide semiconductor thin film using a sputtering target such as 5; manufacturing a thin film transistor including the oxide semiconductor thin film; and forming the thin film transistor Installed in electronic equipment. 9. An oxide semiconductor thin film comprising In, Al, and Ln, the Ln being one or more metals selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu Element, the atomic ratio of the In, the Al, and the Ln is in the following range: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 or more and 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more And below 0.18. 10. A thin film transistor comprising an oxide semiconductor thin film as in 9. 11. An electronic device comprising a thin film transistor according to 9. According to the present invention, a novel oxide sintered body and a sputtering target can be provided.

An oxide sintered body according to an embodiment of the present invention (hereinafter, referred to as a sintered body of the present invention) is characterized by including a perovskite phase, ₂ O ₃ Represented the ferromanganese phase. Perovskite phase in the sintered body of the present invention and composed of In ₂ O ₃ The expressed ferromanganese phase can be detected from an XRD (X-ray diffraction) map by, for example, an X-ray diffraction (XRD) method. The above-mentioned perovskite phase in the sintered body of the present invention is preferably a compound represented by the following general formula (I). LnAlO ₃ (I) (In the formula, Ln represents one or more metal elements selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu). Ln is particularly preferably either or both of Sm and Nd. The compound represented by the general formula (I) has a perovskite-type structure, and by including this structure, it can be a high-density sintered body. The perovskite compound represented by the general formula (I) may have a single crystal structure or a polycrystalline structure. The sintered body of the present invention includes a perovskite phase represented by the general formula (I), and ₂ O ₃ The expressed ferromanganese phase can increase the sintered density (relative density) and volume resistivity (bulk resistance). In addition, it is possible to reduce the expansion coefficient and increase the thermal conductivity. In addition, even in the case of a simple method of firing under special conditions using an atmosphere roaster under an oxygen atmosphere, or in the atmosphere, a sintered body having a lower volume resistivity and a higher sintering density can be formed. . The sintered body of the present invention having the above characteristics is preferably used as a target. By using the sintered body of the present invention as a target, it is possible to suppress the generation of stress, increase the strength or thermal conductivity of the target, suppress the coefficient of linear expansion, suppress the occurrence of micro-cracks or chipping of the target, and thereby suppress the occurrence of nodules or abnormal discharges. A sputtering target capable of sputtering with high power can be obtained. In addition, by using the sintered body of the present invention as a target, a high-performance TFT having high mobility and less deterioration in semiconductor characteristics due to chemical vapor deposition (CVD) can be obtained. A sputtering target according to an embodiment of the present invention (hereinafter referred to as a target of the present invention) is characterized by being produced using the sintered body of the present invention described above. The target of the present invention is manufactured by grinding and processing the sintered body of the present invention, and manufacturing the target by bonding metal indium or the like to a metal support such as a copper plate (hereinafter, also referred to as a back plate or a target support). . The method for producing the oxide sintered body of the present invention and the target of the present invention will be described below. The atoms of In, Al, and Ln in the sintered body used for the target of the present invention are preferably in the following ranges: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 or more and 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less, more preferably the following range: In / (In + Al + Ln) is 0.70 or more and 0.96 or less; Al / (In + Al + Ln) is 0.02 or more and 0.15 or less; Ln / (In + Al + Ln) is 0.02 or more And below 0.15. When In / (In + Al + Ln) is less than 0.64, the mobility of the TFT including the formed oxide semiconductor thin film may be reduced. When In / (In + Al + Ln) exceeds 0.98, there is a possibility that the stability of the TFT may not be obtained, or it may become difficult to become a semiconductor due to conductivity. When Al / (In + Al + Ln) is less than 0.01, the perovskite phase represented by the general formula (I) is not formed, and the stability of the TFT may not be obtained, or it may be difficult to become a semiconductor due to conductivity, or There is a possibility that stable sputtering cannot be performed. On the other hand, when Al / (In + Al + Ln) exceeds 0.18, the mobility of the TFT including the formed oxide semiconductor thin film may become small. When Ln / (In + Al + Ln) is less than 0.01, the perovskite phase represented by the general formula (I) is not formed, and the stability of the TFT may not be obtained, or it may be difficult to become a semiconductor due to conductivity, or There is a possibility that stable sputtering cannot be performed. On the other hand, when Ln / (In + Al + Ln) exceeds 0.18, the mobility of a TFT including the formed oxide semiconductor thin film may become small. The sintered body of the present invention may further contain a metal element with a tetravalent positive value. Thereby, sputtering can be performed more stably. Examples of the positive tetravalent metal element include Sn, Ti, Zr, Hf, Ce, and Ge. The sintered body of the present invention may contain one or more of these. Sn is preferred. Due to the doping effect of Sn, bulk resistance can be reduced, and sputtering can be performed more stably. Positive tetravalent metal elements are preferably solid-dissolved by In ₂ O ₃ The ferromanganese phase or perovskite phase represented by the general formula (I) is more preferably a solid solution consisting of In ₂ O ₃ Represented the ferromanganese phase. The solid solution is preferably a replacement type solid solution. Thereby, sputtering can be performed more stably. In addition, Ln and Al can also be dissolved in ₂ O ₃ Represented the ferromanganese phase. The solid solution of the positive tetravalent metal element, Ln, and Al can be identified based on, for example, the lattice constant measured by XRD. The content of the positive tetravalent metal element is preferably 100 ppm or more and 10,000 ppm or less, more preferably 500 ppm or more and 8000 ppm or less, and even more preferably, in terms of atomic concentration, relative to all metal elements in the oxide sintered body of the present invention. Above 800 ppm and below 6000 ppm. When it is less than 100 ppm, there is a possibility that the bulk resistance may increase. On the other hand, when it exceeds 10,000 ppm, the TFT including the formed oxide semiconductor film may be turned on or the on / off value may be reduced. In the sintered body of the present invention ₂ O ₃ The present ratio of the expressed ferromanganese phase is preferably 1 to 99 wt%, and more preferably 10 to 98 wt%. If by In ₂ O ₃ The presence ratio of the periclase phase is in the above range, and the perovskite phase is dispersed in In ₂ O ₃ In the crystal, it can be considered to be applied to a fluorescent material other than a target material by doping a rare earth element or the like. By In ₂ O ₃ The presence ratio of the expressed ferromanganese phase can be measured by the method described in the examples. In the sintered body of the present invention, it is preferable that ₂ O ₃ The expressed ferromanganese phase is the main component. If a crystalline structure other than the ferromanganese structure is precipitated as a main component, the mobility may be reduced. The so-called "by In ₂ O ₃ The term `` pylonite phase '' is the main component ₂ O ₃ The presence ratio of the expressed ferromanganese phase exceeds 50 wt%, preferably 70 wt% or more, more preferably 80 wt% or more, and still more preferably 85 wt% or more. In the sintered body of the present invention, the sintered density is preferably 6.5 to 7.1 g / cm ³ Within the range, more preferably 6.6 to 7.1 g / cm ³ Within range. If the sintered density is 6.5 ～ 7.1 g / cm ³ Within this range, when used as a target, the gap that is the cause of abnormal discharge or the origin of nodules can be reduced. The sintered density can be measured, for example, by the Archimedes method. In the sintered body of the present invention, the volume resistance is preferably 50 mΩ · cm or less, more preferably 30 mΩ · cm or less, and even more preferably 20 mΩ · cm or less. The lower limit is not particularly limited, but is usually 1 mΩ · cm or more or 5 mΩ · cm or more. When the volume resistance is 50 mΩ · cm or less, it is difficult to generate abnormal discharge caused by the target's charging when DC sputtering is performed with high power, and the plasma state is stable and it is difficult to generate sparks. In addition, when a pulsed DC sputtering device, an RF sputtering device, or an RF + DC sputtering device is used, the plasma is more stable and there is no problem such as abnormal discharge, and the sputtering can be performed stably. The volume resistance can be measured based on, for example, the four-probe method. Specifically, it can be measured based on a four-probe method (JIS R 1637) using a known resistivity meter. The measurement site is about 5 sites, and the average value is preferably a volume resistance value. In the case where the planar shape of the oxide sintered body is a quadrangle, the measurement site is preferably a total of 5 sites including a center and 4 points between the four corners and the center. In addition, when the planar shape of the oxide sintered body is circular, it is preferable to have a total of 5 positions inscribed at the center of the square of the circle and 4 points of the four corners of the square and the middle point of the center. In the sintered body of the present invention, the 3-point bending strength is preferably 120 MPa or more, more preferably 140 MPa or more, and even more preferably 150 MPa or more. When the bending strength at 3 points does not reach 120 MPa, when sputtering is performed with high power, there is a risk that the strength of the target is weak, the target is broken, or the chipping occurs, and the broken chip is scattered to the target. This is the cause of abnormal discharge. The three-point bending strength can be tested by, for example, JIS R 1601 "room temperature bending strength test of fine ceramics". Specifically, a standard test piece with a width of 4 mm, a thickness of 3 mm, and a length of 40 mm can be used. The test piece is placed on two fulcrum points arranged at a fixed distance (30 mm), and a crosshead speed of 0.5 is applied from the center between the fulcrum points. The load in mm / min was calculated from the maximum load when the test piece was broken. In the sintered body of the present invention, the linear expansion coefficient is preferably 8.0 × 10 ^-6 K ^-1 Below, more preferably 7.5 × 10 ^-6 K ^-1 The following is more preferably 7.0 × 10 ^-6 K ^-1 the following. The lower limit is not particularly limited, but is usually 5.0 × 10 ^-6 K ^-1 the above. Coefficient of linear expansion exceeding 8.0 × 10 ^-6 K ^-1 In this case, the target is heated during high-power sputtering, and the target expands, causing deformation between the copper plate and the joined copper plate, which may cause micro-cracks due to stress, or cause abnormal discharge due to cracking or chipping. Yu. The linear expansion coefficient can be obtained, for example, by using a standard test piece with a width of 5 mm, a thickness of 5 mm, and a length of 10 mm, setting the temperature rise rate to 5 ° C / min, and detecting the temperature arrival with a position detector. Displacement caused by thermal expansion at 300 ° C. In the sintered body of the present invention, the thermal conductivity is preferably 5.0 W / m ∙ K or more, more preferably 5.5 W / m ∙ K or more, further preferably 6.0 W / m ∙ K or more, and most preferably 6.5 W / m ∙ K or more. The upper limit is not particularly limited, but it is usually 10 W / m ∙ K or less. When the thermal conductivity is less than 5.0 W / m ∙ K, when sputtering is performed with high power, the temperature of the sputtered surface and the surface to be joined is different, and there may be micro-cracks on the target due to internal stress or Risk of cracking and chipping. The thermal conductivity can be calculated, for example, by using a standard test piece with a diameter of 10 mm and a thickness of 1 mm, and determining the specific heat capacity and thermal diffusivity by the laser flash method, and multiplying the density by the density of the test piece. . The metal elements of the sintered body of the present invention essentially include In, Al, Ln, and any positive tetravalent metal element. To the extent that the effects of the present invention are not impaired, unavoidable impurities may be further included. The metal elements of the sintered body of the present invention, for example, 90 atomic% or more, 95 atomic% or more, 98 atomic% or more, 99 atomic% or more, or 100 atomic% may also contain In, Al, and Ln, or In, Al, Ln, and regular four Valent metal element. The sintered body of the present invention can be produced by the steps of: preparing a mixed powder of raw material powder containing In, a raw material powder containing Al, and a raw material powder containing Ln; forming the mixed powder to manufacture a shaped body; and firing the shaped body . The mixed powder may also contain a raw material powder containing a metal element of tetravalent valence. The raw material powder is preferably an oxide powder. The mixing ratio of the raw material powder is made to correspond to, for example, the atomic ratio of the sintered body to be obtained. The average particle diameter of the raw material powder is preferably 0.1 to 1.2 μm, and more preferably 0.5 to 1.0 μm. The average particle diameter of the raw material powder can be measured by a laser diffraction type particle size distribution device or the like. The method of mixing and forming the raw materials is not particularly limited, and it can be performed by a known method. A binder may be added during mixing. The mixing of the raw materials can be performed using a known device such as a ball mill, a bead mill, a jet mill, or an ultrasonic device. The mixing time may be adjusted as appropriate, but is preferably about 6 to 100 hours. The molding method can, for example, press-mold the mixed powder into a molded body. By this step, the shape of a product (for example, a shape preferable as a sputtering target) can be formed. The mixed powder raw material can be filled into a forming mold, usually at 1000 kg / cm by die pressing or cold isostatic pressing (CIP) ² Forming is performed by the above pressure. In addition, during the forming treatment, a forming aid such as polyvinyl alcohol or polyethylene glycol, methyl cellulose, polyethylene wax, oleic acid, or stearic acid may be used. The obtained molded body can be sintered at, for example, a sintering temperature of 1200 to 1650 ° C for 10 hours or more to obtain a sintered body. The sintering temperature is preferably 1350 to 1600 ° C, more preferably 1400 to 1600 ° C, and even more preferably 1450 to 1600 ° C. The sintering time is preferably 10 to 50 hours, more preferably 12 to 40 hours, and even more preferably 13 to 30 hours. If the sintering temperature does not reach 1200 ° C or the sintering time does not reach 10 hours, the sintering is not sufficiently performed, so that the resistance of the target is not sufficiently reduced, which may cause a cause of abnormal discharge. On the other hand, if the calcination temperature exceeds 1650 ° C or the calcination time exceeds 50 hours, the average crystal grain size will increase due to significant grain growth, or coarse voids will be generated, thereby reducing the strength of the sintered body. Or the cause of abnormal discharge. In the normal pressure sintering method, the formed body is usually sintered in an atmospheric atmosphere or an oxygen atmosphere. The oxygen atmosphere is preferably an atmosphere having an oxygen concentration of, for example, 10 to 50% by volume. The density of the sintered body can be increased by performing the temperature increasing process in the atmosphere. Furthermore, it is preferable that the temperature increase rate during sintering is set to 50 to 150 ° C / hour from 800 ° C to the sintering temperature (1200 to 1650 ° C). In the sintered body of the present invention, the temperature range upward from 800 ° C is the range in which sintering is most vigorous. If the temperature increase rate in this temperature range is slower than 50 ° C./hour, crystal grain growth becomes remarkable, and there is a possibility that high density cannot be achieved. On the other hand, if the temperature increase rate is faster than 150 ° C./hour, a temperature distribution is generated in the formed body, and there is a possibility that the sintered body is warped or cracked. The heating rate of the sintering temperature from 800 ° C is preferably 60 to 140 ° C / hour, and more preferably 70 to 130 ° C / hour. The sputtering target of the present invention can be produced using the sintered body of the present invention described above. Thereby, an oxide semiconductor film can be manufactured by a vacuum process such as a sputtering method. The sputtering target can be produced, for example, by cutting or grinding a sintered body and bonding it to a back plate. For example, a highly oxidized sintered portion on the surface of the sintered body or a convex-concave surface can be removed by cutting. It can be set to a specified size. The surface can also be ground with # 200, # 400, and # 800. Thereby, abnormal discharge or generation of particles during sputtering can be suppressed. The cooling efficiency during sputtering is maintained, and the joining rate is preferably 90% or more, more preferably 95% or more, and even more preferably 99% or more. The bonding ratio herein refers to the ratio of the area of the surface where the target material and the target support material are joined via the bonding layer to the area of the surface where the target material and the target support overlap each other. The joining rate can usually be measured by an ultrasonic flaw detection device or the like. The method of joining the target and the target support will be described. Surface treatment is performed on the joint surface of the target material that has been processed into a specific shape with the target support. Generally, a commercially available spraying device can be used as the device used in the surface treatment. For example, the product name "PNEUMA BLASTER, SGF-5-B" manufactured by Fuji Manufacturing Co., Ltd. may be used. As the powder used for the blasting method, glass, alumina, zirconia, SiC, etc. can be used, and these can be appropriately selected according to the composition and hardness of the target material. After cleaning the surface of the obtained target material as required, a bonding material such as metal indium solder is coated on the bonding surface. A bonding material such as metal indium solder is coated on the bonding surface of the back plate after the cleaning process is performed if necessary. In this case, when the target is made of a material that is not directly welded to the bonding material, a copper surface having excellent wettability of the bonding material and the bonding material is formed on the bonding surface of the target by sputtering, plating, or the like in advance. After the thin film layer of nickel or the like is heated to a temperature higher than the melting point of the bonding material using the target and the bonding material is coated, or the bonding material may be directly coated on the bonding surface of the target using ultrasonic waves. Next, the target support coated with the bonding material can be heated to a temperature above the melting point of the bonding material used to melt the bonding material layer on the surface, and the powder can be placed on the surface, and the target material and the back plate can be cooled after bonding. The target was obtained at room temperature. The sputtering target of the present invention can be applied to a direct current (DC) sputtering method, a high frequency (RF) radio frequency sputtering method, an alternating current (AC) alternative current sputtering method, a pulsed DC sputtering method, etc. . An oxide semiconductor thin film can be obtained by forming a film using the sputtering target of the present invention. Thereby, a thin film exhibiting excellent TFT performance when used in a TFT can be formed. Film formation can be performed by a vapor deposition method, a sputtering method, an ion plating method, a pulse laser vapor deposition method, or the like. Sputtering on the introduction of O ₂ , H ₂ It may be performed under an oxidizing argon gas atmosphere such as O containing an oxygen atom (oxidizing gas). By sputtering in an oxidizing gas atmosphere, the generation of impurities that can be an obstacle to light transmission required for the obtained semiconductor characteristics and light stability can be suppressed. The concentration of the oxidizing gas may be appropriately adjusted according to the required semiconductor characteristics of the film, especially the carrier concentration. This adjustment can be performed, for example, by a substrate temperature, a sputtering pressure, or the like. As the sputtering gas, Ar-O is preferably used from the viewpoint of easily controlling the composition of the gas. ₂ Gas or Ar-H ₂ O-based gas, Ar-O with better controllability ₂ Department of gas. By using Ar-O ₂ By using a gas, a semiconductor film having semiconductor characteristics excellent in light stability can be obtained. O ₂ The concentration is preferably 0.2 to 50% by volume. In O ₂ When the concentration is less than 0.2% by volume, the obtained film is colored yellow, which may cause poor light stability. On the other hand, in O ₂ When the concentration exceeds 50% by volume, the deposition rate of the thin film during sputtering is slow, so that the production cost may increase. Again, Yu Jiang O ₂ When the concentration is set to about 10% by volume, the obtained film has a carrier concentration of 10 by heat treatment. ¹⁵ ~ 10 ¹⁸ cm ^-3 It can be used as an excellent semiconductor film. The pressure before the film formation (pressure in the chamber) in the sputtering device is preferably 10 ^-6 ~ 10 ^-3 Pa. The pressure in the chamber exceeds 10 ^-3 In the case of Pa, it may be affected by the residual moisture remaining in the vacuum, so resistance control may be difficult. On the other hand, the pressure in the chamber does not reach 10 ^-6 In the case of Pa, since it takes time to evacuate, there is a possibility that productivity may deteriorate. The current density during sputtering (value obtained by dividing the input power by the area of the target surface) is preferably 1 to 10 W / cm ² . For current density less than 1 W / cm ² In this case, there is a possibility that the discharge is unstable. On the other hand, when the current density exceeds 10 W / cm ² In this case, the target may be broken due to the heat generated. The pressure during sputtering is preferably 0.01 to 20 Pa. When the sputtering pressure does not reach 0.01 Pa, the discharge may be unstable. On the other hand, when the sputtering pressure exceeds 20 Pa, the sputtering discharge may be unstable, and the sputtering gas itself may be taken into the conductive film to reduce the characteristics of the film. The sputtering pressure is preferably 0.05 to 5 Pa, and more preferably 0.1 to 1 Pa. Examples of the substrate for forming the oxide semiconductor thin film of the present invention include glass, ceramics, plastics, and metals. The substrate temperature during film formation is not particularly limited, but is preferably 300 ° C. or lower from the viewpoint of easily obtaining an amorphous film. When the substrate temperature is not intentionally heated, it may be about room temperature. It can also be used directly as a semiconductor element in the state of an amorphous thin film, but it can also be formed into an amorphous film as soon as it is formed. After forming an island-shaped semiconductor portion by patterning, it can be made by heat treatment. After crystallization, a source electrode and a drain electrode are connected to form a thin-film semiconductor device. After the film is formed, the oxygen introduced during the sputtering is not fixed in the film, so the substrate may be subjected to post-heating (heat treatment). This heat treatment is preferably performed at 150 to 400 ° C in the atmosphere, nitrogen or vacuum, and more preferably at 200 to 350 ° C. By performing the heat treatment at 200 ° C to 350 ° C, it is possible to prevent the deterioration of the semiconductor film by crystallization, suppress the change in the carrier concentration of the semiconductor film, or widen the band gap excellent in light stability to improve the transmittance. Whether or not crystallization has occurred is determined by XRD measurement based on whether a peak is observed. In the case where the heat treatment does not reach 150 ° C., oxygen in the thin film may be gradually discharged to cause deterioration of the semiconductor film. On the other hand, when the heat treatment exceeds 350 ° C., the carrier concentration of the semiconductor film may decrease. An oxide semiconductor thin film according to an embodiment of the present invention (hereinafter referred to as the oxide semiconductor thin film of the present invention) is manufactured by the sputtering target of the present invention described above. The oxide semiconductor thin film of the present invention includes In, Al, and Ln. The Ln is selected from one or more of La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. For metal elements, the atomic ratios of In, Al, and Ln are in the following ranges: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 or more and 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less. The atoms of In, Al, and Ln in the oxide semiconductor thin film of the present invention are preferably in the following ranges: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 or more and 0.18 or less; Ln / ( In + Al + Ln) is 0.01 or more and 0.18 or less. The following ranges are more preferable: In / (In + Al + Ln) is 0.70 or more and 0.96 or less; Al / (In + Al + Ln) is 0.02 or more and 0.15 or less; and Ln / (In + Al + Ln) is 0.02 or more and 0.15 or less. The specific basis of the upper and lower limits of the atomic ratio of the oxide semiconductor thin film is the same as the specific basis of the upper and lower limits of the atomic ratio of the oxide sintered body of the present invention. The content (atomic ratio) of each metal element in the oxide semiconductor film can be measured by ICP (Inductive Coupled Plasma) or XRF (X-ray Fluorescence) measurement. The amount is measured and determined. For ICP measurement, an induction plasma luminescence analyzer can be used. For XRF measurement, a thin-film fluorescent X-ray analyzer (AZX400, manufactured by RIGAKU) can be used. In addition, the use of a sector-type dynamic secondary ion mass spectrometer SIMS (secondary ion mass spectroscopy) analysis can also analyze the content (atomic ratio) of each metal element in the oxide semiconductor film with the same accuracy as the induction plasma emission analysis. The top surface of a standard oxide film whose metal atomic ratio is determined by an inductive plasma luminescence analysis device or a thin film fluorescent X-ray analysis device is formed from the same material as the TFT element with a channel length to form an active source. An electrode and a drain electrode are used as standard materials, and an oxide semiconductor layer is analyzed by a sector-type dynamic secondary ion mass spectrometer SIMS (IMS7f-Auto, manufactured by AMETEK) to obtain the mass intensity of each element, and produced Calibration curve of known element concentration and mass spectrum intensity. Secondly, when the oxide semiconductor film portion of the actual TFT element is based on the mass spectrum intensity obtained by the sector-type dynamic secondary ion mass spectrometer SIMS analysis, and the atomic ratio is calculated using the above calibration curve, it can be confirmed that the calculated atomic ratio is different. The atomic ratio of the oxide semiconductor film measured by the thin film fluorescent X-ray analysis device or the induction plasma emission analysis device is within 2 atomic%. A thin film transistor (TFT) according to an embodiment of the present invention (hereinafter referred to as a TFT of the present invention) includes the above-mentioned oxide semiconductor thin film. An oxide semiconductor thin film can be preferably used as the channel layer, for example. The TFT of the present invention preferably has the following characteristics. The saturation mobility of the TFT is preferably 1.0 cm ² / V ∙ s or more and 50.0 cm ² / V ∙ s or less. By making the saturation mobility of the TFT 1.0 cm ² Above / V ∙ s, it can drive the transmission transistor of CMOS image sensor or eliminate the transistor, liquid crystal display or organic EL (Electroluminescence) display. By making the saturation mobility of the TFT 50.0 cm ² / V ∙ s or less, the breaking current can be 10 ^-12 Below A, and the on-off ratio is 10 ⁸ the above. The saturation mobility of a TFT can be determined from the transfer characteristics when a 20 V drain voltage is applied. Specifically, a graph of the transfer characteristic Id-Vg is prepared, the transconductance (Gm) of each Vg is calculated, and the saturation mobility is calculated by the equation of the saturation region. Id is the current between the source and drain electrodes, and Vg is the gate voltage when a voltage Vd is applied between the source and drain electrodes. The threshold voltage (Vth) is preferably -3.0 V or more and +3.0 V or less, and more preferably -2.5 V or more and +2.5 V or less. If the threshold voltage is -3.0 V or more and +3.0 V or less, the off current is small, a thin film transistor with a relatively large on-off can be formed, and it can be combined with a circuit composed of a block-shaped silicon wafer. drive. In the present invention, the threshold voltage (Vth) is defined as Id = 10 according to the graph of the transfer characteristics. ^-9 V of A. Better on / off is 10 ⁶ Above and 10 ¹² Below, more preferably 10 ⁷ Above and 10 ¹¹ Below, further preferably 10 ⁸ Above and 10 ¹¹ the following. If the on / off ratio is 10 ⁶ The above can drive a liquid crystal display. If the on / off ratio is 10 ¹² In the following, the organic EL panel with large contrast can be driven, and the off current can be reduced to 10 ^-12 Below A, when the transistor is used in the CMOS image sensor or the transistor is eliminated, the image retention time can be extended or the sensitivity can be improved. In the present invention, the on / off ratio is calculated by setting the value of Id of Vg = -10 V to the value of the off current, and setting the value of Id of Vg = 20 V to the value of the on current. ON / OFF]. Off current value is preferably 10 ^-11 Below A, more preferably 10 ^-12 A or less. If the disconnection current is 10 ^-11 Below A, it is possible to drive an organic EL panel with a large contrast, and when it is used for the transmission transistor of the CMOS image sensor or to eliminate the transistor, the image retention time can be extended or the sensitivity can be improved. The defect density of the oxide semiconductor film used for the channel layer of the TFT of the present invention is preferably 5.0 × 10 ¹⁶ cm ^-3 Below, more preferably 1.0 × 10 ¹⁶ cm ^-3 the following. By lowering the defect density as described above, the mobility of the thin film transistor is further increased, and the stability during light irradiation and the stability against heat are increased, so that the TFT operates stably. The device structure of the TFT is not particularly limited, and various known device structures can be used. The TFT of the present invention can also be applied to various integrated circuits such as field effect transistors, logic circuits, memory circuits, and differential amplifier circuits. Furthermore, in addition to field-effect transistors, they can also be applied to electrostatic induction transistors, Schottky barrier transistors, Schottky diodes, and resistor elements. Moreover, it can be used for electronic devices, such as a display device, such as a liquid crystal display and an organic electroluminescence display. A case where the TFT of the present invention is used in a display device will be described. FIG. 1 (A) is a top view of a display device including the TFT of the present invention, and FIG. 1 (B) is a circuit of a pixel portion that can be used when a liquid crystal element using the TFT of the present invention is applied to a pixel portion of a display device FIG. 1 (C) is a diagram of a circuit of a pixel portion that can be used when an organic EL element using the TFT of the present invention is applied to a pixel portion of a display device. The TFT of the present invention arranged in the pixel portion can be formed as described above. In addition, the TFT of the present invention can be easily set to an n-channel type. Therefore, a part of the driving circuit which can be composed of an n-channel transistor in the driving circuit is formed on the same substrate as the transistor of the pixel portion. In this way, by using the transistor shown in the above embodiment for the transistor or driving circuit of the pixel portion, a highly reliable display device can be provided. The display device of FIG. 1 (A) is an active matrix display device. The display device includes a pixel portion 11, a first scanning line driving circuit 12, a second scanning line driving circuit 13, and a signal line driving circuit 14 on a substrate 10. In the pixel portion 11, a plurality of signal lines are extended from the signal line driving circuit 14, and a plurality of scanning lines are extended from the first scanning line driving circuit 12 and the second scanning line driving circuit 13. Pixels having display elements are arranged in a matrix shape at the intersections of the scanning lines and the signal lines. The substrate 10 of the display device is connected to a timing control circuit (also referred to as a controller and a control integrated circuit (Integrated Circuit)) through a connection portion such as a flexible printed circuit (FPC). In FIG. 1 (A), the first scanning line driving circuit 12, the second scanning line driving circuit 13, and the signal line driving circuit 14 are formed on the same substrate 10 as the pixel portion 11. Therefore, the number of parts such as a driving circuit provided externally is reduced, so that the cost can be reduced. When a driving circuit is provided outside the substrate 10, it is necessary to extend the wiring so that the number of connections between the wirings increases. When a driving circuit is provided on the same substrate 10, the number of connections between wirings can be reduced, so that reliability can be improved or yield can be improved. An example of the circuit configuration of the pixel portion is shown in FIG. 1 (B). This example is applicable to a circuit of a pixel portion of a pixel portion of a VA (Vertical Aligned) liquid crystal display device. The circuit of the pixel portion can be applied to a configuration having a plurality of pixel electrodes in one pixel. Each pixel electrode is connected to a different transistor, and each transistor is configured to be driven by a different gate signal. Thereby, the signals applied to the pixel electrodes of the pixels of the multi-domain design can be controlled independently. The gate wiring 21 of the transistor 24 and the gate wiring 22 of the transistor 25 are separated from each other so that different gate signals can be given. On the other hand, a source electrode or a drain electrode 23 functioning as a data line is commonly used in the transistor 24 and the transistor 25. The transistor 24 and the transistor 25 can use the TFT of the present invention as appropriate. Accordingly, a highly reliable liquid crystal display device can be provided. A first pixel electrode is electrically connected to the transistor 24, and a second pixel electrode is electrically connected to the transistor 25. The first pixel electrode is separated from the second pixel electrode. The shapes of the first pixel electrode and the second pixel electrode are not particularly limited. For example, the first pixel electrode may be V-shaped. The gate electrode of the transistor 24 is connected to the gate wiring 21, and the gate electrode of the transistor 25 is connected to the gate wiring 22. Different gate signals can be given to the gate wiring 21 and the gate wiring 22 to make the operation timing of the transistor 24 and the transistor 25 different, and control the alignment of the liquid crystal. The storage capacitor may be formed by the capacitor wiring 20, a gate insulating film functioning as a dielectric, and a capacitor electrode electrically connected to the first pixel electrode or the second pixel electrode. The multi-domain structure includes a first liquid crystal element 26 and a second liquid crystal element 27 in one pixel. The first liquid crystal element 26 is composed of a liquid crystal layer between the first pixel electrode, the counter electrode and the like, and the second liquid crystal element 27 is composed of a liquid crystal layer between the second pixel electrode and the counter electrode and the like. . The circuit of the pixel portion shown in FIG. 1 (B) is not limited to this. For example, a switch, a resistive element, a capacitive element, a transistor, a sensor, or a logic circuit may be added to the pixel shown in FIG. 1 (B). Another example of the circuit configuration of a pixel is shown in FIG. 1 (C). This example is a pixel structure of a display device using an organic EL element, and shows an example in which two n-channel transistors are used for one pixel. The oxide semiconductor film of the present invention can be used in a channel formation region of an n-channel type transistor. The circuit of the pixel portion can be driven by digital time gray scale. The switching transistor 31 and the driving transistor 32 can suitably use the TFT of the present invention. Thereby, an organic EL display device with high reliability can be provided. The circuit configuration of the pixel portion is not limited to the pixel configuration shown in FIG. 1 (C). For example, a switch, a resistive element, a capacitive element, a sensor, a transistor, or a logic circuit may be added to the circuit of the pixel portion shown in FIG. 1 (C). The operation of the solid-state imaging device including the TFT of the present invention will be described below. A CMOS (Complementary Metal Oxide Semiconductor) image sensor is a solid-state imaging element that holds a potential in a signal charge storage section and outputs the potential to a vertical output line through an amplified transistor. If there is a leakage current in the reset transistor and / or the transmission transistor included in the CMOS image sensor, the leakage current causes charging or discharging, so that the potential of the signal charge storage section changes. If the potential of the signal charge storage section changes, the potential of the amplification transistor also changes to a value that deviates from the original potential, so that the captured image deteriorates. The effect of the operation when the TFT of the present invention is applied to a reset transistor and a transmission transistor of a CMOS image sensor will be described. Furthermore, any of a thin film transistor or a bulk transistor can be used as the amplification transistor. FIG. 2 is a diagram showing an example of a pixel configuration of a CMOS image sensor. The pixel is composed of a photodiode 40 as a photoelectric conversion element, a transmission transistor 41, a reset transistor 42, an amplification transistor 43, and various wirings, and a plurality of pixels are arranged in a matrix to form a sensor. Alternatively, a selection transistor that is electrically connected to the amplification transistor 43 may be provided. "OS" written in the transistor symbol means Oxide Semiconductor, and "Si" means silicon, which means a better material when applied to each transistor. The photodiode 40 is connected to the source side of the transmission transistor 41, and a signal charge storage portion 44 (also referred to as FD (Floating Diffusion): floating diffusion) is formed on the drain side of the transmission transistor 41. A source of the reset transistor 42 and a gate of the amplifier transistor 43 are connected to the signal charge storage portion 44. As another configuration, the reset power line 46 may be deleted. For example, there is a method in which the drain of the reset transistor 42 is connected to the power line 45 or the vertical output line 47 without being connected to the reset power line 46. [Examples] Hereinafter, the present invention will be described more specifically with reference to examples. However, the present invention is not limited to the following examples, and can be appropriately modified and implemented within a range suitable for the gist of the present invention. Any of them is included in the technical scope of the present invention. [Production of oxide sintered body] Examples 1 to 4 Weighed rhenium oxide powder, indium oxide powder, and alumina powder so as to have the ratio shown in Table 1 below, and put them into a crucible made of polyethylene. The powder was produced by mixing and pulverizing with a dry ball mill for 72 hours. The mixed powder was charged into a mold at 500 kg / cm ² The pressure is formed into a press-formed body. The molded body was set at 2000 kg / cm ² The pressure is densified by CIP. Next, this molded article was placed in a normal-pressure baking furnace, and after being held at 350 ° C. for 3 hours in an atmospheric atmosphere, the temperature was raised at 50 ° C./hour, and sintering was performed at 1350 ° C. for 40 hours. Thereafter, it was left to cool to obtain an oxide. Sintered body. [Characteristic Evaluation of Oxide Sintered Body] (1) Measurement of XRD The X-ray diffraction (XRD) of the sintered body was measured by an X-ray diffraction measuring device Smartlab under the following conditions. The XRD pattern obtained by analyzing the powder X-ray diffraction pattern comprehensive analysis software JADE6 (RIGAKU Co., Ltd.) was used to determine the crystal phase in the sintered body. The results are shown in Table 1. ∙ Device: Smartlab (manufactured by RIGAKU) ∙ X-ray: Cu-Kα line (wavelength 1.5418 Å) ∙ 2θ-θ reflection method, continuous scanning (2.0 ° / min) ∙ Sampling interval: 0.02 ° ∙ Slit DS (divergence (Slit), SS (scattering slit), RS (light receiving slit): 1 mm The XRD patterns of the sintered bodies obtained in Examples 1 to 4 are shown in FIGS. 1 to 4 respectively. As can be seen from FIGS. 1 to 4, the sintered bodies obtained in the respective examples have a perovskite phase and a ferromanganese phase shown in Table 1. (2) In ₂ O ₃ Existence ratio (wt%) of In in the obtained sintered body ₂ O ₃ The existence ratio (wt%) is calculated by a usual method. That is, the distribution of X-ray diffraction is analyzed by JADE6, and the crystalline structure of the sintered body is obtained by full-pattern fitting (WPF). Furthermore, In was obtained from the peak intensity ratio. ₂ O ₃ Existence ratio. The results are shown in Table 1. (3) Sintered density (g / cm ³ ) Determine the sintered density of the obtained sintered body by Archimedes method (g / cm ³ ). The results are shown in Table 1. (4) Volume resistance (mΩ ∙ cm) Using a resistivity meter Loresta AXMCP-T370 (manufactured by Mitsubishi Chemical Corporation), the volume resistance (mΩ ∙ cm) of the obtained sintered body was measured based on the four-probe method (JISR 1637). . The results are shown in Table 1. [Table 1] [ Production of Sputtering Target] Example 5 Weigh rhenium oxide powder, indium oxide powder, and alumina powder so as to have the ratio shown in Table 2 below, and put them into a crucible made of polyethylene. The ball mill was mixed and pulverized for 72 hours to prepare a mixed powder. The mixed powder was charged into a mold at 500 kg / cm ² The pressure is formed into a press-formed body. The molded body was set at 2000 kg / cm ² The pressure is densified by CIP. Next, the formed article was placed in a normal-pressure baking furnace, and after being held at 350 ° C. for 10 hours in the atmosphere, the temperature was raised at 50 ° C./hour, and sintering was performed at 1450 ° C. for 40 hours. Thereafter, it was allowed to stand and cool to obtain oxidation.物 Sintered body. The characteristics of the sintered body were evaluated in the same manner as in Examples 1 to 4. The results are shown in Table 2. Grinding the obtained oxide sintered body to produce 4 inches A circular plate of an oxide sintered body of 5 mmt. The circular plate was bonded to a copper back plate of 8 mm thickness using molten metal indium. [Characteristic Evaluation of Sputtering Target] (1) Warpage (mm) of the target The warpage (mm) of the obtained target was measured by the following method. The results are shown in Table 2. The target was placed on a stationary plate, and the gap was measured using a feeler gauge as the warpage amount (mm). (2) Bonding rate (%) of the target The bonding rate (%) of the obtained target was measured by the following method. The results are shown in Table 2. The joining rate is measured by an ultrasonic flaw detector, and the ratio of the joined parts is calculated based on the target area. [Table 2] [Production of oxide semiconductor thin film] Example 6 Using the sputtering target obtained in Example 5, a channel-shaped metal mask was used on a silicon substrate with a thermal oxide film, and an oxide semiconductor layer was formed by sputtering. (Channel layer). The sputtering conditions were performed at sputtering pressure = 0.5 Pa, oxygen partial pressure = 5%, substrate temperature = room temperature, and the film thickness was set to 50 nm. Next, a 50 nm titanium electrode was formed using a source and drain-shaped metal mask. Finally, annealing is performed in the air at 300 ° C. for 1 hour to obtain a simple TFT with a bottom gate and a top contact having a channel length of 200 μm and a channel width of 1000 μm. The annealing conditions are appropriately selected while observing the carrier concentration in the channel portion in a range of 250 ° C. to 450 ° C. for 0.5 hours to 10 hours. As a result of evaluating the characteristics of the obtained TFT, the mobility = 14 cm ² / V ∙ sec, current value exceeds 10 ^-8 The value of the gate voltage of A is Vth> 0.45 V, and the S value (Swing Factor) = 0.72. This TFT element was mounted in a CVD apparatus, and SiO was heated at 350 ° C. ₂ The film was formed to a thickness of 100 nm as a passivation film, and thereafter, TFT characteristics were evaluated after annealing at 300 ° C for 1 hour in the atmosphere. As a result, mobility = 12 cm ² / V ∙ sec, current value exceeds 10 ^-8 The gate voltage value of A is Vth> 0.32 V, and the S value (Swing Factor) = 0.78, which can roughly reproduce the characteristics before CVD. Also, the off current is 10 ^-12 A. Based on these results, it can also be used as a transistor of a display device of a display, or as a cancellation transistor or a transmission transistor of a CMOS image sensor. Examples 7 to 9 The neodymium oxide powder, indium oxide powder, and alumina powder were weighed so as to have the ratios shown in Table 3 below, and charged into a crucible made of polyethylene and subjected to a dry ball mill for 72 hours. The powder is mixed and pulverized. The mixed powder was loaded into a mold at 500 kg / cm ² The pressure is formed into a press-formed body. The molded body was set at 2000 kg / cm ² The pressure is densified by CIP. Next, this molded article was placed in a normal-pressure baking furnace, and after being held at 350 ° C. for 3 hours in an atmospheric atmosphere, the temperature was raised at 50 ° C./hour, and sintering was performed at 1350 ° C. for 40 hours. Thereafter, it was left to cool to obtain an oxide. Sintered body. About the obtained oxide sintered body, characteristics of the oxide sintered body were evaluated in the same manner as in Examples 1 to 4. The results are shown in Table 3. [table 3] [Manufacturing of sputtering target] Examples 10 to 12 Weighed rhenium oxide powder, indium oxide powder, and alumina powder so as to have the ratio shown in Table 4 below, and put them into a polyethylene crucible. The powder was mixed and pulverized by a dry ball mill for 72 hours. The mixed powder was loaded into a mold at 500 kg / cm ² The pressure is formed into a press-formed body. The molded body was set at 1000 kg / cm ² The pressure is densified by CIP. Next, the formed article was placed in a normal pressure sintering furnace, and was left to stand at 350 ° C for 3 hours in the atmosphere, and then heated at 50 ° C / hour, sintered at 1420 ° C for 28 hours, and then left to cool to obtain an oxide Sintered body. About the obtained oxide sintered body, characteristics of the oxide sintered body were evaluated in the same manner as in Examples 1 to 4. The results are shown in Table 4. The XRD patterns of the sintered bodies obtained in Examples 10 to 12 are shown in FIGS. 9 to 11, respectively. As can be seen from FIGS. 9 to 11, the sintered bodies obtained in the respective examples have a perovskite phase and a ferromanganese phase shown in Table 4. Grinding the obtained oxide sintered body to produce 4 inches A circular plate of an oxide sintered body of 5 mmt. The circular plate was bonded to a copper backplane of 8 mmt thickness using molten metal indium. [Evaluation of sputtering target] (1) Warpage (mm) of target The warpage (mm) of the obtained target was measured by the following method. The results are shown in Table 4. The target was placed on a stationary plate, and the gap was measured using a feeler gauge as the warpage amount (mm). (2) Bonding rate (%) of the target The bonding rate (%) of the obtained target was measured by the following method. The results are shown in Table 4. The joining rate is measured by an ultrasonic flaw detector and the ratio of the joined parts is calculated based on the target area. [Table 4] [Manufacture of oxide semiconductor thin film] Example 13 Using the sputtering target obtained in Example 11, a channel-shaped metal mask was used on a silicon substrate with a thermal oxide film, and an oxide semiconductor layer was formed by sputtering. (Channel layer). Sputtering conditions were performed at sputtering pressure = 0.5 Pa, oxygen partial pressure = 1%, substrate temperature = room temperature, and the film thickness was set to 50 nm. Second, a 50 nm titanium electrode was formed using a source and drain-shaped metal mask. Finally, annealing was performed in the air at 350 ° C. for 1 hour to obtain a simple TFT with a bottom gate and a top contact having a channel length of 200 μm and a channel width of 2000 μm. The annealing conditions are appropriately selected while observing the carrier concentration in the channel portion in a range of 250 ° C. to 450 ° C. for 0.5 hours to 10 hours. As a result of measuring the XRD of the film after heat treatment at 350 ° C for 1 hour, ₂ O ₃ It is confirmed that crystallization was observed in the graph of the skeletal structure. As a result of evaluating the characteristics of the obtained TFT, the mobility = 17 cm ² / V ∙ sec, current value exceeds 10 ^-8 The value of the gate voltage of A is Vth> 0.15 V, and the S value (Swing Factor) = 0.22. This TFT element was mounted in a CVD apparatus, and SiO was heated at 300 ° C. ₂ The film was formed to a thickness of 100 nm as a passivation film, and thereafter, the characteristics of the TFT after annealing at 350 ° C. for 1 hour in the atmosphere were evaluated. As a result, mobility = 21 cm ² / V ∙ sec, current value exceeds 10 ^-8 The gate voltage value of A is Vth> 0.24 V, and the S value (Swing Factor) = 0.26, which can roughly reproduce the characteristics before CVD. Also, the off current is 10 ^-12 A or less. Based on these results, it can also be used as a transistor of a display device of a display, or as a cancellation transistor or a transmission transistor of a CMOS image sensor. [Industrial Applicability] The oxide sintered body of the present invention can be used for a sputtering target, and also for manufacturing an oxide semiconductor film of a thin film transistor (TFT) used in a display device such as a liquid crystal display or an organic EL display. it works. The embodiments and / or examples of the present invention have been described in detail in the foregoing, but the industry can easily implement the examples and / or the examples without substantially departing from the novel teaching and effects of the present invention. The embodiment is variously modified. Therefore, these various changes are included in the scope of the present invention. The entire contents of the Japanese application specification, which forms the basis of the Paris Convention priority in this case, are incorporated herein by reference.

10‧‧‧ substrate

11‧‧‧ pixels

12‧‧‧1st scan line driving circuit

13‧‧‧Second scan line driving circuit

14‧‧‧Signal line drive circuit

20‧‧‧Capacitor wiring

21‧‧‧Gate wiring

22‧‧‧Gate wiring

23‧‧‧source electrode or drain electrode

24‧‧‧ Transistor

25‧‧‧Transistor

26‧‧‧The first liquid crystal element

27‧‧‧ 2nd liquid crystal element

31‧‧‧Switching transistor

32‧‧‧ Driving transistor

40‧‧‧photodiode

41‧‧‧Transistor

42‧‧‧Reset transistor

43‧‧‧Amplified transistor

44‧‧‧Signal charge storage section

45‧‧‧Power cord

46‧‧‧Reset power cord

47‧‧‧vertical output line

In FIG. 1, FIG. 1 (A) is a top view of a display device including the TFT of the present invention, and FIG. 1 (B) is a pixel portion usable when a liquid crystal element including the TFT of the present invention is applied to a pixel portion of a display device FIG. 1 (C) is a circuit diagram of a pixel portion that can be used in a case where an organic EL element including the TFT of the present invention is applied to a pixel portion of a display device. FIG. 2 shows an example of a circuit configuration of a CMOS image sensor. FIG. 3 is an X-ray diffraction pattern of the oxide sintered body of Example 1. FIG. FIG. 4 is an X-ray diffraction pattern of the oxide sintered body of Example 2. FIG. FIG. 5 is an X-ray diffraction pattern of the oxide sintered body of Example 3. FIG. FIG. 6 is an X-ray diffraction pattern of the oxide sintered body of Example 4. FIG. FIG. 7 is an X-ray diffraction pattern of the oxide sintered body of Example 5. FIG. FIG. 8 is an X-ray diffraction pattern of the oxide sintered body of Example 7. FIG. FIG. 9 is an X-ray diffraction pattern of the oxide sintered body of Example 8. FIG. FIG. 10 is an X-ray diffraction pattern of the oxide sintered body of Example 9. FIG. FIG. 11 is an X-ray diffraction pattern of the oxide sintered body of Example 10. FIG. FIG. 12 is an X-ray diffraction pattern of the oxide sintered body of Example 11. FIG. FIG. 13 is an X-ray diffraction pattern of the oxide sintered body of Example 12. FIG.

Claims (11)

An oxide sintered body includes a perovskite phase and a perivitellite phase represented by In ₂ O ₃ . The oxide sintered body according to claim 1, wherein the perovskite phase is a compound represented by the following general formula (I): LnAlO ₃ (I) (wherein, Ln represents a member selected from La, Nd, Sm, and Eu , Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu). The oxide sintered body according to claim 1, wherein the Ln is either one or both of Sm and Nd. For example, the oxide sintered body of claim 2, wherein the atomic ratio of In, Al and Ln in the oxide sintered body is in the following range: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 The above is 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less. A sputtering target produced by using an oxide sintered body according to any one of claims 1 to 4. A method for manufacturing an oxide semiconductor thin film, which is characterized by forming a film using a sputtering target as claimed in claim 5. A method for manufacturing a thin film transistor, which comprises a step of forming an oxide semiconductor thin film using a sputtering target as claimed in claim 5. An electronic device manufacturing method, comprising the steps of: forming an oxide semiconductor thin film using a sputtering target as claimed in claim 5; manufacturing a thin film transistor including the oxide semiconductor thin film; and forming the thin film transistor Installed in electronic equipment. An oxide semiconductor thin film comprising In, Al, and Ln, the Ln is one or more metal elements selected from the group consisting of La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, The atomic ratios of In, Al, and Ln are in the following ranges: In / (In + Al + Ln) is 0.64 or more and 0.98 or less; Al / (In + Al + Ln) is 0.01 or more and 0.18 or less; Ln / (In + Al + Ln) is 0.01 or more and 0.18 the following. A thin film transistor comprising an oxide semiconductor thin film as claimed in claim 9. An electronic machine comprising a thin film transistor as claimed in claim 10.