TW201824408A - Substrate-free semiconductor package manufacturing method - Google Patents

Abstract

A substrateless semiconductor package manufacturing method comprising: providing a semiconductor die to form a bump on a bonding pad of the semiconductor die; providing a substrate, forming a metal pattern on the surface of the substrate, and bumping the bump of the semiconductor die in a flip chip manner The metal pattern is filled with an encapsulant on the first surface of the substrate, and the substrate is removed after the encapsulant is cured.

Description

 Substrate-free semiconductor package manufacturing method  

The present invention relates to a semiconductor packaging method, and more particularly to a substrateless semiconductor packaging method.

Please refer to FIG. 1. FIG. 1 illustrates a conventional semiconductor package having a die 20, and the die 20 is attached to the substrate 10 via the adhesive 30. The die is wire bonded or flipped. A Flip chip (not shown) is connected to the conductive line on the substrate 10 and then electrically connected to the package pad 50 via the conductive via 40 on the substrate 10. In this conventional packaging method, whether the die is placed in a wire bonding manner or a flip chip manner, the thickness H1 of the final package is too thick, which is disadvantageous for miniaturized electronic products. Taking FIG. 1 as an example, the final package thickness H1 is equal to the thickness H2 of the substrate 10 itself plus the thickness H3 of the package. In response to the demand for miniaturized electronic products, it is necessary to reduce the thickness of semiconductor products after packaging.

A method of fabricating a substrateless semiconductor package, comprising: providing a semiconductor die having a plurality of bond pads, and forming a bump on each bond pad of the semiconductor die. Providing a substrate having a first surface and a second surface, forming a plurality of metal patterns on the first surface of the substrate, and bonding each bump of the semiconductor die to each metal pattern in a flip chip manner The first surface of the substrate is filled with an encapsulant covering the first surface, the semiconductor die, and filling a gap between the semiconductor die and the first surface, curing the encapsulant, and removing the substrate.

The method of removing the substrate is to directly tear the substrate by physical force to expose the bottom of the metal pattern, or to polish the second surface of the substrate to expose the bottom of the metal pattern. The material of the metal pattern contains copper, silver, gold, rhodium or nickel, and the number of bonding pads of the semiconductor crystal grains is preferably 2.

Forming a bump on the bond pad includes forming a bottom metal on each of the bond pads on the semiconductor die, and forming a mask on the bottom metal, wherein the mask has an opening, the center of the opening being aligned with the center of the bond pad And the opening area is smaller than the area of the bonding pad. An intermediate layer is formed at the bottom of the opening, and a metal material is formed on the intermediate layer to fill and protrude from the opening. The mask is removed and the metal material is melted to form a metal material into a bump. The intermediate layer material comprises nickel and the metallic material comprises gold, silver or rhodium.

10‧‧‧Substrate

20‧‧‧ grain

30‧‧‧Viscos

40‧‧‧Electrical through holes

50‧‧‧Package pads

100‧‧‧Semiconductor grain

110‧‧‧Material pads

120‧‧‧Protective layer

130‧‧‧The bottom metal

140‧‧‧ mask

150‧‧‧ openings

160‧‧‧Intermediate

170‧‧‧Metal materials

170'‧‧‧Bumps

200‧‧‧Substrate

201‧‧‧ first surface

202‧‧‧ second surface

210‧‧‧Metal pattern

220‧‧‧Package

300 310 320‧‧‧Package

H1 H2 H3 Hb‧‧‧ thickness

The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; a semiconductor die; FIG. 2(B) shows the formation of a bottom metal on a semiconductor die; FIG. 2(C) shows a step of forming a bump on a semiconductor die; and FIG. 2(D) shows a bump is formed on a semiconductor die; a metal pattern is formed on a substrate in FIG. 3(A); a semiconductor die is adhered to the substrate in a flip chip manner on the third (B); The figure shows the encapsulation formed on the substrate; the third (D) shows the substrateless package of the present invention; and the fourth figure shows the single substrateless package after the cutting of the present invention.

The embodiments of the present invention are disclosed in the following drawings, and the details of However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not necessary. In addition, some of the conventional structures and elements are shown in the drawings in a simplified schematic manner in order to simplify the drawings.

Please refer to FIGS. 2(A) to 2(D), which disclose a manufacturing process for forming a bump on a semiconductor die 100. Referring first to FIG. 2(A), FIG. 2(A) discloses a semiconductor die 100 having a plurality of bonding pads 110 on the semiconductor die 100. This figure is exemplified by only two bonding pads. In the present invention, The semiconductor die 100 of the two bonding pads 110 is a preferred embodiment. When the semiconductor die 100 is completed, the bonding pad 110 has a protective layer 120 covering a portion of the bonding pad 110, and the bonding pad 110 is exposed for protection. Portions of layer 120 are used to form bumps later.

Referring to FIG. 2(B), FIG. 2(B) discloses a process of forming a bump. First, a bottom metal 130 is formed on the bonding pad 110 and the protective layer 120, and then a mask 140 is formed. The mask 140 has an opening 150. . The method of forming the opening is to use a micro-lithography etching process of the semiconductor; first forming a mask 140 in a carpet manner, then applying a photoresist (not shown) on the mask 140, and then defining a pattern of the opening 150 by using the mask. An opening 150 is formed through a development and etching process, and the opening 150 exposes a portion of the underlying metal 130. The center of the opening 150 is aligned with the center of the bond pad 110, and the orthographic projection area of the opening 150 is smaller than the area of the bond pad 110.

Referring to FIG. 2(C), an intermediate layer 160 is formed at the bottom of the opening 150. The intermediate layer 160 may be formed by physical deposition (PVD) or chemical vapor deposition (CVD). The function of the intermediate layer 160 is to increase the adhesion of the subsequent bumps 170', and to reduce the stress of the bumps and the underlying metal 130, and prevent the thermal expansion coefficient of the bumps 170' and the thermal expansion coefficient of the underlying metal 130 in the high and low temperature cycle of the subsequent packaging process. The difference is too large, causing excessive stress and causing the bump to fall off easily. Therefore, the coefficient of thermal expansion of the material of the intermediate layer 160 is between the bump 170' and the underlying metal 130. After the intermediate layer 160 is formed, a metal material 170 is formed on the intermediate layer 160. The metal material 170 fills the entire opening 150 and protrudes from the opening 150. The metal material 170 covers the portion of the mask 140.

Please refer to the 2nd (D) diagram, then remove the mask 140, and then raise the temperature to melt the metal material 170. The material of the metal material 170 includes gold, silver or bismuth, so the above high temperature is not a fixed value, but The materials are adjusted differently. The point is that the temperature must be raised until the metal material 170 is melted and the flow rate is high, so that the liquid metal material 170 is automatically formed into a spherical shape due to the surface tension, and then cooled to form the bump 170'. The above is a manufacturing flow in which the bumps 170' are formed on the semiconductor die 100.

3(A) to 3(D) are diagrams for forming a substrateless package. Referring to FIG. 3(A), a substrate 200 having a first surface 201 and a second surface 202 on the substrate 200 is first provided. The metal pattern 210 is formed on the first surface 201, and the manner of forming the metal pattern 210 includes a printing coating process, or a photolithography process. The metal pattern material comprises copper, silver, gold, rhodium or nickel, and the substrate material comprises glass, acrylic, ceramic and polymer materials. The first surface 201 of the substrate 200 may be selectively subjected to an activation process to make the adhesion of the metal pattern 210 to the surface of the substrate 200 poor.

Referring to FIG. 3(B), the semiconductor die 100 having the bump 170' is flip-chip bonded to the metal pattern 210 on the substrate 200, and the bump 170' is soldered to the metal pattern at a high temperature. 210, the interface forms a eutectic state to increase adhesion. The two semiconductor dies 100 are placed on the substrate 200. This is merely an example. In practical applications, a plurality of the same semiconductor dies 100 greater than 2 may be simultaneously disposed on the substrate 200, and the semiconductor die 100 Each of the bumps on the substrate is aligned with the metal pattern 210 on the substrate 200. FIG. 3(B) illustrates that each of the semiconductor dies 100 has two bumps (bond pads 110) as a preferred embodiment. In practical applications, the method can be applied to have more than two bumps (bond pads). 110) semiconductor die.

Referring to FIG. 3(C), the encapsulant 220 is then poured over the first surface 201 of the substrate 200 and the semiconductor die 100. The flowability of the encapsulant 220 is preferably high at a high temperature so that the encapsulant 220 fills the substrate. The gap between the first surface 201 and the semiconductor die 100 is 200 and uniformly covers the semiconductor die 100. Then, the encapsulant 220 is cured. The cured encapsulant 220 has an upper surface and a lower surface. The lower surface of the encapsulant 220 contacts the first surface 201 of the substrate 200. The upper surface of the encapsulant 220 and the back surface of the semiconductor die 100 have a back surface. Thickness Hb.

Referring to FIG. 3(D), the substrate 200 is removed, leaving the semiconductor die 100 coated with the encapsulant, and the package 300 at the bottom of the metal pattern 210 is exposed. The thickness of the package 300 is higher than that of the conventional package (refer to the first Fig.) The thickness H1 is at least less than the substrate thickness H2. Finally, as shown in FIG. 4, the respective semiconductor packages 310 320 are cut out to complete the manufacturing method of the substrateless package. The bottom of the metal pattern 210 is the external pin of the semiconductor package 310 320. The package 310 320 manufactured by this method has a thickness and an orthographic area which are close to the semiconductor die 100 itself, and can meet the requirements of miniaturized electronic products.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

Claims (10)

 A method of fabricating a substrateless semiconductor package, comprising: providing a semiconductor die having a plurality of bond pads; forming a bump on each of the bond pads of the semiconductor die; providing a substrate having a first surface And a second surface, forming a plurality of metal patterns on the first surface of the substrate; each of the bumps of the semiconductor die is adhered to each of the metal patterns in a flip chip manner; A surface is filled with an encapsulant covering the first surface, the semiconductor die, and filling a gap between the semiconductor die and the first surface; curing the encapsulant; and removing the substrate.    The manufacturing method of claim 1, wherein the method of removing the substrate is to tear the substrate directly by physical force to expose the bottom of the metal pattern.    The manufacturing method of claim 1, wherein the method of removing the substrate is to polish the second surface of the substrate to expose a bottom of the metal pattern.    The manufacturing method of claim 1, wherein the material of the metal pattern comprises copper, silver, gold, rhodium or nickel.    The manufacturing method of claim 1, wherein the number of bonding pads of the semiconductor die is two.    The manufacturing method of claim 1, wherein the step of forming the bump on the bonding pad comprises: forming an underlying metal on each of the bonding pads on the semiconductor die; forming the bump on the underlying metal.    The manufacturing method of claim 6, wherein the forming the bump comprises: forming a mask on the underlying metal, wherein the mask has an opening, a center of the opening is aligned with a center of the bonding pad, and the The opening area is smaller than the area of the bonding pad; an intermediate layer is formed at the bottom of the opening; a metal material is formed on the intermediate layer to fill and protrude from the opening; the mask is removed; the metal material is melted to make the metal material The bump is formed.    The manufacturing method of claim 7, wherein the intermediate layer material comprises nickel.    The manufacturing method of claim 7, wherein the metal material comprises gold, silver or ruthenium.    A method of fabricating a substrateless semiconductor package, comprising: providing a plurality of semiconductor dies, wherein each of the semiconductor dies has a plurality of bonding pads; forming a bump on each of the bonding pads of each of the semiconductor dies; a substrate having a first surface and a second surface, a plurality of metal patterns are formed on the first surface of the substrate; each of the bumps of the semiconductor crystal grains is adhered to each of the semiconductor crystal grains in a flip chip manner The metal pattern is filled with the encapsulant on the first surface of the substrate, the encapsulant covers the first surface, the semiconductor crystal grains, and fills a gap between the semiconductor crystal grains and the first surface; curing The encapsulant; removing the substrate; cutting a plurality of packages comprising a single semiconductor die.