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TW201816983A - Rectifying device of integrated series-connected Schottky diode increasing the reverse withstand voltage by serially connecting the Schottky diode - Google Patents

Rectifying device of integrated series-connected Schottky diode increasing the reverse withstand voltage by serially connecting the Schottky diode Download PDF

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TW201816983A
TW201816983A TW105134837A TW105134837A TW201816983A TW 201816983 A TW201816983 A TW 201816983A TW 105134837 A TW105134837 A TW 105134837A TW 105134837 A TW105134837 A TW 105134837A TW 201816983 A TW201816983 A TW 201816983A
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schottky diode
series
pin
conductor
lead frame
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TW105134837A
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Chinese (zh)
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陳文彬
李國棟
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矽萊克電子股份有限公司
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Publication of TW201816983A publication Critical patent/TW201816983A/en

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Abstract

This invention provides a rectifying device of an integrated series-connected Schottky diode. At least two lead frames are respectively connected to the cathodes on the reverse sides of Schottky diode chips, an anode on the front side of the first Schottky diode chip is connected to a first conductor, each of anodes of the other Schottky diode chips is connected to a second conductor respectively to be bridged to the lead frame located at the position of the former Schottky diode chip and sequentially and serially connected to at least two Schottky diode chips. Also, the first conductor, the lead frame located at the position of the last Schottky diode chip and the second conductor are respectively connected to an anode pin, a cathode pin, and an external pin of an electrode pin set. Then, the lead frames are provided with plastic bodies. The reverse withstand voltage can be increased by serially connecting the Schottky diode which is singlely arranged, low in cost, relatively low in the withstand voltage, and shorter in the reverse recovery time, and furthermore, the effects of simplicity and convenience in production, small volume, high yield rate, and lower cost due to the adoption of automatic production are achieved.

Description

集成化串聯蕭特基二極體之整流裝置    Integrated series Schottky diode rectifier   

本發明係提供一種集成化串聯蕭特基二極體之整流裝置,尤指可利用單一裝置及成本便宜的較低耐壓、逆向恢復時間更快之蕭特基二極體串聯來增加反向耐壓,進而達到製造簡便、體積小、良率高及可自動化生產使成本更為低廉之效用。 The invention provides an integrated series Schottky diode rectification device, especially a Schottky diode connected in series using a single device and a lower cost withstand voltage and a faster reverse recovery time to increase the reverse direction. Withstand pressure, and then achieve the advantages of simple manufacturing, small size, high yield, and automated production to make the cost even lower.

按,隨著電子技術快速成長,以及電子產品要求輕、薄、短、小的發展趨勢,使得許多電子產品已紛紛朝向小型化,並於電路板中幾乎許多元件皆是利用積體電路製程的方式生產,而積體電路型式的電子元件在應用時,則必須考慮更多的層面,如耐壓、抗雜訊、內部元件相互干擾的問題等,特別是應用在電路板上之電源端元件,對於電壓與電流的容許度更是考慮的重點,當通過的電壓與電流過大時,積體電路耐壓不足將可能因過熱而導致燒毀的現象,若是耐壓足夠,亦必須考慮其積體電路內部各元件之間的電路特性,以確保整體使用之效果。 According to the rapid growth of electronic technology and the development trend of light, thin, short, and small electronic products, many electronic products have been miniaturized. Almost many components in circuit boards are manufactured using integrated circuit processes. Production, and the integrated circuit type of electronic components in the application, you must consider more aspects, such as withstand voltage, anti-noise, the internal components of the problem of mutual interference, etc., especially applied to the power supply side components on the circuit board For the tolerance of voltage and current, it is more important to consider. When the voltage and current passed are too large, the insufficient voltage of the integrated circuit may be burned due to overheating. If the voltage is sufficient, the product must also be considered. The circuit characteristics between the components in the circuit to ensure the effect of the overall use.

再者,電子產品(如電源供應器、電機驅動器等)電源端之電子元件中,又以二極體的應用最為廣泛,二極體為具有單向導通而反向斷路的特性,所以在開關電源、變頻器及驅動器等電路,大多作高頻、低壓、大電流整流使用,使電源得以穩定的輸出直流電力,此種二極體一 般稱為整流二極體,並廣泛應用於包括消費性電子、通訊、汽車、航太、醫療等領域中,且因整流二極體已朝向積體電路化的發展,便有廠商將多顆二極體封裝在同一個積體電路中,並於安裝電路板上時僅需使用一個二極體積體電路,所以可降低製造之成本。 Furthermore, among the electronic components at the power end of electronic products (such as power supplies, motor drivers, etc.), diodes are the most widely used. Diodes have the characteristics of one-way conduction and reverse circuit breaking. Circuits such as power supplies, inverters, and drivers are mostly used for high-frequency, low-voltage, and high-current rectification, so that the power supply can stably output DC power. Such diodes are generally called rectifier diodes and are widely used in consumer products. In the fields of electronics, communications, automotive, aerospace, medical and other fields, and because rectifier diodes have been developed toward integrated circuit, some manufacturers have packaged multiple diodes in the same integrated circuit and installed them Only one bipolar volume body circuit is needed when the circuit board is used, so the manufacturing cost can be reduced.

此外,電源電路中常見的非線性負載為包括電源供應器中之整流器、開關電源等電路,由於非線性負載會將輸電系統所輸入的交流電流正弦波變化成其他波形,使輸入電流中除了原來電源的頻率(基頻)之外,還會有許多高頻的諧波電流,造成輸入電流和電壓之間存在有較大的相位差,以致使功率因素(有效功率與視在功率的比值,PF)下降,且因電源電路中有效功率之利用率不高,便會增大電能的損耗,所以業界普遍的作法是在電源電路中加入功率因素校正(PFC)電路,不僅可以改善供電的穩定性,並於功率因數校正後其視在功率下降,因此可提高電源電路的功率因素,降低高頻的諧波污染而提高電源品質,使電源的利用率也可以提升。 In addition, common non-linear loads in power supply circuits include circuits such as rectifiers and switching power supplies in power supplies. Since non-linear loads change the sine wave of the AC current input into the power transmission system into other waveforms, the input current is reduced in addition to the original In addition to the frequency (fundamental frequency) of the power supply, there will be many high-frequency harmonic currents, causing a large phase difference between the input current and the voltage, so that the power factor (ratio of effective power to apparent power, PF) decreases, and because the effective utilization of power in the power circuit is not high, it will increase the loss of electrical energy. Therefore, the common practice in the industry is to add a power factor correction (PFC) circuit to the power circuit, which can not only improve the stability of the power supply And its apparent power decreases after power factor correction, so it can increase the power factor of the power circuit, reduce high frequency harmonic pollution and improve power quality, so that the power utilization rate can also be improved.

由於現今各國對於全球暖化與節能減碳的議題日益重視,並在能源的使用上為了因應產品節能減碳的需求,對於電源供應器供電的效率與品質要求亦越來越高,以節省能源與電費,故在電源供應器的前級中一般為使用升壓式功率因素校正電路,其連續導通模式(CCM)輸入之電感電流不會降為零,因此電感電壓變化較小,而在電源電路上的各元件能有較低的導通損耗、電磁干擾以及較小的輸入濾波器,並可防止輸電系統對電源電路的高頻瞬態衝擊電流等,以符合產品功率因數要求及國際諧波電流規範;又因電源電路為具有高逆向電壓(如600V)及高頻( 如大於100KHz)的工作特性,其功率開關不在零電感電流時導通,所以需要使用可承受高逆向電壓及更快逆向恢復速度特性之整流二極體,以減低交換的損耗,一般開關電源電路採用高耐壓的單顆600或600V以上之快恢復二極體(FRD)或碳化矽(SiC)蕭特基二極體(SBD)來整流,不過快恢復二極體的逆向恢復時間(Trr)不夠快且逆向恢復電荷(Qrr)不夠小,導致整流效率不夠好(功率因素不夠高)而有較大損耗及漣波、雜訊干擾等問題,另外碳化矽蕭特基二極體雖然逆向恢復速度夠快而整流效率好,但成本卻非常的昂貴,以及正向導通電壓損耗較大,所以使用率不普遍。 As countries now pay more and more attention to the issues of global warming, energy conservation and carbon reduction, and in order to meet the demand for energy conservation and carbon reduction in products in terms of energy use, the requirements for the efficiency and quality of power supply from power supplies are also increasing, in order to save energy. And power costs, so in the front stage of the power supply, a boost power factor correction circuit is generally used, and the continuous current mode (CCM) input inductor current does not drop to zero, so the inductor voltage changes are small, and the power supply Each component on the circuit can have lower conduction loss, electromagnetic interference and smaller input filters, and can prevent the high-frequency transient impulse current of the power system from the power transmission system, in order to meet the product power factor requirements and international harmonics Current specifications; and because the power circuit has high reverse voltage (such as 600V) and high frequency (such as greater than 100KHz) operating characteristics, its power switch is not conducting when the zero inductor current, so you need to use high reverse voltage and faster reverse Recovery speed characteristics of rectifier diodes to reduce switching losses. Generally, switching power supply circuits use a single 600V or higher withstand voltage. Complex diode (FRD) or silicon carbide (SiC) Schottky diode (SBD) to rectify, but the reverse recovery time (Trr) of the fast recovery diode is not fast enough and the reverse recovery charge (Qrr) is not small enough. Causes rectification efficiency is not good enough (power factor is not high enough) and there are large loss and ripple, noise interference and other problems. In addition, the silicon carbide Schottky diode has a fast reverse recovery speed and good rectification efficiency, but the cost is very high. Is expensive, and the forward voltage loss is large, so the usage rate is not universal.

然而,一般整流二極體的結構可通過串聯二極體晶片達到反向耐壓相加,並聯二極體晶片達到額定工作電流相加之目的,但是在過去多年來整流二極體實際的應用上,並聯的方式為使用對稱型框架結構,並將二顆二極體晶片焊固在框架表面上,且各二極體晶片通過鍵合引線或焊接的方式分別電性連接於引腳上,再於框架上利用塑封料(如環氧樹酯)形成可將二極體晶片、鍵合引線及引腳包覆在其內之塑封體,同時使框架頂部及其輸出端、引腳之輸入端外露於塑封體外部,此種並聯使用的對稱型框架結構簡單,並具有便於加工與自動化量產之效果。 However, the structure of general rectifier diodes can be used to achieve reverse withstand voltage addition by series diode chips, and parallel diode chips can be used to add rated operating currents. However, practical applications of rectifier diodes in the past years In the parallel method, a symmetrical frame structure is used, and two diode chips are welded on the surface of the frame, and each diode chip is electrically connected to the pins by bonding wires or welding. Then, a plastic packaging material (such as epoxy resin) is formed on the frame to form a plastic package which can cover the diode chip, the bonding wire and the lead therein, and at the same time, make the top of the frame and the input of the lead and the input of the lead at the same time. The ends are exposed outside the plastic package. This kind of symmetrical frame structure used in parallel is simple and has the effect of facilitating processing and automated mass production.

不過串聯的方式則因為在傳統慣用的對稱型框架結構下,必須將二顆二極體晶片以一正一反分別焊固在框架表面上,再進行後續之鍵合引線、封裝等,不但非常的難以加工,缺乏量化生產及可靠性,因此業界很少運用串聯二極體晶片的方式來進行量產;又因串聯多顆二極體晶片在實際的應用中,由於多顆二極體晶片間之電性特性不一致容易導致靜 態受壓不平衡,以及不同條件下終端產品設計使其產生的動態電壓變化,導致串聯二極體晶片無法平均的承受電壓而失效,例如串聯有二顆300V二極體晶片,在實際反向總電壓為400V的電源電路與設計應用中,由於前級與後級電源將會導致二顆二極體晶片無法平均的分配到等同200V電壓,如果其中一顆二極體晶片承受超過300V以上逆向變動的工作電壓時,便會造成該二極體晶片被擊穿而失效,所以傳統串聯二極體晶片來增加反向耐壓的方式並不可靠,從而難以將二極體晶片串聯可使電壓倍增的方式應用於各種電源電路設計中,即為從事此行業者所亟欲研究改善之關鍵所在。 However, the serial connection method is because in the conventional symmetrical frame structure, two diode chips must be soldered on the surface of the frame in one forward and one reverse direction, and then subsequent bonding leads, packaging, etc. are not only very Is difficult to process, lacks quantitative production and reliability, so the industry rarely uses serial diode chips for mass production; and because multiple diode chips are connected in series in practical applications, due to multiple diode chips The inconsistent electrical characteristics easily lead to static pressure imbalance, and the dynamic voltage changes caused by the end product design under different conditions, resulting in the failure of the series diode chip to withstand the voltage evenly, such as two 300V two in series. Polarity chip, in the power circuit and design application with a total reverse voltage of 400V, the front and back stage power supply will cause two diode chips to not be equally distributed to the same 200V voltage. When a polar wafer withstands a reverse working voltage of more than 300V, it will cause the diode wafer to be broken down and fail, so the traditional serial diode To increase the reverse breakdown voltage of the wafer is not reliable manner, so that it is difficult to make a series diode chip voltage multiplier manner used in various power supply circuit design, the key that is engaged in the research for improvement anxious to those in this industry.

故,發明人有鑑於上述習用之問題與缺失,乃搜集相關資料經由多方的評估及考量,並利用從事於此行業之多年研發經驗不斷的試作與修改,始設計出此種得以實現串聯運用的合理性、便利性、普遍適用性及長期使用的可靠性,集成化設計縮小使用的空間,以及高功率密度之集成化串聯蕭特基二極體之整流裝置的發明專利誕生。 Therefore, in view of the problems and shortcomings of the above-mentioned custom, the inventor collected relevant information and evaluated and considered it from various parties, and made continuous trials and modifications with years of R & D experience in this industry to design such a series of applications. The invention patent of rationality, convenience, universal applicability and long-term reliability, integrated design to reduce the use of space, and high-power density integrated series Schottky diode rectifiers were born.

本發明之主要目的乃在於該至少二個引線框架上為分別連接有蕭特基二極體晶片背面之陰極,並由第一顆蕭特基二極體晶片正面之陽極上連接有第一導體,且其他蕭特基二極體晶片陽極上分別連接有第二導體,用以橋接於前一顆蕭特基二極體晶片位置之引線框架上而依次串聯有至少二顆蕭特基二極體晶片,而第一導體、最後一顆蕭特基二極體晶片位置之引線框架、第二導體則分別與電極引腳組之陽極引腳、陰極引腳及外接引腳相連接,再於引線框架上設置有塑封體,此種串聯運用電器特性 一致性極高之蕭特基二極體晶片集成化結構設計,不但可穩定增加其串聯的靜態受壓平衡及承受的反向耐壓較為平均,並利用單一裝置及成本便宜的較低耐壓之蕭特基二極體(尤指以矽為基底之矽蕭特基二極體)串聯來增加反向耐壓,相較於同類型快恢復二極體或碳化矽蕭特基二極體,較低耐壓的矽蕭特基二極體逆向恢復時間比較短、逆向恢復損耗較低而降低了成本,且集成化設計佔用的空間小,進而達到製造簡便、體積小、良率高及可自動化生產使成本更為低廉之效用。 The main purpose of the present invention is that the at least two lead frames are respectively connected to the cathode of the Schottky diode wafer back surface, and the first conductor is connected to the anode of the front surface of the first Schottky diode wafer. And other Schottky diode wafer anodes are respectively connected with a second conductor for bridging the lead frame of the previous Schottky diode wafer position, and at least two Schottky diodes are connected in series in this order. The first conductor, the lead frame of the last Schottky diode chip, and the second conductor are connected to the anode, cathode, and external pins of the electrode pin group, and then The lead frame is provided with a plastic package. This series connection uses Schottky diode chip integrated structure design with extremely high electrical characteristics consistency, which not only can stably increase the static pressure balance in series and the reverse withstand voltage. Average and use a single device and a low cost Schottky diode (especially silicon-based Schottky diode) connected in series to increase the reverse breakdown voltage compared to the same type Fast recovery diode or carbon Silicon Schottky diodes, lower voltage silicon Schottky diodes have shorter reverse recovery time, lower reverse recovery losses and lower costs, and the integrated design occupies less space, thereby achieving simple manufacturing, Small size, high yield, and automated production make the cost even lower.

本發明之次要目的乃在於該二顆相鄰串聯之蕭特基二極體晶片為分別連接於電極引腳組之外接引腳形成均壓或調壓腳位,便可利用陽極引腳、陰極引腳及外接引腳測試每一顆蕭特基二極體晶片在工作時承受的反向電壓,亦可依照實際的需要進一步將電極引腳組連接於電路板之緩衝電路,並通過陽極引腳、陰極引腳及外接引腳與對應之蕭特基二極體晶片並聯,且緩衝電路包括有電阻、電容或串聯的電阻與電容,以降低電壓過高位置的蕭特基二極體晶片的工作電壓,便可避免串聯的蕭特基二極體晶片無法平均的承受反向電壓而失效,也可解決不同電路設計中的電壓平均及穩定性問題,從而實現串聯運用的合理性、便利性、普遍適用性及長期使用的可靠性。 The secondary purpose of the present invention is that the two adjacent Schottky diode chips connected in series are connected to the external pins of the electrode pin group to form a voltage equalizing or voltage regulating foot, and the anode pins, The cathode pin and the external pin test the reverse voltage that each Schottky diode chip is subjected to during operation. The electrode pin group can be further connected to the buffer circuit of the circuit board according to the actual needs, and passed through the anode. The pins, cathode pins, and external pins are connected in parallel with the corresponding Schottky diode chip, and the buffer circuit includes a resistor, a capacitor, or a series resistor and capacitor to reduce the Schottky diode where the voltage is too high. The working voltage of the chip can prevent the Schottky diode chip connected in series from failing to withstand the reverse voltage evenly, and it can also solve the problem of voltage average and stability in different circuit designs, so as to achieve the rationality of series operation, Convenience, universal applicability and long-term reliability.

本發明之另一目的乃在於該集成化串聯蕭特基二極體之整流裝置應用於電源供應器之開關電源時,可根據其功率因素校正電路採用串聯有二顆電器特性一致性極高之蕭特基二極體晶片來穩定且平均較高的反向電壓,可根據第一顆蕭特基二極體晶片的電器特性計算出合理緩衝電路之電阻及電容值,並由電極引腳組外接於緩衝電路,以提高可承受的電 壓耐受性,避免承受過高電壓被擊穿而失效,每一顆蕭特基二極體晶片承受的反向電壓相較於使用單顆升壓二極體工作時其承受的反向電壓大約減小了一半,且較低耐壓的蕭特基二極體晶片逆向恢復時間比較短、逆向恢復的損耗較低,通過串聯蕭特基二極體晶片的分壓處理可使功率因素校正電路交換速度加快、功率損耗變低而整流的效率更好,進而提高了開關電源的功率因素、降低高頻諧波污染以確保電源的品質,並使電源的利用率提升而降低了成本,以廣泛適用於各種高頻、高壓及大電流的開關電源應用領域中,更能符合節能且高效率的發展及需要。 Another object of the present invention is that when the integrated series Schottky diode rectifier device is applied to a switching power supply of a power supply, a correction circuit based on its power factor can be used to have two electrical devices in series with high consistency. The Schottky diode chip is stable and has a high average reverse voltage. The resistance and capacitance of a reasonable buffer circuit can be calculated based on the electrical characteristics of the first Schottky diode chip. Externally connected to the buffer circuit to improve the withstand voltage tolerance and avoid breakdown caused by excessive high voltage breakdown. The reverse voltage of each Schottky diode chip is compared with the use of a single booster During the operation of the polar body, the reverse voltage that it bears has been reduced by about half, and the Schottky diode chip with a lower withstand voltage has a shorter reverse recovery time and lower reverse recovery loss. By connecting the Schottky diode in series, The voltage division processing of the chip can speed up the power factor correction circuit exchange speed, lower power loss and better rectification efficiency, thereby improving the power factor of the switching power supply and reducing high frequency harmonic pollution to ensure the power supply. The quality of the power supply increases the utilization rate of the power supply and reduces the cost. It is widely applicable to various high-frequency, high-voltage, and high-current switching power supply applications, and can better meet the development and needs of energy saving and high efficiency.

1‧‧‧引線框架 1‧‧‧lead frame

11‧‧‧基板 11‧‧‧ substrate

12‧‧‧散熱片 12‧‧‧ heat sink

121‧‧‧通孔 121‧‧‧through hole

2‧‧‧蕭特基二極體晶片 2‧‧‧ Schottky diode chip

21‧‧‧第一導體 21‧‧‧First Conductor

22‧‧‧第二導體 22‧‧‧Second Conductor

23‧‧‧第三導體 23‧‧‧ third conductor

3‧‧‧電極引腳組 3‧‧‧ electrode pin set

31‧‧‧陽極引腳 31‧‧‧Anode pin

32‧‧‧陰極引腳 32‧‧‧ cathode pin

33‧‧‧外接引腳 33‧‧‧External Pin

4‧‧‧塑封體 4‧‧‧Plastic body

5‧‧‧緩衝電路 5‧‧‧ buffer circuit

51‧‧‧電阻 51‧‧‧resistance

52‧‧‧電容 52‧‧‧Capacitor

第一圖 係為本發明較佳實施例之結構示意圖。 The first diagram is a schematic structural diagram of a preferred embodiment of the present invention.

第二圖 係為本發明串聯二顆蕭特基二極體之示意圖。 The second diagram is a schematic diagram of two Schottky diodes connected in series according to the present invention.

第三圖 係為本發明蕭特基二極體連接於引線框架上之示意圖。 The third figure is a schematic view of a Schottky diode connected to a lead frame according to the present invention.

第四圖 係為本發明串聯二顆蕭特基二極體之示意圖。 The fourth diagram is a schematic diagram of two Schottky diodes connected in series according to the present invention.

第五圖 係為本發明串聯三顆蕭特基二極體之示意圖。 The fifth diagram is a schematic diagram of three Schottky diodes connected in series according to the present invention.

第六圖 係為本發明緩衝電路包括電阻之示意圖。 The sixth diagram is a schematic diagram of a buffer circuit including a resistor according to the present invention.

第七圖 係為本發明緩衝電路包括電阻之另一示意圖。 The seventh diagram is another schematic diagram of the buffer circuit of the present invention including a resistor.

第八圖 係為本發明緩衝電路包括電容之示意圖。 The eighth diagram is a schematic diagram of a buffer circuit including a capacitor according to the present invention.

第九圖 係為本發明緩衝電路包括電容之另一示意圖。 The ninth figure is another schematic diagram of the buffer circuit of the present invention including a capacitor.

第十圖 係為本發明緩衝電路包括串聯的電容與電阻之示意圖。 The tenth figure is a schematic diagram of the buffer circuit of the present invention including a capacitor and a resistor connected in series.

第十一圖 係為本發明在常溫測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The eleventh figure is a waveform diagram of the reverse recovery time and the reverse recovery charge obtained during the normal temperature test of the present invention.

第十二圖 係為本發明在高溫測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The twelfth figure is a waveform diagram of the reverse recovery time and the reverse recovery charge obtained during the high temperature test of the present invention.

第十三圖 係為本發明將習用快恢復二極體在常溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The thirteenth figure is a waveform diagram of the reverse recovery time and the reverse recovery charge obtained when the conventional fast recovery diode is tested under normal temperature conditions of the present invention.

第十四圖 係為本發明將習用快恢復二極體在高溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The fourteenth figure is a waveform diagram of the reverse recovery time and the reverse recovery charge obtained when the conventional fast recovery diode is tested under high temperature conditions according to the present invention.

第十五圖 係為本發明將另一習用快恢復二極體在常溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The fifteenth figure is a waveform diagram of reverse recovery time and reverse recovery charge obtained by testing another conventional fast recovery diode under normal temperature conditions according to the present invention.

第十六圖 係為本發明將另一習用快恢復二極體在高溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖。 The sixteenth figure is a waveform diagram of reverse recovery time and reverse recovery charge obtained by testing another conventional fast recovery diode under high temperature conditions according to the present invention.

為達成上述目的及功效,本發明所採用之技術手段及其構造,茲繪圖就本發明之較佳實施例詳加說明其構造與功能如下,俾利完全瞭解。 In order to achieve the above-mentioned object and effect, the technical means and structure adopted by the present invention, the drawings and detailed description of the structure and function of the preferred embodiment of the present invention are as follows.

請參閱第一、二、三、四、五圖所示,係分別為本發明較佳實施例之結構示意圖、串聯二顆蕭特基二極體之示意圖、蕭特基二極體連接於引線框架上之示意圖、串聯二顆蕭特基二極體之示意圖及串聯三顆蕭特基二極體之示意圖,由圖中可清楚看出,本發明之集成化串聯蕭特基二極體之整流裝置為包括有至少二個引線框架1、複數蕭特基二極體晶片2、電極引腳組3及塑封體4,其中: Please refer to the first, second, third, fourth, and fifth figures, which are structural diagrams of the preferred embodiment of the present invention, a schematic diagram of two Schottky diodes connected in series, and Schottky diodes connected to the leads. The schematic diagram on the frame, the schematic diagram of two Schottky diodes in series, and the schematic diagram of three Schottky diodes in series. It can be clearly seen from the figure that the integrated cascade Schottky diode of the present invention The rectifying device includes at least two lead frames 1, a plurality of Schottky diode wafers 2, an electrode pin group 3, and a plastic package 4, wherein:

該引線框架(Lead-frame)1為分別具有平整狀之基板11(如銅或銅合金材質之金屬板等),並於至少一個引線框架 1之基板11上方處設有寬度相較於基板11為大之銅材質散熱片12,且散熱片12表面上設有圓形之通孔121。 The lead frame 1 is a flat substrate 11 (such as a metal plate made of copper or copper alloy), and a width is set above the substrate 11 of at least one lead frame 1 compared to the substrate 11. The heat sink 12 is a large copper material, and a circular through hole 121 is provided on the surface of the heat sink 12.

該蕭特基二極體晶片2二側處之正面與背面為分別具有陽極與陰極,且各陰極分別利用焊料或導電膠等方式連接於引線框架1之基板11表面上,而第一顆蕭特基二極體晶片2之陽極上係利用焊料或導電膠等方式連接有第一導體21,並於其他蕭特基二極體晶片2之陽極上分別利用焊料或導電膠等方式連接有第二導體22,且各第二導體22係分別利用焊料或導電膠等方式橋接於前一顆蕭特基二極體晶片2位置之引線框架1上依次形成串聯,且最後一顆蕭特基二極體晶片2之陰極上可進一步利用焊料或導電膠等方式連接有第三導體23。 The front and back sides of the Schottky diode wafer 2 have anodes and cathodes respectively, and each cathode is connected to the surface of the substrate 11 of the lead frame 1 by means of solder or conductive glue, and the first Xiao The anode of the tetrode diode wafer 2 is connected to the first conductor 21 by means of solder or conductive glue, and the anode of the other Schottky diode wafer 2 is connected to the first conductor by means of solder or conductive glue, respectively. Two conductors 22, and each of the second conductors 22 is connected in series with the lead frame 1 at the position of the previous Schottky diode wafer 2 by means of solder or conductive glue, and the last Schottky two A third conductor 23 may be further connected to the cathode of the electrode body wafer 2 by means of solder or conductive glue.

該電極引腳組3為包括有陽極引腳31、陰極引腳32及位於陽極引腳31與陰極引腳32間之至少一支外接引腳33,其中陽極引腳31係利用焊料或導電膠等方式與第一顆蕭特基二極體晶片2上之第一導體21相連接,而陰極引腳32與最後一顆蕭特基二極體晶片2之陰極相連接,係將陰極引腳32利用焊料或導電膠等方式與最後一顆蕭特基二極體晶片2上之第三導體23相連接,或者是可省略該第三導體23,並由最後一顆蕭特基二極體晶片2位置之引線框架1上直接或間接向外延伸出陰極引腳32,且該外接引腳33係利用焊料或導電膠等方式分別與串聯任意二顆相鄰蕭特基二極體晶片2之第二導體22相連接,而任意二顆相鄰蕭特基二極體晶片2位置之至少一個引線框架1上亦可直接或間接向外延伸出外接引腳33,也可依實際的需求或應用變更設計,所以在以下說明書內容中皆一起進行說明,合予陳明。 The electrode pin group 3 includes an anode pin 31, a cathode pin 32, and at least one external pin 33 located between the anode pin 31 and the cathode pin 32. The anode pin 31 is made of solder or conductive glue. It is connected to the first conductor 21 on the first Schottky diode wafer 2 by other methods, and the cathode pin 32 is connected to the cathode of the last Schottky diode wafer 2 to connect the cathode pin 32 is connected to the third conductor 23 on the last Schottky diode wafer 2 by means of solder or conductive glue, or the third conductor 23 can be omitted and the last Schottky diode The cathode lead 32 directly or indirectly extends outward from the lead frame 1 at the position of the chip 2 and the external lead 33 is connected with any two adjacent Schottky diode chips 2 in series by means of solder or conductive glue, respectively. The second conductor 22 is connected, and at least one lead frame 1 of any two adjacent Schottky diode chips 2 can also directly or indirectly extend an external pin 33 outward, or according to actual needs. Or apply design changes, so they are explained together in the following description Close to Chen.

該塑封體4為利用環氧樹脂或其他塑封料在引線框架1上一體成型,並包覆蕭特基二極體晶片2及電極引腳組3上形成絕緣本體,且電極引腳組3之各陽極引腳31、陰極引腳32及外接引腳33下方處連接端為分別外露於塑封體4外部。 The plastic package 4 is integrally formed on the lead frame 1 by using epoxy resin or other plastic sealing materials, and is covered with the Schottky diode wafer 2 and the electrode pin group 3 to form an insulating body. The connection ends of the anode pins 31, the cathode pins 32 and the external pins 33 are respectively exposed outside the plastic package 4.

在本實施例中,蕭特基二極體晶片2係指以矽(Si)為基底之未封裝矽蕭特基二極體,並將二顆或三顆(如第四、五圖所示)蕭特基二極體晶片2(如D1、D2、D3等)分別連接於引線框架1上,且第一顆蕭特基二極體晶片2之陽極利用第一導體21(如銅或鋁之鍵合引線、搭接銅架)橋接於電極引腳組3之陽極引腳31上,以及最後一顆蕭特基二極體晶片2之陰極間接利用第三導體23或直接焊接的方式連接於陰極引腳32上,而串聯有任意二顆相鄰之蕭特基二極體晶片2係由後一顆蕭特基二極體晶片2之陽極分別利用第二導體22依次橋接於前一個引線框架1上與蕭特基二極體晶片2之陰極形成串聯,再於引線框架1上利用塑封料形成有可將蕭特基二極體晶片2及電極引腳組3包覆於其內之塑封體4,且該引線框架1之散熱片12、陽極引腳31、陰極引腳32及外接引腳33為分別外露於塑封體4外部,此種串聯有至少二顆電器特性一致性極高之蕭特基二極體晶片2集成化結構設計,不但可穩定增加蕭特基二極體晶片2串聯的靜態受壓平衡,並使蕭特基二極體晶片2承受的反向耐壓較為平均,便可利用單一裝置及成本便宜的較低耐壓矽蕭特基二極體串聯來增加反向耐壓,相較於同類型的快恢復二極體或碳化矽蕭特基二極體等,較低耐壓矽蕭特基二極體逆向恢復時間比較短、逆向恢復損耗較低而降低了成本,且集成化設計佔用的空間小,亦可選取多顆電器特性 一致性極高之矽蕭特基二極體串聯運用,進而達到製造簡便、體積小、良率高及可自動化生產使成本更為低廉之效用。 In this embodiment, the Schottky diode chip 2 refers to an unpackaged silicon Schottky diode based on silicon (Si), and two or three (as shown in the fourth and fifth figures) The Schottky diode wafer 2 (such as D1, D2, D3, etc.) are connected to the lead frame 1, respectively, and the anode of the first Schottky diode wafer 2 uses a first conductor 21 (such as copper or aluminum). (Bonding leads, overlapping copper frames) are bridged to the anode pin 31 of the electrode pin group 3, and the cathode of the last Schottky diode wafer 2 is connected indirectly by a third conductor 23 or directly soldered On the cathode pin 32, any two adjacent Schottky diode wafers 2 connected in series are bridged by the anode of the latter Schottky diode wafer 2 respectively by the second conductor 22 in sequence to the previous one. The lead frame 1 is connected in series with the cathode of the Schottky diode wafer 2. The lead frame 1 is formed on the lead frame 1 with a plastic sealing material, and the Schottky diode wafer 2 and the electrode pin group 3 can be covered therein. The plastic package 4 and the heat sink 12, the anode pin 31, the cathode pin 32 and the external pin 33 of the lead frame 1 are respectively exposed outside the plastic package 4. There are at least two Schottky diode wafers 2 with an extremely high consistency in electrical characteristics. The integrated structure design not only can stably increase the static pressure balance of the Schottky diode wafers 2 in series, but also make Schottky two Polar body chip 2 withstands the reverse withstand voltage more evenly, and can use a single device and cheaper low-voltage silicon Schottky diodes in series to increase the reverse withstand voltage, compared to the fast recovery of the same type. Polar body or silicon carbide Schottky diode, etc., the lower withstand voltage silicon Schottky diode has a shorter reverse recovery time, lower reverse recovery loss and reduced costs, and the integrated design occupies less space. Multiple silicon Schottky diodes with high consistency in electrical characteristics can be selected for serial use, thereby achieving the advantages of simple manufacturing, small size, high yield, and automated production to make the cost even lower.

上述之集成化串聯蕭特基二極體之整流裝置可在至少二個引線框架1上串聯至少二顆蕭特基二極體晶片2,並具有電極引腳組3之陽極引腳31、陰極引腳32,且任意二顆相鄰串聯之蕭特基二極體晶片2分別連接有外接引腳33形成均壓或調壓腳位,便可利用陽極引腳31、陰極引腳32及外接引腳33測試每一顆蕭特基二極體晶片2工作時承受的反向電壓,並依照實際的需要在電路上配置電阻、電容等,使外接引腳33可用於外接均壓電阻、可調電阻、電容等,以降低電壓過高位置的蕭特基二極體晶片2的電壓來平衡動態電壓變化,且可避免多顆串聯蕭特基二極體晶片2無法平均的承受反向電壓而失效,亦可解決不同電路設計中的電壓平均及穩定性問題,具有很大的靈活性及可靠性,使得集成化串聯蕭特基二極體之整流裝置可實現串聯運用的合理性、便利性、普遍適用性及長期使用的可靠性,又集成化設計縮小了使用所需的空間,並實現高功率密度設計及市場要求產品輕、薄、短、小的趨勢,也可適用於所有不同的應用領域,更能符合節能且高效率的發展及需要。 The above-mentioned integrated tandem Schottky diode rectifying device can connect at least two Schottky diode wafers 2 in series on at least two lead frames 1, and has an anode pin 31 and a cathode of an electrode pin group 3. Pin 32, and any two adjacent Schottky diode chips 2 connected in series are connected with external pins 33 to form a voltage equalizing or regulating pin, and anode pin 31, cathode pin 32, and external pins can be used. Pin 33 tests the reverse voltage that each Schottky diode chip 2 receives during operation, and configures resistors, capacitors, etc. on the circuit according to actual needs, so that external pin 33 can be used for external voltage sharing resistors, Adjust resistors, capacitors, etc. to reduce the voltage of the Schottky diode chip 2 at an excessively high voltage position to balance dynamic voltage changes, and to prevent multiple Schottky diode chips 2 in series from being able to withstand reverse voltages on average The failure can also solve the problems of voltage average and stability in different circuit designs. It has great flexibility and reliability, which makes the integrated series Schottky diode rectifier device realize the rationality and convenience of series operation. Sex, universal applicability, and Reliable and integrated design reduces the space required for use, and achieves high power density design and market requirements for products that are light, thin, short, and small. It can also be applied to all different application areas and is more capable of Meet the development and needs of energy saving and high efficiency.

本發明之集成化串聯蕭特基二極體之整流裝置為利用串聯分壓原理(串聯為耐壓相加),以及電源電路與設計應用中前級與後級電源導致升壓二極體的電壓不同組成特性,而採用二顆較低耐壓、逆向恢復時間更快的蕭特基二極體晶片2(矽蕭特基二極體)串聯,可以等同於電壓串聯(如D1+D2=300V+300V或350V+350V),或者是可根據實際不同電壓分佈採用前高後低或前低後高串聯(如D1+ D2=350V+250V),並利用矽蕭特基二極體更快的逆向恢復時間及更低的逆向恢復電荷特性,使其功率因素校正電路之整流效率更好、漣波及雜訊等干擾更低,且基於較低耐壓矽蕭特基二極體有較低的成本,更能符合經濟效益及高效率的訴求。 The rectification device of the integrated series Schottky diode of the present invention is based on the principle of series voltage division (the series is the withstand voltage addition), and the power supply circuit and the front-end power supply cause the boost diode in the design application. Different composition characteristics of voltage, and the use of two Schottky diode chips 2 (silicon Schottky diode) connected in series with lower voltage resistance and faster reverse recovery time can be equivalent to voltage series (such as D1 + D2 = 300V + 300V or 350V + 350V), or you can use front high back low or front low back high series in accordance with the actual different voltage distribution (such as D1 + D2 = 350V + 250V) and use silicon Schottky diodes Reverse recovery time and lower reverse recovery charge characteristics make its power factor correction circuit have better rectification efficiency, lower ripple and noise interference, and based on lower withstand voltage silicon Schottky diode has lower Cost can better meet the demands of economic benefits and high efficiency.

請搭配參閱第六、七、八、九、十圖所示,係分別為本發明緩衝電路包括電阻之示意圖、另一示意圖、緩衝電路包括電容之示意圖、另一示意圖及緩衝電路包括串聯的電容與電阻之示意圖,由圖中可清楚看出,本發明之集成化串聯蕭特基二極體之整流裝置為可利用電極引腳組3插件組裝於電路板上,使電路板之緩衝電路(Snubber Circuit)5可通過陽極引腳31、陰極引腳32及外接引腳33中至少二支引腳與引線框架1上對應之蕭特基二極體晶片2形成並聯,並於緩衝電路5之元件設置的數量與位置可根據實際應用中所量測到每一顆蕭特基二極體晶片2工作時承受的反向電壓來決定,以調整緩衝電路5對應位置之蕭特基二極體晶片2的工作電壓,例如降低電壓過高位置的蕭特基二極體晶片2,且緩衝電路5包括有至少一個電阻51、電容52或串聯的電阻51與電容52,以達到均壓調整之目的。 Please refer to the sixth, seventh, eighth, ninth, and tenth diagrams, which are schematic diagrams of a buffer circuit including a resistor according to the present invention, another schematic diagram, a schematic diagram of a buffer circuit including a capacitor, and another schematic diagram of a buffer circuit including a capacitor in series. It can be clearly seen from the figure that the rectification device of the integrated series Schottky diode of the present invention can be assembled on a circuit board by using the electrode pin group 3 plug-in to make the circuit's buffer circuit ( (Snubber Circuit) 5 can be connected in parallel with the corresponding Schottky diode chip 2 on the lead frame 1 through at least two pins of the anode pin 31, the cathode pin 32, and the external pin 33, and is connected to the buffer circuit 5 The number and position of the component settings can be determined according to the reverse voltage that each Schottky diode chip 2 is subjected to during operation in order to adjust the Schottky diode at the corresponding position of the buffer circuit 5. The working voltage of the chip 2 is, for example, a Schottky diode chip 2 at a position where the voltage is too high, and the buffer circuit 5 includes at least one resistor 51, a capacitor 52, or a resistor 51 and a capacitor 52 connected in series to achieve voltage equalization adjustment. Purposes.

在本實施例中,緩衝電路5為包括有電阻51,其電阻值可根據每一顆蕭特基二極體晶片2實際工作電壓進行選擇匹配,如第六圖所示,二顆串聯蕭特基二極體晶片2連接之電極引腳組3為具有一支外接引腳33,緩衝電路5之第一個電阻51二端分別與陽極引腳31及外接引腳33相連接,第二個電阻51二端分別與外接引腳33及陰極引腳32相連接;如第七圖所示,三顆串聯蕭特基二極體晶片2連接之電極引腳 組3為具有二支外接引腳33,緩衝電路5之第一個電阻51二端分別與陽極引腳31及第一支外接引腳33相連接,第二個電阻51二端分別與第一支及第二支外接引腳33相連接,第三個電阻51二端分別與第二支外接引腳33及陰極引腳32相連接。 In this embodiment, the buffer circuit 5 includes a resistor 51, and the resistance value can be selected and matched according to the actual working voltage of each Schottky diode chip 2. As shown in the sixth figure, two Schottky devices are connected in series. The electrode pin group 3 connected to the base diode chip 2 has an external pin 33. The two ends of the first resistor 51 of the buffer circuit 5 are respectively connected to the anode pin 31 and the external pin 33. The second The two ends of the resistor 51 are respectively connected to the external pin 33 and the cathode pin 32. As shown in the seventh figure, the electrode pin group 3 connected to the three Schottky diode chips 2 in series has two external pins. 33. The two ends of the first resistor 51 of the buffer circuit 5 are respectively connected to the anode pin 31 and the first external pin 33, and the two ends of the second resistor 51 are respectively connected to the first and second external pin 33. The two ends of the third resistor 51 are connected to the second external pin 33 and the cathode pin 32, respectively.

在另一個實施例中,緩衝電路5為包括有電容52,其容量值可根據每一顆蕭特基二極體晶片2實際工作電壓進行選擇匹配,如第八圖所示,二顆串聯蕭特基二極體晶片2連接之電極引腳組3為具有一支外接引腳33,緩衝電路5之第一個電容52二端分別與陽極引腳31及外接引腳33相連接,第二個電容52二端分別與外接引腳33及陰極引腳32相連接;如第九圖所示,三顆串聯蕭特基二極體晶片2連接之電極引腳組3為具有二支外接引腳33,緩衝電路5之第一個電容52二端分別與陽極引腳31及第一支外接引腳33相連接,第二個電容52二端分別與第一支及第二支外接引腳33相連接,第三個電容52二端分別與第二支外接引腳33及陰極引腳32相連接。 In another embodiment, the buffer circuit 5 includes a capacitor 52, and its capacity value can be selected and matched according to the actual operating voltage of each Schottky diode chip 2. As shown in the eighth figure, two serial Xiao The electrode pin group 3 connected to the special diode chip 2 has an external pin 33. The two ends of the first capacitor 52 of the buffer circuit 5 are respectively connected to the anode pin 31 and the external pin 33. The second The two ends of each capacitor 52 are respectively connected to the external pin 33 and the cathode pin 32; as shown in the ninth figure, the electrode pin group 3 connected to the three Schottky diode chips 2 in series has two external pins. Pin 33, two ends of the first capacitor 52 of the buffer circuit 5 are respectively connected to the anode pin 31 and the first external pin 33, and two ends of the second capacitor 52 are respectively connected to the first and second external pin 33 The 33 terminals are connected, and the two ends of the third capacitor 52 are connected to the second external pin 33 and the cathode pin 32, respectively.

在又一個實施例中,緩衝電路5包括有串聯的電阻51與電容52,如第十圖所示,二顆串聯蕭特基二極體晶片2連接之電極引腳組3為具有一支外接引腳33,緩衝電路5之電阻51二端分別與陽極引腳31及電容52一端相連接,電容52另一端與陰極引腳32相連接,便可將本發明之集成化串聯蕭特基二極體之整流裝置應用於交換式電源供應器之開關電源電路中,其中該開關電源電路包括有橋式整流器及升壓式功率因素校正電路,並由橋式整流器輸入端連接於交流電源(如115VAC~277VAC),且升壓式功率因素校正電路中一般選取600V 作為升壓二極體可承受的反向電壓,即可滿足交流電源在上述之電壓範圍內開關電源電路進行升壓式功率因素校正的需求。 In another embodiment, the buffer circuit 5 includes a resistor 51 and a capacitor 52 in series. As shown in the tenth figure, the electrode pin group 3 connected to the two Schottky diode chips 2 in series is provided with an external The two ends of the resistance 51 of the pin 33 and the buffer circuit 5 are respectively connected to the anode pin 31 and one end of the capacitor 52, and the other end of the capacitor 52 is connected to the cathode pin 32, so that the integrated series Schottky II of the present invention can be connected. The rectifying device of the polar body is applied to the switching power supply circuit of the switching power supply, wherein the switching power supply circuit includes a bridge rectifier and a step-up power factor correction circuit, and the bridge rectifier input terminal is connected to an AC power source (such as 115VAC ~ 277VAC), and 600V is generally selected as the reverse voltage that the boost diode can withstand in the boost power factor correction circuit, which can meet the AC power supply's boost power factor within the above voltage range. Need for correction.

如上所述,升壓式功率因素校正電路為採用串聯二顆電器特性一致性極高之蕭特基二極體晶片2(如D1、D2)來穩定且平均較高的反向電壓,即可根據D1的電器特性計算出合理緩衝電路5之電阻值及電容值,並由電極引腳組3外接於緩衝電路5,以提高D1可承受的電壓耐受性,藉此可避免因第一顆蕭特基二極體晶片2承受過高的電壓被擊穿而失效,而實際應用時,由於每一顆蕭特基二極體晶片2承受的反向電壓相較於使用單顆升壓二極體工作時其承受的反向電壓大約減小了一半,且蕭特基二極體晶片2為較低耐壓的矽蕭特基二極體,其逆向恢復時間比較短、逆向恢復的損耗較低,通過此種串聯有多顆蕭特基二極體晶片2的分壓處理,可使功率因素校正電路電壓交換速度加快、功率損耗變低而整流的效率更好,進而提高了開關電源電路的功率因素、降低高頻諧波污染以確保電源的品質,並使電源的利用率提升而降低了成本。 As mentioned above, the step-up power factor correction circuit uses a series of two Schottky diode chips 2 (such as D1 and D2) with extremely high consistency in electrical characteristics to stabilize and average higher reverse voltage. According to the electrical characteristics of D1, a reasonable resistance value and a capacitance value of the buffer circuit 5 are calculated, and the electrode pin group 3 is externally connected to the buffer circuit 5 to improve the voltage tolerance that D1 can withstand, thereby avoiding the first one The Schottky diode chip 2 fails due to excessively high voltage breakdown. In actual application, the reverse voltage that each Schottky diode chip 2 withstands is compared with the use of a single booster diode 2. During the operation of the polar body, the reverse voltage it has reduced is about half, and the Schottky diode chip 2 is a silicon Schottky diode with a lower withstand voltage. Its reverse recovery time is shorter and the loss of reverse recovery is shorter. Lower, through this voltage division processing of multiple Schottky diode chips 2 in series, the voltage exchange speed of the power factor correction circuit can be accelerated, the power loss becomes lower, and the efficiency of rectification is better, thereby improving the switching power supply. Power factor of circuit, reduce high frequency harmonic pollution Ensure the quality of power supply, and power efficiency improvement and reduce costs.

請參閱第十一、十二、十三、十四、十五、十六圖所示,係分別為本發明在常溫測試時所得到之逆向恢復時間及逆向恢復電荷波形圖、在高溫測試時所得到之逆向恢復時間及逆向恢復電荷波形圖、將習用快恢復二極體在常溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖、在高溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖、將另一習用快恢復二極體在常溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖及在高溫條件下測試時所得到之逆向恢復時間及逆向恢復電荷波形圖,由圖中可清楚看出,當本發明之集成化串聯蕭特基二 極體之整流裝置應用於電源供應器之開關電源時,可根據其升壓式功率因素校正電路各種不同的模式,包括連續導通模式(CCM)、不連續導通模式(DCM)及邊界導通模式(CRM),選用二顆可以承受的最高反向電壓為相同或不同的蕭特基二極體晶片2(如D1、D2)串聯來增加反向耐壓,並在常溫及高溫條件下實際測試的結果可得知本發明之集成化串聯蕭特基二極體之整流裝置相較於快恢復二極體的逆向恢復速度時間(Trr)最短,且逆向恢復電荷(Qrr)最小。 Please refer to the eleventh, twelfth, thirteenth, fourteenth, fifteenth, and sixteenth figures, which are the reverse recovery time and reverse recovery charge waveform diagrams obtained during the normal temperature test of the present invention, and the high temperature test The obtained reverse recovery time and reverse recovery charge waveform diagram, the reverse recovery time and reverse recovery charge waveform diagram obtained when the conventional fast recovery diode is tested under normal temperature conditions, and the reverse recovery obtained when tested under high temperature conditions Time and reverse recovery charge waveform diagram, reverse recovery time and reverse recovery charge waveform diagram obtained when another conventional fast recovery diode is tested under normal temperature conditions, and reverse recovery time and reverse direction obtained when tested under high temperature conditions The waveform diagram of the recovered charge can be clearly seen from the figure. When the integrated series Schottky diode rectifier device of the present invention is applied to a switching power supply of a power supply, various types of booster power factor correction circuits can be used to correct the circuit. Different modes, including continuous conduction mode (CCM), discontinuous conduction mode (DCM), and boundary conduction mode (CRM). The high reverse voltage is the same or different Schottky diode chip 2 (such as D1, D2) in series to increase the reverse withstand voltage, and the actual test results under normal temperature and high temperature conditions can tell the integration of the invention Compared with the fast recovery diode, the rectifier of the Schottky diode in series has the shortest reverse recovery time (Trr) and the smallest reverse recovery charge (Qrr).

在本實施例中,係以輸出功率為90W的開關電源為例,其功率因素校正電路實際承受的最大反向電壓為400V,但是為了保留一定餘量,一般仍採用耐壓值(可承受的最大反向電壓)為600V的升壓二極體,本發明之集成化串聯蕭特基二極體之整流裝置為採用二顆蕭特基二極體晶片2(如D1、D2)串聯分壓,係以矽為基底之矽蕭特基二極體,其耐壓值為介於300V~350V之間,並於實際工作時可得到如下表1所例示之測試結果,相較於採用單顆耐壓值為600V的快恢復二極體(如Vishay GS廠商所生產型號為MUR460之快恢復二極體),在本實施例中型號為PFCD860(KTH)之第一顆蕭特基二極體晶片2實際承受的最高反向電壓為244V,第二顆蕭特基二極體晶片2實際承受的最高反向電壓為56V,亦可根據實際測試結果重新選用耐壓值為介於200V~250V間之矽蕭特基二極體作為第二顆蕭特基二極體晶片2;然而,如表1所例示之測試結果可明確得知本實施例採用二顆串聯的矽蕭特基二極體逆向恢復時間為13.8ns,其逆向恢復損耗低而可降低高頻的交換功率損耗,成本相較於碳化矽蕭特基二極體 更為低廉,以控制功率因素校正電路的成本,而採用單顆耐壓值為600V的快恢復二極體逆向恢復時間為39.2ns,並於開關電源經由功率因數校正後其有效功率隨著負載的功率變化有逐漸增加之趨勢,因此功率損耗變低而整流的效率更好,進而提高了開關電源的功率因素,並使電源的利用率提升而降低了成本。 In this embodiment, a switching power supply with an output power of 90W is taken as an example. The maximum reverse voltage actually endured by the power factor correction circuit is 400V. However, in order to maintain a certain margin, a withstand voltage value (acceptable The maximum reverse voltage) is a boosted diode of 600V. The rectification device of the integrated series Schottky diode of the present invention uses two Schottky diode chips 2 (such as D1 and D2) in series to divide the voltage. It is a silicon Schottky diode based on silicon. Its withstand voltage is between 300V and 350V. In actual work, the test results illustrated in Table 1 below can be obtained, compared with the use of a single Fast recovery diode with a withstand voltage of 600V (such as the fast recovery diode MUR460 produced by Vishay GS manufacturer), the first Schottky diode with the model number PFCD860 (KTH) in this embodiment The highest reverse voltage actually experienced by chip 2 is 244V, the highest reverse voltage actually experienced by the second Schottky diode chip 2 is 56V, and the withstand voltage value can be reselected according to the actual test results between 200V ~ 250V The silicon Schottky diode as the second Schottky diode chip 2; however As shown in the test results illustrated in Table 1, it can be clearly known that the reverse recovery time of two Schottky diodes connected in series in this embodiment is 13.8ns, which has a low reverse recovery loss and can reduce high-frequency switching power loss. The cost is lower than that of SiC Schottky diodes. In order to control the cost of the power factor correction circuit, a single fast recovery diode with a withstand voltage of 600V has a reverse recovery time of 39.2ns. After the power factor is corrected by the power factor, the effective power of the power supply tends to increase gradually with the power of the load. Therefore, the power loss becomes lower and the efficiency of the rectification is better. Therefore, the power factor of the switching power supply is improved, and the utilization rate of the power supply is improved. Reduced costs.

請參閱第十一~十六圖所示,其中該第十一、十二圖係本實施例在工作溫度分別為25℃與125℃下測試時之波形圖,第十三、十四圖係習用快恢復二極體(如Vishay GS之MUR460)在工作溫度分別為25℃與125℃下測試時之波形圖,第十五、十六圖係另一習用快恢復二極體(如Yenyo廠商所生產型號為MUR460之快恢復二極體)在工作溫度分別為25℃與125℃下測試時之波形圖,由上揭之圖式可明確得知,本實施例之蕭特基二極體晶片2實際測試的逆向恢復時間在25℃時為14.2ns、在125℃時為19.0ns,相較於採用單顆耐壓值為600V的快恢復二極體逆向恢復時間在25℃ 時為介於33.0~39.0ns之間、在125℃時為介於79.4~89.4ns之間,通過此種串聯二顆較低耐壓、逆向恢復時間更快的蕭特基二極體晶片2分壓處理,可使電器特性獲得明顯改善,因此功率因素校正電路功率損耗變低而大幅提升了整流效率,並提高了開關電源的功率因素,進而使電源供應器的交換損失、傳導損失及漏電損失可降至最低,以廣泛適用於各種高頻、高壓及大電流的開關電源應用領域中,更能符合節能且高效率的發展及需要。 Please refer to the eleventh to sixteenth figures, where the eleventh and twelfth figures are waveform diagrams of the present embodiment when tested at working temperatures of 25 ° C and 125 ° C, respectively, and the thirteenth and fourteenth figures are Waveforms of conventional fast-recovery diodes (such as MUR460 from Vishay GS) when tested at 25 ° C and 125 ° C, respectively. The fifteenth and sixteenth figures are another conventional fast-recovery diodes (such as Yenyo manufacturers). The produced model is MUR460 fast-recovery diode.) The waveform diagrams when tested at the working temperature of 25 ℃ and 125 ℃, respectively, can be clearly known from the figure disclosed above. The Schottky diode of this embodiment The reverse recovery time of the actual test of wafer 2 is 14.2ns at 25 ° C and 19.0ns at 125 ° C. Compared with the fast recovery diode with a single withstand voltage of 600V, the reverse recovery time is at 25 ° C. Between 33.0 ~ 39.0ns, and between 79.4 ~ 89.4ns at 125 ℃, through this series of two Schottky diode chips with lower withstand voltage and faster reverse recovery time , Can significantly improve the electrical characteristics, so the power loss of the power factor correction circuit is reduced and the rectification efficiency is greatly improved. And increase the power factor of the switching power supply, so that the switching loss, conduction loss and leakage loss of the power supply can be minimized. It is widely applicable to various high-frequency, high-voltage and high-current switching power supply applications. Meet the development and needs of energy saving and high efficiency.

上述詳細說明為針對本發明一種較佳之可行實施例說明而已,惟該實施例並非用以限定本發明之申請專利範圍,凡其他未脫離本發明所揭示之技藝精神下所完成之均等變化與修飾變更,均應包含於本發明所涵蓋之專利範圍中。 The above detailed description is only a description of a preferred feasible embodiment of the present invention, but this embodiment is not intended to limit the scope of the patent application of the present invention, and other equivalent changes and modifications made without departing from the spirit of the technology disclosed by the present invention Changes should be included in the scope of patents covered by the present invention.

綜上所述,本發明上述之集成化串聯蕭特基二極體之整流裝置於使用時為確實能達到其功效及目的,故本發明誠為一實用性優異之發明,實符合發明專利之申請要件,爰依法提出申請,盼 審委早日賜准本案,以保障發明人之辛苦發明,倘若 鈞局有任何稽疑,請不吝來函指示,發明人定當竭力配合,實感德便。 To sum up, the above-mentioned integrated series Schottky diode rectifier device of the present invention can really achieve its efficacy and purpose when in use. Therefore, the present invention is an invention with excellent practicality, and it is in line with the invention patent. To apply for the requirements, I will submit an application in accordance with the law, and I hope that the trial committee will grant this case as soon as possible to protect the inventor's hard invention.

Claims (12)

一種集成化串聯蕭特基二極體之整流裝置,包括:至少二個引線框架;複數蕭特基二極體晶片背面之各陰極為分別連接於引線框架上,而第一顆蕭特基二極體晶片正面之陽極上連接有第一導體,並由其他蕭特基二極體晶片之陽極上分別連接有第二導體,且各第二導體分別橋接於前一顆蕭特基二極體晶片位置之引線框架上而依次串聯有至少二顆蕭特基二極體晶片;電極引腳組為包括有陽極引腳、陰極引腳及至少一支外接引腳,其中陽極引腳與第一顆蕭特基二極體晶片上之第一導體相連接,陰極引腳與最後一顆蕭特基二極體晶片之陰極相連接,外接引腳分別與串聯二顆相鄰蕭特基二極體晶片之第二導體相連接;以及塑封體為設置於引線框架上,並包覆蕭特基二極體晶片及電極引腳組上而陽極引腳、陰極引腳及外接引腳則外露於塑封體。     An integrated series Schottky diode rectifier includes: at least two lead frames; each cathode on the back of a plurality of Schottky diode chips is respectively connected to the lead frame, and the first Schottky diode is connected to the lead frame; A first conductor is connected to the anode on the front of the polar body wafer, and a second conductor is connected to the anode of the other Schottky diode wafer, and each second conductor is bridged to the previous Schottky diode. At least two Schottky diode wafers are connected in series on the lead frame at the chip position; the electrode pin group includes an anode pin, a cathode pin, and at least one external pin, wherein the anode pin and the first The first conductor on a Schottky diode chip is connected, the cathode pin is connected to the cathode of the last Schottky diode chip, and the external pins are respectively connected to two adjacent Schottky diodes in series. The second conductor of the body chip is connected; and the plastic package is arranged on the lead frame and covers the Schottky diode chip and the electrode pin group, and the anode pin, the cathode pin and the external pin are exposed on the Plastic body.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該引線框架為具有銅或銅合金材質之平整狀基板,並於至少一個引線框架之基板上方處設有寬度相較於基板為大之散熱片。     The rectification device of an integrated series Schottky diode according to item 1 of the scope of the patent application, wherein the lead frame is a flat substrate having a copper or copper alloy material, and is disposed above the substrate of at least one lead frame There are heat sinks that are wider than the substrate.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該蕭特基二極體晶片係以矽為基底之矽蕭特基二極體。     The rectification device of an integrated series Schottky diode as described in item 1 of the scope of patent application, wherein the Schottky diode chip is a silicon Schottky diode based on silicon.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該複數蕭特基二極體晶片電器特性一致而等同於電壓串聯,並可以承受的最高反向電壓相同。     The integrated series Schottky diode rectifier device according to item 1 of the scope of the patent application, wherein the plurality of Schottky diode chips have the same electrical characteristics and are equivalent to a series voltage, and can withstand the highest reverse voltage the same.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該複數蕭特基二極體晶片電器特性一致而等同於電壓串聯,並可以承受的最高反向電壓不同。     The integrated series Schottky diode rectifier device according to item 1 of the scope of the patent application, wherein the plurality of Schottky diode chips have the same electrical characteristics and are equivalent to a series voltage, and can withstand the highest reverse voltage different.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該最後一顆蕭特基二極體晶片之陰極上為連接有第三導體,並由該第三導體與電極引腳組之陰極引腳相連接。     According to the integrated rectifier device of the Schottky diode in series as described in the first item of the patent application scope, a third conductor is connected to the cathode of the last Schottky diode chip, and the third Schottky diode chip is connected by the third conductor. The conductor is connected to the cathode pin of the electrode pin group.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該電極引腳組之陰極引腳係最後一顆蕭特基二極體晶片位置之引線框架上直接或間接向外延伸。     The rectification device of an integrated series Schottky diode as described in item 1 of the scope of the patent application, wherein the cathode pin of the electrode pin group is directly on the lead frame of the last Schottky diode chip position. Or indirectly outward.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該電極引腳組之外接引腳係任意二顆相鄰蕭特基二極體晶片位置之至少一個引線框架上直接或間接向外延伸。     The rectification device of an integrated series Schottky diode according to item 1 of the scope of the patent application, wherein the external pin of the electrode pin group is at least one of the positions of any two adjacent Schottky diode chips. The lead frame extends directly or indirectly outward.     如申請專利範圍第1項所述之集成化串聯蕭特基二極體之整流裝置,其中該電極引腳組為進一步連接有緩衝電路,並由緩衝電路通過陽極引腳、陰極引腳及外接引腳中至少二支引腳與引線框架上對應之蕭特基二極體晶片形成並聯。     The rectification device of an integrated series Schottky diode as described in item 1 of the scope of the patent application, wherein the electrode pin group is further connected with a buffer circuit, and the buffer circuit passes the anode pin, the cathode pin and an external connection. At least two of the pins are connected in parallel with the corresponding Schottky diode chip on the lead frame.     如申請專利範圍第9項所述之集成化串聯蕭特基二極體之整流裝置,其中該緩衝電路為包括有至少一個電阻。     The rectifying device of the integrated series Schottky diode as described in item 9 of the scope of the patent application, wherein the buffer circuit includes at least one resistor.     如申請專利範圍第9項所述之集成化串聯蕭特基二極體之整流裝置,其中該緩衝電路為包括有至少一個電容。     According to the integrated rectifier device of the series Schottky diode described in item 9 of the scope of the patent application, the buffer circuit includes at least one capacitor.     如申請專利範圍第9項所述之集成化串聯蕭特基二極體之整流裝置,其中該緩衝電路為包括有串聯的電阻與電容。     The integrated series Schottky diode rectifier device according to item 9 of the scope of patent application, wherein the buffer circuit includes a resistor and a capacitor in series.    
TW105134837A 2016-10-27 2016-10-27 Rectifying device of integrated series-connected Schottky diode increasing the reverse withstand voltage by serially connecting the Schottky diode TW201816983A (en)

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