TW201706465A - Nitride semiconductor growth substrate, method of manufacturing the same, semiconductor device, and method of manufacturing the same - Google Patents

Abstract

In one embodiment of the present invention, there is provided a nitride semiconductor growth substrate 16 having a second nitride semiconductor single crystal layer 14 on its surface, the second nitride semiconductor single crystal layer 14 including a continuous film 17, and a period a plurality of convex portions 15 arranged in a truncated cone shape or a pyramid shape on the continuous film 17, wherein at least a plurality of convex portions 15 and a region under the plurality of convex portions 15 of the continuous film 17 are continuous nitride semiconductor sheets The crystals are composed of a plurality of convex portions 15 whose crystal orientations are identical, and the bottom surface of each convex portion includes a (0001) plane having a shape formed by a side parallel to the a-axis.

Description

Nitride semiconductor growth substrate, method of manufacturing the same, and semiconductor device And manufacturing method thereof

The present invention relates to a substrate for growing a nitride semiconductor, a method of manufacturing the same, and a semiconductor device and a method of manufacturing the same.

Crystals of Group III nitride semiconductors represented by gallium nitride (GaN) are widely used in optical devices such as light-emitting diodes and lasers, or high-frequency devices such as diodes and transistors ( High frequency devices), it is expected to be applied to power devices in the future.

Most of these devices are fabricated on a c-plane grown substrate of GaN. However, in order to improve device characteristics, attempts have been made to intentionally form a non-c plane on a portion of the c-plane grown substrate of GaN, and the device is fabricated using the surface.

For example, Patent Document 1 listed below discloses a field effect transistor which is formed by using an inclined surface (non-polar surface) of a c-plane grown substrate of GaN, and can eliminate a piezoelectric field (piezo electric field). ) the adverse effects.

Further, in Non-Patent Document 1 below, an example of development of a light-emitting diode which can be formed in GaN has been reported. The c-plane grows on the inclined surface (non-c-plane) on the substrate and emits light efficiently and in multiple colors.

Further, in Non-Patent Document 2 described below, there is reported a result of research, in which growth is performed by using a mask, GaN crystal having an inclined surface is grown on a substrate, and a layer is grown on GaN crystal. Light emitted by indium gallium nitride (InGaN) was investigated.

[Previous Technical Literature] (Patent Literature)

Patent Document 1: Japanese Laid-Open Patent Publication No. 2011-82218

(Non-patent literature)

Non-Patent Document 1: K. Nishizuka et. al., Efficient radiative recombination from <11-22>-oriented InxGal-xN multiple quantum wells fabricated by the regrowth technique, APPLIED PHYSICS LETTERS (2004), 85(15): 3122 3124

Non-Patent Document 2: H. Miyake et. al., Blue emission from InGaN/GaN hexagonal pyramid structures, Superlattices and Microstructures (2007), Vol. 41 issues 5-6, 341-346

Most of the GaN epitaxial wafers used in the fabrication of devices use the following template as a substrate for heteroepitaxial crystallization of a GaN single crystal layer on a heterogeneous substrate such as sapphire or germanium. (hetero epitaxial) grew up. Further, a part of the single crystal substrate of GaN is used as a base of a GaN epitaxial wafer.

In the case of a general GaN template or a GaN free-standing single crystal substrate or the like, a flat polished surface or a flat epitaxial growth surface which has been grown thereon is used, and the use of the above-described Patent Document 1 or Non-Patent Document 1 is employed. The device formed by the inclined surface needs to perform three-dimensional processing of GaN crystal on the surface of a substrate, that is, a GaN template or a free-standing single crystal substrate of GaN, using a micromachining technique such as photolithography.

In the micromachining, a step of depositing a cerium oxide (SiO ₂ ) film or the like as a mask on a surface of a GaN crystal by a chemical vapor deposition (CVD) method or the like is generally employed. After the photolithography technique is used to form the desired mask pattern, the GaN crystal is etched by reactive ion etching or the like, and finally the mask is removed.

However, these steps are not only very complicated, but also time consuming and laborious, and there is a problem in that etching damage is often left on the surface of the GaN after etching, and desired device characteristics are not obtained with good reproducibility.

Further, as disclosed in Non-Patent Document 2, in the use of a mask to select growth, it is still necessary to use a complicated photolithography technique. Moreover, since the material surface of the mask is exposed on the surface of the substrate, it is easy to cause a difference in linear expansion coefficient with the mask during subsequent epitaxial growth and processing. crack. Further, it is necessary to consider crystal growth conditions to avoid abnormal growth on the mask.

An object of the present invention is to provide a nitride semiconductor growth substrate, a method of manufacturing the same, and a semiconductor device manufactured using the nitride semiconductor growth substrate, which is suitable for use in manufacturing characteristics, and a method of manufacturing the same A device that is good and has a good yield (yield) and has a 3-dimensional periodic arrangement on the surface.

According to one embodiment of the invention, the substrate for nitride semiconductor growth according to [1] to [12] is provided. According to another aspect of the invention, the method for producing a nitride semiconductor growth substrate according to [13] to [20] is provided. Further, according to another embodiment of the present invention, the semiconductor device according to [21] is provided. Further, according to another embodiment of the present invention, the method of manufacturing the semiconductor device according to [22] is provided.

[1] A nitride semiconductor growth substrate having a nitride semiconductor layer on a surface thereof, the nitride semiconductor layer comprising a continuous film, and a plurality of convex portions having a truncated cone shape or a pyramid shape periodically arranged on the continuous film And at least the plurality of convex portions and the region under the plurality of convex portions of the continuous film are composed of a continuous nitride semiconductor single crystal, the plurality of convex portions having the same crystal orientation, and each of the convex portions The bottom surface includes a (0001) plane having a shape formed by a side parallel to the a-axis.

[2] The nitride semiconductor growth substrate according to [1], wherein the plurality of convex portions are in a truncated cone shape, and a top surface thereof is included The (0001) plane has a shape formed by a side parallel to the a-axis.

[3] The nitride semiconductor growth substrate according to [1], wherein the inclined surface of the plurality of convex portions has a uniform surface orientation, a size, and a shape, and has no processing damage.

[4] The nitride semiconductor growth substrate according to [3], wherein the inclined surface includes (10-1n) planes, and n is an arbitrary integer.

[5] The nitride semiconductor growth substrate according to [4], wherein the inclined surface includes a mirror-form growth surface in a state of formation.

[6] The substrate for bulk semiconductor growth according to any one of [1], wherein the plurality of convex portions have a uniform height.

The substrate for nitride semiconductor growth according to any one of [1], wherein a height of the plurality of convex portions periodically changes, and a vertex or a top surface of the plurality of convex portions is located. On either plane of the two imaginary planes.

The substrate for a nitride semiconductor growth according to any one of the above aspects, wherein a distance between centers of any adjacent ones of the plurality of convex portions is 100 μm or more 10mm or less.

The substrate for a nitride semiconductor growth according to any one of the above aspects, wherein a distance between bottom surfaces of any adjacent ones of the plurality of convex portions is 1 mm or less .

[10] The nitride semiconductor growth substrate according to any one of [1], wherein the plurality of convex portions have a height of 50 μm or more and 5 mm or less.

[11] The nitride semiconductor growth substrate according to any one of [1] to [10] wherein a difference in density between regions between bottom faces of any adjacent ones of the plurality of convex portions The difference in density of the inside of the convex portion is higher.

[12] The nitride semiconductor growth substrate according to any one of [1], wherein the shape of the bottom surface of the plurality of convex portions is a triangle, a quadrangle or a hexagon.

[13] A method for producing a substrate for growing a nitride semiconductor, comprising the steps of: forming a periodic pattern on a flat substrate having a single crystal of a nitride semiconductor, forming a pattern parallel to the nitride semiconductor a plurality of linear grooves of the a-axis of the crystal; and epitaxial growth of the nitride semiconductor crystal on the substrate on which the plurality of linear grooves are formed to form a nitride semiconductor layer, the nitride semiconductor layer The surface has a plurality of convex portions composed of a truncated cone-shaped or pyramidal nitride semiconductor single crystal, and is periodically arranged in a pattern corresponding to a periodic pattern formed by the plurality of linear grooves.

[14] The method for producing a nitride semiconductor growth substrate according to [13], wherein the surface of the substrate includes a c-plane.

The method for producing a nitride semiconductor growth substrate according to the above aspect, wherein the plurality of linear grooves have a width of 10 μm or more and 100 μm or less.

[16] The method for producing a substrate for growing a nitride semiconductor according to any one of [13], wherein a distance between centers of the grooves having the same direction among the plurality of linear grooves is 100 μm or more and 10 mm or less.

The method for producing a nitride semiconductor growth substrate according to any one of the aspects of the present invention, wherein the nitride semiconductor layer is a hydride gas phase containing hydrogen in a growing ambient gas. Formed by the Hydride vapour phase epitaxy (HVPE) method.

The method for producing a nitride semiconductor growth substrate according to any one of the aspects of the present invention, wherein the nitride semiconductor layer comprises a continuous film.

The method for producing a nitride semiconductor growth substrate according to any one of the aspects of the present invention, characterized in that after the nitride semiconductor layer is grown, it is deposited on the inclined surface of the convex portion. The undesired nitride semiconductor crystals are removed by etching.

The method for producing a nitride semiconductor growth substrate according to any one of the aspects of the present invention, wherein the periodic pattern formed by the plurality of linear grooves includes a triangular, quadrangular or hexagonal lattice .

[21] A semiconductor device comprising one of the plurality of convex portions of the nitride semiconductor growth substrate according to any one of [1] to [12].

[22] A method of producing a semiconductor device, comprising the step of: a single crystal film of a plurality of nitride semiconductors, wherein the nitride semiconductor growth substrate according to any one of [1] to [12] Performing epitaxial growth on a plurality of convex portions to form a plurality of epitaxial growth layers; and, after forming the plurality of epitaxial growth layers, dividing the nitride semiconductor growth substrate to form a plurality of semiconductor devices, the plurality of semiconductor devices Each of them contains one of the aforementioned plurality of convex portions.

According to an embodiment of the present invention, a nitride semiconductor growth substrate, a method of manufacturing the same, and a semiconductor device manufactured using the nitride semiconductor growth substrate, and a method of manufacturing the same, wherein the nitride semiconductor growth substrate is suitable It is used to manufacture devices with good characteristics and excellent yield, and the surface has a 3-dimensional periodic arrangement structure.

10, 20 ‧ ‧ template

11, 21‧‧‧ Heterogeneous substrate

12, 22‧‧‧First nitride semiconductor single crystal layer

13, 23‧‧‧ slots

14, 24‧‧‧Second nitride semiconductor single crystal layer

15, 25, 26‧‧ ‧ convex part

15a, 25a, 26a‧‧‧ top

15b, 25b, 26b‧‧‧ sloped surface

16, 27‧‧‧ nitride semiconductor growth substrate

17, 28‧‧‧Continuous film

30‧‧‧Separate substrate

31‧‧‧ nitride semiconductor single crystal layer

32‧‧‧Multilayer epitaxial growth layer

35‧‧‧Semiconductor devices

FIG. 1(a) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

FIG. 1(b) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

FIG. 1(c) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

FIG. 1(d) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

FIG. 1(e) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

Fig. 2(a) is a plan view showing a part of the template.

Fig. 2(b) is a plan view showing a part of the second nitride semiconductor single crystal layer.

Fig. 2(c) is a plan view showing a part of a single crystal layer of the second nitride semiconductor.

FIG. 3(a) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the second embodiment.

FIG. 3(b) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the second embodiment.

FIG. 3(c) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the second embodiment.

FIG. 3(d) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the second embodiment.

FIG. 3(e) is a vertical cross-sectional view schematically showing a manufacturing step of the nitride semiconductor growth substrate of the second embodiment.

Fig. 4(a) is a plan view showing a part of the template.

Fig. 4(b) is a plan view showing a part of the single crystal layer of the second nitride semiconductor.

Fig. 4(c) is a plan view showing a part of a single crystal layer of the second nitride semiconductor.

Fig. 5(a) is a vertical sectional view schematically showing a manufacturing step of the semiconductor device of the third embodiment.

Fig. 5(b) is a vertical sectional view schematically showing a manufacturing step of the semiconductor device of the third embodiment.

Fig. 5(c) is a vertical sectional view schematically showing a manufacturing step of the semiconductor device of the third embodiment.

Fig. 5(d) is a vertical sectional view schematically showing a manufacturing step of the semiconductor device of the third embodiment.

Fig. 6(a) is a plan view showing a nitride-substrate growth substrate of the embodiment by a scanning electron microscope.

Fig. 6(b) is a cross-sectional photograph showing a nitride semiconductor growth substrate of the embodiment by a scanning electron microscope.

Fig. 6(c) is a bird's-eye view showing a cross section of the nitride semiconductor growth substrate of the embodiment by a scanning electron microscope.

Fig. 7(a) is a plan view showing a nitride semiconductor growth substrate of another embodiment by a scanning electron microscope.

Fig. 7(b) is a cross-sectional photograph showing a nitride semiconductor growth substrate of another embodiment by a scanning electron microscope.

Fig. 7(c) is a bird's-eye view showing a cross section of a nitride semiconductor growth substrate of another embodiment by a scanning electron microscope.

(First embodiment)

The present embodiment provides a substrate for growing a nitride semiconductor, which is suitable for use in a device having good characteristics, and has a three-dimensional periodic array structure formed on the surface of the substrate, and the three-dimensional periodic array structure does not exist. Machining the slope of the damage.

1(a) to (e) are vertical cross-sectional views schematically showing a manufacturing step of the nitride semiconductor growth substrate of the first embodiment.

First, as shown in Fig. 1(a), the first nitride semiconductor single crystal layer 12 is subjected to heteroepitaxial growth on the heterogeneous substrate 11 made of a material different from the nitride semiconductor to obtain the template 10. Next, as shown in Fig. 1(b), a groove 13 is formed on the surface of the template 10. Next, as shown in FIGS. 1(c) and 1(d), the second nitride semiconductor single crystal layer 14 is epitaxially grown on the template 10 on which the grooves 13 are formed. Next, as shown in FIG. 1(e), the nitride semiconductor growth substrate 16 is cut out from the second nitride semiconductor single crystal layer 14 as needed. Hereinafter, each of these steps will be described in detail.

The upper surface of the hetero-substrate 11 shown in Fig. 1(a) is flat, and the upper surface of the first nitride semiconductor single crystal layer 12 grown on the upper surface is also flat.

The hetero-substrate 11 is a substrate made of, for example, sapphire, Si, GaAs, ZnO, or Ga ₂ O ₃ . From the viewpoint of stability (reactivity) at the time of crystal growth and ease of acquisition, etc., it is preferable to use a sapphire substrate as the hetero-substrate 11 . Specifically, for example, a commercially available c-plane sapphire substrate for GaN epitaxial crystal growth can be used, which has a diameter of 65 mm and a thickness of 400 μm.

The first nitride semiconductor single crystal layer 12 is composed of a single crystal of a nitride semiconductor. Here, the nitride semiconductor single crystal means a composition formula of In _x Al _y Ga _z N (0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z=1) Single crystal. The first nitride semiconductor single crystal layer 12 is, for example, an undoped GaN thin film having a thickness of 2 μm.

Further, in order to improve the crystallinity of the first nitride semiconductor single crystal layer 12 and ensure the flatness of the surface, it is desirable to apply a low temperature buffer layer insertion technique which is widely used in the heteroepitaxial growth of GaN. A technique for performing heteroepitaxial growth of GaN crystals on a sapphire substrate using a low temperature buffer layer is disclosed, for example, in Japanese Patent No. 3026087.

Further, a single-crystal GaN self-supporting substrate may be used instead of the template 10. At this time, a groove 13 is formed on the free-form substrate of single crystal GaN, and is used as a base for epitaxial growth of the second nitride semiconductor single crystal layer 14.

In the step shown in Fig. 1(b), the groove 13 formed on the surface of the template 10 is composed of a combination of linear grooves parallel to the a-axis of the hexagonal nitride semiconductor single crystal, and has A lattice-like periodic pattern arranged in a triangle parallel to the sides of the a-axis. At this time, the second nitride semiconductor single crystal layer 14 grown on the template 10 The inclined surface 15b of the truncated pyramid or pyramidal convex portion 15 can be constituted by a facet growth surface (the inclined surface 15b and the mirror growth surface will be described later). For example, the linear grooves constituting the grooves 13 have a width of 40 μm and a depth of 60 μm, and the pitch of the grooves (the distance between the centers of the adjacent grooves) is 1 mm.

The second (a) is a plan view showing a part of the template 10, and shows an example of the pattern of the groove 13. The upper surface of the first nitride semiconductor single crystal layer 12 shown in Fig. 2(a) is the c-plane of the nitride semiconductor single crystal constituting the first nitride semiconductor single crystal layer 12, that is, the (0001) plane. The c-axis of the nitride semiconductor single crystal constituting the first nitride semiconductor single crystal layer 12 is perpendicular to the paper surface. The cross section of the template 10 shown in Fig. 1(b) corresponds to the cross section taken along the cutting line A-A of Fig. 2(a).

The groove 13 shown in Fig. 2(a) has a maximum of six rotational symmetry by the set position of the central axis of the rotational operation. For example, when the central axis of the rotation operation is set on the apex of the triangle of the lattice pattern, the pattern of the groove 13 has 6 symmetry. Further, when the central axis of the rotational operation is set at the center of the triangle of the lattice pattern, the pattern of the groove 13 has three times of symmetry.

When the center of the triangle of the lattice pattern is located on the central axis of the template 10, the pattern of the groove 13 shown in Fig. 2(a) has three rotational symmetry with respect to the central axis of the template 10. Further, when the vertex of the triangle of the lattice pattern is located on the central axis of the template 10, the second (a) The pattern of the grooves 13 shown in the drawing has six rotational symmetry with respect to the central axis of the template 10.

In the formation of the groove 13, a commercially available laser processing machine, a dicer, an electric discharge machine, or the like can be used, and the fine groove can be processed with high positional accuracy, and it is preferable to use a mine having less damage to the processed GaN crystal. Shot processing machine. For example, a laser machine having a high harmonic wavelength of a commercially available yttrium aluminum garnet crystal (Nody: YAG) laser is 532 nm, 355 nm, 266 nm, 213 nm, or the like.

When the groove processing is performed using a laser processing machine, the first nitride semiconductor single crystal layer 12 and the processing chips of the foreign substrate 11 (for example, processing chips of GaN and sapphire) adhere to the inside and around the groove 13. In order to remove the processing chips, it is preferred to ultrasonically clean the template 10 subjected to the groove processing using pure water and an organic solvent, and to perform bubble cleaning using oxygen (for example, using a mixture of hydrochloric acid and hydrogen peroxide water). The liquid is washed) and then carefully washed with pure water.

It is preferable that the width W of the linear groove constituting the groove 13 on the upper surface of the first nitride semiconductor single crystal layer 12 is 10 μm or more and 100 μm or less. If the width W is less than 10 μm, when the second nitride semiconductor single crystal layer 14 is grown on the template 10, the trench 13 is quickly buried in the second nitride semiconductor single crystal layer 14, thus sandwiching the trench 13 and adjacent thereto The triangular frustum-shaped or triangular pyramid-shaped convex portions 15 of the second nitride semiconductor single crystal layer 14 are connected to each other, and it is difficult to maintain 3 Dimensional periodic arrangement structure (with respect to the convex portion 15 of the second nitride semiconductor single crystal layer 14, which will be described later). On the other hand, if the width W is larger than 100 μm, the polycrystalline nucleus of the nitride semiconductor generated in the inside of the groove 13 is greatly grown, and therefore it is difficult to maintain the three-dimensional periodic arrangement structure of the second nitride semiconductor single crystal layer 14 at this time. .

Further, among the plurality of linear grooves constituting the groove 13, the distance (pitch) D ₁ between the centers of the grooves having the same direction is preferably 100 μm or more and 10 mm or less. If the pitch D _{1 is} less than 100 μm, it is difficult to grow the convex portion 15 of the second nitride semiconductor single crystal layer 14 to a size sufficient for fabricating a semiconductor device. On the other hand, if the pitch D _{1 is} larger than 10 mm, a plurality of convex portions 15 of the second nitride semiconductor single crystal layer 14 are generated in a region partitioned by the grooves 13, and these convex portions may be connected in an unaligned state. growing up. At this time, it is difficult to maintain the three-dimensional periodic array structure of the second nitride semiconductor single crystal layer 14.

Preferably, as shown in Fig. 2(a), the groove 13 has a pattern of regions of equal shape and area. At this time, the shape and size of the convex portion 15 of the second nitride semiconductor single crystal layer 14 which is grown on the divided plurality of regions can be made uniform.

Preferably, in the steps shown in the first (c) and the first (d), the formed second nitride semiconductor single crystal layer 14 is composed of a nitride semiconductor crystal, and particularly preferably GaN. It consists of crystals. The second nitride semiconductor single crystal layer 14 is, for example, a Si-doped GaN crystal layer having a thickness of 2 mm.

The second nitride semiconductor single crystal layer 14 may also be any of i-type (semi-insulating), n-type or p-type. Si, S, Se, Ge, O, C, Fe, Mg, Zn, or the like can be used as the impurity element to be doped to control conductivity.

The second nitride semiconductor single crystal layer 14 has a three-dimensional periodic array structure composed of the convex portions 15. The bottom surface of the convex portion 15 (the surface in contact with the template 10 in the state shown in Fig. 1(c)) is the same as the upper surface of the template 10, and is a (0001) plane of a single crystal of a nitride semiconductor.

Fig. 1(c) shows a state in which the convex portion 15 of the second nitride semiconductor single crystal layer 14 is grown in the regions partitioned by the grooves 13 on the template 10, and the adjacent convex portions 15 are in contact with each other. status.

The convex portion 15 is a triangular frustum shape or a triangular pyramid portion that grows in the triangular region of the template 10 defined by the grooves 13. Since the edge of the bottom surface of the convex portion 15 coincides with the edge of the groove 13, the shape of the bottom surface of the convex portion 15 is a triangle formed by the side parallel to the a-axis of the single crystal of the nitride semiconductor.

The mirror-grown surface of the hexagonal nitride semiconductor single crystal is a (10-1n) plane (n is an arbitrary integer) and is parallel to the a-axis. Therefore, a mirror-like growth surface appears along the linear groove parallel to the a-axis of the groove 13 constituting the template 10, and the inclined surface 15b of the convex portion 15 is formed.

Further, the convex portion 15 has a triangular frustum shape or a triangular pyramid shape depending on crystal growth conditions. But considering when in the second nitride half The quality of the grown crystal when the epitaxial crystal is grown on the conductor single crystal layer 14 and the region where the electrode is formed in the semiconductor device are ensured, and the convex portion 15 is preferably in the shape of a triangular frustum. Further, the top of the triangular frustum-shaped or triangular-tapered convex portion 15 may be subjected to a grinding process to form a triangular frustum-shaped convex portion 15 having a desired height.

Further, when the second nitride semiconductor single crystal layer 14 includes the triangular frustum-shaped convex portion 15, the top surface 15a is the same as the upper surface of the template 10, and is a (0001) plane of a nitride semiconductor single crystal. Further, it is preferable that the top surface 15a is a (0001) plane, but if it is within 5 degrees, it may have an offset angle from the (0001) plane shift. When the offset angle exceeds 5°, the variation in the area of the inclined surface 15b is increased by the inclination of the convex portion 15, and therefore it is difficult to manufacture the semiconductor device having excellent characteristics using the second nitride semiconductor single crystal layer 14.

Preferably, the size, shape and height of the top surface 15a of all the convex portions 15 are substantially uniform. If the shape and size of the region defined by the groove 13 on the template 10 are substantially uniform, the size, shape, and height of the top surface 15a can be made substantially uniform. When the size, shape, and height of the top surface 15a are substantially uniform, the size and shape of the inclined surface 15b are also substantially uniform. By improving the uniformity of the size, shape, and height of the top surface 15a and the uniformity of the size and shape of the inclined surface 15b, the manufacturing yield of the semiconductor device manufactured using the second nitride semiconductor single crystal layer 14 can be improved.

Further, it is required that the inclined surface 15b of the convex portion 15 has no processing damage to improve the use of the second nitride semiconductor single crystal layer 14 Manufacturing yield of fabricated semiconductor devices. Since the inclined surface 15b is an as-grown surface composed of a mirror-elongated surface of a nitride semiconductor single crystal, processing such as etching is not performed, so there is no processing damage. The cross section of the inclined surface 15b can be observed by using a transmission electron microscope (TEM) to investigate whether or not the atomic arrangement of the nitride semiconductor single crystal is disordered, and whether or not the inclined surface 15b is damaged by processing can be determined. Further, the uniformity of the size and shape of the inclined surface 15b can be improved by forming the inclined surface 15b by the mirror-like growth surface of the single crystal of the nitride semiconductor.

Moreover, since the inclined surface 15b is formed by the mirror-growth surface, since the plane orientation of all the inclined surfaces 15b is equivalent, variation in characteristics of the semiconductor device manufactured using the second nitride semiconductor single crystal layer 14 can be suppressed.

A vapor phase growth method such as a hydride vapor phase epitaxy (HVPE) method or a metalorganic chemical vapor deposition (MOCVD) method, a liquid phase such as a Na flux method or an ammoniacal method, or a liquid phase such as an ammoniacal method can be used. In the growth method, the second crystallization semiconductor single crystal layer 14 is grown. Among them, it is preferred to use an HVPE method in which the crystal growth rate is fast and the raw material cost is low. When the second nitride semiconductor single crystal layer 14 is grown by the HVPE method, it is preferred that the growth environment gas contains hydrogen gas. Thus, the shape of the convex portion 15 can be easily maintained, and the three-dimensional periodic arrangement structure of the second nitride semiconductor single crystal layer 14 can be easily formed.

Details of the growth technique carried out by the HVPE method using GaN are disclosed, for example, in Japanese Patent No. 3553883. The details of the technique of doping Si by GaN growth using the HVPE method are disclosed in, for example, Japanese Patent No. 3279528.

The second (b) diagram corresponds to the first (c), and is a plan view showing a part of the second nitride semiconductor single crystal layer 14 and shows an example of the pattern of the second nitride semiconductor single crystal layer 14. The cross section of the template 10 and the second nitride semiconductor single crystal layer 14 shown in Fig. 1(c) corresponds to the cross section defined by the cutting line B-B in Fig. 2(b).

The second nitride semiconductor single crystal layer 14 shown in Fig. 2(b) is grown on the template 10 shown in Fig. 2(a), and the plurality of convex portions 15 are effectively arranged. The convex portion 15 shown in Fig. 2(b) has a uniform shape and size.

The first (d) diagram shows a state in which the second nitride semiconductor single crystal layer 14 continues to grow, and the second nitride semiconductor single crystal layer 14 is formed of a continuous film 17 of a single crystal of a nitride semiconductor on the template 10 and a plurality thereof The convex portion 15 is formed. The portion of the continuous film 17 of the single crystal of the nitride semiconductor coincides with the crystal orientation of the plurality of convex portions 15.

By selecting the crystal growth condition in which the mirror-face growth surface of the inclined surface 15b of the convex portion 15 can be maintained, even if the second nitride semiconductor single crystal layer 14 continues to grow, the adjacent convex portions 15 do not grow in the horizontal direction and become Flat to maintain the respective triangular frustum or triangle Cone shape. That is, the shape of the convex portion 15 in the state shown in Fig. 1(d) is almost unchanged from the shape of the convex portion 15 in the state shown in Fig. 1(c). Therefore, the three-dimensional periodic arrangement structure of the second nitride semiconductor single crystal layer 14 composed of the convex portion 15 can be effectively used for manufacturing a semiconductor device.

The layered body of the second nitride semiconductor single crystal layer 14 and the template 10 in the state shown in Fig. 1(d) can be used as a substrate for a nitride semiconductor growth, and can be used for a base substrate in which epitaxial crystal growth is performed.

By growing the second nitride semiconductor single crystal layer 14 in a growing ambient gas by the HVPE method containing hydrogen, the state of the continuous film 17 containing the nitride semiconductor single crystal as shown in Fig. 1(d) can be easily formed. The second nitride semiconductor single crystal layer 14.

Further, since it is necessary to have a sufficient thickness to cut the nitride semiconductor growth substrate 16 from the second nitride semiconductor single crystal layer 14, it is preferable to use an HVPE method in which the crystal growth rate is fast.

Further, after the growth of the second nitride semiconductor single crystal layer 14 is completed, crystals of a nitride semiconductor having different crystal orientations may adhere to the inclined surface 15b of the convex portion 15. At this time, it is preferable to remove the crystal of the adhered nitride semiconductor by wet etching using a mixed acid of phosphoric acid and sulfuric acid after heating.

Further preferably, the height H of the convex portion 15 is 50 μm or more and 5 mm or less. Due to the height H and the area of the inclined surface 15b It is proportional and has the same distance from the center of the adjacent convex portion 15, and therefore, too low or too high is not practical. That is, if the height H is larger than 5 mm, the homogeneous epitaxial growth of the convex portion 15 becomes difficult; and if it is less than 50 μm, it is difficult to obtain a size sufficient for manufacturing a semiconductor device.

Preferably, the region between the adjacent convex portions 15 of the second nitride semiconductor single crystal layer 14, that is, the region directly above the groove 13 of the template 10 is different from the region within the convex portion 15 by the dislocation density. high. It is known that crystal defects in a single crystal of a nitride semiconductor constituting a semiconductor device, that is, a difference in wiring, lower the device characteristics and lifetime, and it is preferable that the lower the density of the difference is, the better. According to the present embodiment, when the nitride semiconductor crystal grows and the convex portion 15 is formed, the difference in the growth-in transmission in the crystallization has the following properties: bending toward the oblique direction of the growth interface, and gathering between the adjacent convex portions 15. region. With this property, the difference row can be concentrated to the area between the adjacent convex portions 15, and the difference density in the convex portion 15 can be reduced.

Further, in the method disclosed in Non-Patent Document 2, the mask 13 is not formed on the template 10, but the mask pattern is formed on the template 10, and the second nitride semiconductor single crystal layer 14 is selectively grown. However, since the mask pattern is formed, a complicated photolithography process is required, and the mask pattern remaining at the bottom of the second nitride semiconductor single crystal layer 14 and the second nitride semiconductor single crystal layer 14 have a difference in linear expansion coefficient, resulting in a difference in linear expansion coefficient. The second nitride semiconductor single crystal layer 14 has a high risk of cracking in the epitaxial step and the process step, and thus is not suitable for industrial use.

The second (c) diagram corresponds to the first (d) diagram, and is a plan view showing a part of the second nitride semiconductor single crystal layer 14, and shows an example of the pattern of the convex portion 15. The cross section of the template 10 and the second nitride semiconductor single crystal layer 14 shown in Fig. 1(d) corresponds to the cross section defined by the cutting line C-C in Fig. 2(c).

The second nitride semiconductor single crystal layer 14 shown in Fig. 2(c) is formed by growing the second nitride semiconductor single crystal layer 14 shown in Fig. 2(b), and has a relationship with the second (b) The convex portion 15 having substantially the same shape and size of the second nitride semiconductor single crystal layer 14 is shown.

Preferably, as shown in Fig. 2(c), the convex portions 15 of the second nitride semiconductor single crystal layer 14 are substantially seamlessly arranged. At this time, the semiconductor device using the convex portion 15 can be effectively formed.

Preferably, the distance D ₂ between the centers of the adjacent convex portions 15 at a plane viewing angle is 100 μm or more and 10 mm or less. The larger the distance D ₂ is, the larger the bottom surface of the convex portion 15 is. When the distance D _{2 is} less than 100 μm, the size of the convex portion 15 is slightly small for manufacturing a semiconductor device, which may be difficult to handle.

On the other hand, if the distance D _{2 is} too large, as long as the width of the groove 13 of the template 10 is not excessively large, as the bottom surface of the convex portion 15 becomes larger, the height of the convex portion 15 also becomes larger, and therefore, the nitride semiconductor single crystal is difficult to be uniform. Earth epitaxial growth. On the contrary, if the height of the convex portion 15 is suppressed to ensure the homogeneity of the convex portion 15, since the ratio of the size of the inclined surface 15b to the bottom surface of the convex portion 15 becomes small, the characteristics and the acquisition rate of the semiconductor device are lowered. Therefore, from the viewpoint of the wafer size of the current semiconductor device, the distance D _{2 is} preferably 10 mm or less.

Further, it is preferable that the distance D ₃ between the bottom faces of the adjacent convex portions 15 is 1 mm or less. The reason for this is that when the distance D ₃ exceeds 1 mm, when the crystal is epitaxially grown on the second nitride semiconductor single crystal layer 14, new three-dimensional crystals are generated in the gap between the bottom surface and the bottom surface of the adjacent convex portion 15 The core causes a disorder in the periodic arrangement of the surface of the second nitride semiconductor single crystal layer 14.

The first (e) diagram shows a case where the nitride semiconductor growth substrate 16 is cut out from the second nitride semiconductor single crystal layer 14 on the template 10. As shown in Fig. 1(e), after the second nitride semiconductor single crystal layer 14 is grown to a sufficient thickness, it is cut in parallel with the surface of the template 10, that is, parallel to the c-plane, although In the original substrate, a freestanding substrate of a single crystal of a nitride semiconductor is not used, and a nitride semiconductor growth substrate 16 of a freestanding substrate can be obtained.

In the cutting of the second nitride semiconductor single crystal layer 14, a wire saw or the like generally used for cutting Si crystals and GaAs crystals can be used.

As described above, according to the present embodiment, a nitride semiconductor growth substrate having a three-dimensional periodic array structure composed of the convex portions 15 can be obtained. Specifically, the following substrate can be obtained: a nitride semiconductor growth substrate as a template substrate, which is composed of the second nitride semiconductor single crystal layer 14 and the template 10 as shown in FIG. 1(d). The second nitride semiconductor single crystal layer 14 is composed of a continuous film 17 and a plurality of convex portions 15 thereon; and a nitride semiconductor growth substrate 16 as a free-standing substrate, as in the first (e) As shown in the figure, it is cut from the second nitride semiconductor single crystal layer 14.

Most of the second nitride semiconductor single crystal layer 14 on the nitride semiconductor growth substrate of the present embodiment is composed of a single crystal of a nitride semiconductor, and preferably all of them are composed of a single crystal of a nitride semiconductor. The area between adjacent convex portions 15 may be polycrystalline and amorphous, etc., but at least a plurality of convex portions 15 and a region under the plurality of convex portions 15 of the continuous film 17 are composed of a continuous nitride semiconductor single crystal. .

The nitride semiconductor growth substrate obtained in the present embodiment is preferably a substantially circular shape having a diameter of 50 mm or more. In the nitride semiconductor growth substrate of the present embodiment, since a microfabrication process such as photolithography is not required in forming a three-dimensional periodic arrangement structure, a crystal growth step can be utilized, so that a uniform three-dimensionality can be formed on a large entire substrate. Periodically arranged structure. In order to utilize this characteristic, it is preferable that the diameter of the nitride semiconductor growth substrate is 50 mm or more, and more preferably 100 mm or more. Further, the substantially circular shape means a meaning including a state in which an orientation flat (OF) and an index flat (Index Flat, IF) are processed on a circular substrate.

Further, as shown in Fig. 1(c), the second nitride semiconductor single crystal layer 14 is formed by generating and growing a crystal nucleus in each region of the template 10 defined by the grooves 13. Second nitridation The inside of the nitride semiconductor growth substrate obtained by the semiconductor single crystal layer 14 is less likely to be deformed, and defects such as variations in crystal orientation and reversal of the substrate are less likely to occur. Therefore, even when epitaxial crystal growth is performed using the nitride semiconductor growth substrate of the present embodiment, or when a subsequent process is performed, defects such as cracks do not occur in the substrate during the step.

(Second embodiment)

The second embodiment is different from the first embodiment in the pattern of a three-dimensional periodic array structure composed of convex portions of the second nitride semiconductor single crystal layer. Other configurations that are the same as those of the first embodiment will be omitted or simplified.

3(a) to 3(e) are vertical cross-sectional views schematically showing a manufacturing procedure of the nitride semiconductor growth substrate of the second embodiment.

First, as shown in Fig. 3(a), the first nitride semiconductor single crystal layer 22 is subjected to heteroepitaxial growth on the heterogeneous substrate 21 made of a material different from the nitride semiconductor to obtain the template 20. Next, as shown in FIG. 3(b), a groove 23 is formed on the surface of the template 20. Next, as shown in FIGS. 3(c) and 3(d), the second nitride semiconductor single crystal layer 24 is epitaxially grown on the template 20 on which the grooves 23 are formed. Next, as shown in FIG. 3(e), the nitride semiconductor growth substrate 27 is cut out from the second nitride semiconductor single crystal layer 24 as needed. Hereinafter, each of these steps will be described in detail.

The heterogeneous substrate 21 and the first nitride semiconductor single crystal layer 22 shown in Fig. 3(a) are the same members as the heterogeneous substrate 11 and the first nitride semiconductor single crystal layer 12 of the first embodiment.

In the step shown in FIG. 3(b), the groove 23 formed on the surface of the template 20 is composed of a combination of linear grooves parallel to the a-axis of the hexagonal nitride semiconductor single crystal, and There is a lattice pattern of hexagons and triangles arranged by sides parallel to the a-axis. At this time, the inclined faces 25b and 26b of the convex portions 25 and 26 of the second nitride semiconductor single crystal layer 24 grown on the template 20 may be constituted by a mirror-like growth surface (with respect to the inclined faces 25b and 26b and the mirror-surface growth face, which will be hereinafter) Explain)). For example, the linear grooves constituting the grooves 23 have a width of 40 μm and a depth of 60 μm, and the pitch of the grooves (the distance between the centers of the adjacent grooves) is 1 mm.

4( a) is a plan view showing a part of the template 20 and shows an example of the pattern of the groove 23 . The upper surface of the first nitride semiconductor single crystal layer 22 shown in Fig. 4(a) is the c-plane of the nitride semiconductor single crystal constituting the first nitride semiconductor single crystal layer 22, that is, the (0001) plane, which constitutes the first The c-axis of the nitride semiconductor single crystal of the nitride semiconductor single crystal layer 22 is perpendicular to the paper surface. The cross section of the template 10 as shown in Fig. 3(b) corresponds to the cross section divided by the cutting line D-D of Fig. 4(a).

The groove 23 as shown in Fig. 4(a) has a maximum of six rotational symmetry by the set position of the central axis of the rotational operation. E.g, When the central axis of the rotational operation is set at the center of the hexagon of the lattice pattern, the pattern of the grooves 23 has 6 symmetry. Further, when the central axis of the rotational operation is set at the center of the triangle of the lattice pattern, the pattern of the groove 23 has three times of symmetry.

When the center of the hexagon of the lattice pattern is located on the central axis of the template 10, the pattern of the groove 23 shown in Fig. 4(a) has six rotational symmetry with respect to the central axis of the template 10. Further, when the apex of the triangle of the lattice pattern is located on the central axis of the template 10, the pattern of the groove 13 shown in Fig. 4(a) has three rotational symmetry with respect to the central axis of the template 10.

The groove 23 is formed by the same method as the groove 13 of the first embodiment, and is constituted by the same linear groove as the groove 13.

The second nitride semiconductor single crystal layer 24 shown in FIGS. 3(c) and 3(d) is the same as the second nitride semiconductor single crystal layer 14 of the first embodiment, and is composed of a nitride semiconductor crystal. Formed using the same growth method.

The second nitride semiconductor single crystal layer 24 has a three-dimensional periodic array structure composed of the convex portions 25, 26. The bottom surface of the convex portions 25, 26 is the same as the upper surface of the template 20 (the surface in contact with the template 20 in the state shown in Fig. 3(c)), and is a (0001) plane of a single crystal of a nitride semiconductor.

The convex portion 25 is a hexagonal frustum-shaped or hexagonal tapered portion that grows in a hexagonal region defined by the groove 23 of the template 20, and the convex portion The minute 26 is a triangular frustum-shaped or triangular pyramid-shaped portion which is formed in the triangular shape of the template 20 and which is defined by the groove 23. Since the edge of the bottom surface of the convex portions 25, 26 coincides with the edge of the groove 23, the shape of the bottom surface of the convex portion 25 is a hexagonal shape formed by the side parallel to the a-axis of the single crystal of the nitride semiconductor, and the convex portion 26 The shape of the bottom surface is a triangle formed by the side parallel to the a-axis of the single crystal of the nitride semiconductor.

The specular growth plane of the hexagonal nitride semiconductor single crystal is a (10-1n) plane (n is an arbitrary integer) and is parallel to the a-axis. Therefore, along the linear grooves parallel to the a-axis of the grooves 13 constituting the template 10, a mirror-like growth surface appears, and the inclined faces 25b and 26b of the convex portions 25 and 26 are formed.

The height of the convex portion 25 on the area where the area is larger on the template 10 has a tendency to be higher than the height of the convex portion 26 which is grown on the area where the area is small. Therefore, the height of the convex portion of the second nitride semiconductor single crystal layer 24 periodically changes, and the top surface 25a or the vertex of the convex portion 25 and the top surface 26a or the vertex of the convex portion 26 are respectively located on two imaginary planes of different heights. .

Fig. 3(c) shows a state in which the convex portions 25, 26 of the second nitride semiconductor single crystal layer 14 are grown on the respective regions of the template 20 which are divided by the grooves 23, and the adjacent convex portions 25, 26 are formed. The state before the contact.

Further, the convex portion 25 has a hexagonal frustum shape or a hexagonal pyramid shape depending on crystal growth conditions. Similarly, according to the conditions of crystal growth, The convex portion 26 has a triangular frustum shape or a triangular pyramid shape. However, in consideration of the quality of the grown crystal when the epitaxial crystal is grown on the second nitride semiconductor single crystal layer 24 and the region where the electrode of the semiconductor device is formed, the convex portions 25 and 26 are preferably triangular frustums, Hexagonal frustum shape. Further, the top of the triangular frustum-shaped or triangular pyramid-shaped convex portion 25 may be subjected to a grinding process to form a triangular frustum-shaped convex portion 25 having a desired height. Similarly, the top of the hexagonal frustum-shaped or hexagonal tapered convex portion 26 may be subjected to a grinding process to form a hexagonal frustum-shaped convex portion 26 having a desired height.

Further, when the second nitride semiconductor single crystal layer 24 includes the triangular frustum-shaped convex portion 25 and the hexagonal frustum-shaped convex portion 26, the top surfaces 25a, 26a are the same as the upper surface of the template 20, and are nitride semiconductors. Single crystal (0001) face. Further, the top surfaces 25a and 26a are preferably (0001) planes, but may have an offset angle from the (0001) plane offset if they are within 5 degrees. When the offset angle exceeds 5°, the variation in the area of the inclined surfaces 25b and 26b is increased by the inclination of the convex portions 25 and 26. Therefore, it is difficult to manufacture the semiconductor device having excellent characteristics using the second nitride semiconductor single crystal layer 24.

Preferably, the size, shape and height of the top surface 25a of all the convex portions 25 are substantially uniform. When the size, shape, and height of the top surface 25a are substantially uniform, the size and shape of the inclined surface 25b are also substantially uniform. Similarly, it is preferable that the size, shape, and height of the top surface 26a of all the convex portions 26 are substantially uniform. When the top surface 26a is large in size, shape and height When uniform, the size and shape of the inclined surface 26b are substantially uniform. By increasing the uniformity of the size, shape, and height of the top surfaces 25a and 26a and the uniformity of the size and shape of the inclined surfaces 25b and 26b, the semiconductor device manufactured using the second nitride semiconductor single crystal layer 24 can be improved. Manufacturing yield.

Further, the inclined surface 25b of the convex portion 25 and the inclined surface 26 of the convex portion 26 are required to be free from processing damage, and the manufacturing yield of the semiconductor device manufactured using the second nitride semiconductor single crystal layer 24 is improved. Since the inclined surfaces 25b and 26b are surfaces in a formed state composed of a mirror-surface growth surface of a single crystal of a nitride semiconductor, processing such as etching is not performed, and thus there is no processing damage. The cross section of the inclined surfaces 25b and 26b can be observed by using a transmission electron microscope (TEM) to investigate whether or not the atomic arrangement of the nitride semiconductor single crystal is disordered, and whether the inclined surfaces 25b and 26b are damaged by processing can be determined. Further, the uniformity of the size and shape of the inclined faces 25b and 26b can be improved by forming the inclined faces 25b and 26b by the mirror-like growth surface of the single crystal of the nitride semiconductor.

Further, since the mirror faces are formed into the inclined faces 25b and 26b, since the plane orientations of all the inclined faces 25b and 26b are equivalent, the characteristics of the semiconductor device manufactured using the second nitride semiconductor single crystal layer 24 can be suppressed. Deviation.

4(b) corresponds to FIG. 3(c) and is a plan view showing a part of the second nitride semiconductor single crystal layer 24, which shows An example of the pattern of the second nitride semiconductor single crystal layer 24. The cross section of the template 20 and the second nitride semiconductor single crystal layer 24 shown in Fig. 3(c) corresponds to the cross section taken along the cutting line E-E of Fig. 4(b).

The second nitride semiconductor single crystal layer 24 shown in Fig. 4(b) is grown on the template 20 shown in Fig. 4(a), and the plurality of convex portions 25, 26 are effectively arranged. The shape and size of the convex portion 25 shown in Fig. 4(b) and the shape and size of the convex portion 26 are uniform. Therefore, the height of the top surface 25a of the convex portion 25 and the height of the top surface 26a of the convex portion 26 are also uniform.

The third (d) diagram shows that the second nitride semiconductor single crystal layer 24 continues to grow, and the second nitride semiconductor single crystal layer 24 is formed of a continuous film 28 of a single crystal of a nitride semiconductor on the template 20 and a plurality of convex portions thereon. The state of 25, 26. The portion of the continuous film 28 of this nitride semiconductor single crystal coincides with the crystal orientation of the plurality of convex portions 25, 26.

Since the inclined surface 25b of the convex portion 25 and the inclined surface 26b of the convex portion 26 are mirror-grown surfaces, even if the second nitride semiconductor single crystal layer 24 continues to grow, the adjacent convex portions 25, 26 do not grow horizontally. Combine and flatten to maintain their shape. That is, the shape of the convex portions 25, 26 in the state shown in Fig. 3(d) is almost unchanged from the shape of the convex portions 25, 26 in the state shown in Fig. 3(c). Therefore, the convex portions 25, 26 can be formed The three-dimensional periodic arrangement structure of the second nitride semiconductor single crystal layer 24 is effective for manufacturing a semiconductor device.

Further, when the second nitride semiconductor single crystal layer 24 is used for manufacturing a semiconductor device, the convex portion 26 having a small inclined surface area may be used, and only the convex portion 25 having a large inclined surface area may be used.

The laminate of the second nitride semiconductor single crystal layer 24 and the template 20 in the state shown in FIG. 3(d) can be used as a substrate for a nitride semiconductor growth, and can be used for a base substrate in which epitaxial crystal growth is performed.

Preferably, the distance between the bottom surfaces of the adjacent convex portions 25, 26 is 1 mm or less. The reason for this is that if the distance exceeds 1 mm, when crystal growth is epitaxially grown on the second nitride semiconductor single crystal layer 24, a new 3-dimensional is generated in the gap between the bottom surface and the bottom surface of the adjacent convex portions 25, 26. The nucleus is crystallized, resulting in disorder of the periodic arrangement of the surface of the second nitride semiconductor single crystal layer 24.

Preferably, the region between the adjacent convex portions 25, 26 of the second nitride semiconductor single crystal layer 24, that is, the region directly above the groove 23 of the template 20 is different from the region within the convex portions 25, 26. high. It is known that crystal defects in a single crystal of a nitride semiconductor constituting a semiconductor device, that is, a difference in row, lower the device characteristics and lifetime, and it is preferable that the difference in the density of the drain is as low as possible. According to the present embodiment, when the nitride semiconductor crystal is grown to form the convex portions 25 and 26, there is a property in which the difference in the growth of the grown-in crystal is bent in the oblique direction of the growth interface, and is collected between the adjacent convex portions 15. Area. Using this property, The difference row can be concentrated in the area between the adjacent convex portions 25, 26, and the difference in density in the convex portions 25, 26 can be reduced.

The fourth (c) diagram corresponds to the third (d) diagram, and is a plan view showing a part of the second nitride semiconductor single crystal layer 24, and shows an example of the pattern of the convex portions 25 and 26. The cross section of the template 20 and the second nitride semiconductor single crystal layer 24 shown in Fig. 3(d) corresponds to the cross section defined by the cutting line F-F of Fig. 4(c).

The second nitride semiconductor single crystal layer 24 shown in Fig. 4(c) is formed by growing the second nitride semiconductor single crystal layer 24 shown in Fig. 4(b), and has a relationship with the fourth (b) The convex portions 25 and 26 having substantially the same shape and size of the second nitride semiconductor single crystal layer 24 are shown.

Preferably, the convex portions 25, 26 of the second nitride semiconductor single crystal layer 24 are substantially seamlessly arranged as shown in Fig. 4(c). At this time, the semiconductor device using the convex portions 25, 26 can be effectively formed.

The third graph (e) shows a case where the nitride semiconductor growth substrate 27 is cut out from the second nitride semiconductor single crystal layer 24 on the template 20. As shown in FIG. 3(e), after the second nitride semiconductor single crystal layer 24 is grown to a sufficient thickness, it is cut in parallel with the surface of the template 20, that is, parallel to the c-plane, although In the original substrate, a freestanding substrate of a single crystal of a nitride semiconductor is not used, and a nitride semiconductor growth substrate 27 of a freestanding substrate can be obtained.

In the cutting of the second nitride semiconductor single crystal layer 24, a wire saw or the like generally used for cutting Si crystals and GaAs crystals can be used.

As described above, according to the present embodiment, a nitride semiconductor growth substrate having a three-dimensional periodic array structure composed of the convex portions 25 and 26 can be obtained. Specifically, the following substrate can be obtained: a nitride semiconductor growth substrate as a template substrate, which is composed of a second nitride semiconductor single crystal layer 24 and a template 20 as shown in FIG. 3(d), wherein The second nitride semiconductor single crystal layer 24 is composed of a continuous film 28 and a plurality of convex portions 25 and 26 thereon; and a nitride semiconductor growth substrate 27 as a free-standing substrate, as shown in Fig. 3(e) It is shown cut from the second nitride semiconductor single crystal layer 24.

Most of the second nitride semiconductor single crystal layer 24 on the nitride semiconductor growth substrate of the present embodiment is composed of a nitride semiconductor single crystal, and preferably all of them are composed of a nitride semiconductor single crystal. The area between adjacent convex portions 25, 26 may be polycrystalline and amorphous, etc., but at least the plurality of convex portions 25, 26 and the region under the plurality of convex portions 25, 26 of the continuous film 28 are composed of continuous nitrogen. The compound semiconductor is composed of a single crystal.

The nitride semiconductor growth substrate obtained in the present embodiment has a diameter of 50 mm or more, and more preferably 100 mm or more, similar to the diameter of the nitride semiconductor growth substrate of the first embodiment.

(Third embodiment)

In the third embodiment, a semiconductor device is manufactured using a substrate for growing a nitride semiconductor. The steps before the formation of the nitride semiconductor growth substrate are substantially the same as those of the first embodiment and the second embodiment, and the same portions will be omitted or simplified.

5(a) to 5(d) are vertical cross-sectional views schematically showing manufacturing steps of the semiconductor device of the third embodiment.

First, as shown in Fig. 5(a), the nitride semiconductor single crystal layer 31 which is a substrate for nitride semiconductor growth is subjected to heteroepitaxial growth on the freestanding substrate 30 on which the nitride semiconductor is formed. Next, as shown in Fig. 5(b), a plurality of epitaxial growth layers 32 are formed on the nitride semiconductor single crystal layer 31. Next, as shown in FIG. 5(c), the electrode 33 is formed on the upper surface of the multilayer epitaxial growth layer 32, and further, after the free-standing substrate 30 is removed, an electrode is formed on the lower surface of the nitride semiconductor single crystal layer 31. 34. Next, as shown in Fig. 5(d), the nitride semiconductor single crystal layer 31, the multilayer epitaxial growth layer 32, and the electrode 34 are divided to obtain a plurality of semiconductor devices 35. Hereinafter, each of these steps will be described in detail.

The free-standing substrate 30 of the nitride semiconductor shown in Fig. 5(a) has the same groove as the groove 13 of the template 10 of the first embodiment on the surface of the c-plane, and is a single crystal of a nitride semiconductor similarly to the template 10. It is used by epitaxially growing a base substrate. Independence of nitride semiconductors The substrate 30 is, for example, a GaN freestanding substrate. The template 10 can also be used in place of the free-standing substrate 30 of the nitride semiconductor.

The nitride semiconductor single crystal layer 31 shown in Fig. 5(a) is the same as the second nitride semiconductor single crystal layer 24 of the first embodiment, and is formed of a nitride semiconductor single crystal and formed by the same growth method. . Further, it has a three-dimensional periodic array structure composed of the same convex portion as the second nitride semiconductor single crystal layer 14.

Furthermore, the freestanding substrate 30 may have the same groove as the groove 23 of the template 20 of the second embodiment, and the nitride semiconductor single crystal layer 31 may have the same 3-dimensional period as the second nitride semiconductor single crystal layer 24. Arrange the structure.

The multilayer epitaxial growth layer 32 shown in Fig. 5(b) includes a light-emitting diode (LED) and a light-emitting layer for a laser diode (LD), which are formed by an MOCVD method or the like. Each layer of the multilayer epitaxial growth layer 32 is composed of a single crystal film of a nitride semiconductor. In the nitride semiconductor single crystal layer 31, since the three-dimensional periodic arrangement structure of the surface does not cause processing damage due to etching or the like, the multilayer epitaxial growth layer 32 having a good crystal quality can be grown.

The electrode 33 shown in Fig. 5(c) is formed on each of the top surfaces of the plurality of convex portions of the nitride semiconductor single crystal layer 31 by using photolithography or the like. The freestanding substrate 30 is removed by means of back wrap and grinding. At this time, the thickness of the nitride semiconductor single crystal layer 31 can be adjusted to be the same as that of the manufactured semiconductor device 35. Highly consistent. Furthermore, the freestanding substrate 30 may be left without removing. However, when the template 10 is used in place of the stand-alone substrate 30, it is necessary to remove the hetero-substrate 11. The electrode 34 is formed on the entire lower surface of the nitride semiconductor single crystal layer 31.

In the step shown in Fig. 5(d), the nitride semiconductor single crystal layer 31, the multilayer epitaxial growth layer 32, and the electrode 34 are divided by a portion between the convex portions of the nitride semiconductor single crystal layer 31. In order to perform the division, the cutting may be performed by, for example, a dicer or the like, and the groove processing may be performed on the upper surface and the lower surface of the nitride semiconductor single crystal layer 31 using a scriber and a dicer. After that, cut it again.

According to the present embodiment, since a convex portion of the nitride semiconductor single crystal layer 31 is used as a constituent device of the semiconductor device, the semiconductor wafer can be easily manufactured without precise positioning or the like for division.

Further, the portion between the convex portions of the nitrided semiconductor single crystal layer 31 to be divided does not need to be a single crystal nitride semiconductor, and may be a polycrystalline or amorphous nitride semiconductor. However, in consideration of the crystal quality of the multilayer epitaxial growth layer 32 grown on the nitride semiconductor single crystal layer 31 and the processability after the formation of the multilayer epitaxial growth layer 32, it is less desirable in the nitride semiconductor. A material other than a single crystal nitride semiconductor appears on the surface of the single crystal layer 31, preferably a portion between the convex portions of the nitride semiconductor single crystal layer 31, It is also a continuous single crystal of a nitride semiconductor that coincides with the crystal orientation of the convex portion.

In order to improve the utilization efficiency of the nitride semiconductor single crystal layer 31, it is preferable that the convex portions are arranged as high as possible as a whole as shown in Figs. 2(c) and 4(c); but on the other hand, it is easy The process of fabricating a device such as division may also intentionally separate the intervals of the convex portions. In this case, a wide groove may be formed between the bottom surface and the bottom surface of the adjacent convex portion, or a double-shaped groove may be formed to form a (0001) surface between the groove and the groove constituting the double line. The plane and the elongated quadrangular frustum with the (0001) plane as the top surface. Further, for the purpose of forming the electrodes of the device, a space is intentionally formed between the bottom surface and the bottom surface of the adjacent convex portion.

Further, in the present embodiment, although one semiconductor device is fabricated using one convex portion, one convex portion may be divided to manufacture a plurality of semiconductor devices, and a plurality of convex portions may be used to fabricate one semiconductor device.

In the present embodiment, although the purpose is to use the non-c-plane characteristic exhibited by the inclined surface of the convex portion for the device, the surface of the multilayer epitaxial growth layer 32 is intentionally set to be uneven by providing the surface of the epitaxial growth layer 32 as a non-flat surface. The surface can also be applied to a technique for improving the light extraction efficiency of a light emitting device.

(Effect of the embodiment)

According to the first embodiment and the second embodiment described above, the three-dimensional periodic arrangement structure of the surface of the nitride semiconductor growth substrate can be formed by mirror growth of the nitride semiconductor single crystal, and etching can be performed without etching. The processing is performed to obtain the inclined surface of the 3-dimensional periodic arrangement structure. Thereby, a substrate for growing a nitride semiconductor can be obtained, which has an inclined surface which is not damaged by processing, has a high yield, is low in cost, and has a three-dimensional periodic arrangement structure.

Moreover, according to the third embodiment, a nitride semiconductor growth substrate having an inclined surface having no surface damage on the surface can be used, and a semiconductor device having high yield and excellent characteristics and reliability can be manufactured.

Moreover, since each of the above embodiments can be implemented by using a conventional crystal growth technique, a processing technique, and the like, the cost burden is low with respect to the obtained effect.

[Examples]

Hereinafter, the nitride semiconductor growth substrate and the semiconductor device are manufactured based on the above embodiment, and the evaluation results will be described.

(Example 1)

First, an undoped GaN layer as the first nitride semiconductor single crystal layer 12 is grown by a MOCVD method on a single crystal sapphire c-plane substrate having a diameter of 50 mm and a thickness of 360 μm which is commercially available as a hetero-substrate 11. And form template 10.

In forming this undoped GaN layer, Trimethylgallium (TMG) and NH _{3 were} used as source gases. The growth pressure was set to normal pressure, and the sapphire substrate was subjected to thermal cleaning at 1200 ° C for 10 minutes in a hydrogen atmosphere. After the surface was cleaned, the substrate temperature was lowered to 620 ° C to grow the low temperature undoped GaN buffer layer. 20 nm, and then, the substrate temperature was raised to 1,050 ° C, and the thickness of the flat undoped GaN continuous film having no dent or the like was increased to 2 μm.

Next, the groove 13 is machined on the surface of the obtained template 10. In the groove processing, a commercially available YVO ₄ pulse laser processing machine having a wavelength of 532 nm and a rated output of 5 W was used. As shown in Fig. 2(a), the pattern of the groove 13 is a triangular lattice pattern formed by linear grooves parallel to the a-axis. The width of the groove 13 was set to 30 μm, the depth was set to 20 μm, and the pitch of the grooves (the distance between the centers of adjacent grooves) was set to 1.2 mm.

Next, the template 10 is subjected to ultrasonic cleaning in methanol, and then dried to remove powdery machining chips of GaN and sapphire adhering to the inside and around the groove 13 when performing the groove processing using a laser processing machine.

Next, the Si-doped GaN layer as the second nitride semiconductor single crystal layer 14 is epitaxially grown on the template 10 subjected to the groove processing by the HVPE method.

The Si-doped GaN layer uses GaCl and NH ₃ formed by contacting the metal Ga heated to 780 ° C with HCl gas as a source gas, and the SiH ₂ Cl ₂ gas diluted with hydrogen as a doping gas. The gas was supplied to the stencil 10 heated to 1050 ° C and allowed to grow. The pressure in the furnace at the time of growth was set to normal pressure, and the composition of the carrier gas was set to 50% of nitrogen and 50% of hydrogen, and the V/III ratio of the material gas was set to 4. During the growth, the template 10 was rotated at 5 rpm, the growth rate of the crystal was set to ~300 μm/h, and the target of the average film thickness of the crystal was set to 1 mm. The target carrier concentration of the growth crystallization was set to 1 × 10 ¹⁸ cm ^-3 .

Thus, it is observed that the template 10 in which the Si-doped GaN layer as the second nitride semiconductor single crystal layer 14 is grown is cooled and then cut out from the furnace, and the triangular frustum-shaped GaN single crystal as the convex portion 15 is The pattern of the grooves 13 on the template 10 is correspondingly formed in a periodic arrangement as shown in Fig. 2(c). The top surface 15a of each convex portion 15 is a plane of a substantially equilateral triangle having a length of about 500 μm, and each side of the triangle is parallel to the a-axis of GaN. From this, it can be judged that all the convex portions 15 are single crystals having the same crystal orientation, and the top surface 15a is the c-plane.

Further, from the appearance of the second nitride semiconductor single crystal layer 14, the occurrence of cracks and abnormal growth cannot be seen, and the ungrown regions and the dents cannot be seen. After the second nitride semiconductor single crystal layer 14 is divided and the cross section is observed, the height from the upper surface of the template 10 to the top surface 15a of the convex portion 15 is about 1.2 mm, and the height of the convex portion 15 is about 180 μm. It has been confirmed that the bottom of each convex portion 15 is connected to the continuous film 17 of GaN, and the entirety of the second nitride semiconductor single crystal layer 14 is a continuous film of GaN having a periodic arrangement structure of the convex portions 15. Further, it is estimated that the angle formed by the inclined surface 15b of the convex portion 15 and the c-plane of the GaN crystal is approximately 32°, and it is estimated that the inclined surface 15b is the (10-13) plane.

Here, when the heterogeneous substrate 11 which is a sapphire substrate is viewed from the back side, fine cracks which are generated at a pitch substantially at the same position as the pitch of the grooves 13 formed on the surface can be seen, but the cracks are not second. The nitride semiconductor single crystal layer 14 side develops. It is presumed that the crack in the hetero-substrate 11 is caused by a difference in linear expansion coefficient between the hetero-substrate 11 and the second nitride semiconductor single crystal layer 14 at the time of crystal cooling.

Thus, a nitride semiconductor growth substrate obtained by the second nitride semiconductor single crystal layer 14 and the template 10 has a periodic arrangement structure of a triangular frustum on the surface thereof. 6(a), 6(b) and 6(c) are plan views of a nitride semiconductor growth substrate of the present embodiment, which are obtained by a scanning electron microscope (SEM), respectively. Aerial photographs of section photos and sections.

(Example 2)

In the same manner as in the above-described Embodiment 1, a Si-doped GaN layer as a second nitride semiconductor single crystal layer 14 was formed on a template 10 having a diameter of 50 mm, which was a continuous film 17 of GaN having a thickness of about 1 mm. It is composed of a convex portion 15 having a triangular frustum shape.

Next, the second nitride semiconductor single crystal layer 14 is vertically cut in the crystal growth direction, and is separated from the sapphire substrate as the heterogeneous substrate 11. The second nitride semiconductor single crystal layer 14 is adhered to the dicing processing pedestal, and the second nitrogen is used by the electric wire electric discharge machine. The singulation of the single crystal layer 14 of the semiconductor. By this cutting step, the second nitride semiconductor single crystal layer 14 does not have cracks. Thereby, a self-contained substrate 16 of Si-doped GaN single crystal having a thickness of about 600 μm was obtained, and a periodic arrangement structure of convex portions 15 having a triangular frustum shape was formed on the surface thereof.

The difference in density of the obtained stand-alone substrate 16 was evaluated by the density of dark spots observed by cathod luminescence, and it was confirmed that 4 × 10 ⁷ was entered in the top surface 15a and the inclined surface 15b of the convex portion 15. A range of ~8 x 10 ⁷ cm ^-2 . On the other hand, it is confirmed that the groove density of the groove portions between the adjacent convex portions 15 is 2 × 10 ⁸ to 8 × 10 ⁸ cm ^-2 , and the difference in discharge density is about one digit higher than the inside of the convex portion 15.

(Example 3)

First, a c-plane GaN freestanding substrate having a diameter of 50 mm and a thickness of 400 μm was prepared, which was produced by the crystal growth technique (VAS method) disclosed in Japanese Patent No. 3631724.

Next, a laser processing machine was used in the same manner as in the above-described first embodiment, and the groove 23 was machined on the surface of the GaN freestanding substrate. As shown in Fig. 4(a), the groove 23 is formed to have a pattern of a triangular lattice and a hexagonal lattice formed by linear grooves parallel to the a-axis. The width of the groove 23 was set to 50 μm, the depth was set to 60 μm, and the pitch of the grooves (the distance between the centers of adjacent grooves) was set to 1 mm.

Next, the Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 is epitaxially grown on the GaN free-standing substrate subjected to the groove processing by the HVPE method. The growth conditions of the remaining HVPE were the same as in Example 1 except that the composition of the growing raw material carrier gas was set to 90% of nitrogen and 10% of hydrogen. The second nitride semiconductor single crystal layer 24 and the GaN freestanding substrate constitute a nitride semiconductor growth substrate.

Thus, after the GaN free-standing substrate grown as the Si-doped GaN layer of the second nitride semiconductor single crystal layer 24 is cooled and cut out from the furnace, a hexagonal frustum shape which is a convex portion 25 having a high height can be observed. The GaN single crystal and the triangular frustum-shaped GaN single crystal which is the lower height convex portion 26 correspond to the pattern of the groove 23 on the GaN free-standing substrate, and are periodically arranged as shown in FIG. 4(c). Formed.

From the appearance of the second nitride semiconductor single crystal layer 24, the occurrence of cracks and abnormal growth cannot be seen, and ungrown regions, dents, and the like are not observed. After the second nitride semiconductor single crystal layer 24 is divided and the cross section is observed, the height from the upper surface of the GaN freestanding substrate to the top surface 25a of the convex portion 25 is about 1280 μm, from the upper surface of the GaN freestanding substrate to the convex portion 26. The height of the top surface 26a is about 970 μm. The top surface 25a of each convex portion 25 has a substantially regular hexagon shape, and its sides are parallel to the a-axis of GaN. Further, the top surface 26a of each convex portion 26 is a substantially equilateral triangle whose sides are parallel to the a-axis of GaN. Confirmed each The bottoms of the convex portions 25, 26 are connected to a continuous film 28 of GaN having a thickness of about 880 μm, and the entire second nitride semiconductor single crystal layer 24 is a continuous film of GaN having a periodic arrangement of the convex portions 25, 26. Further, the angle between the inclined surface 25b of the convex portion 25 and the c-plane of the GaN crystal was measured to be approximately 43.2°, and it was estimated that the inclined surface 25b was the (10-12) plane.

The difference in density of the second nitride semiconductor single crystal layer 24 was evaluated by the dark spot density observed by the cathode ray emission, and it was confirmed that the top surface 25a and the inclined surface 25b of the hexagonal frustum-shaped convex portion 25 entered 2 ×. 10 ⁶ ~ 5 × 10 ⁶ cm ^-2 range. On the other hand, it is confirmed that the groove density of the groove portions between the adjacent convex portions 25 and 26 is 5 × 10 ⁶ to 9 × 10 ⁶ cm ^-2 , and the difference in discharge density is about one digit higher than the inside of the convex portion 25.

Thus, a nitride semiconductor growth substrate having a periodic arrangement structure having a triangular frustum on the surface was obtained, which was composed of a second nitride semiconductor single crystal layer 24 and a GaN freestanding substrate.

(Example 4)

First, the undoped GaN layer as the first nitride semiconductor single crystal layer 22 is grown on the single crystal sapphire c-plane substrate having a diameter of 50 mm and a thickness of 360 μm as a hetero-substrate 21 by the MOCVD method. The template 20 is formed. The growth conditions of this undoped GaN layer were the same as in Example 1.

Next, a laser processing machine was used in the same manner as in the above-described first embodiment, and the groove 23 was machined on the surface of the template 20. As shown in Fig. 4(a), the groove 23 is formed to have a pattern of a triangular lattice and a hexagonal lattice formed by linear grooves parallel to the a-axis. The width of the groove 23 was set to 50 μm, the depth was set to 60 μm, and the pitch of the grooves (the distance between the centers of adjacent grooves) was set to 1 mm.

Next, the Si-doped GaN layer as the second nitride semiconductor single crystal layer 24 is epitaxially grown on the template 20 subjected to the groove processing by the HVPE method. The HVPE growth conditions were the same as in the first embodiment.

Thus, after the template 20 which is a Si-doped GaN layer grown as the second nitride semiconductor single crystal layer 24 is cooled and cut out from the furnace, a hexagonal frustum-shaped GaN which is a highly convex portion 25 can be observed. The single crystal and the triangular frustum-shaped GaN single crystal which is the lower convex portion 26, that is, the pattern of the grooves 23 on the template 20, are formed by the periodic arrangement shown in Fig. 4(c).

From the appearance of the second nitride semiconductor single crystal layer 24, the occurrence of cracks and abnormal growth cannot be seen, and ungrown regions, dents, and the like are not observed. After the second nitride semiconductor single crystal layer 24 is divided and the cross section is observed, the height from the upper surface of the template 20 to the top surface 25a of the convex portion 25 is about 1400 nm, from the upper surface of the template 20 to the top surface 26a of the convex portion 26. The height is about 1180 μm. The top surface 25a of each convex portion 25 is substantially a regular hexagon, and its sides are parallel to the GaN a axis. Further, the top surface 26a of each convex portion 26 is a substantially equilateral triangle whose sides are parallel to the a-axis of GaN. It has been confirmed that the bottoms of the respective convex portions 25, 26 are connected to the continuous film 28 of GaN having a thickness of about 1060 μm, and the entirety of the second nitride semiconductor single crystal layer 24 is a continuous film of GaN having a periodic arrangement of the convex portions 25, 26. . Moreover, the angle formed by the inclined surface 25b of the convex portion 25 and the c-plane of the GaN crystal was measured to be approximately 43.2°, and it was estimated that the inclined surface 25b was the (10-12) plane.

The difference in density of the second nitride semiconductor single crystal layer 24 was evaluated by the dark spot density observed by the cathode ray emission, and it was confirmed that the top surface 25a and the inclined surface 25b of the hexagonal frustum-shaped convex portion 25 entered 3 ×10 ⁷ ~ 6 × 10 ⁷ cm ^-2 range. On the other hand, it is confirmed that the difference in the density of the groove portions between the adjacent convex portions 25 and 26 is 5 × 10 ⁶ to 9 × 10 ⁶ cm ^-2 , which is higher than the overall density of the inside of the convex portion 25.

Thus, a nitride semiconductor growth substrate having a periodic arrangement structure having a triangular frustum on the surface, which is composed of the second nitride semiconductor single crystal layer 24 and the template 20, is obtained. 7(a), 7(b), and 7(c) are plan views, cross-sectional photographs, and cross-sections of the nitride semiconductor growth substrate of the present embodiment, which are obtained by scanning electron microscopy, respectively. Bird's eye view photo.

(Example 5)

First, the undoped GaN layer as the first nitride semiconductor single crystal layer 12 is grown on a single crystal sapphire c-plane substrate having a diameter of 100 mm and a thickness of 600 μm which is commercially available as a hetero-substrate 11 by the MOCVD method. And form template 10.

In forming this undoped GaN layer, trimethylgallium and NH _{3 were} used as source gases. The growth pressure was set to normal pressure, and the sapphire substrate was thermally cleaned at 1200 ° C for 10 minutes in a hydrogen atmosphere. After the surface was cleaned, the substrate temperature was lowered to 600 ° C to grow the low temperature undoped GaN buffer layer by 20 nm. The substrate temperature was raised to 1050 ° C to grow the thickness of the undoped GaN continuous film to 1.5 μm. The carrier gas uses a mixed gas of hydrogen and nitrogen. The growth rate of the crystal was about 3 μm/h. The surface of the first nitride semiconductor single crystal layer 12 taken out from the furnace after growth was observed with an optical microscope, and it was confirmed that a flat continuous film having no pits or the like on the entire substrate was obtained.

Next, the groove 13 was machined on the surface of the obtained template 10 using a commercially available laser processing machine. As shown in Fig. 2(a), the pattern of the grooves 13 is a triangular lattice pattern formed by linear grooves parallel to the a-axis. The width of the groove 13 was set to 60 μm, the depth was set to 900 μm, and the pitch of the grooves (the distance between the centers of adjacent grooves) was set to 2 mm.

Next, the template 10 is ultrasonically cleaned in pure water and methanol, and then dried to remove the groove using the laser processing machine. Powdered machining chips of GaN and sapphire attached to the inside and around the groove 13 during processing.

Next, the Ge-doped GaN layer as the second nitride semiconductor single crystal layer 14 is epitaxially grown on the template 10 subjected to the groove processing by the HVPE method.

The Ge-doped GaN layer uses GaCl and NH ₃ formed by contacting the metal Ga heated to 800 ° C with HCl gas as a source gas, and further, hydrogen-diluted GeCl ₄ gas is used as a doping gas, and the gases are supplied to the gas. It was heated to a plate 10 of 1100 ° C and allowed to grow. The pressure in the furnace during growth was set to normal pressure, and the composition of the carrier gas was set to 90% of nitrogen and 10% of hydrogen, and the V/III ratio of the material gas was set to 3. During the growth, the template 10 was rotated at a rotation speed of 4 rpm, and the growth rate of the crystal was set to ~250 μm/h, and the target of the average film thickness of the crystal was set to 1100 μm. The target carrier concentration of the growth crystallization was set to 8 × 10 ¹⁸ cm ^-3 .

In this manner, after the template 10 in which the Si-doped GaN layer of the second nitride semiconductor single crystal layer 14 is grown is cooled and cut out from the furnace, a triangular frustum-shaped GaN single crystal as the convex portion 15 can be observed. Correspondingly, the pattern of the grooves 13 on the template 10 is formed by the periodic arrangement shown in Fig. 2(c).

Further, from the appearance of the second nitride semiconductor single crystal layer 14, the occurrence of cracks and abnormal growth was not observed, and the ungrown regions and the dents were not observed. Dividing the second nitride semiconductor single crystal layer 14 After observing the cross section, the height from the upper surface of the template 10 to the top surface 15a of the convex portion 15 is about 1.3 mm, and the height of the convex portion 15 is about 200 μm. The top surface 15a of each convex portion 15 is a substantially equilateral triangle whose sides are parallel to the a-axis of GaN. It has been confirmed that the bottom of each convex portion 15 is connected to the continuous film 17 of GaN, and the entirety of the second nitride semiconductor single crystal layer 14 is a continuous film of GaN having a periodic arrangement structure of the convex portions 15. Further, it is estimated that the angle formed by the inclined surface 15b of the convex portion 15 and the c-plane of the GaN crystal is approximately 32°, and it is estimated that the inclined surface 15b is the (10-13) plane.

Thus, a nitride semiconductor growth substrate having a periodic arrangement structure having a triangular frustum on the surface, which is a template substrate composed of the second nitride semiconductor single crystal layer 14 and the template 10, is obtained.

(Example 6)

A free-form substrate 16 of a Si-doped GaN single crystal having a periodic arrangement of a triangular frustum and having a diameter of 50 mm obtained in the above-described Embodiment 2, on which a multilayer epitaxial crystal of an LED structure is formed by MOCVD Round layer 32.

In the formation of the multilayer epitaxial wafer layer 32, TMG, Trimethylaluminium (TMA), Trimethylindium (TMI), and NH _{3 are} used as source gases. First, the free-standing substrate 16 is heated to 1150 ° C in a mixed gas stream of NH ₃ and H ₂ (NH ₃ : H ₂ = 1: 2), and the temperature is maintained for 5 minutes, and then necessary for growth from the first layer. The Group III source gases begin to flow out sequentially, causing each epitaxial wafer layer to grow. The structure of the grown multilayer epitaxial wafer layer 32 is an n-GaN layer having a thickness of 1 μm from the side of the freestanding substrate 16 in the order of In _0.2 Ga _0.8 N/GaN-3-MQW (Well The layer has a thickness of 3 nm, a thickness of the barrier layer of 10 nm, a multilayer structure of a p-Al _0.1 Ga _0.9 N layer having a thickness of 40 nm, and a p-GaN layer having a thickness of 500 nm. Here, the MQW layer is grown by lowering the temperature to 800 °C. The growth temperature of the other layers was 1150 °C. Set all growth pressures to normal pressure. However, the thickness and the mixed crystal composition of the epitaxial wafer layer listed here are calculated based on the data when the setting conditions are performed on the c-plane GaN substrate, and it is known that the inclined surface 15b of the convex portion 15 of the freestanding substrate 16 is In the epitaxial wafer layer, the film thickness is slightly skewed toward the thinner direction, and the In composition is slightly skewed in the lower direction.

Next, on the multi-layer epitaxial wafer layer 32 on the top surface 15a of the convex portion 15, a p-type electrode of a circular Ni/Au structure having a diameter of 150 μm is formed using photolithography, and the free-standing substrate 16 is formed by back grinding. After the inner side was removed by 600 μm, an n-type electrode of Ti/Al/Ti/Au structure was formed in the entire surface. Thereby, the height from the inner surface of the free-standing substrate 16 to the top surface 15a of the convex portion 15 is about 970 μm.

Next, the free-form substrate 16 is mounted on an adhesive sheet, and is cracked by a wafer cracker in a groove portion between the convex portions 15, and is divided into LED wafers as a plurality of semiconductor devices. So at the bottom One side of the face is an LED chip having a triangular frustum shape superimposed on a triangular column of about 1000 μm.

When the manufactured LED chip was energized, the emission wavelength was measured using a spectroscope, and blue light having a peak wavelength of 470 nm was observed from the top surface 15a of the triangular frustum-shaped convex portion 15, and the convex portion 15 was observed with respect to the second. The inclined surface 15b emits purple light having a peak wavelength of 430 nm, and it was confirmed that an LED chip emitting light of two wavelengths per wafer can be manufactured.

The embodiments and examples of the present invention are described above, but the present invention is not limited to the above-described embodiments and examples, and various changes and modifications can be made without departing from the spirit and scope of the invention.

For example, the pattern of the grooves formed on the template 10 and the freestanding substrate 30 is not limited to the pattern of the grooves 13 shown in the second (a) and the pattern of the grooves 23 shown in the fourth (a). The pattern of the groove may be a pattern formed by a straight line parallel to the a-axis, and may be, for example, a tortoiseshell (honeycomb) type pattern and a rhombic lattice pattern in which hexagonal lattices are combined. For example, when the pattern of the groove is a tortoise pattern, the convex portions of the single crystal layer of the second nitride semiconductor are all hexagonal frustum or hexagonal pyramid; when the pattern of the groove is a doped lattice pattern, the second nitride semiconductor The convex portions of the single crystal layer are all quadrangular frustum or quadrangular pyramid. Further, if the inclined surface of the convex portion is formed by a mirror-like growth surface, the groove 13 may be a discontinuous groove, for example, composed of a plurality of holes.

Further, it is considered that a variation of the groove as the failure inducing portion is processed on the back side of the hetero-substrate 11 and 21. At this time, when stress is generated in the second nitride semiconductor single crystal layers 14 and 24 due to the difference in linear expansion coefficients of the hetero-substrate 11, 21 and the second nitride semiconductor single crystal layers 14, 24, the hetero-substrate 11, 21 is the first. Cracks are generated, and therefore, cracks are generated on the second nitride semiconductor single crystal layers 14, 24. Further, when the grooves on the inner surfaces of the hetero-substrate 11 and 21 are formed at positions facing the grooves 13 and 23, the element separation after the element formation can be easily performed.

Further, in the above embodiment, the surface of the first nitride semiconductor single crystal layer 12 and the freestanding substrate 30 of the template 10 is the c-plane of the nitride semiconductor single crystal, but may be a non-c plane such as an m plane or an a plane. At this time, although it is difficult to form a convex portion having a pattern of rotational symmetry, a convex portion having an inclined surface can be formed.

Further, the embodiments and examples described above are not intended to limit the invention in the scope of the claims. Further, it should be noted that all combinations of the features described in the embodiments and the embodiments are not essential to the technical means for solving the problems of the invention.

[Industrial availability]

The present invention can be applied to a substrate for growing a nitride semiconductor for producing an optical device such as a light-emitting diode or a laser, or a high-frequency device such as a diode or a transistor.

10‧‧‧ template

11‧‧‧Heterogeneous substrate

12‧‧‧First nitride semiconductor single crystal layer

14‧‧‧Second nitride semiconductor single crystal layer

15‧‧‧ convex part

15a‧‧‧ top surface

15b‧‧‧ sloped surface

16‧‧‧Nitrate semiconductor growth substrate

17‧‧‧Continuous film

Claims (22)

A nitride semiconductor growth substrate having a nitride semiconductor layer on a surface thereof, the nitride semiconductor layer including a continuous film and a plurality of convex portions having a truncated cone shape or a pyramid shape periodically arranged on the continuous film, at least The plurality of convex portions and the region under the plurality of convex portions of the continuous film are composed of a continuous nitride semiconductor single crystal, the plurality of convex portions having the same crystal orientation, and the bottom surface of each convex portion is included ( 0001) face, the (0001) face has a shape formed by a side parallel to the a-axis. The nitride semiconductor growth substrate according to claim 1, wherein the plurality of convex portions are in a truncated cone shape, and a top surface thereof includes a (0001) plane having a side parallel to the a-axis. shape. The substrate for nitride semiconductor growth according to claim 1 or 2, wherein the inclined faces of the plurality of convex portions have uniform surface orientation, size, and shape, and are free from processing damage. The nitride semiconductor growth substrate according to claim 3, wherein the inclined surface includes (10-1n) planes, and n is an arbitrary integer. The nitride semiconductor growth base according to claim 4 a plate, wherein the inclined surface comprises a mirror-like growth surface in a generated state. The substrate for growing a semiconductor semiconductor according to claim 1 or 2, wherein the plurality of convex portions have a uniform height. The substrate for nitride semiconductor growth according to claim 1 or 2, wherein a height of the plurality of convex portions periodically changes, and a vertex or a top surface of the plurality of convex portions is located in any one of two imaginary planes on. The nitride semiconductor growth substrate according to claim 1 or 2, wherein a distance between centers of any adjacent ones of the plurality of convex portions is 100 μm or more and 10 mm or less. The nitride semiconductor growth substrate according to claim 1 or 2, wherein a distance between bottom surfaces of any adjacent ones of the plurality of convex portions is 1 mm or less. The substrate for a nitride semiconductor growth according to claim 1 or 2, wherein the height of the plurality of convex portions is 50 μm or more and 5 mm or less. The substrate for growing a nitride semiconductor according to claim 1 or 2, wherein a difference in a region between the bottom surfaces of adjacent convex portions among the plurality of convex portions is different from an inside of the convex portion high density. The substrate for nitride semiconductor growth according to claim 1 or 2, wherein the shape of the bottom surface of the plurality of convex portions is a triangle Shape, quadrilateral or hexagonal. A method for producing a substrate for growing a nitride semiconductor, comprising the steps of: forming a periodic pattern parallel to the single crystal of the nitride semiconductor on a flat substrate having a surface composed of a single crystal of a nitride semiconductor a plurality of linear grooves of the shaft; and epitaxial growth of the nitride semiconductor crystal on the substrate on which the plurality of linear grooves are formed to form a nitride semiconductor layer having a plurality of surfaces on the surface of the nitride semiconductor layer The plurality of convex portions are formed by a truncated cone-shaped or pyramidal nitride semiconductor single crystal, and are periodically arranged in a pattern corresponding to a periodic pattern formed by the plurality of linear grooves. The method for producing a nitride semiconductor growth substrate according to claim 13, wherein the surface of the substrate includes a c-plane. The method for producing a nitride semiconductor growth substrate according to claim 13 or 14, wherein the plurality of linear grooves have a width of 10 μm or more and 100 μm or less. The method for producing a nitride semiconductor growth substrate according to claim 13 or 14, wherein a distance between centers of the grooves having the same direction among the plurality of linear grooves is 100 μm or more and 10 mm or less. A nitride semiconductor as claimed in claim 13 or 14 In the method for producing a substrate for growth, the nitride semiconductor layer is formed by a hydride vapor phase epitaxy method in which hydrogen gas is grown in a growing ambient gas. The method for producing a nitride semiconductor growth substrate according to claim 13 or 14, wherein the nitride semiconductor layer comprises a continuous film. The method for producing a nitride semiconductor growth substrate according to claim 13 or 14, wherein after the growth of the nitride semiconductor layer, an unnecessary nitride semiconductor crystal deposited on the inclined surface of the convex portion is applied. Etched to remove. The method for producing a nitride semiconductor growth substrate according to claim 13 or 14, wherein the periodic pattern formed by the plurality of linear grooves includes a triangular, quadrangular or hexagonal lattice. A semiconductor device comprising one of the plurality of convex portions of the nitride semiconductor growth substrate according to any one of claims 1 to 12. A method of manufacturing a semiconductor device, comprising: a single crystal film of a plurality of nitride semiconductors on the plurality of convex portions of a substrate for nitride semiconductor growth according to any one of claims 1 to 12; Performing epitaxial growth to form a multilayer epitaxial growth layer; After forming the multilayer epitaxial growth layer, the nitride semiconductor growth substrate is divided to form a plurality of semiconductor devices, each of which includes one of the plurality of convex portions.