JP5065625B2 - Manufacturing method of GaN single crystal substrate - Google Patents

Description

  The present invention relates to a substrate for a light emitting device such as a light emitting diode and a semiconductor laser, and an electronic device such as a field effect transistor using a nitride compound semiconductor such as gallium nitride (GaN), and a method for manufacturing the same.

  Conventionally, a stable sapphire substrate has been used in a light emitting device using a nitride compound semiconductor.

  However, since sapphire has no cleavage plane, there has been a problem that when a sapphire substrate is used for a semiconductor laser, a reflection plane cannot be produced by cleavage.

  In addition, when sapphire is used as a substrate material for light emitting devices, dislocations in the epitaxial layer due to lattice mismatch and thermal expansion coefficient differences between the sapphire substrate and the epitaxial layer grown on the sapphire substrate. There was also a problem that crystal defects such as the above occurred frequently.

  As a technique developed to solve the problem in the case where such sapphire is used as a substrate of a light emitting device or the like, there is a method for manufacturing a semiconductor light emitting element described in Patent Document 1. This semiconductor light emitting device is manufactured by growing a gallium nitride-based compound semiconductor layer on a semiconductor single crystal substrate such as a gallium arsenide (GaAs) substrate, then removing the semiconductor single crystal substrate (GaAs substrate), and remaining gallium nitride. A semiconductor light emitting device is manufactured by epitaxially growing a gallium nitride compound semiconductor single crystal layer as an operation layer on a new compound semiconductor layer as a new substrate.

According to the technique of Patent Document 1, the lattice constant and the thermal expansion coefficient between the gallium nitride compound semiconductor layer and the gallium nitride compound semiconductor single crystal layer (epitaxial layer) grown thereon are very close. Lattice defects due to dislocations are less likely to occur in the crystal layer (epitaxial layer). Further, since the substrate and the operation layer grown thereon are made of the same gallium nitride compound semiconductor layer, the same kind of crystals are aligned and can be easily cleaved. For this reason, a reflecting mirror such as a semiconductor laser can be easily produced.
Japanese Patent Laid-Open No. 8-116090

  However, the GaN substrate manufactured by the manufacturing method described in Patent Document 1 has a very low crystal quality due to lattice mismatch and the like, and a large warp occurs due to internal stress caused by crystal defects. Was not reached. As the technology advances, it is required to further improve the characteristics of optical semiconductor devices using gallium nitride compound semiconductors, and the present inventors have been required to produce higher quality GaN single crystal substrates. . For this purpose, it is necessary to further reduce crystal defects such as dislocations generated in the epitaxial layer of the GaN single crystal substrate. By reducing crystal defects, a GaN single crystal substrate having high crystal quality, low internal stress, and little warpage can be obtained.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a method for manufacturing a GaN single crystal substrate in which crystal defects such as dislocations are reduced.

  In order to solve the above-described problems, a method of manufacturing a GaN single crystal substrate according to the present invention includes growing a epitaxial layer of hexagonal GaN on a GaN single crystal using the GaN single crystal as a seed crystal, An ingot forming step for forming the ingot and a cutting step for cutting the ingot into a plurality of pieces.

  In this case, since the GaN single crystal ingot is cut into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained by a single manufacturing process.

  The method for producing a GaN single crystal substrate according to the present invention also includes an ingot that forms an ingot of a GaN single crystal by growing an epitaxial layer made of hexagonal GaN on the GaN single crystal using the GaN single crystal as a seed crystal. And a cleaving step of cleaving the ingot into a plurality of sheets.

  In this case, since the GaN single crystal ingot is cleaved into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained by a single manufacturing process. In this case, since the ingot is cleaved along the cleavage plane of the GaN crystal, a plurality of GaN single crystal substrates can be easily obtained.

  A method of manufacturing a GaN single crystal substrate according to the present invention includes a mask layer forming step of forming a mask layer having a plurality of aperture windows spaced apart from each other on a GaAs substrate, and an epitaxial layer made of GaN on the mask layer. And an epitaxial layer growth step for growing the layer.

  According to the method for manufacturing a GaN single crystal substrate of the present invention, GaN nuclei are formed in each opening window of the mask layer, and the GaN nuclei gradually form a lateral direction on the mask layer, that is, an opening window of the mask layer. There is no obstacle towards the upper part of the mask part, and it grows freely laterally. And since the defect in a GaN nucleus does not spread when a GaN nucleus grows laterally, the GaN single-crystal board | substrate with which the crystal defect was reduced significantly can be formed.

  In the method for manufacturing a GaN single crystal substrate according to the present invention, a buffer layer forming step of forming a buffer layer on the GaAs substrate before the mask layer forming step, and a lower layer made of GaN on the buffer layer It is preferable to further include a lower layer epitaxial layer growth step for growing the epitaxial layer.

  In this case, since the lower epitaxial layer made of GaN is located below the opening window of the mask layer and the epitaxial layer made of GaN is formed on the lower epitaxial layer, crystal defects of the epitaxial layer are further reduced. The That is, crystal defects such as dislocations have a higher density near the buffer layer. Therefore, it is better to once grow the lower epitaxial layer and form the mask layer at a distance from the buffer layer. Crystal defects can be reduced more than when the layer is not grown.

  The method for manufacturing a GaN single crystal substrate according to the present invention further includes a buffer layer forming step of forming a buffer layer on the GaAs substrate in the opening window of the mask layer before the epitaxial layer growth step. It is also preferable.

In this case, it is possible to form a GaN single crystal substrate in which crystal defects are greatly reduced by growing the GaN epitaxial layer only once, and cost reduction can be achieved. When a GaN epitaxial layer is grown on a GaAs substrate, a GaN low temperature buffer layer or AlN buffer layer close to an amorphous layer is grown, and then GaN is grown at a high temperature. Epitaxial growth can also be obtained. At the time of forming the low temperature buffer layer, the low temperature buffer layer does not grow on the mask portion of the mask layer made of SiO ₂ and Si ₃ N ₄ and is formed only in the opening window.

  Further, in the method for manufacturing a GaN single crystal substrate according to the present invention, the epitaxial layer is grown within a thickness range of 5 to 300 μm, and the GaAs substrate removing step of removing the GaAs substrate after the epitaxial layer growing step. And a step of laminating and growing a second epitaxial layer made of GaN on the epitaxial layer.

  In this case, since the GaAs substrate is removed before the second epitaxial layer is grown, the occurrence of thermal stress due to the difference in thermal expansion coefficient between the GaAs substrate, the buffer layer, and the epitaxial layer is prevented. The generated cracks and internal stress can be reduced, whereby a GaN single crystal substrate free from cracks and greatly reduced in crystal defects can be formed.

  Further, in the method for manufacturing a GaN single crystal substrate according to the present invention, a plurality of the opening windows of the mask layer are arranged at a pitch L in the <10-10> direction of the lower epitaxial layer, and a <10-10> window group is formed. A plurality of the <10-10> window groups are arranged in parallel in the <1-210> direction of the lower epitaxial layer at a pitch d (0.75L ≦ d ≦ 1.3L), and each <10-10> −10> The window group is shifted by about ½ L in the <10-10> direction with respect to the center position of each opening window of the <10-10> window group in which the center positions of the opening windows are adjacent to each other. It is desirable that they are arranged side by side.

  In this case, each opening window of each <10-10> window group is approximately 1 / in the <10-10> direction with respect to the center position of each opening window of the <10-10> window group whose adjacent center positions are adjacent. Due to the 2L deviation, the regular hexagonal pyramid or regular hexagonal frustum GaN crystal grains grown from each opening window are connected to the crystal grains grown from the adjacent opening window with almost no pits, and the crystal in the epitaxial layer is connected. Defects and internal stress can be reduced.

  In the method for manufacturing a GaN single crystal substrate according to the present invention, a plurality of the opening windows of the mask layer are arranged at a pitch L in the <11-2> direction on the (111) plane of the GaAs substrate. 2> A window group is formed, and a plurality of the <11-2> window groups are arranged in parallel at a pitch d (0.75 L ≦ d ≦ 1.3 L) in the <−110> direction of the (111) plane of the GaAs substrate. Further, each <11-2> window group has the above <11-2> relative to the center position of each opening window of the <11-2> window group in which the center positions of the respective opening windows are adjacent to each other. It is desirable that they are juxtaposed with a shift of about ½ L in the direction.

  In this case, each opening window of each <11-2> window group is approximately 1 / <2> in the <11-2> direction with respect to the center position of each opening window of the <11-2> window group that is adjacent to the center position. Due to the 2L deviation, the regular hexagonal pyramid or regular hexagonal frustum GaN crystal grains grown from each opening window are connected to the crystal grains grown from the adjacent opening window with almost no pits, and the crystal in the epitaxial layer is connected. Defects and internal stress can be reduced.

  Further, in the method for manufacturing a GaN single crystal substrate according to the present invention, in the epitaxial layer growth step, a step of forming the GaN single crystal ingot by growing the epitaxial layer thickly and cutting the ingot into a plurality of pieces. It is also desirable to provide further.

  In this case, since the GaN single crystal ingot is cut into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained by a single manufacturing process.

  Further, in the method for manufacturing a GaN single crystal substrate according to the present invention, in the epitaxial layer growth step, a cleavage step of growing the epitaxial layer thickly to form an ingot of a GaN single crystal and cleaving the ingot into a plurality of sheets. It is also desirable to provide further.

  In this case, since the GaN single crystal ingot is cleaved into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained by a single manufacturing process. In this case, since the ingot is cleaved along the cleavage plane of the GaN crystal, a plurality of GaN single crystal substrates can be easily obtained.

  Further, in the method for manufacturing a GaN single crystal substrate according to the present invention, an ingot forming step of forming an ingot of a GaN single crystal by growing a thick GaN epitaxial layer on the GaN single crystal substrate obtained by the above-described manufacturing method; It is also desirable to further comprise a cutting step of cutting the ingot into a plurality of sheets.

  In this case, a plurality of GaN single crystal substrates can be obtained simply by growing an GaN epitaxial layer on the GaN single crystal substrate manufactured by the above-described manufacturing method, forming an ingot, and cutting the ingot. That is, a plurality of GaN single crystal substrates with reduced crystal defects can be manufactured with a simple operation.

  The method for manufacturing a GaN single crystal substrate according to the present invention includes a mask layer forming step of forming a mask layer having a plurality of opening windows spaced apart from each other on a GaAs substrate, and an epitaxial layer made of GaN on the mask layer. And an epitaxial layer growth step for growing the layer.

  Preferably, the method for manufacturing the GaN single crystal substrate includes a buffer layer forming step of forming a buffer layer on the GaAs substrate before the mask layer forming step, and a lower epitaxial layer made of GaN on the buffer layer. And a lower epitaxial layer growth step for growing the layer.

  The method for manufacturing a GaN single crystal substrate preferably further includes a buffer layer forming step of forming a buffer layer on the GaAs substrate in the opening window of the mask layer before the epitaxial layer growth step.

  Preferably, the opening window of the mask layer is a stripe-shaped stripe window.

  Preferably, the stripe window extends in the <10-10> direction of the lower epitaxial layer made of GaN, the window width is in the range of 0.3 μm to 10 μm, and the mask width is 2 μm to 20 μm. Within range.

  Preferably, the stripe window extends in the <1-210> direction of the lower epitaxial layer made of GaN, and has a window width of 0.3 μm to 10 μm and a mask width of 2 μm to 20 μm. Within range.

  The method for manufacturing a GaN single crystal substrate preferably includes a GaAs substrate removal step of removing the GaAs substrate after the epitaxial layer growth step, and a polishing step of polishing the lower surface of the buffer layer and the upper surface of the epitaxial layer. Are further provided.

  Preferably, the opening window of the mask layer is a stripe-shaped stripe window.

  Preferably, the stripe window extends in the <11-2> direction of the GaAs substrate, the window width is in the range of 0.3 μm to 10 μm, and the mask width is in the range of 2 μm to 20 μm.

  Preferably, the stripe window extends in the <1-10> direction of the GaAs substrate, the window width is in the range of 0.3 μm to 10 μm, and the mask width is in the range of 2 μm to 20 μm.

  Preferably, in the method of manufacturing a GaN single crystal substrate, after the epitaxial layer growth step, a GaAs substrate removal step of removing the GaAs substrate, a lower surface of the mask layer and the buffer layer, and an upper surface of the epitaxial layer are provided. And a polishing step for polishing.

  Preferably, the GaAs substrate is a GaAs (111) A substrate or a GaAs (111) B substrate.

  Preferably, the buffer layer is formed by hydride VPE.

  Preferably, the epitaxial layer is formed by hydride VPE.

  Preferably, the epitaxial layer is grown in a thickness range of 5 μm to 300 μm, and the method of manufacturing the GaN single crystal substrate includes a GaAs substrate removal step of removing the GaAs substrate after the epitaxial layer growth step, And a step of growing a second epitaxial layer made of GaN on the epitaxial layer.

  Preferably, a plurality of the opening windows of the mask layer are arranged at a pitch L in the <10-10> direction of the lower epitaxial layer to form a <10-10> window group, and the <10-10> window group Are arranged in parallel in the <1-210> direction of the lower epitaxial layer with a pitch d (0.75 L ≦ d ≦ 1.3 L).

  Preferably, each <10-10> window group is in the <10-10> direction with respect to the center position of each opening window of the <10-10> window group in which the center positions of the opening windows are adjacent to each other. Are juxtaposed with a shift of about 1/2 L.

  Preferably, a plurality of the opening windows of the mask layer are arranged at a pitch L in the <11-2> direction on the (111) plane of the GaAs substrate to form a <11-2> window group, and the <11 -2> A plurality of windows are arranged in parallel at a pitch d (0.75 L ≦ d ≦ 1.3 L) in the <−110> direction of the (111) plane of the GaAs substrate.

  Preferably, each <11-2> window group is in the <11-2> direction with respect to the center position of each opening window of the <11-2> window group in which the center positions of the opening windows are adjacent to each other. Are juxtaposed with a shift of about 1/2 L.

  Preferably, the pitch L of each opening window is in the range of 3 μm to 10 μm.

  Preferably, the shape of the opening window of the mask layer is any one of a circle, an ellipse, and a polygon.

Preferably, the area of each opening window of the mask layer is 0.7μm ² ~50μm ^2.

  Preferably, each opening window of the mask layer is a square having a side of 1 μm to 5 μm or a circle having a diameter of 1 μm to 5 μm.

  Preferably, the total area of each of the opening windows is 10 to 50% of the total area of the area of all the opening windows and the area of the mask portion where the opening windows are not formed.

  Preferably, the opening window of the mask layer is a rectangular window whose longitudinal direction is the <10-10> direction of the lower epitaxial layer, and the rectangular window is arranged at a pitch L in the <10-10> direction. A plurality of <10-10> rectangular window groups are arranged to form a plurality, and a plurality of <10-10> rectangular window groups are juxtaposed in the <1-210> direction of the lower epitaxial layer at a pitch d.

  Preferably, each <10-10> rectangular window group has the <10-10> relative to the center position of each rectangular window of the <10-10> rectangular window group in which the center positions of the rectangular windows are adjacent to each other. It is juxtaposed with a shift of about ½ L in the> direction.

  Preferably, the opening window of the mask layer is a rectangular window having a longitudinal direction in the <11-2> direction of the GaAs substrate, and the rectangular window is <11 on the (111) plane of the GaAs substrate. A plurality of <11-2> rectangular window groups are formed in the -2> direction at a pitch L, and a plurality of the <11-2> rectangular window groups are arranged in parallel in the <-110> direction at a pitch d.

  Preferably, each <11-2> rectangular window group has the <11-2> with respect to the center position of each rectangular window of the <11-2> rectangular window group in which the center positions of the rectangular windows are adjacent to each other. It is juxtaposed with a shift of about ½ L in the> direction.

  Preferably, the pitch L of the rectangular windows is 4 μm to 20 μm, the mask length between the rectangular windows adjacent in the longitudinal direction of the rectangular windows is 1 μm to 4 μm, and the width w of each rectangular window is 1 μm to 5 μm. The mask width (dw) between the rectangular window groups adjacent in the short direction of the rectangular opening window is 2 μm to 10 μm.

  Preferably, each opening window of the mask layer is a hexagonal ring-shaped hexagonal window, and the direction of each of the six sides of the hexagonal window is the <10-10> direction of the lower epitaxial layer.

  Preferably, each opening window of the mask layer is a hexagonal ring-shaped hexagonal window, and the directions of the six sides of the hexagonal window are the <11-2> direction of the GaAs substrate.

Preferably, the mask layer is made of SiO ₂ or SiN.

  The manufacturing method of the GaN single crystal substrate preferably further includes a step of removing the GaAs substrate.

  The method for manufacturing a GaN single crystal substrate preferably further includes a cutting step of growing the epitaxial layer to form a GaN single crystal ingot in the epitaxial layer growth step, and cutting the ingot into a plurality of pieces.

  The method for manufacturing a GaN single crystal substrate further includes a cleavage step of growing the epitaxial layer to form an ingot of a GaN single crystal and cleaving the ingot into a plurality of sheets in the epitaxial layer growth step.

  The method for producing a GaN single crystal substrate is preferably an ingot forming step of forming an GaN single crystal ingot by growing an epitaxial layer made of GaN on a GaN single crystal substrate obtained by the production method of the present invention, And a cutting step of cutting the ingot into a plurality of sheets.

  The method for producing a GaN single crystal substrate is preferably an ingot forming step of forming an GaN single crystal ingot by growing an epitaxial layer made of GaN on a GaN single crystal substrate obtained by the production method of the present invention, A cleaving step of cleaving the ingot into a plurality of sheets.

  The method for producing a GaN single crystal substrate of the present invention includes an ingot forming step of forming an ingot of a GaN single crystal by growing an epitaxial layer made of GaN on the GaN single crystal using the GaN single crystal as a seed crystal, And a cutting step of cutting the ingot into a plurality of sheets.

  The method for producing a GaN single crystal substrate of the present invention includes an ingot forming step of forming an ingot of a GaN single crystal by growing an epitaxial layer made of GaN on the GaN single crystal using the GaN single crystal as a seed crystal, And a cleavage step of cleaving the ingot into a plurality of sheets.

  The GaN single crystal substrate of the present invention includes at least a mask layer having a plurality of opening windows spaced apart from each other, and an epitaxial layer made of GaN and stacked on the mask layer.

  Preferably, the GaN single crystal substrate further includes a buffer layer and a lower epitaxial layer formed between the buffer layer and the mask layer on the side of the mask layer where the epitaxial layer is not formed. Prepare.

  Preferably, a buffer layer is formed in each opening window of the mask layer.

  Preferably, a plurality of the opening windows of the mask layer are arranged at a pitch L in the <10-10> direction of the lower epitaxial layer to form a <10-10> window group, and the <10-10> window A plurality of groups are arranged in parallel in the <1-210> direction of the lower epitaxial layer with a pitch d (0.75 L ≦ d ≦ 1.3 L).

  Preferably, each <10-10> window group is in the <10-10> direction with respect to the center position of each opening window of the <10-10> window group in which the center positions of the opening windows are adjacent to each other. Are juxtaposed with a shift of about 1/2 L.

  Preferably, within a range from the contact surface of the epitaxial layer with the mask layer to 10 μm and on the mask portion where the opening window of the mask layer is not formed, than a region above the opening window. A low dislocation density region having a low dislocation density is formed.

Preferably, the dislocation density in the low dislocation density region of the epitaxial layer is 1 × 10 ⁸ cm ⁻² or less.

  The GaN single crystal substrate preferably further includes a GaAs substrate on the surface of the epitaxial layer opposite to the surface on which the mask layer is formed.

  Preferably, the epitaxial layer has a thickness in the range of 5 μm to 300 μm, and in the GaN single crystal substrate, a second epitaxial layer made of GaN is further formed on the epitaxial layer.

  The GaN single crystal substrate is preferably manufactured by the method for manufacturing a GaN single crystal substrate of the present invention.

Preferably, the carrier concentration is n-type and is in the range of 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ .

Preferably, the electron mobility ^is in the range of 60cm ² ~800cm 2.

Preferably, the specific resistance is in the range of 1 × 10 ⁻⁴ Ωcm to 1 × 10 Ωcm.

  The light-emitting device of the present invention includes the GaN single crystal substrate of the present invention and a semiconductor layer formed on the GaN single crystal substrate, and a light-emitting element is configured by the semiconductor layer.

  An electronic device of the present invention includes the GaN single crystal substrate of the present invention and a semiconductor layer formed on the GaN single crystal substrate, and at least a pn junction is configured by the semiconductor layer.

  According to the present invention, a method for producing a GaN single crystal substrate with reduced crystal defects such as dislocations is provided.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of each embodiment, the crystal lattice direction and the lattice plane may be used, but here, the lattice direction and the lattice plane symbols will be described. The individual orientation is indicated by [], the collective orientation is indicated by <>, the individual plane is indicated by (), and the aggregate plane is indicated by {}. As for the negative index, “−” (bar) is attached to the number in terms of crystallography, but a negative sign is attached to the number for the convenience of preparing the specification.

[First Embodiment]
A GaN single crystal substrate and a manufacturing method thereof according to the first embodiment will be described with reference to manufacturing process diagrams of FIGS. 1A to 1D.

  First, in the first step shown in FIG. 1A, the GaAs substrate 2 is placed in a reaction vessel of a vapor phase growth apparatus. As the GaAs substrate 2, either a GaAs (111) A substrate whose GaAs (111) surface is a Ga surface or a GaAs (111) B substrate whose GaAs (111) surface is an As surface is used. Can be used.

  After the GaAs substrate 2 is placed in the reaction vessel of the vapor phase growth apparatus, a buffer layer 4 made of GaN is formed on the GaAs substrate 2. Examples of the method for forming the buffer layer 4 include vapor phase growth methods such as HVPE (Hydride Vapor Phase Epitaxy) method, organometallic chloride vapor phase growth method, and MOCVD method. Hereinafter, each of these vapor phase growth methods will be described in detail.

  First, the HVPE method will be described. FIG. 2 is a diagram showing an atmospheric pressure vapor phase growth apparatus used for the HVPE method. This apparatus includes a reaction chamber 59 having a first gas introduction port 51, a second gas introduction port 53, a third gas introduction port 55, and an exhaust port 57, and resistance heating for heating the reaction chamber 59. And a heater 61. In the reaction chamber 59, a Ga metal source boat 63 and a rotation support member 65 for supporting the GaAs substrate 2 are provided.

A preferred method for forming the buffer layer 4 using such a vapor phase growth apparatus will be described. When a GaAs (111) A substrate is used as the GaAs substrate 2, the temperature of the GaAs substrate 2 is set to about 450 by the resistance heater 61. In a state where the temperature is raised to about 530 ° C., hydrogen chloride (HCl) is supplied from the second gas introduction port 53 to the Ga metal source boat 63 at a partial pressure of 4 × 10 ⁻⁴ atm to ⁴ × 10 ⁻³ atm. Introduce. By this treatment, Ga metal and hydrogen chloride (HCl) react to generate gallium chloride (GaCl). Next, ammonia (NH ₃ ) is introduced from the first gas introduction port 51 at a partial pressure of 0.1 atm to 0.3 atm, and the NH ₃ and GaCl are reacted in the vicinity of the GaAs substrate 2, and gallium nitride (GaN) is reacted. Generate. Note that hydrogen (H ₂ ) is introduced into the first gas introduction port 51 and the second gas introduction port 53 as a carrier gas. Further, only hydrogen (H ₂ ) is introduced into the third gas introduction port 55. Under such conditions, GaN is grown for about 20 minutes to about 40 minutes, thereby forming the buffer layer 4 made of GaN having a thickness of about 500 angstroms to about 1200 angstroms on the GaAs substrate 2. When the HVPE method is used, the growth rate of the buffer layer does not change much even if the amount of gallium chloride (GaCl) synthesized is increased, and it is considered to be reaction-controlled.

  Also, when a GaAs (111) B substrate is used as the GaAs substrate 2, the buffer layer can be formed under substantially the same conditions as when the GaAs (111) A substrate is used.

  Next, the organometallic chloride vapor phase growth method will be described. FIG. 3 is a diagram showing a growth apparatus used in the organometallic chloride vapor phase growth method. This apparatus includes a reaction chamber 79 having a first gas introduction port 71, a second gas introduction port 73, a third gas introduction port 75, and an exhaust port 77, and resistance heating for heating the reaction chamber 79. And a heater 81. A rotation support member 83 that supports the GaAs substrate 2 is provided in the reaction chamber 79.

A method of forming the buffer layer 4 using such a growth apparatus will be described. When a GaAs (111) A substrate is used as the GaAs substrate 2, the temperature of the GaAs substrate 2 is set to about 450 ° C. to about 530 by the resistance heater 81. In a state where the temperature is raised to 0 ° C., trimethylgallium (TMG) is introduced from the first gas introduction port 71 at a partial pressure of 4 × 10 ⁻⁴ atm to 2 × 10 ⁻³ atm and the second gas introduction port 73 is introduced. Further, hydrogen chloride (HCl) is introduced in an equal amount at a partial pressure of 4 × 10 ⁻⁴ atm to 2 × 10 ⁻³ atm. By this treatment, trimethylgallium (TMG) and hydrogen chloride (HCl) react to generate gallium chloride (GaCl). Next, ammonia (NH ₃ ) is introduced from the third gas introduction port 75 at a partial pressure of 0.1 atm to 0.3 atm, and the NH ₃ and GaCl are reacted in the vicinity of the GaAs substrate 2, and gallium nitride (GaN) is reacted. Generate. Hydrogen (H ₂ ) is introduced as a carrier gas into the first gas introduction port 71, the second gas introduction port 73, and the third gas introduction port 75, respectively. Under such conditions, GaN is grown for about 20 minutes to about 40 minutes, thereby forming the buffer layer 4 made of GaN having a thickness of about 500 angstroms to about 1200 angstroms on the GaAs substrate 2. At this time, the growth rate of the buffer layer 4 can be about 0.08 μm / hr to about 0.18 μm / hr.

  Also, when a GaAs (111) B substrate is used as the GaAs substrate 2, the buffer layer can be formed under substantially the same conditions as when the GaAs (111) A substrate is used.

The MOCVD method is a cold wall reactor in which an organic metal such as trimethyl gallium (TMG) containing Ga and ammonia (NH ₃ ) are sprayed together with a carrier gas onto a heated GaAs substrate 2. In this method, GaN is grown on the GaAs substrate 2. Here, the temperature of the GaAs substrate 2 when an organic metal containing Ga or the like is sprayed on the GaAs substrate 2 is about 450 ° C. to about 600 ° C. when the GaAs (111) A substrate is used, and the GaAs (111) B substrate. When is used, it is preferably about 450 ° C. to about 550 ° C. In addition to TMG, for example, triethylgallium (TEG) can be used as the organic metal containing Ga.

  The above is the vapor phase growth method for forming the buffer layer 4. After forming the buffer layer 4, a first epitaxial layer (lower epitaxial layer) 6 made of GaN is grown on the buffer layer 4. For the growth of the first epitaxial layer 6, as with the method for forming the buffer layer 4, a vapor phase growth method such as an HVPE method, a metal organic chloride vapor phase growth method, or an MOCVD method can be used. Hereinafter, suitable conditions for growing the first epitaxial layer 6 by these vapor phase growth methods will be described.

When the first epitaxial layer 6 is grown by the HVPE method, the apparatus shown in FIG. 2 can be used similarly to the formation of the buffer layer 4. When a GaAs (111) A substrate is used as the GaAs substrate 2, the first epitaxial layer 6 is formed with the resistance heater 61 maintaining the temperature of the GaAs substrate 2 at about 920 ° C. to about 1030 ° C. Grow. At this time, the growth rate of the first epitaxial layer 6 can be set to about 20 μm / hr to about 200 μm / hr. The growth rate greatly depends on the GaCl partial pressure, that is, the HCl partial pressure, and the HCl partial pressure can range from 5 × 10 ⁻⁴ atm to 5 × 10 ⁻² atm. On the other hand, when a GaAs (111) B substrate is used as the GaAs substrate 2, the first epitaxial layer 6 is formed in a state where the temperature of the GaAs substrate 2 is raised to about 850 ° C. to about 950 ° C. by the resistance heater 61. Grow.

When the first epitaxial layer 6 is grown by the organic metal chloride vapor phase growth method, the apparatus shown in FIG. 3 can be used similarly to the formation of the buffer layer 4. When a GaAs (111) A substrate is used as the GaAs substrate 2, the first epitaxial layer 6 is formed in a state where the temperature of the GaAs substrate 2 is raised to about 920 ° C. to about 1030 ° C. by the resistance heater 81. Grow. At this time, the growth rate of the first epitaxial layer 6 can be set to about 10 μm / hr to about 60 μm / hr. In order to increase the growth rate, the partial pressure of GaCl may be increased by increasing the partial pressure of TMG. However, if the partial pressure is equal to or higher than the equilibrium vapor pressure of TMG at the temperature of the gas pipe, Since TMG liquefies on the inner wall of the pipe and the pipe is contaminated or clogged, the partial pressure of TMG cannot be increased unnecessarily, and it is considered that the upper limit is about 5 × 10 ⁻³ atm. For this reason, it is considered that the upper limit of the growth rate is about 60 μm / hr.

On the other hand, when a GaAs (111) B substrate is used as the GaAs substrate 2, the first epitaxial layer 6 is formed in a state where the temperature of the GaAs substrate 2 is raised to about 850 ° C. to about 950 ° C. by the resistance heater 81. Grow. At this time, the growth rate of the first epitaxial layer 6 can be set to about 10 μm / hr to about 50 μm / hr. Note that the partial pressure of trimethylgallium or the like introduced into the reaction chamber 79 has an upper limit of 5 × 10 ⁻³ atm for the above reason.

  When the first epitaxial layer 6 is grown by the MOCVD method, the temperature of the GaAs substrate 2 when an organic metal containing Ga or the like is sprayed on the GaAs substrate 2 is about 750 ° C. when a GaAs (111) A substrate is used. When using a GaAs (111) B substrate, the temperature is preferably about 730 ° C to about 820 ° C. The above is the growth condition of the first epitaxial layer 6.

Then, the 2nd process shown to FIG. 1B is demonstrated. In the second step shown in FIG. 1B, a wafer in the middle of manufacture is taken out from the growth apparatus, and a mask layer 8 made of SiN or SiO ₂ is formed on the epitaxial layer 6. The mask layer 8 is formed by forming a SiN film or SiO ₂ film having a thickness of about 100 nm to about 500 nm by plasma CVD or the like, and patterning the SiN film or SiO ₂ film by a photolithography technique.

  FIG. 4 is a plan view of the wafer in the second step shown in FIG. 1B. As shown in FIGS. 1B and 4, a plurality of stripe-like stripe windows 10 are formed in the mask layer 8 of the present embodiment. The stripe window 10 is formed to extend in the <10-10> direction of the first epitaxial layer 6 made of GaN. Note that the arrows in FIG. 4 indicate the crystal orientation of the first epitaxial layer 6.

  After forming the mask layer 8, the process proceeds to the third step shown in FIG. 1C. In the third step, the wafer on which the mask layer 8 is formed is placed again in the reaction vessel of the vapor phase growth apparatus. Then, the second epitaxial layer 12 is grown on the mask layer 8 and the portion of the first epitaxial layer 6 exposed from the stripe window 10. As a growth method of the second epitaxial layer 12, as in the growth method of the first epitaxial layer 6, there are an HVPE method, an organic metal chloride vapor phase growth method, an MOCVD method, and the like. The thickness of the second epitaxial layer 12 is preferably about 150 μm to about 1000 μm.

  Here, the growth process of the second epitaxial layer 12 will be described in detail with reference to FIGS. 5A to 5D. As shown in FIG. 5A, at the initial stage of growth of the second epitaxial layer 12 made of GaN, the second epitaxial layer 12 does not grow on the mask layer 8, and the GaN nuclei in the stripe window 10 are formed. It grows only on the first epitaxial layer 6. As the growth proceeds, the thickness of the second epitaxial layer 12 increases, and as the thickness increases, lateral growth (lateral growth) of the second epitaxial layer 12 is performed on the mask layer 8 as shown in FIG. 5B. ) Occurs. As a result, as shown in FIG. 5C, the epitaxial layers 12 grown from both sides on the mask layer 8 are connected and integrated. After integration by lateral growth, as shown in FIG. 5D, the second epitaxial layer 12 grows upward and the thickness increases. When the second epitaxial layer 12 is integrated with the adjacent epitaxial layer 12 by lateral growth, the growth rate in the thickness direction becomes faster than before the integration. The above is the growth process of the second epitaxial layer 12.

  Here, as described in the explanation of FIG. 4, the stripe window 10 is formed so as to extend in the <10-10> direction of the first epitaxial layer 6 made of GaN. The width direction and the <1-210> direction of the first epitaxial layer 6 substantially coincide. In general, since the GaN epitaxial layer has a high growth rate in the <1-210> direction, the lateral growth of the second epitaxial layer 12 is started until the adjacent epitaxial layers 12 are integrated with each other. Time is shortened. For this reason, the growth rate of the second epitaxial layer 12 is increased.

  Note that the stripe window 10 does not necessarily extend in the <10-10> direction of the first epitaxial layer 6, for example, is formed so as to extend in the <1-210> direction of the epitaxial layer 6. Also good.

  Next, the dislocation density of the second epitaxial layer 12 will be described. As shown in FIG. 5A, a plurality of dislocations 14 exist inside the second epitaxial layer 12. However, as shown in FIG. 5D, even if the second epitaxial layer 12 grows in the lateral direction, the dislocations 14 hardly spread in the lateral direction. Further, even if the dislocation 14 spreads in the horizontal direction, it does not become a threading dislocation extending in the horizontal direction and penetrating the upper and lower surfaces. Therefore, above the portion of the mask layer 8 where the stripe window 10 is not formed (hereinafter referred to as “mask portion”), there is a low dislocation density region 16 having a lower dislocation density than the region above the stripe window 10. It is formed. Thereby, the dislocation density of the second epitaxial layer 12 can be reduced. Further, when the epitaxial layer 12 rapidly grows upward from the state of FIG. 5C in which the adjacent epitaxial layers 12 are integrated by lateral growth, the dislocations 14 hardly extend upward. For this reason, the upper surface of the second epitaxial layer 12 is free from voids and threading dislocations, and has excellent embedding properties and flatness.

  After forming the second epitaxial layer 12 as described above, the process proceeds to the fourth step shown in FIG. 1D. In the fourth step, the wafer is placed in an etching apparatus, and the GaAs substrate 2 is completely removed with an ammonia-based etchant. Further, after removing the GaAs substrate 2, the removal surface of the GaAs substrate 2, that is, the lower surface of the buffer layer 4 is polished to complete the GaN single crystal substrate 13 according to the present embodiment.

  When abnormal grain growth occurs in a part of the second epitaxial layer 12 or when the thickness of the second epitaxial layer 12 becomes nonuniform, a polishing process is performed on the upper surface of the second epitaxial layer 12. To give a mirror finish. Specifically, it is preferable to perform buffing after lapping the upper surface of the second epitaxial layer 12.

  Further, the width P of the mask portion shown in FIGS. 1B and 4 is preferably in the range of about 2 μm to about 20 μm. When the width P of the mask portion is made smaller than the lower limit, the effect of lateral growth of the second epitaxial layer 12 tends to be reduced. On the other hand, when the width P is made larger than the upper limit, the second epitaxial layer 12 The growth time tends to be long and the mass productivity tends to decrease. Furthermore, the window width Q of the stripe window 10 is preferably in the range of about 0.3 μm to about 10 μm. By making the window width Q of the stripe window 10 within this range, the effect of the mask can be brought out.

Moreover, although the case where the buffer layer 4 made of GaN is grown in the first step shown in FIG. 1A has been described, the buffer layer 4 made of AlN may be grown instead of GaN. In this case, the MOVPE method can be used. Specifically, after sufficiently evacuating the reaction vessel in advance, when using a GaAs (111) A substrate at normal pressure, using a GaAs (111) B substrate at about 550 ° C. to about 700 ° C. In the state where the temperature of the GaAs substrate 2 is maintained at about 550 ° C. to about 700 ° C., hydrogen is introduced as a carrier gas, and trimethylaluminum (TMA) and ammonia (NH ₃ ) are introduced as source gases. By such processing, a buffer layer 4 made of AlN having a thickness of about 100 angstroms to about 1000 angstroms is formed on the GaAs substrate 2.

[Second Embodiment]
Next, a GaN single crystal substrate and a manufacturing method thereof according to the second embodiment will be described with reference to manufacturing process diagrams of FIGS. 6A to 6D.

First, in the first step shown in FIG. 6A, a mask layer 8 made of SiN or SiO _{2 is} directly formed on the GaAs substrate 2. The mask layer 8 is formed by forming a SiN film or SiO ₂ film having a thickness of about 100 nm to about 500 nm by plasma CVD or the like, and patterning the SiN film or SiO ₂ film by a photolithography technique.

  FIG. 7 is a plan view of the wafer in the first step shown in FIG. 6A. As shown in FIGS. 6A and 7, the mask layer 8 of this embodiment is also formed with a plurality of stripe-like stripe windows 10 as in the first embodiment. The stripe window 10 is formed so as to extend in the <11-2> direction of the GaAs substrate 2. Further, the arrow in FIG. 7 indicates the crystal orientation of the GaAs substrate 2.

  After the mask layer 8 is formed, the process proceeds to the second step shown in FIG. 6B, and the buffer layer 24 is formed on the GaAs substrate 2 in the stripe window 10. The buffer layer 24 can be formed by the HVPE method, the organometallic chloride vapor phase growth method, the MOCVD method, or the like, as in the first embodiment. The thickness of the buffer layer 24 is preferably about 50 nm to about 120 nm.

  Next, in a third step shown in FIG. 6C, an epitaxial layer 26 made of GaN is grown on the buffer layer 24. As in the first embodiment, the epitaxial layer 26 is preferably grown to a thickness of about 150 μm to about 1000 μm by HVPE, metal organic chloride vapor phase epitaxy, MOCVD, or the like. Also in this case, the lateral growth of the epitaxial layer can reduce the crystal defects of the epitaxial layer 26, particularly the crystal defects above the mask portion of the mask layer 8 and the upper surface of the epitaxial layer 26.

  Here, as described above, since the stripe window 10 is formed so as to extend in the <11-2> direction of the GaAs substrate 2, the width direction of the stripe window 10 and the <1-10> of the GaAs substrate 2. The direction is almost the same. In general, since the GaN epitaxial layer grows at a high speed in the <1-10> direction of the GaAs substrate 2, the lateral growth of the epitaxial layer 26 starts and the adjacent epitaxial layers 26 are integrated with each other. Is shortened. For this reason, the growth rate of the epitaxial layer 26 is increased.

  The stripe window 10 does not necessarily extend in the <11-2> direction of the GaAs substrate 2, and may be formed to extend in the <1-10> direction of the GaAs substrate 2, for example.

  After the epitaxial layer 26 is grown, the process proceeds to a fourth step shown in FIG. 6D, and the GaAs substrate 2 is removed to complete the GaN single crystal substrate 27 of this embodiment. As a method for removing the GaAs substrate 2, for example, there is etching. The GaAs substrate 2 can be removed by wet etching the GaAs substrate 2 for about 1 hour using an ammonia-based etchant. Note that wet etching can also be performed on the GaAs substrate 2 using aqua regia. Further, after removing the GaAs substrate 2, the removal surface of the GaAs substrate 2, that is, the lower surface of the mask layer 8 and the buffer layer 24 may be subjected to polishing treatment. Further, similarly to the first embodiment, the upper surface of the epitaxial layer 26 may be polished.

As described above, according to the method for manufacturing a GaN single crystal substrate of the present embodiment, a GaN substrate with few crystal defects and small internal stress can be manufactured by growing the epitaxial layer only once. Compared with the embodiment, the number of manufacturing steps can be reduced, and the cost can be reduced.

[Third Embodiment]
Before describing the third embodiment, the background to the completion of the GaN single crystal substrate and the manufacturing method thereof according to the present embodiment will be described.

  In order to meet the demand for improving the characteristics of optical semiconductor devices, the inventors have repeated trial and error to produce a higher quality GaN substrate. As a result, the present inventors have found that it is important to reduce the internal stress of the grown GaN epitaxial layer in order to produce a high-quality GaN substrate.

  In general, the internal stress of the GaN epitaxial layer can be considered by dividing it into thermal stress and true internal stress. This thermal stress is caused by a difference in thermal expansion coefficient between the GaAs substrate and the epitaxial layer. Further, the direction in which the GaN substrate warps due to this thermal stress can be predicted, but the actual warpage of the entire GaN substrate in a state where the GaAs substrate is not removed is opposite to the predicted direction, and further, the GaAs substrate Even after the substrate is removed, a large warp occurs in the GaN substrate, which reveals that true internal stress exists in the GaN epitaxial layer.

〔数式（１）中、σは内部応力、Ｅは剛性率、νはポアソン比、ｂは基板の厚さ、ｄは薄膜の厚さ、Ｉは基板の直径、δはウエハの撓みを示す。〕
によって与えられる。ＧａＮ単結晶の場合は、ｄ＝ｂとして、下記数式（２）：

〔数式（２）中、記号は数式（１）と同じものを示す。〕
となる。この数式（２）に基づいて、本発明者らは、上述のようなエピタキシャル層における真の内部応力の値を算出した。 The true internal stress is present from the initial stage of growth, and the true internal stress in the grown GaN epitaxial layer is 0.2 × 10 ^{9 to} 2.0 × 10 ⁹ dyn / cm as a result of measurement. It was found to be about ² . Here, the Stoney formula used to calculate the true internal stress will be described. In a wafer in which a thin film is formed on a substrate, the internal stress σ is expressed by the following formula (1):

[In formula (1), σ is internal stress, E is rigidity, ν is Poisson's ratio, b is the thickness of the substrate, d is the thickness of the thin film, I is the diameter of the substrate, and δ is the deflection of the wafer. ]
Given by. In the case of a GaN single crystal, d = b and the following formula (2):

[In formula (2), the symbols indicate the same as in formula (1). ]
It becomes. Based on this mathematical formula (2), the present inventors calculated the value of the true internal stress in the epitaxial layer as described above.

  If there is an internal stress such as a true internal stress or a thermal stress, the substrate is warped or cracks occur, and a large-area, high-quality GaN single crystal substrate cannot be obtained. Therefore, the present inventors have sought the cause of the occurrence of true internal stress. The cause of the real internal stress reached as a result is as follows. That is, the GaN epitaxial layer generally has a hexagonal columnar crystal, and a grain boundary having a slight inclination exists at the interface between the columnar grains, and an atomic arrangement mismatch is observed. Furthermore, many dislocations exist in the GaN epitaxial layer. These grain boundaries and dislocations cause volume shrinkage of the GaN epitaxial layer through the growth and disappearance of defects, which is a cause of the generation of true internal stress.

  The embodiments of the invention completed based on the cause of the occurrence of the true internal stress are the GaN single crystal substrate and the manufacturing method thereof according to the third to seventh embodiments.

  Hereinafter, a GaN single crystal substrate and a manufacturing method thereof according to the third embodiment will be described with reference to manufacturing process diagrams of FIGS. 8A to 8D.

In the first step shown in FIG. 8A, the buffer layer 4 made of GaN and the first epitaxial layer (lower epitaxial layer) 6 made of GaN are grown on the GaAs substrate 2 by the same method as in the first embodiment. Next, in a second step shown in FIG. 8B, a mask layer 28 made of SiN or SiO ₂ is formed on the first epitaxial layer 6. The present embodiment is different from the first embodiment in the shape of the mask layer 28.

  Here, the shape of the mask layer 28 will be described with reference to FIG. As shown in FIG. 9, in this embodiment, a plurality of square opening windows 30 are formed in the mask layer 28. Then, the opening windows 10 are arranged with a pitch L in the <10-10> direction of the first epitaxial layer 6 to form a <10-10> window group 32. The <10-10> window group 32 is 1 in the <10-10> direction with respect to the center position of each opening window 10 of the <10-10> window group 32 where the center positions of the opening windows 10 are adjacent to each other. A plurality of the first epitaxial layers 6 are juxtaposed in the <1-210> direction at a pitch d while being shifted by / 2L. The center position of each opening window 30 here means the position of the center of gravity of each opening window 30. Each opening window 30 is a square having a side length of 2 μm, a pitch L of 6 μm, and a pitch d of 5 μm.

  Next, in the third step shown in FIG. 8C, the second epitaxial layer 34 is grown on the mask layer 28 by the same method as in the first embodiment.

  Here, the growth process of the second epitaxial layer 34 will be described with reference to FIGS. 10A and 10B. FIG. 10A shows an initial growth stage of the second epitaxial layer 34. As shown in this figure, at the initial stage of growth, GaN crystal grains 36 of regular hexagonal pyramids or regular hexagonal pyramids grow from each opening window 30. 10B, when the GaN crystal grains 36 are laterally grown on the mask layer 28, each GaN crystal grain 36 has a gap (pit) between other GaN crystal grains 36. Connect without providing. Then, each GaN crystal grain 36 covers the mask layer 28, and a second epitaxial layer 34 having a mirror-like surface is formed.

  That is, a plurality of <10-10> window groups 32 are juxtaposed in the <1-210> direction while shifting the center of each opening window 30 by ½ L in the <10-10> direction. The GaN crystal grains 36 grow with almost no gap, and as a result, the true internal stress is greatly reduced.

  Similarly to the first embodiment, in the region corresponding to the upper portion of the mask layer 28 of the mask layer 28 of the second epitaxial layer 34, almost no dislocation occurs due to the lateral growth effect of the GaN crystal grains 36.

  After the second epitaxial layer 34 is grown, the process proceeds to a fourth step shown in FIG. 8D, where the GaAs substrate 2 is removed by etching or the like, and the GaN single crystal substrate 35 of this embodiment is completed.

In the present embodiment, as described above, the shape of each opening window 30 of the mask layer 28 is a square having a side of 2 μm. However, the shape and size of the opening window 30 of the mask layer 28 are not limited to this, and the growth conditions, etc. It is desirable to adjust appropriately according to. For example, it can be a square having a side of 1 to 5 μm and a diameter of 1 to 5 μm. Furthermore, the shape of each window 10 is not limited to a square shape and a circular shape, and may be an elliptical shape and a polygonal shape. In this case, the area of each opening window 30, it is desirable to 0.7μm ² ~50μm ^2. If the area of each opening window 30 is made larger than this range, defects frequently occur in the epitaxial layer 34 in each opening window 30 and the internal stress tends to increase. On the other hand, if the area of each opening window 30 is made smaller than this range, formation of each opening window 30 becomes difficult, and the growth rate of the epitaxial layer 34 tends to decrease. Further, the total area of each opening window 30 is desirably 10 to 50% of the total area of all the opening windows 30 and the mask portion of the mask layer 28. When the total area of each opening window 30 is within this range, the defect density and internal stress of the GaN single crystal substrate can be significantly reduced.

  In this embodiment, the pitch L is 6 μm and the pitch d is 5 μm. However, the lengths of the pitch L and the pitch d are not limited to this. The pitch L is desirably in the range of 3 to 10 μm. If the pitch L is longer than 10 μm, the time until the GaN crystal grains 36 are connected increases, and a great amount of time is spent growing the second epitaxial layer 34. On the other hand, if the pitch L is shorter than 3 μm, the distance over which the crystal grains 36 grow laterally becomes short, and the effect of lateral growth becomes small. For the same reason, the pitch d is preferably in the range of 0.75L ≦ d ≦ 1.3L. In particular, when d = 0.87 L, that is, the two opening windows 30 adjacent to each other in the <10-10> direction and the two opening windows 34 exist in the <1-210> direction, and the two opening windows When an equilateral triangle is formed by connecting one opening window 30 having the shortest distance to 34, crystal grains are arranged without gaps on the entire surface, and the number of pits generated in the epitaxial layer 34 is minimized, and the defect density of the GaN single crystal substrate and Internal stress can be minimized.

  Further, the distance that each opening window 30 of the <10-10> window group 32 is shifted in the <10-10> direction from each opening window 30 of the adjacent <10-10> window group 32 is not necessarily 1 /. It is not necessary to be 2L, and if it is about 2 / 5L to 3 / 5L, internal stress can be reduced.

The thickness of the mask layer 28 is desirably in the range of about 0.05 μm to about 0.5 μm. This is because if the mask layer 28 is thicker than this range, cracks will occur during the growth of GaN, while if it is thinner than this range, the GaAs substrate will be damaged by evaporation during the growth of GaN.

[Fourth Embodiment]
Next, a GaN single crystal substrate and a manufacturing method thereof according to the fourth embodiment will be described with reference to manufacturing process diagrams of FIGS. 11A to 11D. The present embodiment is the same as the second embodiment except for the shape of the mask layer.

First, in a first step shown in FIG. 11A, a mask layer 38 made of SiN or SiO ₂ is formed directly on the GaAs substrate 2. The mask layer 38 is formed by forming a SiN film or SiO ₂ film having a thickness of about 100 nm to about 500 nm by plasma CVD or the like, and patterning the SiN film or SiO ₂ film by a photolithography technique.

  FIG. 12 is a plan view of the wafer in the first step shown in FIG. 11A. As shown in FIG. 12, the shape of the mask layer 38 of the present embodiment is the same as that of the mask layer 28 of the third embodiment. A plurality of aperture windows 40 are formed in the mask layer 38. The opening windows 40 are arranged at a pitch L in the <11-2> direction of the GaAs substrate 2 to form a <11-2> window group 42. The <11-2> window group 42 is 1 in the <11-2> direction with respect to the center position of each opening window 40 of the <11-2> window group 42 where the center positions of the opening windows 40 are adjacent to each other. A plurality of lines are arranged in parallel in the <1-10> direction of the GaAs substrate 2 with a pitch d while shifting by / 2L. The mask layer 38 of the present embodiment is different from the mask layer 28 of the third embodiment only in the arrangement direction of such opening windows.

  After the mask layer 38 is formed, the buffer layer 24 is formed on the GaAs substrate 2 in the opening window 40 in the second step shown in FIG. 11B.

  Next, an epitaxial layer 26 made of GaN is grown on the buffer layer 24 in a third step shown in FIG. 11C.

  Also in the present embodiment, as in the third embodiment, GaN crystal grains having a regular hexagonal truncated pyramid grow from each opening window 40 in the initial stage of growth. When the GaN crystal grains are laterally grown on the mask layer 38, each GaN crystal grain is connected without providing a gap (pit) between the other GaN crystal grains. Each GaN crystal grain covers the mask layer 38, and the epitaxial layer 26 having a mirror-like surface is formed.

  That is, a plurality of <11-2> window groups 42 are juxtaposed in the <1-10> direction while shifting the center of each opening window 40 by ½ L in the <11-2> direction of the GaAs substrate 2. Regular hexagonal frustum GaN grains grow with almost no gaps, resulting in a significant reduction in true internal stress

  Each opening window 40 does not necessarily have to extend in the <11-2> direction of the GaAs substrate 2, and may be formed to extend in the <1-10> direction of the GaAs substrate 2, for example. .

  After the epitaxial layer 26 is grown, the process proceeds to a fourth step shown in FIG. 11D, and the GaAs substrate 2 is removed to complete the GaN single crystal substrate 39 of this embodiment. In addition, when the surface and the back surface of the GaN single crystal substrate 39 are rough, the surface and the back surface may be polished.

As described above, according to the method for manufacturing a GaN single crystal substrate of this embodiment, it is possible to manufacture a GaN substrate with significantly reduced crystal defects by growing the epitaxial layer only once, thereby reducing costs. be able to.

[Fifth Embodiment]
A GaN single crystal substrate and a manufacturing method thereof according to the fifth embodiment will be described with reference to FIGS. 13A to 13E.

  First, in the first step shown in FIG. 13A, a mask layer 38 having a thickness of preferably about 100 nm to about 500 nm is formed on the GaAs substrate 2 as in the fourth embodiment.

  Next, in a second step shown in FIG. 13B, a buffer layer 24 having a thickness of preferably about 500 nm to about 1200 nm is formed on the GaAs substrate 2 in the opening window 40.

  Next, in the third step shown in FIG. 13C, the first epitaxial layer 44 made of GaN is grown on the buffer layer 24 and the mask layer 38. The thickness of the first epitaxial layer 44 is preferably in the range of about 50 μm to about 300 μm. Also in the present embodiment, as in the third embodiment and the fourth embodiment, the GaN crystal grains grown from each opening window 40 are connected without providing a gap (pit) between other GaN crystal grains, The mask layer 38 is embedded.

  In the fourth step shown in FIG. 13D, the GaAs substrate 2 is completely removed by placing the wafer on which the first epitaxial layer 44 is formed in an etching apparatus and etching it with aqua regia for about 10 hours. In this manner, a thin GaN single crystal substrate having a thickness of about 50 μm to about 300 μm is once formed.

  In the fifth step shown in FIG. 13E, the second epitaxial layer 46 made of GaN is formed on the first epitaxial layer 44 by the above-described HVPE method, metal organic chloride vapor phase growth method, MOCVD method or the like. Growing about 100 μm to about 700 μm. Thereby, a GaN single crystal substrate 47 having a thickness of about 150 μm to about 1000 μm is formed.

  As described above, in this embodiment, since the GaAs substrate 2 is removed before the second epitaxial layer 46 is grown, the difference in thermal expansion coefficient between the GaAs substrate 2, the buffer layer 24, and the epitaxial layers 44 and 46. It is possible to prevent the occurrence of thermal stress due to the above. For this reason, a high-quality GaN single crystal substrate with less warpage and cracks can be produced as compared with the case where the epitaxial layer is grown to the end without removing the GaAs substrate 2 in the middle.

  Note that, as described above, the thickness of the first epitaxial layer 44 is set to about 300 μm or less because the influence of thermal stress increases if the first epitaxial layer 44 is too thick. On the other hand, the thickness of the first epitaxial layer 44 is set to about 50 μm or more because if the first epitaxial layer 44 is too thin, mechanical strength is weak and handling is difficult.

Although the case where the mask layer of the fourth embodiment is used as the mask layer has been described here, a mask layer having a stripe window as in the second embodiment may be used for the mask layer of the present embodiment. Furthermore, when the surface and the back surface of the GaN single crystal substrate 47 are rough, the surface and the back surface may be polished.

[Sixth Embodiment]
Next, a GaN single crystal substrate and a manufacturing method thereof according to the sixth embodiment will be described with reference to FIG. The method of forming the buffer layer and the epitaxial layer of this embodiment is the same as that of the third embodiment, and only the shape of the opening window of the mask layer is different from that of the third embodiment.

  FIG. 14 is a diagram showing the shape and arrangement of each opening window of the mask layer 48 used in the present embodiment. As shown in the figure, each opening window is formed in a rectangular shape (strip shape), and a rectangular window 50 whose longitudinal direction is the <10-10> direction of the first epitaxial layer 6 which is a layer immediately below the mask layer 48; It has become. The rectangular windows 50 are arranged at a pitch L in the <10-10> direction of the first epitaxial layer 6 to form a <10-10> rectangular window group 52. The <10-10> rectangular window group 52 is shifted from the adjacent <10-10> rectangular window group 52 by shifting the center position of each rectangular window 50 in the <10-10> direction by ½ L. A plurality of the epitaxial layers 6 are arranged in parallel in the <1-210> direction at a pitch d.

  The pitch L is such that when the length of the rectangular window 50 in the longitudinal direction is long, a region where the second epitaxial layer does not laterally grow in the <10-10> direction becomes wide, and internal stress is hardly reduced. In view of the above, it is desirable that the thickness be in the range of about 4 to 20 μm. The length of the mask between the rectangular windows 50 adjacent to each other in the longitudinal direction, that is, the <10-10> direction is preferably about 1 μm to about 4 μm. This is because the growth of GaN in the <10-10> direction is slow, and if the mask length is too long, it takes a long time to form the second epitaxial layer.

  The mask width (dw) between the rectangular window groups 52 adjacent to each other in the <1-210> direction of the first epitaxial layer 6 is preferably about 2 μm to about 10 μm. If the mask width (dw) is too wide, it takes time for the hexagonal columnar crystal grains to be continuous. On the other hand, if the mask width (dw) is too narrow, the effect of lateral growth cannot be obtained. This is because crystal defects are hardly reduced. Further, the width w of each rectangular window 50 is preferably about 1 μm to about 5 μm. This is because if the width w is excessively wide, defects tend to occur frequently in the GaN layer in each rectangular window 50. On the other hand, if the width w is excessively small, it becomes difficult to form the rectangular windows 50. This is because the growth rate of the epitaxial layer tends to decrease.

  After the mask layer 48 is formed, the second epitaxial layer 12 made of GaN is grown on the mask layer 48 as in the third embodiment. In the present embodiment, the second epitaxial layer 12 is also grown. In the initial growth stage, regular hexagonal pyramid GaN crystal grains grow from each rectangular window 50. When the GaN crystal grains are laterally grown on the mask layer 48, each GaN crystal grain is connected without providing a gap (pit) between the other GaN crystal grains, and the mask layer 48 is embedded. It becomes.

  That is, the center position of each rectangular window 50 is shifted by ½ L in the <10-10> direction of the first epitaxial layer 6 while the <10-10> rectangular window group 52 is moved to the <1--10> direction of the first epitaxial layer 6. Since a plurality of GaN crystal grains arranged in parallel to the 210> direction grow without generating pits, it is possible to reduce crystal defects and reduce true internal stress.

  Similarly to the third embodiment, in the region corresponding to the upper portion of the mask portion 48 of the mask layer 48 of the second epitaxial layer, almost no dislocation occurs due to the lateral growth effect of the GaN crystal grains.

  Furthermore, since each rectangular window 50 is formed so that the longitudinal direction of each rectangular window 50 coincides with the <10-10> direction of the first epitaxial layer 6, the second epitaxial layer grown on the mask layer 48 is formed. The growth rate of the layer can be increased. This is because an {1-211} plane having a high growth rate appears in the early stage of GaN growth, the growth rate in the <1-210> direction increases, and an island-like GaN crystal formed in each rectangular window 50 This is because the time until the grains form a continuous film is shortened.

Unlike this embodiment, even if the mask layer 48 is formed directly on the GaAs substrate 2 without using the first epitaxial layer 6, the growth rate of the second epitaxial layer formed on the mask layer 48 is increased. Can be improved. In this case, the rectangular window 50 is preferably formed so that the longitudinal direction thereof coincides with the <11-2> direction of the GaAs substrate 2 under the mask layer 48.

[Seventh Embodiment]
Next, a GaN single crystal substrate and a method for manufacturing the same according to the seventh embodiment will be described with reference to FIG. This embodiment is characterized by the shape of the mask layer window. The buffer layer and the epitaxial layer are formed in the same manner as in the above embodiments.

  As shown in FIG. 15, in this embodiment, each opening window of the mask layer 58 is a hexagonal window 60 formed in a regular hexagonal ring shape. The six sides of the hexagonal window 60 are formed so as to coincide with the <10-10> direction of the epitaxial layer below the mask layer 58. By forming each side of the hexagonal window 60 in this direction, the growth rate of the epitaxial layer formed on the mask layer 58 can be increased. This is because the {1-211} plane having a high growth rate grows in the <1-210> direction in the early stage of GaN growth. The hexagonal window 60 preferably has a window width a of about 2 μm, an outer regular hexagonal side length b of about 5 μm, and a mask width w between adjacent hexagonal windows 60 of about 3 μm. However, these values are not limited to this range. Further, the arrow in FIG. 15 indicates the crystal orientation of the epitaxial layer below the mask layer 58.

  After the epitaxial layer is grown on the mask layer 58, the GaAs substrate is completely removed by etching the wafer. Further, the removal surface of the GaAs substrate is polished to form the GaN single crystal substrate of this embodiment.

  In the GaN single crystal substrate of this embodiment as well, in the region corresponding to the upper part of the mask portion of the epitaxial layer on the mask layer, dislocations hardly occur due to the lateral growth effect of the GaN crystal grains.

Unlike this embodiment, even if the mask layer 58 is formed directly on the GaAs substrate without passing through the epitaxial layer, the growth rate of the epitaxial layer formed on the mask can be improved. In this case, the six sides of the hexagonal window 42 are formed so as to coincide with the <11-2> direction of the GaAs substrate.

[Eighth Embodiment]
Next, a GaN single crystal substrate and a manufacturing method thereof according to the eighth embodiment will be described with reference to FIGS. 16A to 16F.

  The formation of the mask layer 8 in the first step shown in FIG. 16A, the formation of the buffer layer 24 in the second step shown in FIG. 16B, the growth of the epitaxial layer 26 in the third step shown in FIG. 16C, the first shown in FIG. Since the removal of the GaAs substrate 2 in the process 4 is performed in the same manner as in the second embodiment, the description thereof is omitted. The thickness of the GaN single crystal substrate from which the GaAs substrate 2 has been removed is preferably about 50 μm to about 300 μm or more, as in the second embodiment.

In a fifth step shown in FIG. 16E, an GaN single crystal ingot 64 is formed by growing an epitaxial layer 62 made of GaN on the epitaxial layer 26 using the GaN single crystal shown in FIG. 16D as a seed crystal. As a method for growing the epitaxial layer 62, there are an HVPE method, an organic metal chloride vapor phase growth method, an MOCVD method, and the like as in the above embodiments, but in this embodiment, in addition to this, a sublimation method is adopted. May be. The sublimation method is a growth method performed using a growth apparatus 90 as shown in FIG. 22, and more specifically, in a reaction furnace 94 in which a GaN powder 92 as a raw material and the substrate 2 are installed facing each other, It poured NH ₃ gas or the like in a high temperature, thereby while traveling evaporation diffusion of GaN powder poured NH ₃ gas, a vapor phase growth method for growing a GaN on the substrate 2. This sublimation method is difficult to delicately control, but is suitable for thickening an epitaxial layer, that is, for producing an ingot. In this embodiment, the temperature of the reaction furnace is set to about 1000 ° C. to about 1300 ° C., nitrogen is used as a carrier gas, and ammonia is flowed in from about 10 sccm to about 100 sccm.

  Next, in a sixth step shown in FIG. 16F, the GaN single crystal ingot 64 is made into a plurality of GaN single crystal substrates 66. As a method of making the ingot 64 into a plurality of GaN single crystal substrates, there are a method of cutting the ingot 64 with a slicer or the like of an inner peripheral tooth and a method of cleaving the ingot 64 along the cleavage plane of the GaN single crystal. Note that both cutting processing and cleavage processing may be used.

  As described above, according to this embodiment, since a GaN single crystal ingot is cut or cleaved into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained with a simple operation. That is, mass productivity can be improved as compared with the above embodiments.

  The height of the ingot 64 is preferably about 1 cm or more. This is because if the ingot 64 is too lower than 1 cm, there is no mass production effect.

  Moreover, the manufacturing method of this embodiment forms the ingot 64 based on the GaN single-crystal substrate which passed through the manufacturing process of 2nd Embodiment shown to FIG. 6A to FIG. 6D, but this embodiment is this method. It is not limited to. In addition, the ingot 64 may be formed based on the GaN single crystal substrate that has undergone the manufacturing steps of the first to seventh embodiments.

In addition, the GaN single crystal substrate 66 of this embodiment has an n-type carrier concentration of 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ and an electron mobility of 60 cm ² without intentional doping. Experiments have revealed that the specific resistance can be controlled within a range of ˜800 cm ² and a specific resistance within a range of 1 × 10 ⁻⁴ Ωcm to 1 × 10 Ωcm.

[Ninth Embodiment]
Next, a GaN single crystal substrate and a method for manufacturing the same according to the ninth embodiment will be described with reference to FIGS.

  In the first step shown in FIG. 17A, the mask layer 8 and the buffer layer 24 are formed on the GaAs substrate 2. The formation method of the mask layer 8 and the buffer layer 24 is the same as that of each said embodiment.

  Next, in the second step shown in FIG. 17B, the ingot 70 is formed by growing the epitaxial layer 68 made of GaN all at once. The growth method of the epitaxial layer 68 is the same as the growth method of the epitaxial layer 62 of the eighth embodiment. The height of the ingot 70 is preferably about 1 cm or more.

  In the third step shown in FIG. 17C, a GaN single crystal ingot 70 is made into a plurality of GaN single crystal substrates 72 by cutting or cleaving, as in the sixth step of the eighth embodiment.

  As described above, according to this embodiment, since a GaN single crystal ingot is cut or cleaved into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained with a simple operation. That is, mass productivity can be improved as compared with the first to seventh embodiments. Further, since the growth of the GaN epitaxial layer is performed only once, the manufacturing process can be simplified and the cost can be reduced as compared with the eighth embodiment.

The GaN single crystal substrate 72 of the present embodiment is also n-type and has a carrier concentration of 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 without intentional doping, like the GaN single crystal substrate 66 of the eighth embodiment. in the range of ²⁰ cm ^-3, found electron mobility in the range of 60cm ² ~800cm ^2, the specific resistance of 1 × ^{10 -4} Ωcm~1 × it experiments be controlled to within 10Ωcm did.

[Tenth embodiment]
A GaN single crystal substrate and a manufacturing method thereof according to the tenth embodiment will be described with reference to FIGS. 18A to 18B.

  First, in the first step shown in FIG. 18A, an epitaxial layer 74 is grown on the GaN single crystal substrate 66 manufactured in the eighth embodiment to form a GaN single crystal ingot 76. As the growth method of the epitaxial layer 74, the HVPE method, the organic metal chloride vapor phase growth method, the MOCVD method, the sublimation method, and the like can be used as in the above embodiments.

  Next, in the second step shown in FIG. 18B, a GaN single crystal ingot 76 is made into a plurality of GaN single crystal substrates 78 by cutting or cleaving. Thereby, the GaN single crystal substrate 78 of this embodiment is obtained.

As described above, in this embodiment, since an ingot is produced based on an already manufactured GaN single crystal substrate, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained with a simple operation. In the present embodiment, the ingot is manufactured using the GaN single crystal substrate 66 manufactured in the eighth embodiment as a seed crystal, but the seed crystal of the ingot is not limited to this. For example, the GaN single crystal substrate 72 of the ninth embodiment can be used as a seed crystal.

[Eleventh embodiment]
A GaN single crystal substrate and a manufacturing method thereof according to the eleventh embodiment will be described with reference to FIGS. 19A to 19C.

  First, in a first step shown in FIG. 19A, a buffer layer 79 having a thickness of about 50 nm to about 120 nm is formed on the GaAs substrate 2.

  Next, in the second step shown in FIG. 19B, an epitaxial layer 81 made of GaN is grown on the buffer layer 79 without forming a mask layer, and a GaN single crystal ingot 83 having a height of about 1 cm or more is formed. Form. In order to grow the epitaxial layer 81, an HVPE method, an organic metal chloride vapor phase growth method, an MOCVD method, a sublimation method, or the like can be used. Here, since the mask layer is not formed in this embodiment, lateral growth of the epitaxial layer does not occur and crystal defects are not small, but dislocation can be reduced by increasing the thickness of the epitaxial layer.

  Finally, in the third step shown in FIG. 19C, a GaN single crystal ingot 83 is made into a plurality of GaN single crystal substrates 85 by cutting or cleaving.

As described above, according to this embodiment, since a GaN single crystal ingot is cut or cleaved into a plurality of sheets, a plurality of GaN single crystal substrates with reduced crystal defects can be obtained with a simple operation. That is, mass productivity can be improved as compared with the first to seventh embodiments.

[Light emitting device and electronic device]
Since the GaN single crystal substrate manufactured according to each of the above embodiments is n-type and has conductivity, a GaN-based layer including an InGaN active layer is epitaxially grown thereon by MOCVD or the like to emit light from a light-emitting diode or the like. Electronic devices such as devices and field effect transistors (MESFETs) can be formed. Since these light-emitting devices are manufactured using high-quality GaN substrates with few crystal defects manufactured in the above embodiments, the characteristics are significantly improved compared to light-emitting devices using sapphire substrates. To do. In addition, the (0001) plane of the epitaxial layer grown on the GaN single crystal substrate is homoepitaxially grown parallel to the (0001) plane of the GaN single crystal substrate, and the cleavage planes coincide with each other. Has performance.

FIG. 20 is a view showing a light emitting diode 80 using the GaN single crystal substrate 35 obtained in the third embodiment. The light emitting diode 80 includes a GaN buffer layer 101, a Si-doped n-type GaN barrier layer 102, an undoped In _0.45 Ga _0.55 N well layer 103 having a thickness of 30 angstroms, on a GaN single crystal substrate 35, It has a quantum well structure in which an Mg-doped p-type Al _0.2 Ga _0.8 N barrier layer 104 and an Mg-doped p-type GaN contact layer 105 are grown. The light emitting diode 80 can change the emission color depending on the composition ratio of the undoped InGaN well layer 103. For example, when the In composition ratio is 0.2, blue light emission occurs.

  As a result of investigating the characteristics of the light-emitting diode 80, the light-emitting luminance of the light-emitting diode using the conventional sapphire substrate was 0.5 cd, which was five times that of 2.5 cd.

  In addition, as a board | substrate of this light emitting diode, it is not restricted to the GaN single crystal substrate 35 of 3rd Embodiment, Of course, the GaN single crystal substrate of other embodiment can also be used.

FIG. 21 is a diagram showing a semiconductor laser 82 using the GaN single crystal substrate 35 obtained in the third embodiment. The semiconductor laser 82 includes a GaN buffer layer 111, an n-GaN contact layer 112, an n-In _0.05 Ga _0.95 N cladding layer 113, and an n-Al _0.08 Ga on the GaN single crystal substrate 35. _0.92 N clad layer 114, n-GaN guide layer 115, and MQW layer composed of Si-doped In _0.15 Ga _0.85 N (35 angstrom) / In _0.02 Ga _0.08 N (70 angstrom) multilayer 116, a p-Al _0.2 Ga _0.8 N inner cladding layer 117, a p-GaN guide layer 118, a p-Al _0.08 Ga _0.92 N cladding 119 layer, and a p-GaN contact layer 120. And the electrodes are taken from the upper and lower surfaces.

  With this semiconductor laser 82, the oscillation life, which was about several minutes in the past, has exceeded 100 hours, and a significant improvement in characteristics has been realized. Specifically, the oscillation lifetime, which was conventionally about 1.5 minutes, increased to about 120 hours.

  The semiconductor laser is not limited to the GaN single crystal substrate 35 of the third embodiment, and GaN single crystal substrates of other embodiments can naturally be used.

Further, although not shown, a field effect transistor (MESFET) was manufactured based on the GaN single crystal substrate of the present embodiment. As a result of examining the characteristics of this field effect transistor, a high mutual conductance (gm) of 43 mS / mm was obtained even at a high temperature of 500 ° C., and the GaN single crystal substrate of this embodiment is also effective as a substrate for electronic devices. I found out.

Example 1
Example 1 which is an example of the GaN single crystal substrate of the first embodiment and the manufacturing method thereof will be described with reference to FIGS. 1A to 1D.

  As the GaAs substrate 2, a GaAs (111) A substrate in which the GaAs (111) surface is a Ga surface was used. Further, the buffer layer 4, the first epitaxial layer 6, and the second epitaxial layer 12 were all formed by a metal organic chloride vapor phase growth method using the vapor phase growth apparatus shown in FIG.

First, in the first step shown in FIG. 1A, the buffer layer 4 was formed by an organic metal chloride vapor phase growth method. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 500 ° C., trimethylgallium (TMG) has a partial pressure of 6 × 10 ⁻⁴ atm, hydrogen chloride has a partial pressure of 6 × 10 ⁻⁴ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.13 atm. Then, the thickness of the buffer layer 4 was set to about 800 angstroms.

Next, the first epitaxial layer 6 was grown on the buffer layer 4 by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 970 ° C., trimethylgallium (TMG) has a partial pressure of 2 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 2 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.2 atm. Then, the thickness of the first epitaxial layer 6 was set to about 4 μm at a growth rate of about 15 μm / hr.

Next, in a second step shown in FIG. 1B, a mask layer 8 made of SiO ₂ was formed on the first epitaxial layer 6. At this time, the longitudinal direction of the stripe window 10 is directed to [10-10] of the first epitaxial layer 6, the thickness of the mask layer 8 is about 300 nm, the width P of the mask portion is about 5 μm, and the window width Q is about 2 μm. It was.

Next, in the third step shown in FIG. 1C, the second epitaxial layer 12 was grown by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 970 ° C., trimethylgallium (TMG) has a partial pressure of 2 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 2 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.25 atm. Then, the thickness of the second epitaxial layer 12 was set to about 100 μm at a growth rate of about 20 μm / hr.

  Next, in the fourth step shown in FIG. 1D, the wafer was placed in an etching apparatus, and the GaAs substrate 2 was completely removed by wet etching with an ammonia-based etchant for about 1 hour. Finally, the removal surface of the GaAs substrate 2 was polished to complete the GaN single crystal substrate 13.

Various characteristics of the GaN single crystal substrate manufactured according to this example were as follows. That is, this GaN single crystal substrate has a (0001) plane substrate surface, the crystallinity is X-ray half width of 4.5 minutes by X-ray analysis, and the dislocation density is 10 ⁷ (cm ^-2 ). Thus, it was found that the crystal defects were greatly reduced as compared with the defect density when the GaN epitaxial layer was formed on the conventional sapphire substrate was 10 ⁹ (cm ⁻² ) per unit area.

Example 2
Next, Example 2, which is another example of the first embodiment, will be described with reference to FIGS. 1A to 1D.

  As the GaAs substrate 2, a GaAs (111) A substrate was used. The buffer layer 4, the first epitaxial layer 6, and the second epitaxial layer 12 were all formed by the HVPE method using the vapor phase growth apparatus shown in FIG.

First, in the first step shown in FIG. 1A, the buffer layer 4 was formed by the HVPE method. At this time, the resistance heater 61 raises the temperature of the GaAs substrate 2 to about 500 ° C., and introduces hydrogen chloride into the reaction chamber 59 at a partial pressure of 5 × 10 ⁻³ atm and ammonia at a partial pressure of 0.1 atm. did. Then, the thickness of the buffer layer 4 was set to about 800 angstroms.

Next, the first epitaxial layer 6 was grown on the buffer layer 4 by the HVPE method. At this time, the resistance heater 61 raises the temperature of the GaAs substrate 2 to about 970 ° C., and introduces hydrogen chloride into the reaction chamber 79 at a partial pressure of 2 × 10 ⁻² atm and ammonia at a partial pressure of 0.25 atm. did. Then, the growth rate was set to about 80 μm / hr, and the thickness of the first epitaxial layer 6 was set to about 4 μm.

  Next, a mask layer 8 was formed on the first epitaxial layer 6 in the second step shown in FIG. 1B. At this time, the longitudinal direction of the stripe window 10 is directed to [10-10] of the first epitaxial layer 6, the thickness of the mask layer 8 is about 300 nm, the width P of the mask portion is about 5 μm, and the window width Q is about 2 μm. It was.

Next, in the third step shown in FIG. 1C, the second epitaxial layer 12 was grown by the HVPE method. At this time, the temperature of the GaAs substrate 2 is raised to about 970 ° C. by the resistance heater 61, hydrogen chloride is divided into 2.5 × 10 ⁻² atm, and ammonia is divided into 0.25 atm in the reaction chamber 79. Introduced. Then, the growth rate was set to about 100 μm / hr, and the thickness of the second epitaxial layer 12 was set to about 100 μm. Thus, in this example, since the HVPE method was used, the growth rate of the epitaxial layer could be increased as compared with Example 1 using the organometallic chloride vapor phase growth method.

  Next, in the fourth step shown in FIG. 1D, the wafer was placed in an etching apparatus, and the GaAs substrate 2 was completely removed by wet etching with an ammonia-based etchant for about 1 hour. Finally, the removal surface of the GaAs substrate 2 was polished to complete the GaN single crystal substrate 13.

Various characteristics of the GaN single crystal substrate manufactured according to this example were as follows. That is, this GaN single crystal substrate has a (0001) plane, its crystallinity is X-ray half width of 4.5 minutes by X-ray analysis, and the dislocation density is 5 × 10 ⁷ per unit area. It was about (cm ⁻² ). Thus, it was found that the crystal defects were greatly reduced as compared with the defect density when the GaN epitaxial layer was formed on the conventional sapphire substrate was 10 ⁹ (cm ⁻² ) per unit area.

Example 3
Next, Example 3 which is an example of the second embodiment will be described with reference to FIGS. 6A to 6D.

  As the GaAs substrate 2, a GaAs (111) B substrate having a GaAs (111) surface as an As surface was used. Further, both the buffer layer 24 and the second epitaxial layer 26 were formed by a metal organic chloride vapor phase growth method using the vapor phase growth apparatus shown in FIG.

  First, the mask layer 8 was formed on the GaAs substrate 2 in the first step shown in FIG. 6A. At this time, the longitudinal direction of the stripe window 10 was directed to [11-2] of the GaAs substrate 2, the thickness of the mask layer 8 was about 350 nm, the width P of the mask portion was about 4 μm, and the window width Q was about 2 μm.

Next, in the second step shown in FIG. 6B, a buffer layer 24 was formed on the GaAs substrate 2 in the stripe window 10 by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 500 ° C., trimethylgallium (TMG) has a partial pressure of 6 × 10 ⁻⁴ atm, hydrogen chloride has a partial pressure of 6 × 10 ⁻⁴ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.1 atm. The thickness of the buffer layer 24 was about 700 angstroms.

Next, in the third step shown in FIG. 6C, the epitaxial layer 26 was grown on the buffer layer 24 by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 820 ° C., trimethylgallium (TMG) has a partial pressure of 3 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 3 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.2 atm. Then, the growth rate was set to about 30 μm / hr, and the thickness of the epitaxial layer 26 was set to about 100 μm.

  Next, in the fourth step shown in FIG. 6D, the wafer was placed in an etching apparatus, and the GaAs substrate 2 was completely removed by wet etching the GaAs substrate 2 with an ammonia-based etchant for about 1 hour. Finally, the removal surface of the GaAs substrate 2 is polished to complete the GaN single crystal substrate 27.

The dislocation density of the GaN single crystal substrate manufactured according to this example was about 2 × 10 ⁷ (cm ⁻² ) per unit area. That is, the GaN single crystal substrate manufactured according to this example had a higher dislocation density than the GaN single crystal substrates of Example 1 and Example 2, but compared with the case where a GaN epitaxial layer was formed on a conventional sapphire substrate. It was also found that crystal defects were greatly reduced. Further, in this example, since the number of manufacturing steps was smaller than those in Example 1 and Example 2, cost reduction could be achieved.

Example 4
Next, Example 4 which is an example of the third embodiment will be described with reference to FIGS. 8A to 8D.

  As the GaAs substrate 2, a GaAs (111) A substrate was used. Further, the buffer layer 4, the first epitaxial layer 6, and the second epitaxial layer 34 were all formed by a metal organic chloride vapor phase growth method using the vapor phase growth apparatus shown in FIG.

First, in the first step shown in FIG. 8A, the buffer layer 4 was formed by an organic metal chloride vapor phase growth method. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 500 ° C., trimethylgallium (TMG) has a partial pressure of 6 × 10 ⁻⁴ atm, hydrogen chloride has a partial pressure of 6 × 10 ⁻⁴ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.1 atm. Then, the thickness of the buffer layer 4 was set to about 700 angstroms.

Next, the first epitaxial layer 6 was grown on the buffer layer 4 by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 970 ° C., trimethylgallium (TMG) has a partial pressure of 2 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 2 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.2 atm. Then, the thickness of the first epitaxial layer 6 was set to about 2 μm at a growth rate of about 15 μm / hr.

Next, a mask layer 28 made of SiO ₂ was formed on the first epitaxial layer 6 in the second step shown in FIG. 8B. At this time, the opening window 30 was a square having a side length of 2 μm, the pitch L of the <10-10> window group 32 was 6 μm, and the pitch d was 5 μm. Further, the adjacent <10-10> window groups 32 were shifted by 3 μm in the <10-10> direction.

Next, in the third step shown in FIG. 8C, the second epitaxial layer 34 was grown by metal organic chloride vapor phase epitaxy. At this time, the resistance heater 81 raises the temperature of the GaAs substrate 2 to about 1000 ° C., trimethylgallium (TMG) has a partial pressure of 4 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 4 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 79 at a partial pressure of 0.2 atm. Then, the growth rate was set to about 25 μm / hr, and the thickness of the second epitaxial layer 12 was set to about 100 μm.

  Next, in the fourth step shown in FIG. 8D, the wafer was set in an etching apparatus, and the GaAs substrate 2 was completely removed by etching the GaAs substrate 2 with aqua regia for about 10 hours. Finally, the removal surface of the GaAs substrate 2 was polished to complete the GaN single crystal substrate 35.

Various characteristics of the GaN single crystal substrate manufactured according to this example were as follows. That is, the defect density is about 3 × 10 ⁷ (cm ⁻² ), which is significantly reduced as compared with the conventional case. Also, no cracks were observed. In addition, the curvature radius of the GaN single crystal substrate manufactured by omitting the separate mask layer forming process was about 65 mm. However, the curvature radius of the GaN single crystal substrate of this example is about 770 mm, and the warpage of the GaN single crystal substrate is reduced. It was possible to reduce considerably. Further, the internal stress, which was 0.05 GPa in the past, was reduced to about 0.005 GPa and about 1/10 in the GaN single crystal substrate of this example. The internal stress of the GaN single crystal substrate was calculated by the above Stony equation (Equation (2)). In addition, when the electrical characteristics were calculated by Hall measurement, the n-type carrier concentration was 2 × 10 ¹⁸ cm ⁻³ and the carrier mobility was 180 cm ² / V · S.

Example 5
Next, Example 5 which is an example of the fifth embodiment will be described with reference to FIGS. 13A to 13E.

  As the GaAs substrate 2, a GaAs (111) A substrate was used. The buffer layer 24, the first epitaxial layer 44, and the second epitaxial layer 46 were all formed by the HVPE method using the vapor phase growth apparatus shown in FIG.

  First, a mask layer 38 was formed on the GaAs substrate 2 in the first step shown in FIG. 13A. At this time, the opening window 40 was circular with a diameter of 2 μm, the pitch L of the <11-2> window group was 6 μm, and the pitch d was 5.5 μm. Further, the adjacent <11-2> window groups were shifted by 3 μm in the <11-2> direction.

Next, in the second step shown in FIG. 13B, the buffer layer 24 was formed on the GaAs substrate 2 in the opening window 40 by the HVPE method. At this time, the resistance heater 61 raises the temperature of the GaAs substrate 2 to about 500 ° C., trimethyl gallium (TMG) has a partial pressure of 6 × 10 ⁻⁴ atm, hydrogen chloride has a partial pressure of 6 × 10 ⁻⁴ atm, Ammonia was introduced into the reaction chamber 59 at a partial pressure of 0.1 atm. The thickness of the buffer layer 24 was about 700 angstroms.

Next, in the third step shown in FIG. 13C, the first epitaxial layer 44 was grown on the buffer layer 24 by the HVPE method. At this time, the resistance heater 61 raises the temperature of the GaAs substrate 2 to about 970 ° C., trimethyl gallium (TMG) has a partial pressure of 5 × 10 ⁻³ atm, hydrogen chloride has a partial pressure of 5 × 10 ⁻³ atm, Ammonia was introduced into the reaction chamber 59 at a partial pressure of 0.25 atm. The growth rate was about 25 μm / hr, and the thickness of the first epitaxial layer 44 was about 50 μm.

  Next, in the fourth step shown in FIG. 13D, the wafer was placed in an etching apparatus and etched with aqua regia for about 10 hours to completely remove the GaAs substrate 2. In this way, a thin GaN single crystal substrate having a thickness of about 50 μm was once formed.

Subsequently, in the fifth step shown in FIG. 13E, the partial pressure of hydrogen chloride is 2 × 10 ⁻² atm and the partial pressure of ammonia is 0.2 atm on the first epitaxial layer 44 by HVPE at a growth temperature of 100 ° C. Then, the second epitaxial layer 46 made of GaN was grown to a thickness of about 130 μm at a growth rate of about 100 μm / hr. Thereby, a GaN single crystal substrate 47 having a thickness of about 180 μm was formed.

As a result of the measurement, the defect density on the substrate surface of the GaN single crystal substrate of this example formed as described above was remarkably reduced to about 2 × 10 ⁷ / cm ^2, and no cracks were observed. . It was also found that the warpage of the GaN single crystal substrate can be reduced as compared with the conventional case, and the internal stress is very small as 0.002 GPa.

Example 6
Next, Example 6, which is an example of the eighth embodiment, will be described with reference to FIGS. 16A to 16F.

  In this embodiment, a GaAs (111) A substrate is used as the GaAs substrate 2. The buffer layer 24, the epitaxial layer 26, and the epitaxial layer 62 were all formed by the HVPE method using the vapor phase growth apparatus shown in FIG.

  First, the mask layer 8 was formed on the GaAs substrate 2 in the first step shown in FIG. 16A. At this time, the longitudinal direction of the stripe window 10 was directed to [11-2] of the GaAs substrate 2, the thickness of the mask layer 8 was about 300 nm, the width P of the mask portion was about 5 μm, and the window width Q was about 3 μm.

  Next, in the second step shown in FIG. 16B, the buffer layer 24 was formed on the GaAs substrate 2 in the stripe window 10 by the HVPE method in a state where the temperature of the GaAs substrate 2 was about 500 ° C. The thickness of the buffer layer 24 was about 800 angstroms.

  Next, in the third step shown in FIG. 16C, the epitaxial layer 26 is grown on the buffer layer 24 by the HVPE method with the temperature of the GaAs substrate 2 at about 950 ° C. by the HVPE method.

  Next, in the fourth step shown in FIG. 16D, the GaAs substrate 2 was removed by etching with aqua regia.

  In the fifth step shown in FIG. 16E, in the state where the temperature in the reaction chamber 59 is set to 1020 ° C., the epitaxial layer 62 is further thickened by the HVPE method on the epitaxial layer 26 to form a GaN single crystal ingot 64. . The ingot 64 had a shape in which the central portion of the upper surface was slightly depressed, the height from the bottom to the central portion of the upper surface was about 2 cm, and the outer diameter was about 55 mm.

  Subsequently, in the sixth step shown in FIG. 16F, the ingot 64 was cut with a slicer of inner peripheral teeth, and 20 GaN single crystal substrates 66 having an outer diameter of about 50 mm and a thickness of about 350 μm were obtained. In the GaN single crystal substrate 66, no significant warpage was observed. After the cutting process, the GaN single crystal substrate 66 was subjected to lapping polishing and finish polishing.

  In the above-described Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, 20 substrates were obtained by one manufacturing process. Also, manufacturing costs were reduced to about 65% of implementation. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 66 obtained from the uppermost end of the ingot 64, the carrier concentration was n-type 2 × 10 ¹⁸ cm ⁻³ , the electron mobility was 200 cm ² / Vs, and the ratio The resistance was 0.017 Ωcm.

In addition, as a result of measuring the electrical characteristics of the GaN single crystal substrate 66 obtained from the lowermost end portion of the ingot 64, the carrier concentration is n-type 8 × 10 ¹⁸ cm ⁻³ , the electron mobility is 150 cm ² / Vs, the ratio The resistance was 0.006 Ωcm.

  Therefore, the quality of the intermediate portion of the ingot 64 can be assured to be a value between or in the vicinity of the characteristic, and the labor for carrying out a full inspection can be saved.

When an LED using InGaN as a light emitting layer was fabricated using this GaN single crystal substrate 66, the light emission luminance was improved about 5 times compared with that on a conventional sapphire substrate. The reason why the emission luminance is improved is considered that in the conventional LED, there are many threading dislocations in the active layer, whereas in this embodiment, there are no threading dislocations in the light emitting layer. .

Example 7
Next, Example 7, which is another example of the eighth embodiment, will be described with reference to FIGS. 16A to 16F.

  In this embodiment, a GaAs (111) A substrate is used as the GaAs substrate 2. Moreover, the buffer layer 24, the epitaxial layer 26, and the epitaxial layer 62 were all formed by the metal organic chloride vapor phase growth method using the vapor phase growth apparatus shown in FIG.

  First, the mask layer 8 was formed on the GaAs substrate 2 in the first step shown in FIG. 16A. At this time, the longitudinal direction of the stripe window 10 was directed to [11-2] of the GaAs substrate 2, the thickness of the mask layer 8 was about 500 nm, the width P of the mask portion was about 5 μm, and the window width Q was about 3 μm.

  Next, in the second step shown in FIG. 16B, the buffer layer 24 was formed on the GaAs substrate 2 in the stripe window 10 by the HVPE method with the temperature of the GaAs substrate 2 being about 490 ° C. The thickness of the buffer layer 24 was about 800 angstroms.

  Next, in the third step shown in FIG. 16C, the epitaxial layer 26 is grown by about 25 μm on the buffer layer 24 by metal organic chloride vapor phase epitaxy with the temperature of the GaAs substrate 2 being about 970 ° C. .

  Next, in the fourth step shown in FIG. 16D, the GaAs substrate 2 was removed by etching with aqua regia.

  In the fifth step shown in FIG. 16E, in the state where the temperature in the reaction chamber 79 is 1000 ° C., the epitaxial layer 62 is further thickened by the HVPE method on the epitaxial layer 26 to form a GaN single crystal ingot 64. . The ingot 64 had a shape in which the central part of the upper surface was slightly depressed, the height from the bottom to the central part of the upper surface was about 3 cm, and the outer diameter was about 30 mm.

  Subsequently, in the sixth step shown in FIG. 16F, the ingot 64 was cut with a slicer of inner peripheral teeth, and 25 GaN single crystal substrates 66 having an outer diameter of about 20 to about 30 mm and a thickness of about 400 μm were obtained. In the GaN single crystal substrate 66, no significant warpage was observed. After the cutting process, the GaN single crystal substrate 66 was subjected to lapping polishing and finish polishing.

  In the above-mentioned Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, 25 substrates were obtained by one manufacturing process. Also, manufacturing costs were reduced to about 65% of implementation. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 66 obtained from the middle part of the ingot 64, the carrier concentration was n-type 2 × 10 ¹⁸ cm ⁻³ , the electron mobility was 250 cm ² / Vs, and the specific resistance. Was 0.015 Ωcm.

Example 8
Next, Example 8 which is an example of the ninth embodiment will be described with reference to FIGS. 17A to 17C.

  In this embodiment, a GaAs (111) A substrate is used as the GaAs substrate 2. Both the buffer layer 24 and the epitaxial layer 68 were formed by the HVPE method using the growth apparatus shown in FIG.

  First, the mask layer 8 was formed on the GaAs substrate 2 in the first step shown in FIG. 17A. At this time, the longitudinal direction of the stripe window 10 was directed to [11-2] of the GaAs substrate 2, the thickness of the mask layer 8 was about 250 nm, the width P of the mask portion was about 5 μm, and the window width Q was about 3 μm. Then, after the mask layer 8 was formed, the buffer layer 24 was formed on the GaAs substrate 2 in the stripe window 10 by the HVPE method in a state where the temperature of the GaAs substrate 2 was about 500 ° C. The thickness of the buffer layer 24 was about 900 angstroms.

  Next, in the second step shown in FIG. 17B, an epitaxial layer 68 is grown on the buffer layer 24 by the HVPE method with the temperature of the GaAs substrate 2 being about 1000 ° C., and a GaN single crystal ingot 70 is formed. Formed. The ingot 70 had a shape in which the center part of the upper surface was slightly depressed, and the height from the bottom to the center part of the upper surface was about 1.6 cm.

  Subsequently, in the third step shown in FIG. 17C, the ingot 70 was cut by a slicer having an inner peripheral tooth, and 12 GaN single crystal substrates 72 having a thickness of about 300 μm were obtained. In the GaN single crystal substrate 72, no significant warpage was observed. After the cutting process, the GaN single crystal substrate 72 was lapped and finished.

  In the above-described Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, 12 substrates were obtained by one manufacturing process. Moreover, the manufacturing cost was reduced to about 60% of Example 1. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 72 obtained from the middle part of the ingot 70, the carrier concentration was n-type 1 × 10 ¹⁹ cm ⁻³ , the electron mobility was 100 cm ² / Vs, and the specific resistance. Was 0.005 Ωcm.

Example 9
Next, Example 9 which is an example of the tenth embodiment will be described with reference to FIGS. 18A to 18B.

  First, in the first step shown in FIG. 18A, an epitaxial layer 74 was grown on the GaN single crystal substrate manufactured in Example 6 to form a GaN single crystal ingot 76. At this time, the epitaxial layer 74 was grown by the HVPE method in a state where the temperature of the GaAs substrate 2 was about 1010 ° C. The ingot 76 had a shape in which the central part of the upper surface was slightly depressed, the height from the bottom to the central part of the upper surface was about 2.5 cm, and the outer diameter was about 55 mm.

  Next, in the second step shown in FIG. 18B, the ingot 76 was cut with a slicer of inner peripheral teeth, and 15 GaN single crystal substrates 78 having an outer diameter of about 50 mm and a thickness of about 600 μm were obtained.

  In Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, 15 substrates were obtained by one manufacturing process. Moreover, the manufacturing cost was reduced to about 55% compared with the case where it manufactured by the process similar to Example 1. FIG. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 78 obtained from the middle part of the ingot 76, the carrier concentration was n-type 1 × 10 ¹⁷ cm ⁻³ , the electron mobility was 650 cm ² / Vs, and the specific resistance. Was 0.08 Ωcm.

Example 10
Next, Example 10, which is another example of the tenth embodiment, will be described with reference to FIGS. 18A to 18B.

  First, in the first step shown in FIG. 18A, an epitaxial layer 74 was grown on the GaN single crystal substrate manufactured in Example 7 to form a GaN single crystal ingot 76. At this time, the epitaxial layer 74 was grown with the temperature of the GaAs substrate 2 set to about 1200 ° C. by the sublimation method using the growth apparatus shown in FIG. In addition, the ammonia poured into the reaction vessel was 20 sccm. The ingot 76 was flat as compared with the ingots of Examples 6 to 9, the height from the bottom to the top surface was about 0.9 cm, and the outer diameter was about 35 mm.

  Next, in the second step shown in FIG. 18B, the ingot 76 was cut with a slicer of inner peripheral teeth, and five GaN single crystal substrates 78 having an outer diameter of about 35 mm and a thickness of about 500 μm were obtained.

  In Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, five substrates were obtained by one manufacturing process. Moreover, the manufacturing cost was reduced to about 80% of Example 1. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 78 obtained from the middle part of the ingot 76, the carrier concentration was n-type 1 × 10 ¹⁸ cm ⁻³ , the electron mobility was 200 cm ² / Vs, and the specific resistance. Was 0.03 Ωcm.

Example 11
Next, Example 11 which is an example of the eleventh embodiment will be described with reference to FIGS. 19A to 19C.

  First, in the first step shown in FIG. 19A, a buffer layer 79 made of GaN having a thickness of about 90 nm was formed on the GaAs substrate 2 at about 500 ° C. by the HVPE method. A GaAs (111) B substrate was used as the GaAs substrate.

  Next, in the second step shown in FIG. 19B, an epitaxial layer 81 made of GaN was grown on the buffer layer 79 by the HVPE method to form a GaN single crystal ingot 83. At this time, the epitaxial layer 81 was grown by the HVPE method in a state where the temperature of the GaAs substrate 2 was about 1030 ° C. Further, the ingot 83 had a shape in which the central portion of the upper surface was slightly depressed, and the height from the bottom to the central portion of the upper surface was about 1.2 cm.

  Finally, in the third step shown in FIG. 19C, the ingot 83 was cut with a slicer of inner peripheral teeth, and 10 GaN single crystal substrates 85 having a thickness of about 300 μm were obtained.

  In Examples 1 to 5, only one single crystal substrate can be obtained by one manufacturing process, but in this example, ten substrates were obtained by one manufacturing process. Moreover, the manufacturing cost was reduced to about 70% of Example 1. As described above, in this embodiment, the cost can be greatly reduced, and the manufacturing time per sheet can be shortened.

As a result of measuring the electrical characteristics of the GaN single crystal substrate 78 obtained from the middle part of the ingot 83, the carrier concentration was n-type 1 × 10 ¹⁹ cm ⁻³ , the electron mobility was 100 cm ² / Vs, and the specific resistance. Was 0.005 Ωcm.

  As described above, in the method for manufacturing a GaN single crystal substrate of the present invention, GaN nuclei are formed in each opening window of the mask layer, and the GaN nuclei are gradually formed laterally on the mask layer, that is, the opening window of the mask layer. It grows freely laterally upward without any obstruction toward the upper part of the mask part in which no is formed. Therefore, according to the method for manufacturing a GaN single crystal substrate of the present invention, the GaN single crystal substrate of the present invention in which crystal defects are greatly reduced can be obtained efficiently and reliably.

1A to 1D are views showing first to fourth steps of the method for manufacturing a GaN single crystal substrate according to the first embodiment, respectively. FIG. 2 is a diagram showing a vapor phase growth apparatus used for the HVPE method. FIG. 3 is a view showing a vapor phase growth apparatus used in the organometallic chloride vapor phase growth method. FIG. 4 is a plan view of the mask layer of the first embodiment. FIGS. 5A to 5D are views showing the first to fourth steps of epitaxial growth according to the first embodiment, respectively. 6A to 6D are views showing a first step to a fourth step of the method for manufacturing a GaN single crystal substrate according to the second embodiment, respectively. FIG. 7 is a plan view of the mask layer of the second embodiment. 8A to 8D are views showing the first to fourth steps of the method for manufacturing a GaN single crystal substrate according to the third embodiment, respectively. FIG. 9 is a plan view of the mask layer of the third embodiment. 10A and 10B are views showing a growth process of the second epitaxial layer according to the third embodiment, respectively. 11A to 11D are views showing the first to fourth steps of the method for manufacturing a GaN single crystal substrate according to the fourth embodiment, respectively. FIG. 12 is a plan view of the mask layer of the fourth embodiment. 13A to 13E are views showing the first to fifth steps of the method for manufacturing a GaN single crystal substrate according to the fifth embodiment, respectively. FIG. 14 is a plan view of a mask layer according to the sixth embodiment. FIG. 15 is a plan view of a mask layer according to the seventh embodiment. 16A to 16F are views showing the first to sixth steps of the method for manufacturing a GaN single crystal substrate according to the eighth embodiment, respectively. 17A to 17C are views showing the first to third steps of the method for manufacturing a GaN single crystal substrate according to the ninth embodiment, respectively. 18A and 18B are views showing a first step and a second step of the method for manufacturing a GaN single crystal substrate according to the tenth embodiment, respectively. 19A to 19C are views showing the first to third steps of the method for manufacturing a GaN single crystal substrate according to the eleventh embodiment, respectively. FIG. 20 is a view showing a light emitting diode using the GaN single crystal substrate of the third embodiment. FIG. 21 is a diagram showing a semiconductor laser using the GaN single crystal substrate of the third embodiment. FIG. 22 is a diagram showing a vapor phase growth apparatus used for the sublimation method.

Explanation of symbols

  62, 68, 74, 81 ... epitaxial layer, 64, 70, 76, 83 ... GaN single crystal ingot, 66, 72, 78, 85 ... GaN single crystal substrate.

Claims (1)

A GaN single crystal substrate obtained by cutting or cleaving a GaN single crystal ingot formed from an epitaxial layer made of GaN formed on a mask layer having a plurality of opening windows spaced apart from each other, formed on the substrate An ingot forming step of growing an epitaxial layer made of hexagonal GaN directly on the GaN single crystal substrate as a seed crystal to form an ingot of the GaN single crystal;
A cutting step of cutting the ingot formed in the ingot forming step into a plurality of sheets using a slicer;
A step of lapping and finishing polishing the GaN single crystal substrate obtained in the cutting step;
A method for producing a GaN single crystal substrate, comprising:

Images