TW201424256A - High-frequency power amplifier - Google Patents
High-frequency power amplifier Download PDFInfo
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- TW201424256A TW201424256A TW102103255A TW102103255A TW201424256A TW 201424256 A TW201424256 A TW 201424256A TW 102103255 A TW102103255 A TW 102103255A TW 102103255 A TW102103255 A TW 102103255A TW 201424256 A TW201424256 A TW 201424256A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
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- H—ELECTRICITY
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- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/246—A series resonance being added in shunt in the input circuit, e.g. base, gate, of an amplifier stage, e.g. as a trap
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Abstract
Description
本發明係關於應用於例如寬頻段多頻帶電力放大器的高頻電力放大器。 The present invention relates to a high frequency power amplifier applied to, for example, a wide band multi-band power amplifier.
近年來，手提終端要求對複數的頻帶的對應。 In recent years, portable terminals have required correspondence to a plurality of frequency bands.
結果，安裝的傳送用高頻電力放大器也依照頻帶的數量增加，手提終端中高頻電力放大器的占有面積有增加的傾向。 As a result, the installed high-frequency power amplifier for transmission also increases in accordance with the number of frequency bands, and the area occupied by the high-frequency power amplifier in the portable terminal tends to increase.
另一方面，由於伴隨手提終端的多功能化及高功能化之零件件數的增加、消耗電力的增加所產生的電池大型化之類的背景，要求對高頻電力放大器小型化、以一個放大器對應複數的頻帶的多頻帶化。 On the other hand, in the context of the increase in the number of components and the increase in power consumption due to the increase in the number of components of the portable terminal and the increase in power consumption, it is required to miniaturize the high-frequency power amplifier with an amplifier. Multi-banding corresponding to a plurality of frequency bands.
有關手提終端用高頻電力放大器，如同以下專利文件中記載的高頻電力放大器，由使用FET(場效電晶體)或HBT(異質接面雙極性電晶體)的高頻信號放大用電晶體、偏壓元件及整合元件等構成。 A high-frequency power amplifier for a portable terminal, like the high-frequency power amplifier described in the following patent document, is a high-frequency signal amplifying transistor using an FET (Field Effect Transistor) or HBT (Heterojunction Bipolar Transistor), A biasing element, an integrated component, and the like.
[專利文件1]平成11年第195932號專利公開公報 [Patent Document 1] Patent Publication No. 195932 of Heisei 11
手提終端用高頻電力放大器中，傳送時對於接收帶雜訊位準有規定。又，隨著手提終端的多功能化，接收帶以外，還有DTV(數位電視)、GPS(全球定位系統)頻段、ISM(工業、科學、醫學)頻段等，被要求在複數的頻帶中低雜訊位準。 In a high-frequency power amplifier for a portable terminal, there is a regulation for receiving a noise level at the time of transmission. Moreover, with the multi-functionality of the portable terminal, in addition to the receiving band, there are DTV (Digital Television), GPS (Global Positioning System) frequency bands, ISM (Industrial, Scientific, Medical) frequency bands, etc., which are required to be low in the plural frequency bands. The noise level.
一般，從高頻電力放大器輸出的頻段外雜訊位準，係以輸入雜訊位準×頻段外增益+非線形雜訊位準表示。 Generally, the out-of-band noise level output from the high-frequency power amplifier is represented by the input noise level × out-of-band gain + non-linear noise level.
傳送帶與接收帶、其他頻帶，各自的頻段中的增益以能夠獨立改變的程度相隔時，藉由降低頻段外增益，可以降低頻段外雜訊位準。 By reducing the gain outside the band when the gain in the respective bands of the conveyor belt and the receiving band and the other bands are independently changeable, the out-of-band noise level can be reduced.
不過，接收帶接近傳送帶時、其他頻帶接近傳送帶時，藉由實現寬頻段的頻率特性，複數的頻帶以共同的高頻信號放大用電晶體放大之多頻帶電力放大器中，複數的傳送帶之間，接收帶、其他的頻帶存在時，由於使傳送帶增益不下降而只降低頻段外增益，使頻段外雜訊位準降低是困難的。 However, when the receiving band approaches the conveyor belt and the other frequency bands are close to the conveyor belt, by implementing the frequency characteristics of the wide frequency band, the plurality of frequency bands are amplified by a common high-frequency signal using a multi-band power amplifier amplified by a transistor, between the plurality of conveyor belts. When the receiving band and other frequency bands are present, it is difficult to reduce the out-of-band noise level by reducing the gain outside the band by not reducing the gain of the conveyor belt.
另一方面，有關非線形雜訊位準，如果著眼於雜訊發生源之一的偏壓電路，偏壓電路產生具有接收帶及其他頻段的頻率成分之雜訊之外，產生具有傳送帶與接收帶以及其他頻帶之間的相差的頻率(差頻)之雜訊。 On the other hand, regarding the non-linear noise level, if attention is paid to the bias circuit of one of the noise generating sources, the bias circuit generates noise having a frequency component of the receiving band and other frequency bands, and has a conveyor belt and The noise of the frequency (difference frequency) of the phase difference between the reception band and other frequency bands.
從偏壓電路往高頻信號放大用電晶體輸入具有差頻的雜訊時，高頻信號放大用電晶體中傳送波信號與具有差頻的雜訊混合，接收帶及其他頻帶中有產生頻段外雜訊等的課題。 When a noise having a difference frequency is input from a bias circuit to a high-frequency signal amplifying transistor, a transmitted wave signal in a high-frequency signal amplifying transistor is mixed with a noise having a difference frequency, and is generated in a receiving band and other frequency bands. Problems such as noise outside the band.
本發明，係用以解決上述的課題而形成的，所以以得到高頻電力放大器為目的，藉由抑制偏壓電路中產生的具 有差頻之雜訊輸入至高頻信號放大用電晶體中，使傳送帶增益不下降，抑制頻段外雜訊。 The present invention has been made to solve the above problems, and therefore, for the purpose of obtaining a high frequency power amplifier, the device generated in the bias circuit is suppressed. The noise with the difference frequency is input to the transistor for high-frequency signal amplification, so that the gain of the conveyor belt does not decrease, and the noise outside the band is suppressed.
根據本發明的高頻電力放大器包括：高頻信號放大用電晶體，用以放大高頻信號；偏壓電路，在高頻信號放大用電晶體的高頻信號輸入側供給偏壓；以及串聯共振電路，一端連接至高頻信號放大用電晶體與偏壓電路之間且另一端接地，並包含電感器和電容器。 A high frequency power amplifier according to the present invention includes: a high frequency signal amplifying transistor for amplifying a high frequency signal; a bias circuit for supplying a bias voltage to a high frequency signal input side of the high frequency signal amplifying transistor; and a series connection The resonant circuit has one end connected to the high frequency signal amplifying transistor and the bias circuit and the other end grounded, and includes an inductor and a capacitor.
根據本發明，包括串聯共振電路，一端連接至高頻信號放大用電晶體與偏壓電路之間且另一端接地，並包含電感器和電容器。 According to the present invention, a series resonant circuit is included, one end of which is connected between the high frequency signal amplifying transistor and the bias circuit and the other end is grounded, and includes an inductor and a capacitor.
因此，藉由抑制偏壓電路中產生的具有差頻之雜訊輸入至高頻信號放大用電晶體中，具有使傳送帶增益不下降，而可以抑制頻段外雜訊的效果。 Therefore, by suppressing the noise input with the difference frequency generated in the bias circuit to the high-frequency signal amplifying transistor, the effect of suppressing the gain of the out-of-band noise can be suppressed without lowering the gain of the conveyor belt.
1‧‧‧輸入端子 1‧‧‧Input terminal
2‧‧‧輸入整合電路 2‧‧‧Input integrated circuit
3‧‧‧高頻信號放大用電晶體 3‧‧‧High-frequency signal amplification transistor
4‧‧‧輸出整合電路 4‧‧‧Output integrated circuit
5‧‧‧輸出端子 5‧‧‧Output terminal
6‧‧‧偏壓電路 6‧‧‧Bias circuit
7‧‧‧串聯共振電路 7‧‧‧Series resonant circuit
8‧‧‧電感器 8‧‧‧Inductors
9‧‧‧電容器 9‧‧‧ capacitor
10‧‧‧串聯共振電路 10‧‧‧Series resonant circuit
11‧‧‧串聯共振電路 11‧‧‧Series resonant circuit
12‧‧‧開關 12‧‧‧ switch
13‧‧‧並聯共振電路 13‧‧‧Parallel resonant circuit
14‧‧‧電感器 14‧‧‧Inductors
15‧‧‧電容器 15‧‧‧ capacitor
16‧‧‧並聯共振電路 16‧‧‧ parallel resonant circuit
17‧‧‧並聯共振電路 17‧‧‧ parallel resonant circuit
19‧‧‧串聯共振電路 19‧‧‧Series resonant circuit
20‧‧‧電阻 20‧‧‧resistance
21‧‧‧並聯共振電路 21‧‧‧ parallel resonant circuit
22‧‧‧電阻 22‧‧‧resistance
[第1圖]係顯示根據本發明第一實施例的高頻電力放大器的構成圖；[第2圖]係顯示根據本發明第二實施例的高頻電力放大器的構成圖；[第3圖]係顯示根據本發明第三實施例的高頻電力放大器的構成圖；[第4圖]係顯示根據本發明第四實施例的高頻電力放大器 的構成圖；[第5圖]係顯示根據本發明第五實施例的高頻電力放大器的構成圖；[第6圖]係顯示根據本發明第六實施例的高頻電力放大器的構成圖；[第7圖]係顯示根據本發明第七實施例的高頻電力放大器的構成圖；以及[第8圖]係顯示根據本發明第八實施例的高頻電力放大器的構成圖。 [Fig. 1] is a configuration diagram of a high frequency power amplifier according to a first embodiment of the present invention; [Fig. 2] is a view showing a configuration of a high frequency power amplifier according to a second embodiment of the present invention; [Fig. 3] A configuration diagram of a high frequency power amplifier according to a third embodiment of the present invention is shown; [Fig. 4] shows a high frequency power amplifier according to a fourth embodiment of the present invention. [Fig. 5] is a configuration diagram showing a high frequency power amplifier according to a fifth embodiment of the present invention; [Fig. 6] is a view showing a configuration of a high frequency power amplifier according to a sixth embodiment of the present invention; [Fig. 7] Fig. 7 is a configuration diagram showing a high frequency power amplifier according to a seventh embodiment of the present invention; and Fig. 8 is a view showing a configuration of a high frequency power amplifier according to an eighth embodiment of the present invention.
以下，為了更詳細說明本發明，關於用以實施本發明的形態，根據附加的圖面說明。 Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.
第1圖係顯示根據本發明第一實施例的高頻電力放大器的構成圖。 Fig. 1 is a view showing the configuration of a high frequency power amplifier according to a first embodiment of the present invention.
此第一實施例中，包括輸入整合電路2，連接至輸入端子1；1段以上的高頻信號放大用電晶體3，連接至輸入整合電路2的後段，並放大從輸入端子1經由輸入整合電路2的高頻信號；以及輸出整合電路4，連接至高頻信號放大用電晶體3的後段，並輸出放大的高頻信號至輸出端子5。 In the first embodiment, the input integration circuit 2 is connected to the input terminal 1; the high frequency signal amplification transistor 3 of one or more stages is connected to the rear stage of the input integration circuit 2, and amplified from the input terminal 1 via the input integration. The high frequency signal of the circuit 2; and the output integration circuit 4 are connected to the rear stage of the high frequency signal amplifying transistor 3, and output the amplified high frequency signal to the output terminal 5.
又，包括：偏壓電路6，在高頻信號放大用電晶體3的高頻信號輸入側供給偏壓；以及串聯共振電路7，一端連接至高頻信號放大用電晶體3與偏壓電路6之間且另一端接地，並由電感器8和電容器9串聯連接構成。 Further, the bias circuit 6 includes a bias voltage supplied to the high frequency signal input side of the high frequency signal amplifying transistor 3, and a series resonant circuit 7 connected to the high frequency signal amplifying transistor 3 and the bias current. The other side of the path 6 is grounded and is formed by connecting the inductor 8 and the capacitor 9 in series.
又，高頻信號放大用電晶體3以FET構成時，由偏壓電路6對FET的閘極施加偏壓電壓，高頻信號放大用電晶體3以HBT構成時，從偏壓電路6供給偏壓電流給HBT的基極。 When the high-frequency signal amplifying transistor 3 is formed of an FET, a bias voltage is applied to the gate of the FET by the bias circuit 6, and when the high-frequency signal amplifying transistor 3 is formed of HBT, the bias circuit 6 is used. A bias current is supplied to the base of the HBT.
構成串聯共振電路7的電感器8以螺旋電感器或者晶片電感器形成，電容器9以MIM(金屬絕緣體金屬)電容器或晶片電容器形成。 The inductor 8 constituting the series resonance circuit 7 is formed by a spiral inductor or a wafer inductor, and the capacitor 9 is formed of a MIM (Metal Insulator Metal) capacitor or a wafer capacitor.
此第一實施例中，設定電感器8和電容器9的值，使串聯共振電路7的共振頻率在差頻附近，藉此降低差頻中串聯共振電路7的阻抗。 In the first embodiment, the values of the inductor 8 and the capacitor 9 are set such that the resonance frequency of the series resonance circuit 7 is in the vicinity of the difference frequency, thereby reducing the impedance of the series resonance circuit 7 in the difference frequency.
因此，由於具有差頻的雜訊經由串聯共振電路7流至接地，抑制具有差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, since the noise having the difference frequency flows to the ground via the series resonance circuit 7, the noise input having the difference frequency is suppressed to the high frequency signal amplification transistor 3.
又，電感器8的電感假設為L[H]，高頻信號放大用電晶體3的輸入阻抗為Rintr[Ω]，傳送帶的頻率為fRF[Hz]時，設定以成立L>5×Rintr/2π．fRF的關係，並對高頻信號放大用電晶體3的輸入阻抗設定足夠高的串聯共振電路7的阻抗，藉此抑制傳送帶的信號經由串聯共振電路7流至接地。 Further, the inductance of the inductor 8 is assumed to be L[H], and the input impedance of the transistor 3 for high-frequency signal amplification is Rintr [Ω], and when the frequency of the transmission band is fRF [Hz], it is set to L>5×Rintr/ 2π. The relationship of fRF sets the impedance of the series resonance circuit 7 sufficiently high for the input impedance of the transistor 3 for high-frequency signal amplification, thereby suppressing the signal of the conveyor from flowing to the ground via the series resonance circuit 7.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低頻段外雜訊位準。 According to the above, by suppressing the input of the noise having the difference frequency from the bias circuit 6 to the high-frequency signal amplifying transistor 3 by not increasing the gain of the conveyor belt, the out-of-band noise level can be reduced.
又，以2段以上的高頻信號放大用電晶體3所構成的多段放大器的情況下，任一的放大段，或者全部的放大段的偏壓電路6與高頻信號放大用電晶體3之間都可以連接串聯共振電路7。 Further, in the case of a multi-stage amplifier composed of two or more high-frequency signal amplification transistors 3, any one of the amplification sections or all of the amplification sections of the bias circuit 6 and the high-frequency signal amplification transistor 3 The series resonant circuit 7 can be connected between them.
特別是有關第1段的高頻信號放大用電晶體3中產生的雜訊，因為在後段放大，對於輸出的頻段外雜訊之影響大。 In particular, the noise generated in the high-frequency signal amplifying transistor 3 of the first stage has a large influence on the out-of-band noise of the output band because it is amplified in the latter stage.
因此，在第1段連接串聯共振電路7時，得到的頻段外雜訊位準的降低效果大，還有，因為可以削減連接的串聯共振電路7數量，可以小型化。 Therefore, when the series resonance circuit 7 is connected in the first stage, the effect of reducing the out-of-band noise level is large, and the number of connected series resonance circuits 7 can be reduced, and the size can be reduced.
另一方面，最終段中，由於為了實現高效率使用補償的小輸出，失真變大而容易發生混合產生的頻段外雜訊。 On the other hand, in the final stage, since the small output that compensates for high efficiency is used, the distortion becomes large and the out-of-band noise generated by the mixing is likely to occur.
因此，在最終段連接串聯共振電路7時，得到的頻段外雜訊位準的降低效果也大，還有，因為可以削減連接的串聯共振電路7數量，可以小型化。 Therefore, when the series resonance circuit 7 is connected to the final stage, the effect of reducing the out-of-band noise level is also large, and the number of connected series resonance circuits 7 can be reduced, and the size can be reduced.
又，藉由電感器8使用螺旋電感器，可以小型化。 Further, the inductor 8 can be miniaturized by using a spiral inductor.
另一方面，藉由使用晶片電感器，因為變成低損失，得到抑制傳送帶增益下降的效果。 On the other hand, by using a wafer inductor, since a low loss is obtained, an effect of suppressing a decrease in the gain of the conveyor belt is obtained.
有關電容器9，需要的電容值小時，藉由使用MIM電容器，可以小型化。 With regard to the capacitor 9, the required capacitance value is small, and it can be miniaturized by using the MIM capacitor.
另一方面，藉由使用晶片電容器，因為可以實現大的電容，即使差頻低的情況下，也可以對應。 On the other hand, by using a wafer capacitor, since a large capacitance can be realized, it is possible to cope even when the difference frequency is low.
如上述，根據此第一實施例，包括串聯共振電路7，一端連接至高頻信號放大用電晶體3與偏壓電路6之間且另一端接地，並包含電感器8和電容器9。 As described above, according to this first embodiment, the series resonance circuit 7 is included, one end is connected between the high frequency signal amplification transistor 3 and the bias circuit 6 and the other end is grounded, and includes the inductor 8 and the capacitor 9.
因此，藉由抑制偏壓電路6中發生的具有差頻之雜訊輸入至高頻信號放大用電晶體3，使傳送帶增益不下降，而可以抑制頻段外雜訊。 Therefore, by suppressing the noise input having the difference frequency generated in the bias circuit 6 to the high frequency signal amplifying transistor 3, the gain of the belt is not lowered, and the noise outside the band can be suppressed.
又，根據此第一實施例，電感器8的電感假設為 L[H]，高頻信號放大用電晶體3放大的高頻信號的頻率為fRF[Hz]、高頻信號放大用電晶體3的輸入阻抗為Rintr[Ω]時，設定以成立L>5×Rintr/2π．fRF的關係。 Moreover, according to this first embodiment, the inductance of the inductor 8 is assumed to be L[H], the frequency of the high-frequency signal amplified by the high-frequency signal amplification transistor 3 is fRF [Hz], and the input impedance of the high-frequency signal amplification transistor 3 is Rintr [Ω], and is set to L>5. ×Rintr/2π. The relationship between fRF.
因此，對高頻信號放大用電晶體3的輸入阻抗設定足夠高的串聯共振電路7的阻抗，藉此可以抑制傳送帶的信號經由串聯共振電路7流至接地。 Therefore, the impedance of the series resonance circuit 7 of sufficiently high is set to the input impedance of the transistor 3 for high-frequency signal amplification, whereby the signal of the conveyor can be suppressed from flowing to the ground via the series resonance circuit 7.
又，根據此第一實施例，高頻信號放大用電晶體3，係2段以上構成的多段放大器，串聯共振電路7包括一端連接至第1段的高頻信號放大用電晶體3與偏壓電路6之間的元件。 Further, according to the first embodiment, the high-frequency signal amplifying transistor 3 is a multi-stage amplifier composed of two or more stages, and the series resonant circuit 7 includes a high-frequency signal amplifying transistor 3 whose one end is connected to the first stage and a bias voltage. The components between the circuits 6.
因此，第1段連接串聯共振電路7時得到的頻段外雜訊位準的降低效果大，又，因為可以削減連接的串聯共振電路7的數量，可以小型化。 Therefore, the effect of reducing the out-of-band noise level obtained when the first stage is connected to the series resonance circuit 7 is large, and the number of connected series resonance circuits 7 can be reduced, and the size can be reduced.
又，根據此第一實施例，串聯共振電路7的電感器8包括螺旋電感器。 Also, according to this first embodiment, the inductor 8 of the series resonance circuit 7 includes a spiral inductor.
因此，可以小型化。 Therefore, it can be miniaturized.
又，根據此第一實施例，串聯共振電路7的電感器8包括晶片電感器。 Also, according to this first embodiment, the inductor 8 of the series resonant circuit 7 includes a wafer inductor.
因此，由於成為低損耗，可以抑制傳送帶增益的下降。 Therefore, since the loss is low, the drop in the belt gain can be suppressed.
又，根據此第一實施例，串聯共振電路7的電容器9包括MIM(金屬絕緣體金屬)電容器。 Further, according to this first embodiment, the capacitor 9 of the series resonance circuit 7 includes an MIM (Metal Insulator Metal) capacitor.
因此，可以小型化。 Therefore, it can be miniaturized.
又，根據此第一實施例，串聯共振電路7的電容器9包括晶片電容器。 Also, according to this first embodiment, the capacitor 9 of the series resonance circuit 7 includes a wafer capacitor.
因此，由於可以實現大的電容，即使差頻低的情況下，也可以對應。 Therefore, since a large capacitance can be realized, even if the difference frequency is low, it is possible to correspond.
第2圖中顯示根據本發明的第二實施例的高頻電力放大器的構成圖。 Fig. 2 is a view showing the configuration of a high frequency power amplifier according to a second embodiment of the present invention.
此第二實施例的串聯共振電路10，並聯連接複數個上述第一實施例的高頻電力放大器的串聯共振電路7，且構成各串聯共振電路7的電感器8及電容器9設定為不同的值，藉此具有分別不同的複數的共振頻率。 The series resonant circuit 10 of the second embodiment is connected in parallel to a series resonant circuit 7 of a plurality of high frequency power amplifiers of the above-described first embodiment, and the inductors 8 and 9 constituting each series resonant circuit 7 are set to different values. Thereby, there are respectively different complex resonant frequencies.
有時傳送帶與接收帶以及其他的頻帶之間的差頻係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the transmission band and the reception band and other frequency bands is complex, or sometimes the difference frequency is different due to the transmission band frequency.
此第二實施例，在此情況下，對複數的傳送帶頻率，降低複數的接收帶及其他的頻帶中的頻段外雜訊。 This second embodiment, in this case, reduces the out-of-band noise in the complex reception band and other frequency bands for a plurality of transmission band frequencies.
此第二實施例，與上述第一實施例之間只有連接的串聯共振電路10不同，除了上述第一實施例所得到的效果之外，還有使並聯連接的串聯共振電路10因傳送帶頻率與複數的頻段外頻率之間複數的差頻而具有共振頻率，藉此偏壓電路6中發生的具有複數的差頻之雜訊經由複數的串聯共振電路10流至接地，抑制輸入至高頻信號放大用電晶體3。 This second embodiment differs from the above-described first embodiment in that only the series resonant circuit 10 is connected. In addition to the effects obtained by the first embodiment described above, there are also series resonant circuits 10 connected in parallel due to the transmission band frequency and The plurality of frequency bands outside the frequency band have a complex frequency and a resonance frequency, whereby the noise having the complex difference frequency generated in the bias circuit 6 flows to the ground through the plurality of series resonance circuits 10, and the input to the high frequency is suppressed. Signal amplification transistor 3.
又，與上述第一實施例相同，設定各個電感器8的電感，使串聯共振電路10的阻抗對高頻信號放大用電晶體3的輸入阻抗夠高，藉此抑制傳送帶的信號經由串聯共振電路10流至接地。 Further, in the same manner as in the first embodiment described above, the inductance of each inductor 8 is set such that the impedance of the series resonant circuit 10 is sufficiently high for the input impedance of the high-frequency signal amplifying transistor 3, whereby the signal of the conveyor belt is suppressed via the series resonant circuit. 10 flows to ground.
根據上述，藉由使傳送帶增益不下降，而抑制從 偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低複數的頻帶中頻段外雜訊位準。 According to the above, the suppression is suppressed by making the belt gain not fall. The bias circuit 6 inputs the noise-to-high-frequency signal amplifying transistor 3 having a difference frequency, which can reduce the out-of-band noise level in the complex frequency band.
如上述，根據此第二實施例，串聯共振電路10包括複數個並聯連接且分別具有不同的共振頻率的元件。 As described above, according to this second embodiment, the series resonance circuit 10 includes a plurality of elements connected in parallel and having different resonance frequencies, respectively.
因此，使並聯連接的串聯共振電路10因傳送帶頻率與複數的頻段外頻率之間複數的差頻而具有共振頻率，藉此偏壓電路6中發生的具有複數的差頻之雜訊經由複數的串聯共振電路10流至接地，可以抑制輸入至高頻信號放大用電晶體3。 Therefore, the series resonant circuit 10 connected in parallel has a resonance frequency due to a complex difference frequency between the transmission band frequency and the complex frequency outside the frequency band, whereby the noise having the complex difference frequency occurring in the bias circuit 6 passes through the complex number The series resonance circuit 10 flows to the ground, and the input to the high frequency signal amplification transistor 3 can be suppressed.
第3圖中顯示根據本發明的第三實施例的高頻電力放大器的構成圖。 Fig. 3 is a view showing the configuration of a high frequency power amplifier according to a third embodiment of the present invention.
此第三實施例的串聯共振電路11，包括分別經由開關12並聯連接的複數的電容器9，取代構成上述第一實施例的高頻電力放大器的串聯共振電路7之電容器9，並根據開關12的通/斷，變換電容器9的數量或大小，藉此可改變共振頻率。 The series resonance circuit 11 of the third embodiment includes a plurality of capacitors 9 connected in parallel via the switches 12, respectively, instead of the capacitors 9 of the series resonance circuit 7 constituting the high frequency power amplifier of the first embodiment described above, and according to the switch 12 Turning on/off, the number or size of the capacitors 9 is changed, whereby the resonance frequency can be changed.
有時傳送帶與接收帶以及其他的頻帶之間的差頻係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the transmission band and the reception band and other frequency bands is complex, or sometimes the difference frequency is different due to the transmission band frequency.
此第三實施例，在此情況下，對複數的傳送帶頻率，降低複數的接收帶及其他的頻帶中的頻段外雜訊。 This third embodiment, in this case, reduces the out-of-band noise in the complex reception band and other frequency bands for a plurality of transmission band frequencies.
此第三實施例，與上述第一實施例之間只有連接的串聯共振電路11不同，除了上述第一實施例所得到的效果之外，還有根據想要降低雜訊位準的頻段外的頻帶，變換串聯共振電路11的電容器9的值，藉此偏壓電路6中發生的具有複數的差頻之雜訊經由串聯共振電路11流至接地，抑制輸入 至高頻信號放大用電晶體3。 This third embodiment is different from the series-connected resonant circuit 11 which is only connected to the first embodiment described above, and in addition to the effects obtained by the first embodiment described above, there are also bands outside the frequency band in which the noise level is desired to be lowered. In the frequency band, the value of the capacitor 9 of the series resonance circuit 11 is changed, whereby the noise having the complex difference frequency generated in the bias circuit 6 flows to the ground via the series resonance circuit 11, and the input is suppressed. To the high frequency signal amplifying transistor 3.
又，與上述第一實施例相同，設定電感器8的電感，使串聯共振電路11的阻抗對高頻信號放大用電晶體3的輸入阻抗夠高，藉此抑制傳送帶的信號經由串聯共振電路11流至接地。 Further, similarly to the first embodiment described above, the inductance of the inductor 8 is set such that the impedance of the series resonant circuit 11 is sufficiently high for the input impedance of the high-frequency signal amplifying transistor 3, whereby the signal of the conveyor belt is suppressed via the series resonant circuit 11 Flow to ground.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，根據想要降低雜訊的頻帶，可以降低頻段外雜訊位準。 According to the above, by suppressing the gain of the conveyor belt from falling, the noise from the bias circuit 6 is input to the high-frequency signal amplifying transistor 3, and the frequency band outside the frequency band can be reduced according to the frequency band in which the noise is desired to be reduced. The level of information.
又，此第三實施例，對於上述第二實施例，由於共用大尺寸的電感器8，並可以由小型的開關12實現，可以小型化。 Further, in the third embodiment, in the second embodiment described above, since the large-sized inductor 8 is shared and can be realized by the small switch 12, it can be miniaturized.
如上述，根據第三實施例，串聯共振電路11的電容器9，分別經由開關12，複數個並聯連接，並根據開關12的通/斷，變換電容器9，改變串聯共振電路11的共振頻率。 As described above, according to the third embodiment, the capacitors 9 of the series resonance circuit 11 are respectively connected in parallel via the switches 12, and the capacitors 9 are switched in accordance with the on/off of the switches 12 to change the resonance frequency of the series resonance circuit 11.
因此，根據想要降低雜訊位準的頻段外的頻帶，變換串聯共振電路11的電容器9的值，藉此偏壓電路6中發生的具有複數的差頻之雜訊經由串聯共振電路11流至接地，可以抑制輸入至高頻信號放大用電晶體3。 Therefore, the value of the capacitor 9 of the series resonant circuit 11 is converted according to the frequency band outside the frequency band in which the noise level is desired to be reduced, whereby the noise having the complex difference frequency occurring in the bias circuit 6 is passed through the series resonant circuit 11 The flow to the ground can suppress the input of the transistor 3 for high-frequency signal amplification.
第4圖中顯示根據本發明的第四實施例的高頻電力放大器的構成圖。 Fig. 4 is a view showing the configuration of a high frequency power amplifier according to a fourth embodiment of the present invention.
此第四實施例中，包括並聯共振電路13，取代上述第一實施例的高頻電力放大器的串聯共振電路7，在高頻信號放大用電晶體3與偏壓電路6之間串聯連接，並由電感器14及電容器15並聯連接構成。 In the fourth embodiment, the parallel resonant circuit 13 is provided, and in place of the series resonant circuit 7 of the high-frequency power amplifier of the first embodiment, the high-frequency signal amplifying transistor 3 and the biasing circuit 6 are connected in series, The inductor 14 and the capacitor 15 are connected in parallel.
又，構成並聯共振電路13的電感器14以螺旋電感器或者晶片電感器形成，電容器15以MIM電容器或晶片電容器形成。 Further, the inductor 14 constituting the parallel resonance circuit 13 is formed by a spiral inductor or a chip inductor, and the capacitor 15 is formed of a MIM capacitor or a wafer capacitor.
此第四實施例中，設定電感器14及電容器15的值，使並聯共振電路13的共振頻率成為在差頻附近，藉此提高差頻中並聯共振電路13的阻抗。 In the fourth embodiment, the values of the inductor 14 and the capacitor 15 are set such that the resonance frequency of the parallel resonance circuit 13 is in the vicinity of the difference frequency, thereby increasing the impedance of the parallel resonance circuit 13 in the difference frequency.
因此，抑制具有差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the noise input having the difference frequency is suppressed to the high frequency signal amplifying transistor 3.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低頻段外雜訊位準。 According to the above, by suppressing the input of the noise having the difference frequency from the bias circuit 6 to the high-frequency signal amplifying transistor 3 by not increasing the gain of the conveyor belt, the out-of-band noise level can be reduced.
又，以2段以上的高頻信號放大用電晶體3所構成的多段放大器的情況下，任一的放大段，或者全部的放大段的偏壓電路6與高頻信號放大用電晶體3之間都可以連接並聯共振電路13。 Further, in the case of a multi-stage amplifier composed of two or more high-frequency signal amplification transistors 3, any one of the amplification sections or all of the amplification sections of the bias circuit 6 and the high-frequency signal amplification transistor 3 The parallel resonant circuit 13 can be connected between them.
特別是有關第1段的高頻信號放大用電晶體3中產生的雜訊，因為在後段放大，對於輸出的頻段外雜訊之影響大。 In particular, the noise generated in the high-frequency signal amplifying transistor 3 of the first stage has a large influence on the out-of-band noise of the output band because it is amplified in the latter stage.
因此，在第1段連接並聯共振電路13時，得到的頻段外雜訊位準的降低效果大，還有，因為可以削減連接的並聯共振電路13數量，可以小型化。 Therefore, when the parallel resonant circuit 13 is connected in the first stage, the effect of reducing the out-of-band noise level is large, and the number of connected parallel resonant circuits 13 can be reduced, and the size can be reduced.
另一方面，最終段中，由於為了實現高效率使用補償的小輸出，失真變大而容易發生混合產生的頻段外雜訊。 On the other hand, in the final stage, since the small output that compensates for high efficiency is used, the distortion becomes large and the out-of-band noise generated by the mixing is likely to occur.
因此，在最終段連接並聯共振電路13時，得到的頻段外雜訊位準的降低效果也大，還有，因為可以削減連接的並聯共 振電路13數量，可以小型化。 Therefore, when the parallel resonant circuit 13 is connected to the final stage, the effect of reducing the out-of-band noise level is also large, and because the connection can be reduced in parallel. The number of the vibrating circuits 13 can be miniaturized.
又，藉由電感器14使用螺旋電感器，可以小型化。另一方面藉由使用晶片電感器，因為變成低損失，得到抑制傳送帶增益下降的效果。 Further, the inductor 14 can be miniaturized by using a spiral inductor. On the other hand, by using a wafer inductor, since a low loss is obtained, an effect of suppressing a decrease in the belt gain is obtained.
有關電容器15，需要的電容值小時，藉由使用MIM電容器，可以小型化。 With regard to the capacitor 15, the required capacitance value is small, and it can be miniaturized by using the MIM capacitor.
另一方面，藉由使用晶片電容器，因為可以實現大的電容，即使差頻低的情況下，也可以對應。 On the other hand, by using a wafer capacitor, since a large capacitance can be realized, it is possible to cope even when the difference frequency is low.
如上述，根據此第四實施例，包括並聯共振電路13，在高頻信號放大用電晶體3與偏壓電路6之間串聯連接，並包含電感器14和電容器15。 As described above, according to the fourth embodiment, the parallel resonance circuit 13 is included, and is connected in series between the high frequency signal amplification transistor 3 and the bias circuit 6, and includes the inductor 14 and the capacitor 15.
因此，藉由抑制偏壓電路6中發生的具有差頻之雜訊輸入至高頻信號放大用電晶體3，使傳送帶增益不下降，而可以抑制頻段外雜訊。 Therefore, by suppressing the noise input having the difference frequency generated in the bias circuit 6 to the high frequency signal amplifying transistor 3, the gain of the belt is not lowered, and the noise outside the band can be suppressed.
又，根據此第四實施例，高頻信號放大用電晶體3，係2段以上構成的多段放大器，並聯共振電路13包括在第1段的高頻信號放大用電晶體3與偏壓電路6之間串聯連接的元件。 Further, according to the fourth embodiment, the high-frequency signal amplifying transistor 3 is a multi-stage amplifier composed of two or more stages, and the parallel resonant circuit 13 includes the high-frequency signal amplifying transistor 3 and the bias circuit in the first stage. 6 connected components in series.
因此，第1段連接並聯共振電路13時得到的頻段外雜訊位準的降低效果大，又，因為可以削減連接的並聯共振電路13數量，可以小型化。 Therefore, the effect of reducing the out-of-band noise level obtained when the parallel resonant circuit 13 is connected in the first stage is large, and the number of connected parallel resonant circuits 13 can be reduced, and the size can be reduced.
第5圖中顯示根據本發明的第五實施例的高頻電力放大器的構成圖。 Fig. 5 is a view showing the configuration of a high frequency power amplifier according to a fifth embodiment of the present invention.
此第5實施例，藉由串聯連接複數個上述第四實施例的高頻電力放大器的並聯共振電路13，且構成各並聯共振電路的電感器14及電容器15設定為不同的值，藉此具有分別不同的複數的共振頻率。 In the fifth embodiment, the parallel resonant circuit 13 of the plurality of high frequency power amplifiers of the fourth embodiment is connected in series, and the inductor 14 and the capacitor 15 constituting each of the parallel resonant circuits are set to different values. Different complex resonant frequencies.
有時傳送帶與接收帶以及其他的頻帶之間的差頻係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the transmission band and the reception band and other frequency bands is complex, or sometimes the difference frequency is different due to the transmission band frequency.
此第五實施例，在此情況下，對複數的傳送帶頻率，降低複數的接收帶及其他的頻帶中的頻段外雜訊。 In this fifth embodiment, in this case, for a plurality of transmission band frequencies, the out-of-band noise in the plurality of reception bands and other frequency bands is reduced.
此第五實施例，與上述第四實施例之間只有連接的並聯共振電路16不同，除了上述第四實施例所得到的效果之外，還有使串聯連接的並聯共振電路16因傳送帶頻率與複數的頻段外頻率之間複數的差頻而具有共振頻率，藉此提高複數的差頻中並聯共振電路16的阻抗。 This fifth embodiment differs from the above-described fourth embodiment in that only the parallel resonant circuit 16 is connected. In addition to the effects obtained by the fourth embodiment described above, there are also parallel resonant circuits 16 connected in series due to the transmission band frequency and The complex frequency difference between the complex out-of-band frequencies has a resonant frequency, thereby increasing the impedance of the parallel resonant circuit 16 in the complex difference frequency.
因此，抑制偏壓電路6中發生的具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the noise input having the complex difference frequency occurring in the bias circuit 6 is suppressed to the high frequency signal amplifying transistor 3.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低複數的頻帶中頻段外雜訊位準。 According to the above, by suppressing the input of the noise having the difference frequency from the bias circuit 6 to the high-frequency signal amplifying transistor 3 by not increasing the gain of the conveyor belt, the out-of-band noise level in the plurality of frequency bands can be reduced.
如上述，根據此第五實施例，並聯共振電路16包括複數個串聯連接且分別具有不同的共振頻率的元件。 As described above, according to this fifth embodiment, the parallel resonance circuit 16 includes a plurality of elements connected in series and having different resonance frequencies, respectively.
因此，使串聯連接的並聯共振電路16因傳送帶頻率與複數的頻段外頻率之間複數的差頻而具有共振頻率，藉此提高複數的差頻中並聯共振電路16的阻抗。 Therefore, the parallel resonant circuit 16 connected in series has a resonance frequency due to a complex difference frequency between the transmission band frequency and the complex out-of-band frequency, thereby increasing the impedance of the parallel resonance circuit 16 in the complex difference frequency.
因此，可以抑制偏壓電路6中發生的具有複數的差頻之雜 訊輸入至高頻信號放大用電晶體3。 Therefore, it is possible to suppress the occurrence of a complex difference frequency occurring in the bias circuit 6 The signal is input to the transistor 3 for high-frequency signal amplification.
第6圖中顯示根據本發明的第六實施例的高頻電力放大器的構成圖。 Fig. 6 is a view showing the configuration of a high frequency power amplifier according to a sixth embodiment of the present invention.
此第六實施例，包括分別經由開關18並聯連接的複數的電容器15，取代構成上述第四實施例的高頻電力放大器的並聯共振電路13之電容器15，並根據開關18的通/斷，變換電容器15的數量或大小，藉此可改變共振頻率。 This sixth embodiment includes a plurality of capacitors 15 connected in parallel via switches 18, respectively, instead of the capacitors 15 of the parallel resonant circuit 13 constituting the high-frequency power amplifier of the fourth embodiment described above, and is switched according to the on/off of the switch 18. The number or size of the capacitors 15, by which the resonant frequency can be varied.
有時傳送帶與接收帶以及其他的頻帶之間的差頻係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the transmission band and the reception band and other frequency bands is complex, or sometimes the difference frequency is different due to the transmission band frequency.
此第六實施例，在此情況下，對複數的傳送帶頻率，降低複數的接收帶及其他的頻帶中的頻段外雜訊。 In this sixth embodiment, in this case, for a plurality of transmission band frequencies, the out-of-band noise in the plurality of reception bands and other frequency bands is reduced.
此第六實施例，與上述第四實施例之間只有連接的並聯共振電路17不同，除了上述第四實施例所得到的效果之外，還有根據想要降低雜訊位準的頻段外的頻帶，變換並聯共振電路17的電容器15的值，藉此對複數的頻帶提高並聯共振電路17的阻抗。 This sixth embodiment differs from the above-described fourth embodiment in that only the parallel resonant circuit 17 is connected. In addition to the effects obtained by the fourth embodiment described above, there are also bands outside the frequency band in which the noise level is desired to be lowered. The frequency band converts the value of the capacitor 15 of the parallel resonant circuit 17, thereby increasing the impedance of the parallel resonant circuit 17 for a plurality of frequency bands.
因此，抑制偏壓電路6中發生的具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the noise input having the complex difference frequency occurring in the bias circuit 6 is suppressed to the high frequency signal amplifying transistor 3.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，每個想要降低雜訊的頻帶，可以降低頻段外雜訊位準。 According to the above, by suppressing the gain of the conveyor belt from falling, the noise from the bias circuit 6 is input to the high-frequency signal amplifying transistor 3, and each frequency band for which noise is desired to be reduced can be lowered outside the band. The noise level.
又，此第六實施例，對於上述第五實施例，由於共用大尺寸的電感器14，並可以由小型的開關18實現，可以小型化。 Further, in the sixth embodiment, in the fifth embodiment described above, since the large-sized inductor 14 is shared and can be realized by the small switch 18, it can be miniaturized.
如上述，根據第六實施例，並聯共振電路17的電容器15，分別經由開關18，複數個並聯連接，並根據開關18的通/斷，變換電容器15，改變並聯共振電路17的共振頻率。 As described above, according to the sixth embodiment, the capacitors 15 of the parallel resonance circuit 17 are connected in parallel via the switch 18, and the capacitors 15 are switched in accordance with the on/off of the switches 18 to change the resonance frequency of the parallel resonance circuit 17.
因此，根據想要降低雜訊位準的頻段外的頻帶，變換並聯共振電路17的電容器的值，藉此可以抑制偏壓電路6中發生的具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the value of the capacitor of the parallel resonant circuit 17 is converted according to the frequency band outside the frequency band in which the noise level is desired to be reduced, whereby the noise input having the complex difference frequency occurring in the bias circuit 6 can be suppressed to the high frequency. Signal amplification transistor 3.
第7圖中顯示根據本發明的第七實施例的高頻電力放大器的構成圖。 Fig. 7 is a view showing the configuration of a high frequency power amplifier according to a seventh embodiment of the present invention.
此第七實施例的串聯共振電路19，因為串聯連接電阻20至上述第一實施例的高頻電力放大器的串聯共振電路7，因此對於更寬頻率頻段，降低串聯共振電路19的阻抗。 In the series resonance circuit 19 of the seventh embodiment, since the resistor 20 is connected in series to the series resonance circuit 7 of the high frequency power amplifier of the above-described first embodiment, the impedance of the series resonance circuit 19 is lowered for a wider frequency band.
有時傳送帶與接收帶以及其他的頻帶之間的差頻係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the transmission band and the reception band and other frequency bands is complex, or sometimes the difference frequency is different due to the transmission band frequency.
此第七實施例，在此情況下，在複數的傳送帶頻率中，降低複數的接收帶及其他的頻帶的頻段外雜訊。 In the seventh embodiment, in this case, out-of-band noise of a plurality of reception bands and other frequency bands is reduced in a plurality of transmission band frequencies.
此第七實施例，與上述第一實施例之間只有連接的串聯共振電路19不同，除了上述第一實施例所得到的效果之外，還有設定電感器8及電容器9的值，使包含電阻20的串聯共振電路19的共振頻率成為頻率接近的複數差頻的中間頻率，藉此降低複數的差頻中串聯共振電路19的阻抗。 The seventh embodiment is different from the series resonant circuit 19 which is only connected to the first embodiment. In addition to the effects obtained by the first embodiment, the values of the inductor 8 and the capacitor 9 are set to include The resonance frequency of the series resonance circuit 19 of the resistor 20 becomes an intermediate frequency of a complex difference frequency close to the frequency, thereby reducing the impedance of the series resonance circuit 19 in the complex difference frequency.
因此，具有複數的差頻之雜訊經由串聯共振電路19流至接地，藉此抑制具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the noise having the complex difference frequency flows to the ground via the series resonance circuit 19, thereby suppressing the noise input having the complex difference frequency to the high frequency signal amplification transistor 3.
又，與上述第一實施例相同，設定電感器8的電感，使串聯共振電路19的阻抗對高頻信號放大用電晶體3的輸入阻抗夠高，藉此抑制傳送帶的信號經由串聯共振電路19流至接地。 Further, similarly to the first embodiment described above, the inductance of the inductor 8 is set such that the impedance of the series resonant circuit 19 is sufficiently high for the input impedance of the high-frequency signal amplifying transistor 3, whereby the signal of the conveyor belt is suppressed via the series resonant circuit 19 Flow to ground.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低複數的頻帶中頻段外雜訊位準。 According to the above, by suppressing the input of the noise having the difference frequency from the bias circuit 6 to the high-frequency signal amplifying transistor 3 by not increasing the gain of the conveyor belt, the out-of-band noise level in the plurality of frequency bands can be reduced.
又，此第七實施例，對於上述第二實施例及上述第三實施例，由於可以共用複數的電感器8及電容器9，可以小型化。 Further, in the seventh embodiment, in the second embodiment and the third embodiment described above, since the plurality of inductors 8 and capacitors 9 can be shared, the size can be reduced.
如上述，根據第七實施例，串聯共振電路19包括的元件包含串聯連接至電感器8及電容器9的電阻20。 As described above, according to the seventh embodiment, the series resonance circuit 19 includes an element including the resistor 20 connected in series to the inductor 8 and the capacitor 9.
因此，設定電感器8及電容器9的值，使包含電阻20的串聯共振電路19的共振頻率成為頻率接近的複數差頻的中間頻率，藉此降低複數的差頻中串聯共振電路19的阻抗。 Therefore, the values of the inductor 8 and the capacitor 9 are set such that the resonance frequency of the series resonance circuit 19 including the resistor 20 becomes the intermediate frequency of the complex difference frequency at which the frequency is close, thereby reducing the impedance of the series resonance circuit 19 in the complex difference frequency.
因此，偏壓電路6中發生的具有複數的差頻之雜訊經由串聯共振電路19流至接地，藉此可以抑制輸入至高頻信號放大用電晶體3。 Therefore, the noise having the complex difference frequency generated in the bias circuit 6 flows to the ground via the series resonance circuit 19, whereby the input to the high frequency signal amplification transistor 3 can be suppressed.
第8圖中顯示根據本發明的第八實施例的高頻電力放大器的構成圖。 Fig. 8 is a view showing the configuration of a high frequency power amplifier according to an eighth embodiment of the present invention.
此第八實施例，因為串聯連接電阻22至上述第四實施例的高頻電力放大器的並聯共振電路13，因此對於更寬頻率頻段，提高並聯共振電路21的阻抗。 In the eighth embodiment, since the resistor 22 is connected in series to the parallel resonance circuit 13 of the high-frequency power amplifier of the fourth embodiment described above, the impedance of the parallel resonance circuit 21 is increased for a wider frequency band.
有時傳送帶與接收帶以及其他的頻帶之間的差頻 係複數的，或有時由於傳送帶頻率而差頻不同。 Sometimes the difference between the belt and the receiving band and other frequency bands The frequency difference is different, or sometimes due to the conveyor frequency.
此第八實施例，在此情況下，複數的傳送帶頻率中，降低複數的接收帶及其他的頻帶的頻段外雜訊。 In the eighth embodiment, in this case, among the plurality of transmission band frequencies, the out-of-band noise of the plurality of reception bands and other frequency bands is reduced.
此第八實施例，與上述第四實施例之間只有連接的並聯共振電路21不同，除了上述第四實施例所得到的效果之外，還有設定電感器14及電容器15的值，使包含電阻22的並聯共振電路21的共振頻率成為頻率接近的複數差頻的中間頻率，藉此提高複數的差頻中並聯共振電路21的阻抗。 The eighth embodiment differs from the fourth embodiment in that only the parallel resonant circuit 21 is connected. In addition to the effects obtained by the fourth embodiment, the values of the inductor 14 and the capacitor 15 are set to include The resonance frequency of the parallel resonance circuit 21 of the resistor 22 becomes an intermediate frequency of a complex difference frequency whose frequency is close, thereby increasing the impedance of the parallel resonance circuit 21 in the complex difference frequency.
因此，抑制偏壓電路6中發生的具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, the noise input having the complex difference frequency occurring in the bias circuit 6 is suppressed to the high frequency signal amplifying transistor 3.
根據上述，藉由使傳送帶增益不下降，而抑制從偏壓電路6輸入具有差頻之雜訊至高頻信號放大用電晶體3，可以降低複數的頻帶中頻段外雜訊位準。 According to the above, by suppressing the input of the noise having the difference frequency from the bias circuit 6 to the high-frequency signal amplifying transistor 3 by not increasing the gain of the conveyor belt, the out-of-band noise level in the plurality of frequency bands can be reduced.
又，此第八實施例，對於上述第五實施例及上述第六實施例，由於可以共用複數的電感器14及電容器15，可以小型化。 Further, in the eighth embodiment, in the fifth embodiment and the sixth embodiment described above, since the plurality of inductors 14 and capacitors 15 can be shared, the size can be reduced.
如上述，根據第八實施例，並聯共振電路21包括的元件包含串聯連接至電感器14及電容器15的電阻22。 As described above, according to the eighth embodiment, the parallel resonant circuit 21 includes an element including a resistor 22 connected in series to the inductor 14 and the capacitor 15.
因此，設定電感器14及電容器15的值，使包含電阻22的並聯共振電路21的共振頻率成為頻率接近的複數差頻的中間頻率，藉此提高複數的差頻中並聯共振電路21的阻抗。 Therefore, the values of the inductor 14 and the capacitor 15 are set such that the resonance frequency of the parallel resonance circuit 21 including the resistor 22 becomes the intermediate frequency of the complex difference frequency whose frequency is close, thereby increasing the impedance of the parallel resonance circuit 21 in the complex difference frequency.
因此，可以抑制偏壓電路6中發生的具有複數的差頻之雜訊輸入至高頻信號放大用電晶體3。 Therefore, it is possible to suppress the noise input having the complex difference frequency generated in the bias circuit 6 to the high frequency signal amplifying transistor 3.
又，上述第一實施例到上述第八實施例所示的高頻電力放大器，可以適用於電力放大的複數傳送頻段間如包含 接收頻段的寬頻段多頻帶電力放大器。 Further, the high frequency power amplifier shown in the first embodiment to the eighth embodiment described above can be applied to a plurality of transmission bands for power amplification, including Wide band multi-band power amplifier for receiving frequency bands.
又，本申請發明在其發明的範圍內，可以各實施例自由組合或各實施例的任意構成要素變形，或者各實施例中省略任意的構成要素。 Further, the invention of the present application can be freely combined with any of the embodiments or any constituent elements of the respective embodiments within the scope of the invention, or any constituent elements are omitted in the respective embodiments.
如上述，由於本發明的高頻電力放大器的構成包括串聯共振電路7，一端連接至高頻信號放大用電晶體3與偏壓電路6之間且另一端接地，並包含電感器8和電容器9，所以適合用於寬頻段多頻帶電力放大器。 As described above, since the configuration of the high-frequency power amplifier of the present invention includes the series resonance circuit 7, one end is connected between the high-frequency signal amplification transistor 3 and the bias circuit 6 and the other end is grounded, and includes the inductor 8 and the capacitor. 9, so suitable for wide-band multi-band power amplifiers.
1‧‧‧RF(射頻)輸入 1‧‧‧RF (radio frequency) input
2‧‧‧輸入整合電路 2‧‧‧Input integrated circuit
3‧‧‧高頻信號放大用電晶體 3‧‧‧High-frequency signal amplification transistor
4‧‧‧輸出整合電路 4‧‧‧Output integrated circuit
5‧‧‧RF(射頻)輸出 5‧‧‧RF (radio frequency) output
6‧‧‧偏壓電路 6‧‧‧Bias circuit
7‧‧‧串聯共振電路 7‧‧‧Series resonant circuit
8‧‧‧電感器 8‧‧‧Inductors
9‧‧‧電容器 9‧‧‧ capacitor
Claims (19)
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| Application Number | Priority Date | Filing Date | Title |
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| PCT/JP2012/081355 WO2014087479A1 (en) | 2012-12-04 | 2012-12-04 | High-frequency power amplifier |
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| TW201424256A true TW201424256A (en) | 2014-06-16 |
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| TW102103255A TW201424256A (en) | 2012-12-04 | 2013-01-29 | High-frequency power amplifier |
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| WO (1) | WO2014087479A1 (en) |
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| CN109075751B (en) * | 2016-03-30 | 2022-06-07 | 株式会社村田制作所 | High-frequency signal amplifying circuit, power amplifying module, front-end circuit, and communication device |
| JP2017184060A (en) | 2016-03-30 | 2017-10-05 | 株式会社村田製作所 | High frequency signal amplifier circuit, power amplification module, front-end circuit, and communication device |
| JP6536525B2 (en) * | 2016-10-04 | 2019-07-03 | 株式会社村田製作所 | Bias T circuit |
| CN106549638A (en) | 2016-10-31 | 2017-03-29 | 唯捷创芯(天津)电子技术股份有限公司 | A kind of suppression harmonic wave and spuious radio-frequency power amplifier, chip and communication terminal |
| US9979360B1 (en) * | 2016-12-20 | 2018-05-22 | Nxp Usa, Inc. | Multi baseband termination components for RF power amplifier with enhanced video bandwidth |
| US10855235B2 (en) | 2017-12-27 | 2020-12-01 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| CN113632374B (en) * | 2019-04-04 | 2024-08-30 | 三菱电机株式会社 | Power Amplifier |
| US12537485B2 (en) * | 2021-02-24 | 2026-01-27 | Mitsubishi Electric Corporation | Power amplifier |
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| JP2002171138A (en) * | 2000-12-01 | 2002-06-14 | Nec Corp | Microwave power amplifier |
| US8170505B2 (en) * | 2008-07-30 | 2012-05-01 | Qualcomm Incorporated | Driver amplifier having a programmable output impedance adjustment circuit |
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